150352fa7SAlexander Shishkin // SPDX-License-Identifier: GPL-2.0 22b0b16d3SAlexander Shishkin /* 32b0b16d3SAlexander Shishkin * Intel(R) Trace Hub pci driver 42b0b16d3SAlexander Shishkin * 52b0b16d3SAlexander Shishkin * Copyright (C) 2014-2015 Intel Corporation. 62b0b16d3SAlexander Shishkin */ 72b0b16d3SAlexander Shishkin 82b0b16d3SAlexander Shishkin #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 92b0b16d3SAlexander Shishkin 102b0b16d3SAlexander Shishkin #include <linux/types.h> 112b0b16d3SAlexander Shishkin #include <linux/module.h> 122b0b16d3SAlexander Shishkin #include <linux/device.h> 132b0b16d3SAlexander Shishkin #include <linux/sysfs.h> 142b0b16d3SAlexander Shishkin #include <linux/pci.h> 152b0b16d3SAlexander Shishkin 162b0b16d3SAlexander Shishkin #include "intel_th.h" 172b0b16d3SAlexander Shishkin 182b0b16d3SAlexander Shishkin #define DRIVER_NAME "intel_th_pci" 192b0b16d3SAlexander Shishkin 20db73a059SAlexander Shishkin enum { 21db73a059SAlexander Shishkin TH_PCI_CONFIG_BAR = 0, 22db73a059SAlexander Shishkin TH_PCI_STH_SW_BAR = 2, 23fc027f4cSAlexander Shishkin TH_PCI_RTIT_BAR = 4, 24db73a059SAlexander Shishkin }; 25db73a059SAlexander Shishkin 26db73a059SAlexander Shishkin #define BAR_MASK (BIT(TH_PCI_CONFIG_BAR) | BIT(TH_PCI_STH_SW_BAR)) 272b0b16d3SAlexander Shishkin 28a0e7df33SAlexander Shishkin #define PCI_REG_NPKDSC 0x80 29a0e7df33SAlexander Shishkin #define NPKDSC_TSACT BIT(5) 30a0e7df33SAlexander Shishkin 31a0e7df33SAlexander Shishkin static int intel_th_pci_activate(struct intel_th *th) 32a0e7df33SAlexander Shishkin { 33a0e7df33SAlexander Shishkin struct pci_dev *pdev = to_pci_dev(th->dev); 34a0e7df33SAlexander Shishkin u32 npkdsc; 35a0e7df33SAlexander Shishkin int err; 36a0e7df33SAlexander Shishkin 37a0e7df33SAlexander Shishkin if (!INTEL_TH_CAP(th, tscu_enable)) 38a0e7df33SAlexander Shishkin return 0; 39a0e7df33SAlexander Shishkin 40a0e7df33SAlexander Shishkin err = pci_read_config_dword(pdev, PCI_REG_NPKDSC, &npkdsc); 41a0e7df33SAlexander Shishkin if (!err) { 42a0e7df33SAlexander Shishkin npkdsc |= NPKDSC_TSACT; 43a0e7df33SAlexander Shishkin err = pci_write_config_dword(pdev, PCI_REG_NPKDSC, npkdsc); 44a0e7df33SAlexander Shishkin } 45a0e7df33SAlexander Shishkin 46a0e7df33SAlexander Shishkin if (err) 47a0e7df33SAlexander Shishkin dev_err(&pdev->dev, "failed to read NPKDSC register\n"); 48a0e7df33SAlexander Shishkin 49a0e7df33SAlexander Shishkin return err; 50a0e7df33SAlexander Shishkin } 51a0e7df33SAlexander Shishkin 52a0e7df33SAlexander Shishkin static void intel_th_pci_deactivate(struct intel_th *th) 53a0e7df33SAlexander Shishkin { 54a0e7df33SAlexander Shishkin struct pci_dev *pdev = to_pci_dev(th->dev); 55a0e7df33SAlexander Shishkin u32 npkdsc; 56a0e7df33SAlexander Shishkin int err; 57a0e7df33SAlexander Shishkin 58a0e7df33SAlexander Shishkin if (!INTEL_TH_CAP(th, tscu_enable)) 59a0e7df33SAlexander Shishkin return; 60a0e7df33SAlexander Shishkin 61a0e7df33SAlexander Shishkin err = pci_read_config_dword(pdev, PCI_REG_NPKDSC, &npkdsc); 62a0e7df33SAlexander Shishkin if (!err) { 63a0e7df33SAlexander Shishkin npkdsc |= NPKDSC_TSACT; 64a0e7df33SAlexander Shishkin err = pci_write_config_dword(pdev, PCI_REG_NPKDSC, npkdsc); 65a0e7df33SAlexander Shishkin } 66a0e7df33SAlexander Shishkin 67a0e7df33SAlexander Shishkin if (err) 68a0e7df33SAlexander Shishkin dev_err(&pdev->dev, "failed to read NPKDSC register\n"); 69a0e7df33SAlexander Shishkin } 70a0e7df33SAlexander Shishkin 712b0b16d3SAlexander Shishkin static int intel_th_pci_probe(struct pci_dev *pdev, 722b0b16d3SAlexander Shishkin const struct pci_device_id *id) 732b0b16d3SAlexander Shishkin { 743321371bSAlexander Shishkin struct intel_th_drvdata *drvdata = (void *)id->driver_data; 757b7036d4SAlexander Shishkin struct resource resource[TH_MMIO_END + TH_NVEC_MAX] = { 76db73a059SAlexander Shishkin [TH_MMIO_CONFIG] = pdev->resource[TH_PCI_CONFIG_BAR], 77db73a059SAlexander Shishkin [TH_MMIO_SW] = pdev->resource[TH_PCI_STH_SW_BAR], 78db73a059SAlexander Shishkin }; 797b7036d4SAlexander Shishkin int err, r = TH_MMIO_SW + 1, i; 802b0b16d3SAlexander Shishkin struct intel_th *th; 812b0b16d3SAlexander Shishkin 822b0b16d3SAlexander Shishkin err = pcim_enable_device(pdev); 832b0b16d3SAlexander Shishkin if (err) 842b0b16d3SAlexander Shishkin return err; 852b0b16d3SAlexander Shishkin 862b0b16d3SAlexander Shishkin err = pcim_iomap_regions_request_all(pdev, BAR_MASK, DRIVER_NAME); 872b0b16d3SAlexander Shishkin if (err) 882b0b16d3SAlexander Shishkin return err; 892b0b16d3SAlexander Shishkin 90fc027f4cSAlexander Shishkin if (pdev->resource[TH_PCI_RTIT_BAR].start) { 91fc027f4cSAlexander Shishkin resource[TH_MMIO_RTIT] = pdev->resource[TH_PCI_RTIT_BAR]; 92fc027f4cSAlexander Shishkin r++; 93fc027f4cSAlexander Shishkin } 94fc027f4cSAlexander Shishkin 957b7036d4SAlexander Shishkin err = pci_alloc_irq_vectors(pdev, 1, 8, PCI_IRQ_ALL_TYPES); 967b7036d4SAlexander Shishkin if (err > 0) 977b7036d4SAlexander Shishkin for (i = 0; i < err; i++, r++) { 9862a59302SAlexander Shishkin resource[r].flags = IORESOURCE_IRQ; 997b7036d4SAlexander Shishkin resource[r].start = pci_irq_vector(pdev, i); 10062a59302SAlexander Shishkin } 10162a59302SAlexander Shishkin 10262a59302SAlexander Shishkin th = intel_th_alloc(&pdev->dev, drvdata, resource, r); 1032b0b16d3SAlexander Shishkin if (IS_ERR(th)) 1042b0b16d3SAlexander Shishkin return PTR_ERR(th); 1052b0b16d3SAlexander Shishkin 106a0e7df33SAlexander Shishkin th->activate = intel_th_pci_activate; 107a0e7df33SAlexander Shishkin th->deactivate = intel_th_pci_deactivate; 108a0e7df33SAlexander Shishkin 109e9b2b3e7SAlexander Shishkin pci_set_master(pdev); 110e9b2b3e7SAlexander Shishkin 1112b0b16d3SAlexander Shishkin return 0; 1122b0b16d3SAlexander Shishkin } 1132b0b16d3SAlexander Shishkin 1142b0b16d3SAlexander Shishkin static void intel_th_pci_remove(struct pci_dev *pdev) 1152b0b16d3SAlexander Shishkin { 1162b0b16d3SAlexander Shishkin struct intel_th *th = pci_get_drvdata(pdev); 1172b0b16d3SAlexander Shishkin 1182b0b16d3SAlexander Shishkin intel_th_free(th); 1197b7036d4SAlexander Shishkin 1207b7036d4SAlexander Shishkin pci_free_irq_vectors(pdev); 1212b0b16d3SAlexander Shishkin } 1222b0b16d3SAlexander Shishkin 123a0e7df33SAlexander Shishkin static const struct intel_th_drvdata intel_th_2x = { 124a0e7df33SAlexander Shishkin .tscu_enable = 1, 1254c5bb6ebSAlexander Shishkin .has_mintctl = 1, 126a0e7df33SAlexander Shishkin }; 127a0e7df33SAlexander Shishkin 1282b0b16d3SAlexander Shishkin static const struct pci_device_id intel_th_pci_id_table[] = { 1292b0b16d3SAlexander Shishkin { 1302b0b16d3SAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x9d26), 1312b0b16d3SAlexander Shishkin .driver_data = (kernel_ulong_t)0, 1322b0b16d3SAlexander Shishkin }, 1332b0b16d3SAlexander Shishkin { 1342b0b16d3SAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa126), 1352b0b16d3SAlexander Shishkin .driver_data = (kernel_ulong_t)0, 1362b0b16d3SAlexander Shishkin }, 1376396b912SAlexander Shishkin { 1386396b912SAlexander Shishkin /* Apollo Lake */ 1396396b912SAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x5a8e), 1406396b912SAlexander Shishkin .driver_data = (kernel_ulong_t)0, 1416396b912SAlexander Shishkin }, 1423f040887SAlexander Shishkin { 1433f040887SAlexander Shishkin /* Broxton */ 1443f040887SAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0a80), 1453f040887SAlexander Shishkin .driver_data = (kernel_ulong_t)0, 1463f040887SAlexander Shishkin }, 147aaa3ca82SAlexander Shishkin { 148aaa3ca82SAlexander Shishkin /* Broxton B-step */ 149aaa3ca82SAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1a8e), 150aaa3ca82SAlexander Shishkin .driver_data = (kernel_ulong_t)0, 151aaa3ca82SAlexander Shishkin }, 1527a1a47ceSAlexander Shishkin { 1537a1a47ceSAlexander Shishkin /* Kaby Lake PCH-H */ 1547a1a47ceSAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa2a6), 1557a1a47ceSAlexander Shishkin .driver_data = (kernel_ulong_t)0, 1567a1a47ceSAlexander Shishkin }, 1575118ccd3SAlexander Shishkin { 1585118ccd3SAlexander Shishkin /* Denverton */ 1595118ccd3SAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x19e1), 1605118ccd3SAlexander Shishkin .driver_data = (kernel_ulong_t)0, 1615118ccd3SAlexander Shishkin }, 162340837f9SAlexander Shishkin { 16324600840SAlexander Shishkin /* Lewisburg PCH */ 16424600840SAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa1a6), 16524600840SAlexander Shishkin .driver_data = (kernel_ulong_t)0, 16624600840SAlexander Shishkin }, 16724600840SAlexander Shishkin { 168164eb56eSAlexander Shishkin /* Lewisburg PCH */ 169164eb56eSAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa226), 170164eb56eSAlexander Shishkin .driver_data = (kernel_ulong_t)0, 171164eb56eSAlexander Shishkin }, 172164eb56eSAlexander Shishkin { 173340837f9SAlexander Shishkin /* Gemini Lake */ 174340837f9SAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x318e), 175a0e7df33SAlexander Shishkin .driver_data = (kernel_ulong_t)&intel_th_2x, 176340837f9SAlexander Shishkin }, 17784331e13SAlexander Shishkin { 17884331e13SAlexander Shishkin /* Cannon Lake H */ 17984331e13SAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa326), 180a0e7df33SAlexander Shishkin .driver_data = (kernel_ulong_t)&intel_th_2x, 18184331e13SAlexander Shishkin }, 182efb3669eSAlexander Shishkin { 183efb3669eSAlexander Shishkin /* Cannon Lake LP */ 184efb3669eSAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x9da6), 185a0e7df33SAlexander Shishkin .driver_data = (kernel_ulong_t)&intel_th_2x, 186efb3669eSAlexander Shishkin }, 187920ce7c3SAlexander Shishkin { 188920ce7c3SAlexander Shishkin /* Cedar Fork PCH */ 189920ce7c3SAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x18e1), 190920ce7c3SAlexander Shishkin .driver_data = (kernel_ulong_t)&intel_th_2x, 191920ce7c3SAlexander Shishkin }, 19259d08d00SAlexander Shishkin { 19359d08d00SAlexander Shishkin /* Ice Lake PCH */ 19459d08d00SAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x34a6), 19559d08d00SAlexander Shishkin .driver_data = (kernel_ulong_t)&intel_th_2x, 19659d08d00SAlexander Shishkin }, 197e60e9a4bSAlexander Shishkin { 198e60e9a4bSAlexander Shishkin /* Comet Lake */ 199e60e9a4bSAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x02a6), 200e60e9a4bSAlexander Shishkin .driver_data = (kernel_ulong_t)&intel_th_2x, 201e60e9a4bSAlexander Shishkin }, 2024aa5aed2SAlexander Shishkin { 203*3adbb571SAlexander Shishkin /* Comet Lake PCH */ 204*3adbb571SAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x06a6), 205*3adbb571SAlexander Shishkin .driver_data = (kernel_ulong_t)&intel_th_2x, 206*3adbb571SAlexander Shishkin }, 207*3adbb571SAlexander Shishkin { 2084aa5aed2SAlexander Shishkin /* Ice Lake NNPI */ 2094aa5aed2SAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x45c5), 2104aa5aed2SAlexander Shishkin .driver_data = (kernel_ulong_t)&intel_th_2x, 2114aa5aed2SAlexander Shishkin }, 2129c78255fSAlexander Shishkin { 2139c78255fSAlexander Shishkin /* Tiger Lake PCH */ 2149c78255fSAlexander Shishkin PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa0a6), 2159c78255fSAlexander Shishkin .driver_data = (kernel_ulong_t)&intel_th_2x, 2169c78255fSAlexander Shishkin }, 2172b0b16d3SAlexander Shishkin { 0 }, 2182b0b16d3SAlexander Shishkin }; 2192b0b16d3SAlexander Shishkin 2202b0b16d3SAlexander Shishkin MODULE_DEVICE_TABLE(pci, intel_th_pci_id_table); 2212b0b16d3SAlexander Shishkin 2222b0b16d3SAlexander Shishkin static struct pci_driver intel_th_pci_driver = { 2232b0b16d3SAlexander Shishkin .name = DRIVER_NAME, 2242b0b16d3SAlexander Shishkin .id_table = intel_th_pci_id_table, 2252b0b16d3SAlexander Shishkin .probe = intel_th_pci_probe, 2262b0b16d3SAlexander Shishkin .remove = intel_th_pci_remove, 2272b0b16d3SAlexander Shishkin }; 2282b0b16d3SAlexander Shishkin 2292b0b16d3SAlexander Shishkin module_pci_driver(intel_th_pci_driver); 2302b0b16d3SAlexander Shishkin 2312b0b16d3SAlexander Shishkin MODULE_LICENSE("GPL v2"); 2322b0b16d3SAlexander Shishkin MODULE_DESCRIPTION("Intel(R) Trace Hub PCI controller driver"); 2332b0b16d3SAlexander Shishkin MODULE_AUTHOR("Alexander Shishkin <alexander.shishkin@intel.com>"); 234