1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. 4 * 5 * Description: CoreSight Trace Port Interface Unit driver 6 */ 7 8 #include <linux/acpi.h> 9 #include <linux/amba/bus.h> 10 #include <linux/atomic.h> 11 #include <linux/clk.h> 12 #include <linux/coresight.h> 13 #include <linux/device.h> 14 #include <linux/err.h> 15 #include <linux/init.h> 16 #include <linux/io.h> 17 #include <linux/kernel.h> 18 #include <linux/platform_device.h> 19 #include <linux/pm_runtime.h> 20 #include <linux/slab.h> 21 22 #include "coresight-priv.h" 23 24 #define TPIU_SUPP_PORTSZ 0x000 25 #define TPIU_CURR_PORTSZ 0x004 26 #define TPIU_SUPP_TRIGMODES 0x100 27 #define TPIU_TRIG_CNTRVAL 0x104 28 #define TPIU_TRIG_MULT 0x108 29 #define TPIU_SUPP_TESTPATM 0x200 30 #define TPIU_CURR_TESTPATM 0x204 31 #define TPIU_TEST_PATREPCNTR 0x208 32 #define TPIU_FFSR 0x300 33 #define TPIU_FFCR 0x304 34 #define TPIU_FSYNC_CNTR 0x308 35 #define TPIU_EXTCTL_INPORT 0x400 36 #define TPIU_EXTCTL_OUTPORT 0x404 37 #define TPIU_ITTRFLINACK 0xee4 38 #define TPIU_ITTRFLIN 0xee8 39 #define TPIU_ITATBDATA0 0xeec 40 #define TPIU_ITATBCTR2 0xef0 41 #define TPIU_ITATBCTR1 0xef4 42 #define TPIU_ITATBCTR0 0xef8 43 44 /** register definition **/ 45 /* FFSR - 0x300 */ 46 #define FFSR_FT_STOPPED_BIT 1 47 /* FFCR - 0x304 */ 48 #define FFCR_FON_MAN_BIT 6 49 #define FFCR_FON_MAN BIT(6) 50 #define FFCR_STOP_FI BIT(12) 51 52 DEFINE_CORESIGHT_DEVLIST(tpiu_devs, "tpiu"); 53 54 /* 55 * @base: memory mapped base address for this component. 56 * @atclk: optional clock for the core parts of the TPIU. 57 * @pclk: APB clock if present, otherwise NULL 58 * @csdev: component vitals needed by the framework. 59 */ 60 struct tpiu_drvdata { 61 void __iomem *base; 62 struct clk *atclk; 63 struct clk *pclk; 64 struct coresight_device *csdev; 65 spinlock_t spinlock; 66 }; 67 68 static void tpiu_enable_hw(struct csdev_access *csa) 69 { 70 CS_UNLOCK(csa->base); 71 72 /* TODO: fill this up */ 73 74 CS_LOCK(csa->base); 75 } 76 77 static int tpiu_enable(struct coresight_device *csdev, enum cs_mode mode, 78 void *__unused) 79 { 80 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 81 82 guard(spinlock)(&drvdata->spinlock); 83 tpiu_enable_hw(&csdev->access); 84 csdev->refcnt++; 85 dev_dbg(&csdev->dev, "TPIU enabled\n"); 86 return 0; 87 } 88 89 static void tpiu_disable_hw(struct csdev_access *csa) 90 { 91 CS_UNLOCK(csa->base); 92 93 /* Clear formatter and stop on flush */ 94 csdev_access_relaxed_write32(csa, FFCR_STOP_FI, TPIU_FFCR); 95 /* Generate manual flush */ 96 csdev_access_relaxed_write32(csa, FFCR_STOP_FI | FFCR_FON_MAN, TPIU_FFCR); 97 /* Wait for flush to complete */ 98 coresight_timeout(csa, TPIU_FFCR, FFCR_FON_MAN_BIT, 0); 99 /* Wait for formatter to stop */ 100 coresight_timeout(csa, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1); 101 102 CS_LOCK(csa->base); 103 } 104 105 static int tpiu_disable(struct coresight_device *csdev) 106 { 107 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 108 109 guard(spinlock)(&drvdata->spinlock); 110 csdev->refcnt--; 111 if (csdev->refcnt) 112 return -EBUSY; 113 114 tpiu_disable_hw(&csdev->access); 115 116 dev_dbg(&csdev->dev, "TPIU disabled\n"); 117 return 0; 118 } 119 120 static const struct coresight_ops_sink tpiu_sink_ops = { 121 .enable = tpiu_enable, 122 .disable = tpiu_disable, 123 }; 124 125 static const struct coresight_ops tpiu_cs_ops = { 126 .sink_ops = &tpiu_sink_ops, 127 }; 128 129 static int __tpiu_probe(struct device *dev, struct resource *res) 130 { 131 void __iomem *base; 132 struct coresight_platform_data *pdata = NULL; 133 struct tpiu_drvdata *drvdata; 134 struct coresight_desc desc = { 0 }; 135 int ret; 136 137 desc.name = coresight_alloc_device_name(&tpiu_devs, dev); 138 if (!desc.name) 139 return -ENOMEM; 140 141 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 142 if (!drvdata) 143 return -ENOMEM; 144 145 spin_lock_init(&drvdata->spinlock); 146 147 ret = coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); 148 if (ret) 149 return ret; 150 151 dev_set_drvdata(dev, drvdata); 152 153 /* Validity for the resource is already checked by the AMBA core */ 154 base = devm_ioremap_resource(dev, res); 155 if (IS_ERR(base)) 156 return PTR_ERR(base); 157 158 drvdata->base = base; 159 desc.access = CSDEV_ACCESS_IOMEM(base); 160 161 /* Disable tpiu to support older devices */ 162 tpiu_disable_hw(&desc.access); 163 164 pdata = coresight_get_platform_data(dev); 165 if (IS_ERR(pdata)) 166 return PTR_ERR(pdata); 167 dev->platform_data = pdata; 168 169 desc.type = CORESIGHT_DEV_TYPE_SINK; 170 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT; 171 desc.ops = &tpiu_cs_ops; 172 desc.pdata = pdata; 173 desc.dev = dev; 174 drvdata->csdev = coresight_register(&desc); 175 176 if (!IS_ERR(drvdata->csdev)) 177 return 0; 178 179 return PTR_ERR(drvdata->csdev); 180 } 181 182 static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) 183 { 184 int ret; 185 186 ret = __tpiu_probe(&adev->dev, &adev->res); 187 if (!ret) 188 pm_runtime_put(&adev->dev); 189 return ret; 190 } 191 192 static void __tpiu_remove(struct device *dev) 193 { 194 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev); 195 196 coresight_unregister(drvdata->csdev); 197 } 198 199 static void tpiu_remove(struct amba_device *adev) 200 { 201 __tpiu_remove(&adev->dev); 202 } 203 204 #ifdef CONFIG_PM 205 static int tpiu_runtime_suspend(struct device *dev) 206 { 207 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev); 208 209 clk_disable_unprepare(drvdata->atclk); 210 clk_disable_unprepare(drvdata->pclk); 211 212 return 0; 213 } 214 215 static int tpiu_runtime_resume(struct device *dev) 216 { 217 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev); 218 int ret; 219 220 ret = clk_prepare_enable(drvdata->pclk); 221 if (ret) 222 return ret; 223 224 ret = clk_prepare_enable(drvdata->atclk); 225 if (ret) 226 clk_disable_unprepare(drvdata->pclk); 227 228 return ret; 229 } 230 #endif 231 232 static const struct dev_pm_ops tpiu_dev_pm_ops = { 233 SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL) 234 }; 235 236 static const struct amba_id tpiu_ids[] = { 237 { 238 .id = 0x000bb912, 239 .mask = 0x000fffff, 240 }, 241 { 242 .id = 0x0004b912, 243 .mask = 0x0007ffff, 244 }, 245 { 246 /* Coresight SoC-600 */ 247 .id = 0x000bb9e7, 248 .mask = 0x000fffff, 249 }, 250 { 0, 0, NULL }, 251 }; 252 253 MODULE_DEVICE_TABLE(amba, tpiu_ids); 254 255 static struct amba_driver tpiu_driver = { 256 .drv = { 257 .name = "coresight-tpiu", 258 .pm = &tpiu_dev_pm_ops, 259 .suppress_bind_attrs = true, 260 }, 261 .probe = tpiu_probe, 262 .remove = tpiu_remove, 263 .id_table = tpiu_ids, 264 }; 265 266 static int tpiu_platform_probe(struct platform_device *pdev) 267 { 268 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 269 int ret; 270 271 pm_runtime_get_noresume(&pdev->dev); 272 pm_runtime_set_active(&pdev->dev); 273 pm_runtime_enable(&pdev->dev); 274 275 ret = __tpiu_probe(&pdev->dev, res); 276 pm_runtime_put(&pdev->dev); 277 if (ret) 278 pm_runtime_disable(&pdev->dev); 279 280 return ret; 281 } 282 283 static void tpiu_platform_remove(struct platform_device *pdev) 284 { 285 struct tpiu_drvdata *drvdata = dev_get_drvdata(&pdev->dev); 286 287 if (WARN_ON(!drvdata)) 288 return; 289 290 __tpiu_remove(&pdev->dev); 291 pm_runtime_disable(&pdev->dev); 292 } 293 294 #ifdef CONFIG_ACPI 295 static const struct acpi_device_id tpiu_acpi_ids[] = { 296 {"ARMHC979", 0, 0, 0}, /* ARM CoreSight TPIU */ 297 {} 298 }; 299 MODULE_DEVICE_TABLE(acpi, tpiu_acpi_ids); 300 #endif 301 302 static struct platform_driver tpiu_platform_driver = { 303 .probe = tpiu_platform_probe, 304 .remove = tpiu_platform_remove, 305 .driver = { 306 .name = "coresight-tpiu-platform", 307 .acpi_match_table = ACPI_PTR(tpiu_acpi_ids), 308 .suppress_bind_attrs = true, 309 .pm = &tpiu_dev_pm_ops, 310 }, 311 }; 312 313 static int __init tpiu_init(void) 314 { 315 return coresight_init_driver("tpiu", &tpiu_driver, &tpiu_platform_driver, THIS_MODULE); 316 } 317 318 static void __exit tpiu_exit(void) 319 { 320 coresight_remove_driver(&tpiu_driver, &tpiu_platform_driver); 321 } 322 module_init(tpiu_init); 323 module_exit(tpiu_exit); 324 325 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>"); 326 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>"); 327 MODULE_DESCRIPTION("Arm CoreSight TPIU (Trace Port Interface Unit) driver"); 328 MODULE_LICENSE("GPL v2"); 329