1 /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. 2 * 3 * Description: CoreSight Trace Port Interface Unit driver 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 and 7 * only version 2 as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/device.h> 18 #include <linux/io.h> 19 #include <linux/err.h> 20 #include <linux/slab.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/coresight.h> 23 #include <linux/amba/bus.h> 24 #include <linux/clk.h> 25 26 #include "coresight-priv.h" 27 28 #define TPIU_SUPP_PORTSZ 0x000 29 #define TPIU_CURR_PORTSZ 0x004 30 #define TPIU_SUPP_TRIGMODES 0x100 31 #define TPIU_TRIG_CNTRVAL 0x104 32 #define TPIU_TRIG_MULT 0x108 33 #define TPIU_SUPP_TESTPATM 0x200 34 #define TPIU_CURR_TESTPATM 0x204 35 #define TPIU_TEST_PATREPCNTR 0x208 36 #define TPIU_FFSR 0x300 37 #define TPIU_FFCR 0x304 38 #define TPIU_FSYNC_CNTR 0x308 39 #define TPIU_EXTCTL_INPORT 0x400 40 #define TPIU_EXTCTL_OUTPORT 0x404 41 #define TPIU_ITTRFLINACK 0xee4 42 #define TPIU_ITTRFLIN 0xee8 43 #define TPIU_ITATBDATA0 0xeec 44 #define TPIU_ITATBCTR2 0xef0 45 #define TPIU_ITATBCTR1 0xef4 46 #define TPIU_ITATBCTR0 0xef8 47 48 /** register definition **/ 49 /* FFCR - 0x304 */ 50 #define FFCR_FON_MAN BIT(6) 51 52 /** 53 * @base: memory mapped base address for this component. 54 * @dev: the device entity associated to this component. 55 * @atclk: optional clock for the core parts of the TPIU. 56 * @csdev: component vitals needed by the framework. 57 */ 58 struct tpiu_drvdata { 59 void __iomem *base; 60 struct device *dev; 61 struct clk *atclk; 62 struct coresight_device *csdev; 63 }; 64 65 static void tpiu_enable_hw(struct tpiu_drvdata *drvdata) 66 { 67 CS_UNLOCK(drvdata->base); 68 69 /* TODO: fill this up */ 70 71 CS_LOCK(drvdata->base); 72 } 73 74 static int tpiu_enable(struct coresight_device *csdev, u32 mode) 75 { 76 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 77 78 tpiu_enable_hw(drvdata); 79 80 dev_info(drvdata->dev, "TPIU enabled\n"); 81 return 0; 82 } 83 84 static void tpiu_disable_hw(struct tpiu_drvdata *drvdata) 85 { 86 CS_UNLOCK(drvdata->base); 87 88 /* Clear formatter controle reg. */ 89 writel_relaxed(0x0, drvdata->base + TPIU_FFCR); 90 /* Generate manual flush */ 91 writel_relaxed(FFCR_FON_MAN, drvdata->base + TPIU_FFCR); 92 93 CS_LOCK(drvdata->base); 94 } 95 96 static void tpiu_disable(struct coresight_device *csdev) 97 { 98 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 99 100 tpiu_disable_hw(drvdata); 101 102 dev_info(drvdata->dev, "TPIU disabled\n"); 103 } 104 105 static const struct coresight_ops_sink tpiu_sink_ops = { 106 .enable = tpiu_enable, 107 .disable = tpiu_disable, 108 }; 109 110 static const struct coresight_ops tpiu_cs_ops = { 111 .sink_ops = &tpiu_sink_ops, 112 }; 113 114 static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) 115 { 116 int ret; 117 void __iomem *base; 118 struct device *dev = &adev->dev; 119 struct coresight_platform_data *pdata = NULL; 120 struct tpiu_drvdata *drvdata; 121 struct resource *res = &adev->res; 122 struct coresight_desc *desc; 123 struct device_node *np = adev->dev.of_node; 124 125 if (np) { 126 pdata = of_get_coresight_platform_data(dev, np); 127 if (IS_ERR(pdata)) 128 return PTR_ERR(pdata); 129 adev->dev.platform_data = pdata; 130 } 131 132 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 133 if (!drvdata) 134 return -ENOMEM; 135 136 drvdata->dev = &adev->dev; 137 drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */ 138 if (!IS_ERR(drvdata->atclk)) { 139 ret = clk_prepare_enable(drvdata->atclk); 140 if (ret) 141 return ret; 142 } 143 dev_set_drvdata(dev, drvdata); 144 145 /* Validity for the resource is already checked by the AMBA core */ 146 base = devm_ioremap_resource(dev, res); 147 if (IS_ERR(base)) 148 return PTR_ERR(base); 149 150 drvdata->base = base; 151 152 /* Disable tpiu to support older devices */ 153 tpiu_disable_hw(drvdata); 154 155 pm_runtime_put(&adev->dev); 156 157 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); 158 if (!desc) 159 return -ENOMEM; 160 161 desc->type = CORESIGHT_DEV_TYPE_SINK; 162 desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT; 163 desc->ops = &tpiu_cs_ops; 164 desc->pdata = pdata; 165 desc->dev = dev; 166 drvdata->csdev = coresight_register(desc); 167 if (IS_ERR(drvdata->csdev)) 168 return PTR_ERR(drvdata->csdev); 169 170 return 0; 171 } 172 173 #ifdef CONFIG_PM 174 static int tpiu_runtime_suspend(struct device *dev) 175 { 176 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev); 177 178 if (drvdata && !IS_ERR(drvdata->atclk)) 179 clk_disable_unprepare(drvdata->atclk); 180 181 return 0; 182 } 183 184 static int tpiu_runtime_resume(struct device *dev) 185 { 186 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev); 187 188 if (drvdata && !IS_ERR(drvdata->atclk)) 189 clk_prepare_enable(drvdata->atclk); 190 191 return 0; 192 } 193 #endif 194 195 static const struct dev_pm_ops tpiu_dev_pm_ops = { 196 SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL) 197 }; 198 199 static struct amba_id tpiu_ids[] = { 200 { 201 .id = 0x0003b912, 202 .mask = 0x0003ffff, 203 }, 204 { 205 .id = 0x0004b912, 206 .mask = 0x0007ffff, 207 }, 208 { 0, 0}, 209 }; 210 211 static struct amba_driver tpiu_driver = { 212 .drv = { 213 .name = "coresight-tpiu", 214 .owner = THIS_MODULE, 215 .pm = &tpiu_dev_pm_ops, 216 .suppress_bind_attrs = true, 217 }, 218 .probe = tpiu_probe, 219 .id_table = tpiu_ids, 220 }; 221 builtin_amba_driver(tpiu_driver); 222