1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6 #include <linux/amba/bus.h> 7 #include <linux/bitfield.h> 8 #include <linux/coresight.h> 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/fs.h> 12 #include <linux/io.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/platform_device.h> 17 18 #include "coresight-priv.h" 19 #include "coresight-tpda.h" 20 #include "coresight-trace-id.h" 21 #include "coresight-tpdm.h" 22 23 DEFINE_CORESIGHT_DEVLIST(tpda_devs, "tpda"); 24 25 static bool coresight_device_is_tpdm(struct coresight_device *csdev) 26 { 27 return (coresight_is_device_source(csdev)) && 28 (csdev->subtype.source_subtype == 29 CORESIGHT_DEV_SUBTYPE_SOURCE_TPDM); 30 } 31 32 static void tpda_clear_element_size(struct coresight_device *csdev) 33 { 34 struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 35 36 drvdata->dsb_esize = 0; 37 drvdata->cmb_esize = 0; 38 } 39 40 static void tpda_set_element_size(struct tpda_drvdata *drvdata, u32 *val) 41 { 42 /* Clear all relevant fields */ 43 *val &= ~(TPDA_Pn_CR_DSBSIZE | TPDA_Pn_CR_CMBSIZE); 44 45 if (drvdata->dsb_esize == 64) 46 *val |= TPDA_Pn_CR_DSBSIZE; 47 else if (drvdata->dsb_esize == 32) 48 *val &= ~TPDA_Pn_CR_DSBSIZE; 49 50 if (drvdata->cmb_esize == 64) 51 *val |= FIELD_PREP(TPDA_Pn_CR_CMBSIZE, 0x2); 52 else if (drvdata->cmb_esize == 32) 53 *val |= FIELD_PREP(TPDA_Pn_CR_CMBSIZE, 0x1); 54 else if (drvdata->cmb_esize == 8) 55 *val &= ~TPDA_Pn_CR_CMBSIZE; 56 } 57 58 /* 59 * Read the element size from the TPDM device. One TPDM must have at least one of the 60 * element size property. 61 * Returns 62 * 0 - The element size property is read 63 * Others - Cannot read the property of the element size 64 */ 65 static int tpdm_read_element_size(struct tpda_drvdata *drvdata, 66 struct coresight_device *csdev) 67 { 68 int rc = -EINVAL; 69 struct tpdm_drvdata *tpdm_data = dev_get_drvdata(csdev->dev.parent); 70 71 if (tpdm_data->dsb) { 72 rc = fwnode_property_read_u32(dev_fwnode(csdev->dev.parent), 73 "qcom,dsb-element-bits", &drvdata->dsb_esize); 74 } 75 76 if (tpdm_data->cmb) { 77 rc = fwnode_property_read_u32(dev_fwnode(csdev->dev.parent), 78 "qcom,cmb-element-bits", &drvdata->cmb_esize); 79 } 80 81 if (rc) 82 dev_warn_once(&csdev->dev, 83 "Failed to read TPDM Element size: %d\n", rc); 84 85 return rc; 86 } 87 88 /* 89 * Search and read element data size from the TPDM node in 90 * the devicetree. Each input port of TPDA is connected to 91 * a TPDM. Different TPDM supports different types of dataset, 92 * and some may support more than one type of dataset. 93 * Parameter "inport" is used to pass in the input port number 94 * of TPDA, and it is set to -1 in the recursize call. 95 */ 96 static int tpda_get_element_size(struct tpda_drvdata *drvdata, 97 struct coresight_device *csdev, 98 int inport) 99 { 100 int rc = 0; 101 int i; 102 struct coresight_device *in; 103 104 for (i = 0; i < csdev->pdata->nr_inconns; i++) { 105 in = csdev->pdata->in_conns[i]->src_dev; 106 if (!in) 107 continue; 108 109 /* Ignore the paths that do not match port */ 110 if (inport >= 0 && 111 csdev->pdata->in_conns[i]->dest_port != inport) 112 continue; 113 114 /* 115 * If this port has a hardcoded filter, use the source 116 * device directly. 117 */ 118 if (csdev->pdata->in_conns[i]->filter_src_fwnode) { 119 in = csdev->pdata->in_conns[i]->filter_src_dev; 120 if (!in) 121 continue; 122 } 123 124 if (coresight_device_is_tpdm(in)) { 125 if (drvdata->dsb_esize || drvdata->cmb_esize) 126 return -EEXIST; 127 rc = tpdm_read_element_size(drvdata, in); 128 if (rc) 129 return rc; 130 } else { 131 /* Recurse down the path */ 132 rc = tpda_get_element_size(drvdata, in, -1); 133 if (rc) 134 return rc; 135 } 136 } 137 138 return rc; 139 } 140 141 /* Settings pre enabling port control register */ 142 static void tpda_enable_pre_port(struct tpda_drvdata *drvdata) 143 { 144 u32 val; 145 146 val = readl_relaxed(drvdata->base + TPDA_CR); 147 val &= ~TPDA_CR_ATID; 148 val |= FIELD_PREP(TPDA_CR_ATID, drvdata->atid); 149 writel_relaxed(val, drvdata->base + TPDA_CR); 150 } 151 152 static int tpda_enable_port(struct tpda_drvdata *drvdata, int port) 153 { 154 u32 val; 155 int rc; 156 157 val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port)); 158 tpda_clear_element_size(drvdata->csdev); 159 rc = tpda_get_element_size(drvdata, drvdata->csdev, port); 160 if (!rc && (drvdata->dsb_esize || drvdata->cmb_esize)) { 161 tpda_set_element_size(drvdata, &val); 162 /* Enable the port */ 163 val |= TPDA_Pn_CR_ENA; 164 writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port)); 165 } else if (rc == -EEXIST) 166 dev_warn_once(&drvdata->csdev->dev, 167 "Detected multiple TPDMs on port %d", port); 168 else 169 dev_warn_once(&drvdata->csdev->dev, 170 "Didn't find TPDM element size"); 171 172 return rc; 173 } 174 175 static int __tpda_enable(struct tpda_drvdata *drvdata, int port) 176 { 177 int ret; 178 179 CS_UNLOCK(drvdata->base); 180 181 /* 182 * Only do pre-port enable for first port that calls enable when the 183 * device's main refcount is still 0 184 */ 185 lockdep_assert_held(&drvdata->spinlock); 186 if (!drvdata->csdev->refcnt) 187 tpda_enable_pre_port(drvdata); 188 189 ret = tpda_enable_port(drvdata, port); 190 CS_LOCK(drvdata->base); 191 192 return ret; 193 } 194 195 static int tpda_enable(struct coresight_device *csdev, 196 struct coresight_connection *in, 197 struct coresight_connection *out) 198 { 199 struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 200 int ret = 0; 201 202 spin_lock(&drvdata->spinlock); 203 if (in->dest_refcnt == 0) { 204 ret = __tpda_enable(drvdata, in->dest_port); 205 if (!ret) { 206 in->dest_refcnt++; 207 csdev->refcnt++; 208 dev_dbg(drvdata->dev, "TPDA inport %d enabled.\n", in->dest_port); 209 } 210 } 211 212 spin_unlock(&drvdata->spinlock); 213 return ret; 214 } 215 216 static void __tpda_disable(struct tpda_drvdata *drvdata, int port) 217 { 218 u32 val; 219 220 CS_UNLOCK(drvdata->base); 221 222 val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port)); 223 val &= ~TPDA_Pn_CR_ENA; 224 writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port)); 225 226 CS_LOCK(drvdata->base); 227 } 228 229 static void tpda_disable(struct coresight_device *csdev, 230 struct coresight_connection *in, 231 struct coresight_connection *out) 232 { 233 struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 234 235 spin_lock(&drvdata->spinlock); 236 if (--in->dest_refcnt == 0) { 237 __tpda_disable(drvdata, in->dest_port); 238 csdev->refcnt--; 239 } 240 spin_unlock(&drvdata->spinlock); 241 242 dev_dbg(drvdata->dev, "TPDA inport %d disabled\n", in->dest_port); 243 } 244 245 static int tpda_trace_id(struct coresight_device *csdev, __maybe_unused enum cs_mode mode, 246 __maybe_unused struct coresight_device *sink) 247 { 248 struct tpda_drvdata *drvdata; 249 250 drvdata = dev_get_drvdata(csdev->dev.parent); 251 252 return drvdata->atid; 253 } 254 255 static const struct coresight_ops_link tpda_link_ops = { 256 .enable = tpda_enable, 257 .disable = tpda_disable, 258 }; 259 260 static const struct coresight_ops tpda_cs_ops = { 261 .trace_id = tpda_trace_id, 262 .link_ops = &tpda_link_ops, 263 }; 264 265 static int tpda_init_default_data(struct tpda_drvdata *drvdata) 266 { 267 int atid; 268 /* 269 * TPDA must has a unique atid. This atid can uniquely 270 * identify the TPDM trace source connected to the TPDA. 271 * The TPDMs which are connected to same TPDA share the 272 * same trace-id. When TPDA does packetization, different 273 * port will have unique channel number for decoding. 274 */ 275 atid = coresight_trace_id_get_system_id(); 276 if (atid < 0) 277 return atid; 278 279 drvdata->atid = atid; 280 return 0; 281 } 282 283 static int tpda_probe(struct amba_device *adev, const struct amba_id *id) 284 { 285 int ret; 286 struct device *dev = &adev->dev; 287 struct coresight_platform_data *pdata; 288 struct tpda_drvdata *drvdata; 289 struct coresight_desc desc = { 0 }; 290 void __iomem *base; 291 292 pdata = coresight_get_platform_data(dev); 293 if (IS_ERR(pdata)) 294 return PTR_ERR(pdata); 295 adev->dev.platform_data = pdata; 296 297 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 298 if (!drvdata) 299 return -ENOMEM; 300 301 drvdata->dev = &adev->dev; 302 dev_set_drvdata(dev, drvdata); 303 304 base = devm_ioremap_resource(dev, &adev->res); 305 if (IS_ERR(base)) 306 return PTR_ERR(base); 307 drvdata->base = base; 308 309 spin_lock_init(&drvdata->spinlock); 310 311 ret = tpda_init_default_data(drvdata); 312 if (ret) 313 return ret; 314 315 desc.name = coresight_alloc_device_name(&tpda_devs, dev); 316 if (!desc.name) 317 return -ENOMEM; 318 desc.type = CORESIGHT_DEV_TYPE_LINK; 319 desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_MERG; 320 desc.ops = &tpda_cs_ops; 321 desc.pdata = adev->dev.platform_data; 322 desc.dev = &adev->dev; 323 desc.access = CSDEV_ACCESS_IOMEM(base); 324 drvdata->csdev = coresight_register(&desc); 325 if (IS_ERR(drvdata->csdev)) 326 return PTR_ERR(drvdata->csdev); 327 328 pm_runtime_put(&adev->dev); 329 330 dev_dbg(drvdata->dev, "TPDA initialized\n"); 331 return 0; 332 } 333 334 static void tpda_remove(struct amba_device *adev) 335 { 336 struct tpda_drvdata *drvdata = dev_get_drvdata(&adev->dev); 337 338 coresight_trace_id_put_system_id(drvdata->atid); 339 coresight_unregister(drvdata->csdev); 340 } 341 342 /* 343 * Different TPDA has different periph id. 344 * The difference is 0-7 bits' value. So ignore 0-7 bits. 345 */ 346 static const struct amba_id tpda_ids[] = { 347 { 348 .id = 0x000f0f00, 349 .mask = 0x000fff00, 350 }, 351 { 0, 0, NULL }, 352 }; 353 354 static struct amba_driver tpda_driver = { 355 .drv = { 356 .name = "coresight-tpda", 357 .suppress_bind_attrs = true, 358 }, 359 .probe = tpda_probe, 360 .remove = tpda_remove, 361 .id_table = tpda_ids, 362 }; 363 364 module_amba_driver(tpda_driver); 365 366 MODULE_LICENSE("GPL"); 367 MODULE_DESCRIPTION("Trace, Profiling & Diagnostic Aggregator driver"); 368