1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6 #include <linux/amba/bus.h> 7 #include <linux/bitfield.h> 8 #include <linux/coresight.h> 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/fs.h> 12 #include <linux/io.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/platform_device.h> 17 18 #include "coresight-priv.h" 19 #include "coresight-tpda.h" 20 #include "coresight-trace-id.h" 21 #include "coresight-tpdm.h" 22 23 DEFINE_CORESIGHT_DEVLIST(tpda_devs, "tpda"); 24 25 static bool coresight_device_is_tpdm(struct coresight_device *csdev) 26 { 27 return (coresight_is_device_source(csdev)) && 28 (csdev->subtype.source_subtype == 29 CORESIGHT_DEV_SUBTYPE_SOURCE_TPDM); 30 } 31 32 static void tpda_clear_element_size(struct coresight_device *csdev) 33 { 34 struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 35 36 drvdata->dsb_esize = 0; 37 drvdata->cmb_esize = 0; 38 } 39 40 static void tpda_set_element_size(struct tpda_drvdata *drvdata, u32 *val) 41 { 42 /* Clear all relevant fields */ 43 *val &= ~(TPDA_Pn_CR_DSBSIZE | TPDA_Pn_CR_CMBSIZE); 44 45 if (drvdata->dsb_esize == 64) 46 *val |= TPDA_Pn_CR_DSBSIZE; 47 else if (drvdata->dsb_esize == 32) 48 *val &= ~TPDA_Pn_CR_DSBSIZE; 49 50 if (drvdata->cmb_esize == 64) 51 *val |= FIELD_PREP(TPDA_Pn_CR_CMBSIZE, 0x2); 52 else if (drvdata->cmb_esize == 32) 53 *val |= FIELD_PREP(TPDA_Pn_CR_CMBSIZE, 0x1); 54 else if (drvdata->cmb_esize == 8) 55 *val &= ~TPDA_Pn_CR_CMBSIZE; 56 } 57 58 /* 59 * Read the element size from the TPDM device. One TPDM must have at least one of the 60 * element size property. 61 * Returns 62 * 0 - The element size property is read 63 * Others - Cannot read the property of the element size 64 */ 65 static int tpdm_read_element_size(struct tpda_drvdata *drvdata, 66 struct coresight_device *csdev) 67 { 68 int rc = -EINVAL; 69 struct tpdm_drvdata *tpdm_data = dev_get_drvdata(csdev->dev.parent); 70 71 if (tpdm_data->dsb) { 72 rc = fwnode_property_read_u32(dev_fwnode(csdev->dev.parent), 73 "qcom,dsb-element-bits", &drvdata->dsb_esize); 74 if (rc) 75 goto out; 76 } 77 78 if (tpdm_data->cmb) { 79 rc = fwnode_property_read_u32(dev_fwnode(csdev->dev.parent), 80 "qcom,cmb-element-bits", &drvdata->cmb_esize); 81 } 82 83 out: 84 if (rc) 85 dev_warn_once(&csdev->dev, 86 "Failed to read TPDM Element size: %d\n", rc); 87 88 return rc; 89 } 90 91 /* 92 * Search and read element data size from the TPDM node in 93 * the devicetree. Each input port of TPDA is connected to 94 * a TPDM. Different TPDM supports different types of dataset, 95 * and some may support more than one type of dataset. 96 * Parameter "inport" is used to pass in the input port number 97 * of TPDA, and it is set to -1 in the recursize call. 98 */ 99 static int tpda_get_element_size(struct tpda_drvdata *drvdata, 100 struct coresight_device *csdev, 101 int inport) 102 { 103 int rc = 0; 104 int i; 105 struct coresight_device *in; 106 107 for (i = 0; i < csdev->pdata->nr_inconns; i++) { 108 in = csdev->pdata->in_conns[i]->src_dev; 109 if (!in) 110 continue; 111 112 /* Ignore the paths that do not match port */ 113 if (inport >= 0 && 114 csdev->pdata->in_conns[i]->dest_port != inport) 115 continue; 116 117 /* 118 * If this port has a hardcoded filter, use the source 119 * device directly. 120 */ 121 if (csdev->pdata->in_conns[i]->filter_src_fwnode) { 122 in = csdev->pdata->in_conns[i]->filter_src_dev; 123 if (!in) 124 continue; 125 } 126 127 if (coresight_device_is_tpdm(in)) { 128 if (drvdata->dsb_esize || drvdata->cmb_esize) 129 return -EEXIST; 130 rc = tpdm_read_element_size(drvdata, in); 131 if (rc) 132 return rc; 133 } else { 134 /* Recurse down the path */ 135 rc = tpda_get_element_size(drvdata, in, -1); 136 if (rc) 137 return rc; 138 } 139 } 140 141 return rc; 142 } 143 144 /* Settings pre enabling port control register */ 145 static void tpda_enable_pre_port(struct tpda_drvdata *drvdata) 146 { 147 u32 val; 148 149 val = readl_relaxed(drvdata->base + TPDA_CR); 150 val &= ~TPDA_CR_ATID; 151 val |= FIELD_PREP(TPDA_CR_ATID, drvdata->atid); 152 writel_relaxed(val, drvdata->base + TPDA_CR); 153 } 154 155 static int tpda_enable_port(struct tpda_drvdata *drvdata, int port) 156 { 157 u32 val; 158 int rc; 159 160 val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port)); 161 tpda_clear_element_size(drvdata->csdev); 162 rc = tpda_get_element_size(drvdata, drvdata->csdev, port); 163 if (!rc && (drvdata->dsb_esize || drvdata->cmb_esize)) { 164 tpda_set_element_size(drvdata, &val); 165 /* Enable the port */ 166 val |= TPDA_Pn_CR_ENA; 167 writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port)); 168 } else if (rc == -EEXIST) 169 dev_warn_once(&drvdata->csdev->dev, 170 "Detected multiple TPDMs on port %d", port); 171 else 172 dev_warn_once(&drvdata->csdev->dev, 173 "Didn't find TPDM element size"); 174 175 return rc; 176 } 177 178 static int __tpda_enable(struct tpda_drvdata *drvdata, int port) 179 { 180 int ret; 181 182 CS_UNLOCK(drvdata->base); 183 184 /* 185 * Only do pre-port enable for first port that calls enable when the 186 * device's main refcount is still 0 187 */ 188 lockdep_assert_held(&drvdata->spinlock); 189 if (!drvdata->csdev->refcnt) 190 tpda_enable_pre_port(drvdata); 191 192 ret = tpda_enable_port(drvdata, port); 193 CS_LOCK(drvdata->base); 194 195 return ret; 196 } 197 198 static int tpda_enable(struct coresight_device *csdev, 199 struct coresight_connection *in, 200 struct coresight_connection *out) 201 { 202 struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 203 int ret = 0; 204 205 spin_lock(&drvdata->spinlock); 206 if (in->dest_refcnt == 0) { 207 ret = __tpda_enable(drvdata, in->dest_port); 208 if (!ret) { 209 in->dest_refcnt++; 210 csdev->refcnt++; 211 dev_dbg(drvdata->dev, "TPDA inport %d enabled.\n", in->dest_port); 212 } 213 } 214 215 spin_unlock(&drvdata->spinlock); 216 return ret; 217 } 218 219 static void __tpda_disable(struct tpda_drvdata *drvdata, int port) 220 { 221 u32 val; 222 223 CS_UNLOCK(drvdata->base); 224 225 val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port)); 226 val &= ~TPDA_Pn_CR_ENA; 227 writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port)); 228 229 CS_LOCK(drvdata->base); 230 } 231 232 static void tpda_disable(struct coresight_device *csdev, 233 struct coresight_connection *in, 234 struct coresight_connection *out) 235 { 236 struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 237 238 spin_lock(&drvdata->spinlock); 239 if (--in->dest_refcnt == 0) { 240 __tpda_disable(drvdata, in->dest_port); 241 csdev->refcnt--; 242 } 243 spin_unlock(&drvdata->spinlock); 244 245 dev_dbg(drvdata->dev, "TPDA inport %d disabled\n", in->dest_port); 246 } 247 248 static int tpda_trace_id(struct coresight_device *csdev, __maybe_unused enum cs_mode mode, 249 __maybe_unused struct coresight_device *sink) 250 { 251 struct tpda_drvdata *drvdata; 252 253 drvdata = dev_get_drvdata(csdev->dev.parent); 254 255 return drvdata->atid; 256 } 257 258 static const struct coresight_ops_link tpda_link_ops = { 259 .enable = tpda_enable, 260 .disable = tpda_disable, 261 }; 262 263 static const struct coresight_ops tpda_cs_ops = { 264 .trace_id = tpda_trace_id, 265 .link_ops = &tpda_link_ops, 266 }; 267 268 static int tpda_init_default_data(struct tpda_drvdata *drvdata) 269 { 270 int atid; 271 /* 272 * TPDA must has a unique atid. This atid can uniquely 273 * identify the TPDM trace source connected to the TPDA. 274 * The TPDMs which are connected to same TPDA share the 275 * same trace-id. When TPDA does packetization, different 276 * port will have unique channel number for decoding. 277 */ 278 atid = coresight_trace_id_get_system_id(); 279 if (atid < 0) 280 return atid; 281 282 drvdata->atid = atid; 283 return 0; 284 } 285 286 static int tpda_probe(struct amba_device *adev, const struct amba_id *id) 287 { 288 int ret; 289 struct device *dev = &adev->dev; 290 struct coresight_platform_data *pdata; 291 struct tpda_drvdata *drvdata; 292 struct coresight_desc desc = { 0 }; 293 void __iomem *base; 294 295 pdata = coresight_get_platform_data(dev); 296 if (IS_ERR(pdata)) 297 return PTR_ERR(pdata); 298 adev->dev.platform_data = pdata; 299 300 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 301 if (!drvdata) 302 return -ENOMEM; 303 304 drvdata->dev = &adev->dev; 305 dev_set_drvdata(dev, drvdata); 306 307 base = devm_ioremap_resource(dev, &adev->res); 308 if (IS_ERR(base)) 309 return PTR_ERR(base); 310 drvdata->base = base; 311 312 spin_lock_init(&drvdata->spinlock); 313 314 ret = tpda_init_default_data(drvdata); 315 if (ret) 316 return ret; 317 318 desc.name = coresight_alloc_device_name(&tpda_devs, dev); 319 if (!desc.name) 320 return -ENOMEM; 321 desc.type = CORESIGHT_DEV_TYPE_LINK; 322 desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_MERG; 323 desc.ops = &tpda_cs_ops; 324 desc.pdata = adev->dev.platform_data; 325 desc.dev = &adev->dev; 326 desc.access = CSDEV_ACCESS_IOMEM(base); 327 drvdata->csdev = coresight_register(&desc); 328 if (IS_ERR(drvdata->csdev)) 329 return PTR_ERR(drvdata->csdev); 330 331 pm_runtime_put(&adev->dev); 332 333 dev_dbg(drvdata->dev, "TPDA initialized\n"); 334 return 0; 335 } 336 337 static void tpda_remove(struct amba_device *adev) 338 { 339 struct tpda_drvdata *drvdata = dev_get_drvdata(&adev->dev); 340 341 coresight_trace_id_put_system_id(drvdata->atid); 342 coresight_unregister(drvdata->csdev); 343 } 344 345 /* 346 * Different TPDA has different periph id. 347 * The difference is 0-7 bits' value. So ignore 0-7 bits. 348 */ 349 static const struct amba_id tpda_ids[] = { 350 { 351 .id = 0x000f0f00, 352 .mask = 0x000fff00, 353 }, 354 { 0, 0, NULL }, 355 }; 356 357 static struct amba_driver tpda_driver = { 358 .drv = { 359 .name = "coresight-tpda", 360 .suppress_bind_attrs = true, 361 }, 362 .probe = tpda_probe, 363 .remove = tpda_remove, 364 .id_table = tpda_ids, 365 }; 366 367 module_amba_driver(tpda_driver); 368 369 MODULE_LICENSE("GPL"); 370 MODULE_DESCRIPTION("Trace, Profiling & Diagnostic Aggregator driver"); 371