xref: /linux/drivers/hwtracing/coresight/coresight-core.c (revision e65e175b07bef5974045cc42238de99057669ca7)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2012, The Linux Foundation. All rights reserved.
4  */
5 
6 #include <linux/kernel.h>
7 #include <linux/init.h>
8 #include <linux/types.h>
9 #include <linux/device.h>
10 #include <linux/io.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/slab.h>
14 #include <linux/stringhash.h>
15 #include <linux/mutex.h>
16 #include <linux/clk.h>
17 #include <linux/coresight.h>
18 #include <linux/of_platform.h>
19 #include <linux/delay.h>
20 #include <linux/pm_runtime.h>
21 
22 #include "coresight-etm-perf.h"
23 #include "coresight-priv.h"
24 #include "coresight-syscfg.h"
25 
26 static DEFINE_MUTEX(coresight_mutex);
27 static DEFINE_PER_CPU(struct coresight_device *, csdev_sink);
28 
29 /**
30  * struct coresight_node - elements of a path, from source to sink
31  * @csdev:	Address of an element.
32  * @link:	hook to the list.
33  */
34 struct coresight_node {
35 	struct coresight_device *csdev;
36 	struct list_head link;
37 };
38 
39 /*
40  * When operating Coresight drivers from the sysFS interface, only a single
41  * path can exist from a tracer (associated to a CPU) to a sink.
42  */
43 static DEFINE_PER_CPU(struct list_head *, tracer_path);
44 
45 /*
46  * As of this writing only a single STM can be found in CS topologies.  Since
47  * there is no way to know if we'll ever see more and what kind of
48  * configuration they will enact, for the time being only define a single path
49  * for STM.
50  */
51 static struct list_head *stm_path;
52 
53 /*
54  * When losing synchronisation a new barrier packet needs to be inserted at the
55  * beginning of the data collected in a buffer.  That way the decoder knows that
56  * it needs to look for another sync sequence.
57  */
58 const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff};
59 EXPORT_SYMBOL_GPL(coresight_barrier_pkt);
60 
61 static const struct cti_assoc_op *cti_assoc_ops;
62 
63 ssize_t coresight_simple_show_pair(struct device *_dev,
64 			      struct device_attribute *attr, char *buf)
65 {
66 	struct coresight_device *csdev = container_of(_dev, struct coresight_device, dev);
67 	struct cs_pair_attribute *cs_attr = container_of(attr, struct cs_pair_attribute, attr);
68 	u64 val;
69 
70 	pm_runtime_get_sync(_dev->parent);
71 	val = csdev_access_relaxed_read_pair(&csdev->access, cs_attr->lo_off, cs_attr->hi_off);
72 	pm_runtime_put_sync(_dev->parent);
73 	return sysfs_emit(buf, "0x%llx\n", val);
74 }
75 EXPORT_SYMBOL_GPL(coresight_simple_show_pair);
76 
77 ssize_t coresight_simple_show32(struct device *_dev,
78 			      struct device_attribute *attr, char *buf)
79 {
80 	struct coresight_device *csdev = container_of(_dev, struct coresight_device, dev);
81 	struct cs_off_attribute *cs_attr = container_of(attr, struct cs_off_attribute, attr);
82 	u64 val;
83 
84 	pm_runtime_get_sync(_dev->parent);
85 	val = csdev_access_relaxed_read32(&csdev->access, cs_attr->off);
86 	pm_runtime_put_sync(_dev->parent);
87 	return sysfs_emit(buf, "0x%llx\n", val);
88 }
89 EXPORT_SYMBOL_GPL(coresight_simple_show32);
90 
91 void coresight_set_cti_ops(const struct cti_assoc_op *cti_op)
92 {
93 	cti_assoc_ops = cti_op;
94 }
95 EXPORT_SYMBOL_GPL(coresight_set_cti_ops);
96 
97 void coresight_remove_cti_ops(void)
98 {
99 	cti_assoc_ops = NULL;
100 }
101 EXPORT_SYMBOL_GPL(coresight_remove_cti_ops);
102 
103 void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev)
104 {
105 	per_cpu(csdev_sink, cpu) = csdev;
106 }
107 EXPORT_SYMBOL_GPL(coresight_set_percpu_sink);
108 
109 struct coresight_device *coresight_get_percpu_sink(int cpu)
110 {
111 	return per_cpu(csdev_sink, cpu);
112 }
113 EXPORT_SYMBOL_GPL(coresight_get_percpu_sink);
114 
115 static int coresight_id_match(struct device *dev, void *data)
116 {
117 	int trace_id, i_trace_id;
118 	struct coresight_device *csdev, *i_csdev;
119 
120 	csdev = data;
121 	i_csdev = to_coresight_device(dev);
122 
123 	/*
124 	 * No need to care about oneself and components that are not
125 	 * sources or not enabled
126 	 */
127 	if (i_csdev == csdev || !i_csdev->enable ||
128 	    i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE)
129 		return 0;
130 
131 	/* Get the source ID for both components */
132 	trace_id = source_ops(csdev)->trace_id(csdev);
133 	i_trace_id = source_ops(i_csdev)->trace_id(i_csdev);
134 
135 	/* All you need is one */
136 	if (trace_id == i_trace_id)
137 		return 1;
138 
139 	return 0;
140 }
141 
142 static int coresight_source_is_unique(struct coresight_device *csdev)
143 {
144 	int trace_id = source_ops(csdev)->trace_id(csdev);
145 
146 	/* this shouldn't happen */
147 	if (trace_id < 0)
148 		return 0;
149 
150 	return !bus_for_each_dev(&coresight_bustype, NULL,
151 				 csdev, coresight_id_match);
152 }
153 
154 static int coresight_find_link_inport(struct coresight_device *csdev,
155 				      struct coresight_device *parent)
156 {
157 	int i;
158 	struct coresight_connection *conn;
159 
160 	for (i = 0; i < parent->pdata->nr_outport; i++) {
161 		conn = &parent->pdata->conns[i];
162 		if (conn->child_dev == csdev)
163 			return conn->child_port;
164 	}
165 
166 	dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n",
167 		dev_name(&parent->dev), dev_name(&csdev->dev));
168 
169 	return -ENODEV;
170 }
171 
172 static int coresight_find_link_outport(struct coresight_device *csdev,
173 				       struct coresight_device *child)
174 {
175 	int i;
176 	struct coresight_connection *conn;
177 
178 	for (i = 0; i < csdev->pdata->nr_outport; i++) {
179 		conn = &csdev->pdata->conns[i];
180 		if (conn->child_dev == child)
181 			return conn->outport;
182 	}
183 
184 	dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n",
185 		dev_name(&csdev->dev), dev_name(&child->dev));
186 
187 	return -ENODEV;
188 }
189 
190 static inline u32 coresight_read_claim_tags(struct coresight_device *csdev)
191 {
192 	return csdev_access_relaxed_read32(&csdev->access, CORESIGHT_CLAIMCLR);
193 }
194 
195 static inline bool coresight_is_claimed_self_hosted(struct coresight_device *csdev)
196 {
197 	return coresight_read_claim_tags(csdev) == CORESIGHT_CLAIM_SELF_HOSTED;
198 }
199 
200 static inline bool coresight_is_claimed_any(struct coresight_device *csdev)
201 {
202 	return coresight_read_claim_tags(csdev) != 0;
203 }
204 
205 static inline void coresight_set_claim_tags(struct coresight_device *csdev)
206 {
207 	csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED,
208 				     CORESIGHT_CLAIMSET);
209 	isb();
210 }
211 
212 static inline void coresight_clear_claim_tags(struct coresight_device *csdev)
213 {
214 	csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED,
215 				     CORESIGHT_CLAIMCLR);
216 	isb();
217 }
218 
219 /*
220  * coresight_claim_device_unlocked : Claim the device for self-hosted usage
221  * to prevent an external tool from touching this device. As per PSCI
222  * standards, section "Preserving the execution context" => "Debug and Trace
223  * save and Restore", DBGCLAIM[1] is reserved for Self-hosted debug/trace and
224  * DBGCLAIM[0] is reserved for external tools.
225  *
226  * Called with CS_UNLOCKed for the component.
227  * Returns : 0 on success
228  */
229 int coresight_claim_device_unlocked(struct coresight_device *csdev)
230 {
231 	if (WARN_ON(!csdev))
232 		return -EINVAL;
233 
234 	if (coresight_is_claimed_any(csdev))
235 		return -EBUSY;
236 
237 	coresight_set_claim_tags(csdev);
238 	if (coresight_is_claimed_self_hosted(csdev))
239 		return 0;
240 	/* There was a race setting the tags, clean up and fail */
241 	coresight_clear_claim_tags(csdev);
242 	return -EBUSY;
243 }
244 EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked);
245 
246 int coresight_claim_device(struct coresight_device *csdev)
247 {
248 	int rc;
249 
250 	if (WARN_ON(!csdev))
251 		return -EINVAL;
252 
253 	CS_UNLOCK(csdev->access.base);
254 	rc = coresight_claim_device_unlocked(csdev);
255 	CS_LOCK(csdev->access.base);
256 
257 	return rc;
258 }
259 EXPORT_SYMBOL_GPL(coresight_claim_device);
260 
261 /*
262  * coresight_disclaim_device_unlocked : Clear the claim tags for the device.
263  * Called with CS_UNLOCKed for the component.
264  */
265 void coresight_disclaim_device_unlocked(struct coresight_device *csdev)
266 {
267 
268 	if (WARN_ON(!csdev))
269 		return;
270 
271 	if (coresight_is_claimed_self_hosted(csdev))
272 		coresight_clear_claim_tags(csdev);
273 	else
274 		/*
275 		 * The external agent may have not honoured our claim
276 		 * and has manipulated it. Or something else has seriously
277 		 * gone wrong in our driver.
278 		 */
279 		WARN_ON_ONCE(1);
280 }
281 EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked);
282 
283 void coresight_disclaim_device(struct coresight_device *csdev)
284 {
285 	if (WARN_ON(!csdev))
286 		return;
287 
288 	CS_UNLOCK(csdev->access.base);
289 	coresight_disclaim_device_unlocked(csdev);
290 	CS_LOCK(csdev->access.base);
291 }
292 EXPORT_SYMBOL_GPL(coresight_disclaim_device);
293 
294 /* enable or disable an associated CTI device of the supplied CS device */
295 static int
296 coresight_control_assoc_ectdev(struct coresight_device *csdev, bool enable)
297 {
298 	int ect_ret = 0;
299 	struct coresight_device *ect_csdev = csdev->ect_dev;
300 	struct module *mod;
301 
302 	if (!ect_csdev)
303 		return 0;
304 	if ((!ect_ops(ect_csdev)->enable) || (!ect_ops(ect_csdev)->disable))
305 		return 0;
306 
307 	mod = ect_csdev->dev.parent->driver->owner;
308 	if (enable) {
309 		if (try_module_get(mod)) {
310 			ect_ret = ect_ops(ect_csdev)->enable(ect_csdev);
311 			if (ect_ret) {
312 				module_put(mod);
313 			} else {
314 				get_device(ect_csdev->dev.parent);
315 				csdev->ect_enabled = true;
316 			}
317 		} else
318 			ect_ret = -ENODEV;
319 	} else {
320 		if (csdev->ect_enabled) {
321 			ect_ret = ect_ops(ect_csdev)->disable(ect_csdev);
322 			put_device(ect_csdev->dev.parent);
323 			module_put(mod);
324 			csdev->ect_enabled = false;
325 		}
326 	}
327 
328 	/* output warning if ECT enable is preventing trace operation */
329 	if (ect_ret)
330 		dev_info(&csdev->dev, "Associated ECT device (%s) %s failed\n",
331 			 dev_name(&ect_csdev->dev),
332 			 enable ? "enable" : "disable");
333 	return ect_ret;
334 }
335 
336 /*
337  * Set the associated ect / cti device while holding the coresight_mutex
338  * to avoid a race with coresight_enable that may try to use this value.
339  */
340 void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev,
341 				      struct coresight_device *ect_csdev)
342 {
343 	mutex_lock(&coresight_mutex);
344 	csdev->ect_dev = ect_csdev;
345 	mutex_unlock(&coresight_mutex);
346 }
347 EXPORT_SYMBOL_GPL(coresight_set_assoc_ectdev_mutex);
348 
349 static int coresight_enable_sink(struct coresight_device *csdev,
350 				 u32 mode, void *data)
351 {
352 	int ret;
353 
354 	/*
355 	 * We need to make sure the "new" session is compatible with the
356 	 * existing "mode" of operation.
357 	 */
358 	if (!sink_ops(csdev)->enable)
359 		return -EINVAL;
360 
361 	ret = coresight_control_assoc_ectdev(csdev, true);
362 	if (ret)
363 		return ret;
364 	ret = sink_ops(csdev)->enable(csdev, mode, data);
365 	if (ret) {
366 		coresight_control_assoc_ectdev(csdev, false);
367 		return ret;
368 	}
369 	csdev->enable = true;
370 
371 	return 0;
372 }
373 
374 static void coresight_disable_sink(struct coresight_device *csdev)
375 {
376 	int ret;
377 
378 	if (!sink_ops(csdev)->disable)
379 		return;
380 
381 	ret = sink_ops(csdev)->disable(csdev);
382 	if (ret)
383 		return;
384 	coresight_control_assoc_ectdev(csdev, false);
385 	csdev->enable = false;
386 }
387 
388 static int coresight_enable_link(struct coresight_device *csdev,
389 				 struct coresight_device *parent,
390 				 struct coresight_device *child)
391 {
392 	int ret = 0;
393 	int link_subtype;
394 	int inport, outport;
395 
396 	if (!parent || !child)
397 		return -EINVAL;
398 
399 	inport = coresight_find_link_inport(csdev, parent);
400 	outport = coresight_find_link_outport(csdev, child);
401 	link_subtype = csdev->subtype.link_subtype;
402 
403 	if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG && inport < 0)
404 		return inport;
405 	if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT && outport < 0)
406 		return outport;
407 
408 	if (link_ops(csdev)->enable) {
409 		ret = coresight_control_assoc_ectdev(csdev, true);
410 		if (!ret) {
411 			ret = link_ops(csdev)->enable(csdev, inport, outport);
412 			if (ret)
413 				coresight_control_assoc_ectdev(csdev, false);
414 		}
415 	}
416 
417 	if (!ret)
418 		csdev->enable = true;
419 
420 	return ret;
421 }
422 
423 static void coresight_disable_link(struct coresight_device *csdev,
424 				   struct coresight_device *parent,
425 				   struct coresight_device *child)
426 {
427 	int i, nr_conns;
428 	int link_subtype;
429 	int inport, outport;
430 
431 	if (!parent || !child)
432 		return;
433 
434 	inport = coresight_find_link_inport(csdev, parent);
435 	outport = coresight_find_link_outport(csdev, child);
436 	link_subtype = csdev->subtype.link_subtype;
437 
438 	if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) {
439 		nr_conns = csdev->pdata->nr_inport;
440 	} else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) {
441 		nr_conns = csdev->pdata->nr_outport;
442 	} else {
443 		nr_conns = 1;
444 	}
445 
446 	if (link_ops(csdev)->disable) {
447 		link_ops(csdev)->disable(csdev, inport, outport);
448 		coresight_control_assoc_ectdev(csdev, false);
449 	}
450 
451 	for (i = 0; i < nr_conns; i++)
452 		if (atomic_read(&csdev->refcnt[i]) != 0)
453 			return;
454 
455 	csdev->enable = false;
456 }
457 
458 static int coresight_enable_source(struct coresight_device *csdev, u32 mode)
459 {
460 	int ret;
461 
462 	if (!coresight_source_is_unique(csdev)) {
463 		dev_warn(&csdev->dev, "traceID %d not unique\n",
464 			 source_ops(csdev)->trace_id(csdev));
465 		return -EINVAL;
466 	}
467 
468 	if (!csdev->enable) {
469 		if (source_ops(csdev)->enable) {
470 			ret = coresight_control_assoc_ectdev(csdev, true);
471 			if (ret)
472 				return ret;
473 			ret = source_ops(csdev)->enable(csdev, NULL, mode);
474 			if (ret) {
475 				coresight_control_assoc_ectdev(csdev, false);
476 				return ret;
477 			}
478 		}
479 		csdev->enable = true;
480 	}
481 
482 	atomic_inc(csdev->refcnt);
483 
484 	return 0;
485 }
486 
487 /**
488  *  coresight_disable_source - Drop the reference count by 1 and disable
489  *  the device if there are no users left.
490  *
491  *  @csdev: The coresight device to disable
492  *
493  *  Returns true if the device has been disabled.
494  */
495 static bool coresight_disable_source(struct coresight_device *csdev)
496 {
497 	if (atomic_dec_return(csdev->refcnt) == 0) {
498 		if (source_ops(csdev)->disable)
499 			source_ops(csdev)->disable(csdev, NULL);
500 		coresight_control_assoc_ectdev(csdev, false);
501 		csdev->enable = false;
502 	}
503 	return !csdev->enable;
504 }
505 
506 /*
507  * coresight_disable_path_from : Disable components in the given path beyond
508  * @nd in the list. If @nd is NULL, all the components, except the SOURCE are
509  * disabled.
510  */
511 static void coresight_disable_path_from(struct list_head *path,
512 					struct coresight_node *nd)
513 {
514 	u32 type;
515 	struct coresight_device *csdev, *parent, *child;
516 
517 	if (!nd)
518 		nd = list_first_entry(path, struct coresight_node, link);
519 
520 	list_for_each_entry_continue(nd, path, link) {
521 		csdev = nd->csdev;
522 		type = csdev->type;
523 
524 		/*
525 		 * ETF devices are tricky... They can be a link or a sink,
526 		 * depending on how they are configured.  If an ETF has been
527 		 * "activated" it will be configured as a sink, otherwise
528 		 * go ahead with the link configuration.
529 		 */
530 		if (type == CORESIGHT_DEV_TYPE_LINKSINK)
531 			type = (csdev == coresight_get_sink(path)) ?
532 						CORESIGHT_DEV_TYPE_SINK :
533 						CORESIGHT_DEV_TYPE_LINK;
534 
535 		switch (type) {
536 		case CORESIGHT_DEV_TYPE_SINK:
537 			coresight_disable_sink(csdev);
538 			break;
539 		case CORESIGHT_DEV_TYPE_SOURCE:
540 			/*
541 			 * We skip the first node in the path assuming that it
542 			 * is the source. So we don't expect a source device in
543 			 * the middle of a path.
544 			 */
545 			WARN_ON(1);
546 			break;
547 		case CORESIGHT_DEV_TYPE_LINK:
548 			parent = list_prev_entry(nd, link)->csdev;
549 			child = list_next_entry(nd, link)->csdev;
550 			coresight_disable_link(csdev, parent, child);
551 			break;
552 		default:
553 			break;
554 		}
555 	}
556 }
557 
558 void coresight_disable_path(struct list_head *path)
559 {
560 	coresight_disable_path_from(path, NULL);
561 }
562 EXPORT_SYMBOL_GPL(coresight_disable_path);
563 
564 int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data)
565 {
566 
567 	int ret = 0;
568 	u32 type;
569 	struct coresight_node *nd;
570 	struct coresight_device *csdev, *parent, *child;
571 
572 	list_for_each_entry_reverse(nd, path, link) {
573 		csdev = nd->csdev;
574 		type = csdev->type;
575 
576 		/*
577 		 * ETF devices are tricky... They can be a link or a sink,
578 		 * depending on how they are configured.  If an ETF has been
579 		 * "activated" it will be configured as a sink, otherwise
580 		 * go ahead with the link configuration.
581 		 */
582 		if (type == CORESIGHT_DEV_TYPE_LINKSINK)
583 			type = (csdev == coresight_get_sink(path)) ?
584 						CORESIGHT_DEV_TYPE_SINK :
585 						CORESIGHT_DEV_TYPE_LINK;
586 
587 		switch (type) {
588 		case CORESIGHT_DEV_TYPE_SINK:
589 			ret = coresight_enable_sink(csdev, mode, sink_data);
590 			/*
591 			 * Sink is the first component turned on. If we
592 			 * failed to enable the sink, there are no components
593 			 * that need disabling. Disabling the path here
594 			 * would mean we could disrupt an existing session.
595 			 */
596 			if (ret)
597 				goto out;
598 			break;
599 		case CORESIGHT_DEV_TYPE_SOURCE:
600 			/* sources are enabled from either sysFS or Perf */
601 			break;
602 		case CORESIGHT_DEV_TYPE_LINK:
603 			parent = list_prev_entry(nd, link)->csdev;
604 			child = list_next_entry(nd, link)->csdev;
605 			ret = coresight_enable_link(csdev, parent, child);
606 			if (ret)
607 				goto err;
608 			break;
609 		default:
610 			goto err;
611 		}
612 	}
613 
614 out:
615 	return ret;
616 err:
617 	coresight_disable_path_from(path, nd);
618 	goto out;
619 }
620 
621 struct coresight_device *coresight_get_sink(struct list_head *path)
622 {
623 	struct coresight_device *csdev;
624 
625 	if (!path)
626 		return NULL;
627 
628 	csdev = list_last_entry(path, struct coresight_node, link)->csdev;
629 	if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
630 	    csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
631 		return NULL;
632 
633 	return csdev;
634 }
635 
636 static struct coresight_device *
637 coresight_find_enabled_sink(struct coresight_device *csdev)
638 {
639 	int i;
640 	struct coresight_device *sink = NULL;
641 
642 	if ((csdev->type == CORESIGHT_DEV_TYPE_SINK ||
643 	     csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) &&
644 	     csdev->activated)
645 		return csdev;
646 
647 	/*
648 	 * Recursively explore each port found on this element.
649 	 */
650 	for (i = 0; i < csdev->pdata->nr_outport; i++) {
651 		struct coresight_device *child_dev;
652 
653 		child_dev = csdev->pdata->conns[i].child_dev;
654 		if (child_dev)
655 			sink = coresight_find_enabled_sink(child_dev);
656 		if (sink)
657 			return sink;
658 	}
659 
660 	return NULL;
661 }
662 
663 /**
664  * coresight_get_enabled_sink - returns the first enabled sink using
665  * connection based search starting from the source reference
666  *
667  * @source: Coresight source device reference
668  */
669 struct coresight_device *
670 coresight_get_enabled_sink(struct coresight_device *source)
671 {
672 	if (!source)
673 		return NULL;
674 
675 	return coresight_find_enabled_sink(source);
676 }
677 
678 static int coresight_sink_by_id(struct device *dev, const void *data)
679 {
680 	struct coresight_device *csdev = to_coresight_device(dev);
681 	unsigned long hash;
682 
683 	if (csdev->type == CORESIGHT_DEV_TYPE_SINK ||
684 	     csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) {
685 
686 		if (!csdev->ea)
687 			return 0;
688 		/*
689 		 * See function etm_perf_add_symlink_sink() to know where
690 		 * this comes from.
691 		 */
692 		hash = (unsigned long)csdev->ea->var;
693 
694 		if ((u32)hash == *(u32 *)data)
695 			return 1;
696 	}
697 
698 	return 0;
699 }
700 
701 /**
702  * coresight_get_sink_by_id - returns the sink that matches the id
703  * @id: Id of the sink to match
704  *
705  * The name of a sink is unique, whether it is found on the AMBA bus or
706  * otherwise.  As such the hash of that name can easily be used to identify
707  * a sink.
708  */
709 struct coresight_device *coresight_get_sink_by_id(u32 id)
710 {
711 	struct device *dev = NULL;
712 
713 	dev = bus_find_device(&coresight_bustype, NULL, &id,
714 			      coresight_sink_by_id);
715 
716 	return dev ? to_coresight_device(dev) : NULL;
717 }
718 
719 /**
720  * coresight_get_ref- Helper function to increase reference count to module
721  * and device.
722  *
723  * @csdev: The coresight device to get a reference on.
724  *
725  * Return true in successful case and power up the device.
726  * Return false when failed to get reference of module.
727  */
728 static inline bool coresight_get_ref(struct coresight_device *csdev)
729 {
730 	struct device *dev = csdev->dev.parent;
731 
732 	/* Make sure the driver can't be removed */
733 	if (!try_module_get(dev->driver->owner))
734 		return false;
735 	/* Make sure the device can't go away */
736 	get_device(dev);
737 	pm_runtime_get_sync(dev);
738 	return true;
739 }
740 
741 /**
742  * coresight_put_ref- Helper function to decrease reference count to module
743  * and device. Power off the device.
744  *
745  * @csdev: The coresight device to decrement a reference from.
746  */
747 static inline void coresight_put_ref(struct coresight_device *csdev)
748 {
749 	struct device *dev = csdev->dev.parent;
750 
751 	pm_runtime_put(dev);
752 	put_device(dev);
753 	module_put(dev->driver->owner);
754 }
755 
756 /*
757  * coresight_grab_device - Power up this device and any of the helper
758  * devices connected to it for trace operation. Since the helper devices
759  * don't appear on the trace path, they should be handled along with the
760  * master device.
761  */
762 static int coresight_grab_device(struct coresight_device *csdev)
763 {
764 	int i;
765 
766 	for (i = 0; i < csdev->pdata->nr_outport; i++) {
767 		struct coresight_device *child;
768 
769 		child  = csdev->pdata->conns[i].child_dev;
770 		if (child && child->type == CORESIGHT_DEV_TYPE_HELPER)
771 			if (!coresight_get_ref(child))
772 				goto err;
773 	}
774 	if (coresight_get_ref(csdev))
775 		return 0;
776 err:
777 	for (i--; i >= 0; i--) {
778 		struct coresight_device *child;
779 
780 		child  = csdev->pdata->conns[i].child_dev;
781 		if (child && child->type == CORESIGHT_DEV_TYPE_HELPER)
782 			coresight_put_ref(child);
783 	}
784 	return -ENODEV;
785 }
786 
787 /*
788  * coresight_drop_device - Release this device and any of the helper
789  * devices connected to it.
790  */
791 static void coresight_drop_device(struct coresight_device *csdev)
792 {
793 	int i;
794 
795 	coresight_put_ref(csdev);
796 	for (i = 0; i < csdev->pdata->nr_outport; i++) {
797 		struct coresight_device *child;
798 
799 		child  = csdev->pdata->conns[i].child_dev;
800 		if (child && child->type == CORESIGHT_DEV_TYPE_HELPER)
801 			coresight_put_ref(child);
802 	}
803 }
804 
805 /**
806  * _coresight_build_path - recursively build a path from a @csdev to a sink.
807  * @csdev:	The device to start from.
808  * @sink:	The final sink we want in this path.
809  * @path:	The list to add devices to.
810  *
811  * The tree of Coresight device is traversed until an activated sink is
812  * found.  From there the sink is added to the list along with all the
813  * devices that led to that point - the end result is a list from source
814  * to sink. In that list the source is the first device and the sink the
815  * last one.
816  */
817 static int _coresight_build_path(struct coresight_device *csdev,
818 				 struct coresight_device *sink,
819 				 struct list_head *path)
820 {
821 	int i, ret;
822 	bool found = false;
823 	struct coresight_node *node;
824 
825 	/* An activated sink has been found.  Enqueue the element */
826 	if (csdev == sink)
827 		goto out;
828 
829 	if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) &&
830 	    sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) {
831 		if (_coresight_build_path(sink, sink, path) == 0) {
832 			found = true;
833 			goto out;
834 		}
835 	}
836 
837 	/* Not a sink - recursively explore each port found on this element */
838 	for (i = 0; i < csdev->pdata->nr_outport; i++) {
839 		struct coresight_device *child_dev;
840 
841 		child_dev = csdev->pdata->conns[i].child_dev;
842 		if (child_dev &&
843 		    _coresight_build_path(child_dev, sink, path) == 0) {
844 			found = true;
845 			break;
846 		}
847 	}
848 
849 	if (!found)
850 		return -ENODEV;
851 
852 out:
853 	/*
854 	 * A path from this element to a sink has been found.  The elements
855 	 * leading to the sink are already enqueued, all that is left to do
856 	 * is tell the PM runtime core we need this element and add a node
857 	 * for it.
858 	 */
859 	ret = coresight_grab_device(csdev);
860 	if (ret)
861 		return ret;
862 
863 	node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL);
864 	if (!node)
865 		return -ENOMEM;
866 
867 	node->csdev = csdev;
868 	list_add(&node->link, path);
869 
870 	return 0;
871 }
872 
873 struct list_head *coresight_build_path(struct coresight_device *source,
874 				       struct coresight_device *sink)
875 {
876 	struct list_head *path;
877 	int rc;
878 
879 	if (!sink)
880 		return ERR_PTR(-EINVAL);
881 
882 	path = kzalloc(sizeof(struct list_head), GFP_KERNEL);
883 	if (!path)
884 		return ERR_PTR(-ENOMEM);
885 
886 	INIT_LIST_HEAD(path);
887 
888 	rc = _coresight_build_path(source, sink, path);
889 	if (rc) {
890 		kfree(path);
891 		return ERR_PTR(rc);
892 	}
893 
894 	return path;
895 }
896 
897 /**
898  * coresight_release_path - release a previously built path.
899  * @path:	the path to release.
900  *
901  * Go through all the elements of a path and 1) removed it from the list and
902  * 2) free the memory allocated for each node.
903  */
904 void coresight_release_path(struct list_head *path)
905 {
906 	struct coresight_device *csdev;
907 	struct coresight_node *nd, *next;
908 
909 	list_for_each_entry_safe(nd, next, path, link) {
910 		csdev = nd->csdev;
911 
912 		coresight_drop_device(csdev);
913 		list_del(&nd->link);
914 		kfree(nd);
915 	}
916 
917 	kfree(path);
918 }
919 
920 /* return true if the device is a suitable type for a default sink */
921 static inline bool coresight_is_def_sink_type(struct coresight_device *csdev)
922 {
923 	/* sink & correct subtype */
924 	if (((csdev->type == CORESIGHT_DEV_TYPE_SINK) ||
925 	     (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) &&
926 	    (csdev->subtype.sink_subtype >= CORESIGHT_DEV_SUBTYPE_SINK_BUFFER))
927 		return true;
928 	return false;
929 }
930 
931 /**
932  * coresight_select_best_sink - return the best sink for use as default from
933  * the two provided.
934  *
935  * @sink:	current best sink.
936  * @depth:      search depth where current sink was found.
937  * @new_sink:	new sink for comparison with current sink.
938  * @new_depth:  search depth where new sink was found.
939  *
940  * Sinks prioritised according to coresight_dev_subtype_sink, with only
941  * subtypes CORESIGHT_DEV_SUBTYPE_SINK_BUFFER or higher being used.
942  *
943  * Where two sinks of equal priority are found, the sink closest to the
944  * source is used (smallest search depth).
945  *
946  * return @new_sink & update @depth if better than @sink, else return @sink.
947  */
948 static struct coresight_device *
949 coresight_select_best_sink(struct coresight_device *sink, int *depth,
950 			   struct coresight_device *new_sink, int new_depth)
951 {
952 	bool update = false;
953 
954 	if (!sink) {
955 		/* first found at this level */
956 		update = true;
957 	} else if (new_sink->subtype.sink_subtype >
958 		   sink->subtype.sink_subtype) {
959 		/* found better sink */
960 		update = true;
961 	} else if ((new_sink->subtype.sink_subtype ==
962 		    sink->subtype.sink_subtype) &&
963 		   (*depth > new_depth)) {
964 		/* found same but closer sink */
965 		update = true;
966 	}
967 
968 	if (update)
969 		*depth = new_depth;
970 	return update ? new_sink : sink;
971 }
972 
973 /**
974  * coresight_find_sink - recursive function to walk trace connections from
975  * source to find a suitable default sink.
976  *
977  * @csdev: source / current device to check.
978  * @depth: [in] search depth of calling dev, [out] depth of found sink.
979  *
980  * This will walk the connection path from a source (ETM) till a suitable
981  * sink is encountered and return that sink to the original caller.
982  *
983  * If current device is a plain sink return that & depth, otherwise recursively
984  * call child connections looking for a sink. Select best possible using
985  * coresight_select_best_sink.
986  *
987  * return best sink found, or NULL if not found at this node or child nodes.
988  */
989 static struct coresight_device *
990 coresight_find_sink(struct coresight_device *csdev, int *depth)
991 {
992 	int i, curr_depth = *depth + 1, found_depth = 0;
993 	struct coresight_device *found_sink = NULL;
994 
995 	if (coresight_is_def_sink_type(csdev)) {
996 		found_depth = curr_depth;
997 		found_sink = csdev;
998 		if (csdev->type == CORESIGHT_DEV_TYPE_SINK)
999 			goto return_def_sink;
1000 		/* look past LINKSINK for something better */
1001 	}
1002 
1003 	/*
1004 	 * Not a sink we want - or possible child sink may be better.
1005 	 * recursively explore each port found on this element.
1006 	 */
1007 	for (i = 0; i < csdev->pdata->nr_outport; i++) {
1008 		struct coresight_device *child_dev, *sink = NULL;
1009 		int child_depth = curr_depth;
1010 
1011 		child_dev = csdev->pdata->conns[i].child_dev;
1012 		if (child_dev)
1013 			sink = coresight_find_sink(child_dev, &child_depth);
1014 
1015 		if (sink)
1016 			found_sink = coresight_select_best_sink(found_sink,
1017 								&found_depth,
1018 								sink,
1019 								child_depth);
1020 	}
1021 
1022 return_def_sink:
1023 	/* return found sink and depth */
1024 	if (found_sink)
1025 		*depth = found_depth;
1026 	return found_sink;
1027 }
1028 
1029 /**
1030  * coresight_find_default_sink: Find a sink suitable for use as a
1031  * default sink.
1032  *
1033  * @csdev: starting source to find a connected sink.
1034  *
1035  * Walks connections graph looking for a suitable sink to enable for the
1036  * supplied source. Uses CoreSight device subtypes and distance from source
1037  * to select the best sink.
1038  *
1039  * If a sink is found, then the default sink for this device is set and
1040  * will be automatically used in future.
1041  *
1042  * Used in cases where the CoreSight user (perf / sysfs) has not selected a
1043  * sink.
1044  */
1045 struct coresight_device *
1046 coresight_find_default_sink(struct coresight_device *csdev)
1047 {
1048 	int depth = 0;
1049 
1050 	/* look for a default sink if we have not found for this device */
1051 	if (!csdev->def_sink) {
1052 		if (coresight_is_percpu_source(csdev))
1053 			csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev));
1054 		if (!csdev->def_sink)
1055 			csdev->def_sink = coresight_find_sink(csdev, &depth);
1056 	}
1057 	return csdev->def_sink;
1058 }
1059 
1060 static int coresight_remove_sink_ref(struct device *dev, void *data)
1061 {
1062 	struct coresight_device *sink = data;
1063 	struct coresight_device *source = to_coresight_device(dev);
1064 
1065 	if (source->def_sink == sink)
1066 		source->def_sink = NULL;
1067 	return 0;
1068 }
1069 
1070 /**
1071  * coresight_clear_default_sink: Remove all default sink references to the
1072  * supplied sink.
1073  *
1074  * If supplied device is a sink, then check all the bus devices and clear
1075  * out all the references to this sink from the coresight_device def_sink
1076  * parameter.
1077  *
1078  * @csdev: coresight sink - remove references to this from all sources.
1079  */
1080 static void coresight_clear_default_sink(struct coresight_device *csdev)
1081 {
1082 	if ((csdev->type == CORESIGHT_DEV_TYPE_SINK) ||
1083 	    (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) {
1084 		bus_for_each_dev(&coresight_bustype, NULL, csdev,
1085 				 coresight_remove_sink_ref);
1086 	}
1087 }
1088 
1089 /** coresight_validate_source - make sure a source has the right credentials
1090  *  @csdev:	the device structure for a source.
1091  *  @function:	the function this was called from.
1092  *
1093  * Assumes the coresight_mutex is held.
1094  */
1095 static int coresight_validate_source(struct coresight_device *csdev,
1096 				     const char *function)
1097 {
1098 	u32 type, subtype;
1099 
1100 	type = csdev->type;
1101 	subtype = csdev->subtype.source_subtype;
1102 
1103 	if (type != CORESIGHT_DEV_TYPE_SOURCE) {
1104 		dev_err(&csdev->dev, "wrong device type in %s\n", function);
1105 		return -EINVAL;
1106 	}
1107 
1108 	if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC &&
1109 	    subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) {
1110 		dev_err(&csdev->dev, "wrong device subtype in %s\n", function);
1111 		return -EINVAL;
1112 	}
1113 
1114 	return 0;
1115 }
1116 
1117 int coresight_enable(struct coresight_device *csdev)
1118 {
1119 	int cpu, ret = 0;
1120 	struct coresight_device *sink;
1121 	struct list_head *path;
1122 	enum coresight_dev_subtype_source subtype;
1123 
1124 	subtype = csdev->subtype.source_subtype;
1125 
1126 	mutex_lock(&coresight_mutex);
1127 
1128 	ret = coresight_validate_source(csdev, __func__);
1129 	if (ret)
1130 		goto out;
1131 
1132 	if (csdev->enable) {
1133 		/*
1134 		 * There could be multiple applications driving the software
1135 		 * source. So keep the refcount for each such user when the
1136 		 * source is already enabled.
1137 		 */
1138 		if (subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE)
1139 			atomic_inc(csdev->refcnt);
1140 		goto out;
1141 	}
1142 
1143 	sink = coresight_get_enabled_sink(csdev);
1144 	if (!sink) {
1145 		ret = -EINVAL;
1146 		goto out;
1147 	}
1148 
1149 	path = coresight_build_path(csdev, sink);
1150 	if (IS_ERR(path)) {
1151 		pr_err("building path(s) failed\n");
1152 		ret = PTR_ERR(path);
1153 		goto out;
1154 	}
1155 
1156 	ret = coresight_enable_path(path, CS_MODE_SYSFS, NULL);
1157 	if (ret)
1158 		goto err_path;
1159 
1160 	ret = coresight_enable_source(csdev, CS_MODE_SYSFS);
1161 	if (ret)
1162 		goto err_source;
1163 
1164 	switch (subtype) {
1165 	case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
1166 		/*
1167 		 * When working from sysFS it is important to keep track
1168 		 * of the paths that were created so that they can be
1169 		 * undone in 'coresight_disable()'.  Since there can only
1170 		 * be a single session per tracer (when working from sysFS)
1171 		 * a per-cpu variable will do just fine.
1172 		 */
1173 		cpu = source_ops(csdev)->cpu_id(csdev);
1174 		per_cpu(tracer_path, cpu) = path;
1175 		break;
1176 	case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
1177 		stm_path = path;
1178 		break;
1179 	default:
1180 		/* We can't be here */
1181 		break;
1182 	}
1183 
1184 out:
1185 	mutex_unlock(&coresight_mutex);
1186 	return ret;
1187 
1188 err_source:
1189 	coresight_disable_path(path);
1190 
1191 err_path:
1192 	coresight_release_path(path);
1193 	goto out;
1194 }
1195 EXPORT_SYMBOL_GPL(coresight_enable);
1196 
1197 void coresight_disable(struct coresight_device *csdev)
1198 {
1199 	int cpu, ret;
1200 	struct list_head *path = NULL;
1201 
1202 	mutex_lock(&coresight_mutex);
1203 
1204 	ret = coresight_validate_source(csdev, __func__);
1205 	if (ret)
1206 		goto out;
1207 
1208 	if (!csdev->enable || !coresight_disable_source(csdev))
1209 		goto out;
1210 
1211 	switch (csdev->subtype.source_subtype) {
1212 	case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
1213 		cpu = source_ops(csdev)->cpu_id(csdev);
1214 		path = per_cpu(tracer_path, cpu);
1215 		per_cpu(tracer_path, cpu) = NULL;
1216 		break;
1217 	case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
1218 		path = stm_path;
1219 		stm_path = NULL;
1220 		break;
1221 	default:
1222 		/* We can't be here */
1223 		break;
1224 	}
1225 
1226 	coresight_disable_path(path);
1227 	coresight_release_path(path);
1228 
1229 out:
1230 	mutex_unlock(&coresight_mutex);
1231 }
1232 EXPORT_SYMBOL_GPL(coresight_disable);
1233 
1234 static ssize_t enable_sink_show(struct device *dev,
1235 				struct device_attribute *attr, char *buf)
1236 {
1237 	struct coresight_device *csdev = to_coresight_device(dev);
1238 
1239 	return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->activated);
1240 }
1241 
1242 static ssize_t enable_sink_store(struct device *dev,
1243 				 struct device_attribute *attr,
1244 				 const char *buf, size_t size)
1245 {
1246 	int ret;
1247 	unsigned long val;
1248 	struct coresight_device *csdev = to_coresight_device(dev);
1249 
1250 	ret = kstrtoul(buf, 10, &val);
1251 	if (ret)
1252 		return ret;
1253 
1254 	if (val)
1255 		csdev->activated = true;
1256 	else
1257 		csdev->activated = false;
1258 
1259 	return size;
1260 
1261 }
1262 static DEVICE_ATTR_RW(enable_sink);
1263 
1264 static ssize_t enable_source_show(struct device *dev,
1265 				  struct device_attribute *attr, char *buf)
1266 {
1267 	struct coresight_device *csdev = to_coresight_device(dev);
1268 
1269 	return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->enable);
1270 }
1271 
1272 static ssize_t enable_source_store(struct device *dev,
1273 				   struct device_attribute *attr,
1274 				   const char *buf, size_t size)
1275 {
1276 	int ret = 0;
1277 	unsigned long val;
1278 	struct coresight_device *csdev = to_coresight_device(dev);
1279 
1280 	ret = kstrtoul(buf, 10, &val);
1281 	if (ret)
1282 		return ret;
1283 
1284 	if (val) {
1285 		ret = coresight_enable(csdev);
1286 		if (ret)
1287 			return ret;
1288 	} else {
1289 		coresight_disable(csdev);
1290 	}
1291 
1292 	return size;
1293 }
1294 static DEVICE_ATTR_RW(enable_source);
1295 
1296 static struct attribute *coresight_sink_attrs[] = {
1297 	&dev_attr_enable_sink.attr,
1298 	NULL,
1299 };
1300 ATTRIBUTE_GROUPS(coresight_sink);
1301 
1302 static struct attribute *coresight_source_attrs[] = {
1303 	&dev_attr_enable_source.attr,
1304 	NULL,
1305 };
1306 ATTRIBUTE_GROUPS(coresight_source);
1307 
1308 static struct device_type coresight_dev_type[] = {
1309 	{
1310 		.name = "sink",
1311 		.groups = coresight_sink_groups,
1312 	},
1313 	{
1314 		.name = "link",
1315 	},
1316 	{
1317 		.name = "linksink",
1318 		.groups = coresight_sink_groups,
1319 	},
1320 	{
1321 		.name = "source",
1322 		.groups = coresight_source_groups,
1323 	},
1324 	{
1325 		.name = "helper",
1326 	},
1327 	{
1328 		.name = "ect",
1329 	},
1330 };
1331 
1332 static void coresight_device_release(struct device *dev)
1333 {
1334 	struct coresight_device *csdev = to_coresight_device(dev);
1335 
1336 	fwnode_handle_put(csdev->dev.fwnode);
1337 	kfree(csdev->refcnt);
1338 	kfree(csdev);
1339 }
1340 
1341 static int coresight_orphan_match(struct device *dev, void *data)
1342 {
1343 	int i, ret = 0;
1344 	bool still_orphan = false;
1345 	struct coresight_device *csdev, *i_csdev;
1346 	struct coresight_connection *conn;
1347 
1348 	csdev = data;
1349 	i_csdev = to_coresight_device(dev);
1350 
1351 	/* No need to check oneself */
1352 	if (csdev == i_csdev)
1353 		return 0;
1354 
1355 	/* Move on to another component if no connection is orphan */
1356 	if (!i_csdev->orphan)
1357 		return 0;
1358 	/*
1359 	 * Circle throuch all the connection of that component.  If we find
1360 	 * an orphan connection whose name matches @csdev, link it.
1361 	 */
1362 	for (i = 0; i < i_csdev->pdata->nr_outport; i++) {
1363 		conn = &i_csdev->pdata->conns[i];
1364 
1365 		/* Skip the port if FW doesn't describe it */
1366 		if (!conn->child_fwnode)
1367 			continue;
1368 		/* We have found at least one orphan connection */
1369 		if (conn->child_dev == NULL) {
1370 			/* Does it match this newly added device? */
1371 			if (conn->child_fwnode == csdev->dev.fwnode) {
1372 				ret = coresight_make_links(i_csdev,
1373 							   conn, csdev);
1374 				if (ret)
1375 					return ret;
1376 			} else {
1377 				/* This component still has an orphan */
1378 				still_orphan = true;
1379 			}
1380 		}
1381 	}
1382 
1383 	i_csdev->orphan = still_orphan;
1384 
1385 	/*
1386 	 * Returning '0' in case we didn't encounter any error,
1387 	 * ensures that all known component on the bus will be checked.
1388 	 */
1389 	return 0;
1390 }
1391 
1392 static int coresight_fixup_orphan_conns(struct coresight_device *csdev)
1393 {
1394 	return bus_for_each_dev(&coresight_bustype, NULL,
1395 			 csdev, coresight_orphan_match);
1396 }
1397 
1398 
1399 static int coresight_fixup_device_conns(struct coresight_device *csdev)
1400 {
1401 	int i, ret = 0;
1402 
1403 	for (i = 0; i < csdev->pdata->nr_outport; i++) {
1404 		struct coresight_connection *conn = &csdev->pdata->conns[i];
1405 
1406 		if (!conn->child_fwnode)
1407 			continue;
1408 		conn->child_dev =
1409 			coresight_find_csdev_by_fwnode(conn->child_fwnode);
1410 		if (conn->child_dev && conn->child_dev->has_conns_grp) {
1411 			ret = coresight_make_links(csdev, conn,
1412 						   conn->child_dev);
1413 			if (ret)
1414 				break;
1415 		} else {
1416 			csdev->orphan = true;
1417 		}
1418 	}
1419 
1420 	return ret;
1421 }
1422 
1423 static int coresight_remove_match(struct device *dev, void *data)
1424 {
1425 	int i;
1426 	struct coresight_device *csdev, *iterator;
1427 	struct coresight_connection *conn;
1428 
1429 	csdev = data;
1430 	iterator = to_coresight_device(dev);
1431 
1432 	/* No need to check oneself */
1433 	if (csdev == iterator)
1434 		return 0;
1435 
1436 	/*
1437 	 * Circle throuch all the connection of that component.  If we find
1438 	 * a connection whose name matches @csdev, remove it.
1439 	 */
1440 	for (i = 0; i < iterator->pdata->nr_outport; i++) {
1441 		conn = &iterator->pdata->conns[i];
1442 
1443 		if (conn->child_dev == NULL || conn->child_fwnode == NULL)
1444 			continue;
1445 
1446 		if (csdev->dev.fwnode == conn->child_fwnode) {
1447 			iterator->orphan = true;
1448 			coresight_remove_links(iterator, conn);
1449 			/*
1450 			 * Drop the reference to the handle for the remote
1451 			 * device acquired in parsing the connections from
1452 			 * platform data.
1453 			 */
1454 			fwnode_handle_put(conn->child_fwnode);
1455 			conn->child_fwnode = NULL;
1456 			/* No need to continue */
1457 			break;
1458 		}
1459 	}
1460 
1461 	/*
1462 	 * Returning '0' ensures that all known component on the
1463 	 * bus will be checked.
1464 	 */
1465 	return 0;
1466 }
1467 
1468 /*
1469  * coresight_remove_conns - Remove references to this given devices
1470  * from the connections of other devices.
1471  */
1472 static void coresight_remove_conns(struct coresight_device *csdev)
1473 {
1474 	/*
1475 	 * Another device will point to this device only if there is
1476 	 * an output port connected to this one. i.e, if the device
1477 	 * doesn't have at least one input port, there is no point
1478 	 * in searching all the devices.
1479 	 */
1480 	if (csdev->pdata->nr_inport)
1481 		bus_for_each_dev(&coresight_bustype, NULL,
1482 				 csdev, coresight_remove_match);
1483 }
1484 
1485 /**
1486  * coresight_timeout - loop until a bit has changed to a specific register
1487  *			state.
1488  * @csa: coresight device access for the device
1489  * @offset: Offset of the register from the base of the device.
1490  * @position: the position of the bit of interest.
1491  * @value: the value the bit should have.
1492  *
1493  * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if
1494  * TIMEOUT_US has elapsed, which ever happens first.
1495  */
1496 int coresight_timeout(struct csdev_access *csa, u32 offset,
1497 		      int position, int value)
1498 {
1499 	int i;
1500 	u32 val;
1501 
1502 	for (i = TIMEOUT_US; i > 0; i--) {
1503 		val = csdev_access_read32(csa, offset);
1504 		/* waiting on the bit to go from 0 to 1 */
1505 		if (value) {
1506 			if (val & BIT(position))
1507 				return 0;
1508 		/* waiting on the bit to go from 1 to 0 */
1509 		} else {
1510 			if (!(val & BIT(position)))
1511 				return 0;
1512 		}
1513 
1514 		/*
1515 		 * Delay is arbitrary - the specification doesn't say how long
1516 		 * we are expected to wait.  Extra check required to make sure
1517 		 * we don't wait needlessly on the last iteration.
1518 		 */
1519 		if (i - 1)
1520 			udelay(1);
1521 	}
1522 
1523 	return -EAGAIN;
1524 }
1525 EXPORT_SYMBOL_GPL(coresight_timeout);
1526 
1527 u32 coresight_relaxed_read32(struct coresight_device *csdev, u32 offset)
1528 {
1529 	return csdev_access_relaxed_read32(&csdev->access, offset);
1530 }
1531 
1532 u32 coresight_read32(struct coresight_device *csdev, u32 offset)
1533 {
1534 	return csdev_access_read32(&csdev->access, offset);
1535 }
1536 
1537 void coresight_relaxed_write32(struct coresight_device *csdev,
1538 			       u32 val, u32 offset)
1539 {
1540 	csdev_access_relaxed_write32(&csdev->access, val, offset);
1541 }
1542 
1543 void coresight_write32(struct coresight_device *csdev, u32 val, u32 offset)
1544 {
1545 	csdev_access_write32(&csdev->access, val, offset);
1546 }
1547 
1548 u64 coresight_relaxed_read64(struct coresight_device *csdev, u32 offset)
1549 {
1550 	return csdev_access_relaxed_read64(&csdev->access, offset);
1551 }
1552 
1553 u64 coresight_read64(struct coresight_device *csdev, u32 offset)
1554 {
1555 	return csdev_access_read64(&csdev->access, offset);
1556 }
1557 
1558 void coresight_relaxed_write64(struct coresight_device *csdev,
1559 			       u64 val, u32 offset)
1560 {
1561 	csdev_access_relaxed_write64(&csdev->access, val, offset);
1562 }
1563 
1564 void coresight_write64(struct coresight_device *csdev, u64 val, u32 offset)
1565 {
1566 	csdev_access_write64(&csdev->access, val, offset);
1567 }
1568 
1569 /*
1570  * coresight_release_platform_data: Release references to the devices connected
1571  * to the output port of this device.
1572  */
1573 void coresight_release_platform_data(struct coresight_device *csdev,
1574 				     struct coresight_platform_data *pdata)
1575 {
1576 	int i;
1577 	struct coresight_connection *conns = pdata->conns;
1578 
1579 	for (i = 0; i < pdata->nr_outport; i++) {
1580 		/* If we have made the links, remove them now */
1581 		if (csdev && conns[i].child_dev)
1582 			coresight_remove_links(csdev, &conns[i]);
1583 		/*
1584 		 * Drop the refcount and clear the handle as this device
1585 		 * is going away
1586 		 */
1587 		if (conns[i].child_fwnode) {
1588 			fwnode_handle_put(conns[i].child_fwnode);
1589 			pdata->conns[i].child_fwnode = NULL;
1590 		}
1591 	}
1592 	if (csdev)
1593 		coresight_remove_conns_sysfs_group(csdev);
1594 }
1595 
1596 struct coresight_device *coresight_register(struct coresight_desc *desc)
1597 {
1598 	int ret;
1599 	int link_subtype;
1600 	int nr_refcnts = 1;
1601 	atomic_t *refcnts = NULL;
1602 	struct coresight_device *csdev;
1603 	bool registered = false;
1604 
1605 	csdev = kzalloc(sizeof(*csdev), GFP_KERNEL);
1606 	if (!csdev) {
1607 		ret = -ENOMEM;
1608 		goto err_out;
1609 	}
1610 
1611 	if (desc->type == CORESIGHT_DEV_TYPE_LINK ||
1612 	    desc->type == CORESIGHT_DEV_TYPE_LINKSINK) {
1613 		link_subtype = desc->subtype.link_subtype;
1614 
1615 		if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG)
1616 			nr_refcnts = desc->pdata->nr_inport;
1617 		else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT)
1618 			nr_refcnts = desc->pdata->nr_outport;
1619 	}
1620 
1621 	refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL);
1622 	if (!refcnts) {
1623 		ret = -ENOMEM;
1624 		kfree(csdev);
1625 		goto err_out;
1626 	}
1627 
1628 	csdev->refcnt = refcnts;
1629 
1630 	csdev->pdata = desc->pdata;
1631 
1632 	csdev->type = desc->type;
1633 	csdev->subtype = desc->subtype;
1634 	csdev->ops = desc->ops;
1635 	csdev->access = desc->access;
1636 	csdev->orphan = false;
1637 
1638 	csdev->dev.type = &coresight_dev_type[desc->type];
1639 	csdev->dev.groups = desc->groups;
1640 	csdev->dev.parent = desc->dev;
1641 	csdev->dev.release = coresight_device_release;
1642 	csdev->dev.bus = &coresight_bustype;
1643 	/*
1644 	 * Hold the reference to our parent device. This will be
1645 	 * dropped only in coresight_device_release().
1646 	 */
1647 	csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev));
1648 	dev_set_name(&csdev->dev, "%s", desc->name);
1649 
1650 	/*
1651 	 * Make sure the device registration and the connection fixup
1652 	 * are synchronised, so that we don't see uninitialised devices
1653 	 * on the coresight bus while trying to resolve the connections.
1654 	 */
1655 	mutex_lock(&coresight_mutex);
1656 
1657 	ret = device_register(&csdev->dev);
1658 	if (ret) {
1659 		put_device(&csdev->dev);
1660 		/*
1661 		 * All resources are free'd explicitly via
1662 		 * coresight_device_release(), triggered from put_device().
1663 		 */
1664 		goto out_unlock;
1665 	}
1666 
1667 	if (csdev->type == CORESIGHT_DEV_TYPE_SINK ||
1668 	    csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) {
1669 		ret = etm_perf_add_symlink_sink(csdev);
1670 
1671 		if (ret) {
1672 			device_unregister(&csdev->dev);
1673 			/*
1674 			 * As with the above, all resources are free'd
1675 			 * explicitly via coresight_device_release() triggered
1676 			 * from put_device(), which is in turn called from
1677 			 * function device_unregister().
1678 			 */
1679 			goto out_unlock;
1680 		}
1681 	}
1682 	/* Device is now registered */
1683 	registered = true;
1684 
1685 	ret = coresight_create_conns_sysfs_group(csdev);
1686 	if (!ret)
1687 		ret = coresight_fixup_device_conns(csdev);
1688 	if (!ret)
1689 		ret = coresight_fixup_orphan_conns(csdev);
1690 
1691 out_unlock:
1692 	mutex_unlock(&coresight_mutex);
1693 	/* Success */
1694 	if (!ret) {
1695 		if (cti_assoc_ops && cti_assoc_ops->add)
1696 			cti_assoc_ops->add(csdev);
1697 		return csdev;
1698 	}
1699 
1700 	/* Unregister the device if needed */
1701 	if (registered) {
1702 		coresight_unregister(csdev);
1703 		return ERR_PTR(ret);
1704 	}
1705 
1706 err_out:
1707 	/* Cleanup the connection information */
1708 	coresight_release_platform_data(NULL, desc->pdata);
1709 	return ERR_PTR(ret);
1710 }
1711 EXPORT_SYMBOL_GPL(coresight_register);
1712 
1713 void coresight_unregister(struct coresight_device *csdev)
1714 {
1715 	etm_perf_del_symlink_sink(csdev);
1716 	/* Remove references of that device in the topology */
1717 	if (cti_assoc_ops && cti_assoc_ops->remove)
1718 		cti_assoc_ops->remove(csdev);
1719 	coresight_remove_conns(csdev);
1720 	coresight_clear_default_sink(csdev);
1721 	coresight_release_platform_data(csdev, csdev->pdata);
1722 	device_unregister(&csdev->dev);
1723 }
1724 EXPORT_SYMBOL_GPL(coresight_unregister);
1725 
1726 
1727 /*
1728  * coresight_search_device_idx - Search the fwnode handle of a device
1729  * in the given dev_idx list. Must be called with the coresight_mutex held.
1730  *
1731  * Returns the index of the entry, when found. Otherwise, -ENOENT.
1732  */
1733 static inline int coresight_search_device_idx(struct coresight_dev_list *dict,
1734 					      struct fwnode_handle *fwnode)
1735 {
1736 	int i;
1737 
1738 	for (i = 0; i < dict->nr_idx; i++)
1739 		if (dict->fwnode_list[i] == fwnode)
1740 			return i;
1741 	return -ENOENT;
1742 }
1743 
1744 bool coresight_loses_context_with_cpu(struct device *dev)
1745 {
1746 	return fwnode_property_present(dev_fwnode(dev),
1747 				       "arm,coresight-loses-context-with-cpu");
1748 }
1749 EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu);
1750 
1751 /*
1752  * coresight_alloc_device_name - Get an index for a given device in the
1753  * device index list specific to a driver. An index is allocated for a
1754  * device and is tracked with the fwnode_handle to prevent allocating
1755  * duplicate indices for the same device (e.g, if we defer probing of
1756  * a device due to dependencies), in case the index is requested again.
1757  */
1758 char *coresight_alloc_device_name(struct coresight_dev_list *dict,
1759 				  struct device *dev)
1760 {
1761 	int idx;
1762 	char *name = NULL;
1763 	struct fwnode_handle **list;
1764 
1765 	mutex_lock(&coresight_mutex);
1766 
1767 	idx = coresight_search_device_idx(dict, dev_fwnode(dev));
1768 	if (idx < 0) {
1769 		/* Make space for the new entry */
1770 		idx = dict->nr_idx;
1771 		list = krealloc_array(dict->fwnode_list,
1772 				      idx + 1, sizeof(*dict->fwnode_list),
1773 				      GFP_KERNEL);
1774 		if (ZERO_OR_NULL_PTR(list)) {
1775 			idx = -ENOMEM;
1776 			goto done;
1777 		}
1778 
1779 		list[idx] = dev_fwnode(dev);
1780 		dict->fwnode_list = list;
1781 		dict->nr_idx = idx + 1;
1782 	}
1783 
1784 	name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", dict->pfx, idx);
1785 done:
1786 	mutex_unlock(&coresight_mutex);
1787 	return name;
1788 }
1789 EXPORT_SYMBOL_GPL(coresight_alloc_device_name);
1790 
1791 struct bus_type coresight_bustype = {
1792 	.name	= "coresight",
1793 };
1794 
1795 static int __init coresight_init(void)
1796 {
1797 	int ret;
1798 
1799 	ret = bus_register(&coresight_bustype);
1800 	if (ret)
1801 		return ret;
1802 
1803 	ret = etm_perf_init();
1804 	if (ret)
1805 		goto exit_bus_unregister;
1806 
1807 	/* initialise the coresight syscfg API */
1808 	ret = cscfg_init();
1809 	if (!ret)
1810 		return 0;
1811 
1812 	etm_perf_exit();
1813 exit_bus_unregister:
1814 	bus_unregister(&coresight_bustype);
1815 	return ret;
1816 }
1817 
1818 static void __exit coresight_exit(void)
1819 {
1820 	cscfg_exit();
1821 	etm_perf_exit();
1822 	bus_unregister(&coresight_bustype);
1823 }
1824 
1825 module_init(coresight_init);
1826 module_exit(coresight_exit);
1827 
1828 MODULE_LICENSE("GPL v2");
1829 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
1830 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
1831 MODULE_DESCRIPTION("Arm CoreSight tracer driver");
1832