1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2012, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/kernel.h> 7 #include <linux/init.h> 8 #include <linux/types.h> 9 #include <linux/device.h> 10 #include <linux/io.h> 11 #include <linux/err.h> 12 #include <linux/export.h> 13 #include <linux/slab.h> 14 #include <linux/stringhash.h> 15 #include <linux/mutex.h> 16 #include <linux/clk.h> 17 #include <linux/coresight.h> 18 #include <linux/of_platform.h> 19 #include <linux/delay.h> 20 #include <linux/pm_runtime.h> 21 22 #include "coresight-etm-perf.h" 23 #include "coresight-priv.h" 24 #include "coresight-syscfg.h" 25 26 static DEFINE_MUTEX(coresight_mutex); 27 static DEFINE_PER_CPU(struct coresight_device *, csdev_sink); 28 29 /** 30 * struct coresight_node - elements of a path, from source to sink 31 * @csdev: Address of an element. 32 * @link: hook to the list. 33 */ 34 struct coresight_node { 35 struct coresight_device *csdev; 36 struct list_head link; 37 }; 38 39 /* 40 * When operating Coresight drivers from the sysFS interface, only a single 41 * path can exist from a tracer (associated to a CPU) to a sink. 42 */ 43 static DEFINE_PER_CPU(struct list_head *, tracer_path); 44 45 /* 46 * As of this writing only a single STM can be found in CS topologies. Since 47 * there is no way to know if we'll ever see more and what kind of 48 * configuration they will enact, for the time being only define a single path 49 * for STM. 50 */ 51 static struct list_head *stm_path; 52 53 /* 54 * When losing synchronisation a new barrier packet needs to be inserted at the 55 * beginning of the data collected in a buffer. That way the decoder knows that 56 * it needs to look for another sync sequence. 57 */ 58 const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; 59 EXPORT_SYMBOL_GPL(coresight_barrier_pkt); 60 61 static const struct cti_assoc_op *cti_assoc_ops; 62 63 void coresight_set_cti_ops(const struct cti_assoc_op *cti_op) 64 { 65 cti_assoc_ops = cti_op; 66 } 67 EXPORT_SYMBOL_GPL(coresight_set_cti_ops); 68 69 void coresight_remove_cti_ops(void) 70 { 71 cti_assoc_ops = NULL; 72 } 73 EXPORT_SYMBOL_GPL(coresight_remove_cti_ops); 74 75 void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev) 76 { 77 per_cpu(csdev_sink, cpu) = csdev; 78 } 79 EXPORT_SYMBOL_GPL(coresight_set_percpu_sink); 80 81 struct coresight_device *coresight_get_percpu_sink(int cpu) 82 { 83 return per_cpu(csdev_sink, cpu); 84 } 85 EXPORT_SYMBOL_GPL(coresight_get_percpu_sink); 86 87 static int coresight_id_match(struct device *dev, void *data) 88 { 89 int trace_id, i_trace_id; 90 struct coresight_device *csdev, *i_csdev; 91 92 csdev = data; 93 i_csdev = to_coresight_device(dev); 94 95 /* 96 * No need to care about oneself and components that are not 97 * sources or not enabled 98 */ 99 if (i_csdev == csdev || !i_csdev->enable || 100 i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE) 101 return 0; 102 103 /* Get the source ID for both components */ 104 trace_id = source_ops(csdev)->trace_id(csdev); 105 i_trace_id = source_ops(i_csdev)->trace_id(i_csdev); 106 107 /* All you need is one */ 108 if (trace_id == i_trace_id) 109 return 1; 110 111 return 0; 112 } 113 114 static int coresight_source_is_unique(struct coresight_device *csdev) 115 { 116 int trace_id = source_ops(csdev)->trace_id(csdev); 117 118 /* this shouldn't happen */ 119 if (trace_id < 0) 120 return 0; 121 122 return !bus_for_each_dev(&coresight_bustype, NULL, 123 csdev, coresight_id_match); 124 } 125 126 static int coresight_find_link_inport(struct coresight_device *csdev, 127 struct coresight_device *parent) 128 { 129 int i; 130 struct coresight_connection *conn; 131 132 for (i = 0; i < parent->pdata->nr_outport; i++) { 133 conn = &parent->pdata->conns[i]; 134 if (conn->child_dev == csdev) 135 return conn->child_port; 136 } 137 138 dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n", 139 dev_name(&parent->dev), dev_name(&csdev->dev)); 140 141 return -ENODEV; 142 } 143 144 static int coresight_find_link_outport(struct coresight_device *csdev, 145 struct coresight_device *child) 146 { 147 int i; 148 struct coresight_connection *conn; 149 150 for (i = 0; i < csdev->pdata->nr_outport; i++) { 151 conn = &csdev->pdata->conns[i]; 152 if (conn->child_dev == child) 153 return conn->outport; 154 } 155 156 dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n", 157 dev_name(&csdev->dev), dev_name(&child->dev)); 158 159 return -ENODEV; 160 } 161 162 static inline u32 coresight_read_claim_tags(struct coresight_device *csdev) 163 { 164 return csdev_access_relaxed_read32(&csdev->access, CORESIGHT_CLAIMCLR); 165 } 166 167 static inline bool coresight_is_claimed_self_hosted(struct coresight_device *csdev) 168 { 169 return coresight_read_claim_tags(csdev) == CORESIGHT_CLAIM_SELF_HOSTED; 170 } 171 172 static inline bool coresight_is_claimed_any(struct coresight_device *csdev) 173 { 174 return coresight_read_claim_tags(csdev) != 0; 175 } 176 177 static inline void coresight_set_claim_tags(struct coresight_device *csdev) 178 { 179 csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED, 180 CORESIGHT_CLAIMSET); 181 isb(); 182 } 183 184 static inline void coresight_clear_claim_tags(struct coresight_device *csdev) 185 { 186 csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED, 187 CORESIGHT_CLAIMCLR); 188 isb(); 189 } 190 191 /* 192 * coresight_claim_device_unlocked : Claim the device for self-hosted usage 193 * to prevent an external tool from touching this device. As per PSCI 194 * standards, section "Preserving the execution context" => "Debug and Trace 195 * save and Restore", DBGCLAIM[1] is reserved for Self-hosted debug/trace and 196 * DBGCLAIM[0] is reserved for external tools. 197 * 198 * Called with CS_UNLOCKed for the component. 199 * Returns : 0 on success 200 */ 201 int coresight_claim_device_unlocked(struct coresight_device *csdev) 202 { 203 if (WARN_ON(!csdev)) 204 return -EINVAL; 205 206 if (coresight_is_claimed_any(csdev)) 207 return -EBUSY; 208 209 coresight_set_claim_tags(csdev); 210 if (coresight_is_claimed_self_hosted(csdev)) 211 return 0; 212 /* There was a race setting the tags, clean up and fail */ 213 coresight_clear_claim_tags(csdev); 214 return -EBUSY; 215 } 216 EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked); 217 218 int coresight_claim_device(struct coresight_device *csdev) 219 { 220 int rc; 221 222 if (WARN_ON(!csdev)) 223 return -EINVAL; 224 225 CS_UNLOCK(csdev->access.base); 226 rc = coresight_claim_device_unlocked(csdev); 227 CS_LOCK(csdev->access.base); 228 229 return rc; 230 } 231 EXPORT_SYMBOL_GPL(coresight_claim_device); 232 233 /* 234 * coresight_disclaim_device_unlocked : Clear the claim tags for the device. 235 * Called with CS_UNLOCKed for the component. 236 */ 237 void coresight_disclaim_device_unlocked(struct coresight_device *csdev) 238 { 239 240 if (WARN_ON(!csdev)) 241 return; 242 243 if (coresight_is_claimed_self_hosted(csdev)) 244 coresight_clear_claim_tags(csdev); 245 else 246 /* 247 * The external agent may have not honoured our claim 248 * and has manipulated it. Or something else has seriously 249 * gone wrong in our driver. 250 */ 251 WARN_ON_ONCE(1); 252 } 253 EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked); 254 255 void coresight_disclaim_device(struct coresight_device *csdev) 256 { 257 if (WARN_ON(!csdev)) 258 return; 259 260 CS_UNLOCK(csdev->access.base); 261 coresight_disclaim_device_unlocked(csdev); 262 CS_LOCK(csdev->access.base); 263 } 264 EXPORT_SYMBOL_GPL(coresight_disclaim_device); 265 266 /* enable or disable an associated CTI device of the supplied CS device */ 267 static int 268 coresight_control_assoc_ectdev(struct coresight_device *csdev, bool enable) 269 { 270 int ect_ret = 0; 271 struct coresight_device *ect_csdev = csdev->ect_dev; 272 struct module *mod; 273 274 if (!ect_csdev) 275 return 0; 276 if ((!ect_ops(ect_csdev)->enable) || (!ect_ops(ect_csdev)->disable)) 277 return 0; 278 279 mod = ect_csdev->dev.parent->driver->owner; 280 if (enable) { 281 if (try_module_get(mod)) { 282 ect_ret = ect_ops(ect_csdev)->enable(ect_csdev); 283 if (ect_ret) { 284 module_put(mod); 285 } else { 286 get_device(ect_csdev->dev.parent); 287 csdev->ect_enabled = true; 288 } 289 } else 290 ect_ret = -ENODEV; 291 } else { 292 if (csdev->ect_enabled) { 293 ect_ret = ect_ops(ect_csdev)->disable(ect_csdev); 294 put_device(ect_csdev->dev.parent); 295 module_put(mod); 296 csdev->ect_enabled = false; 297 } 298 } 299 300 /* output warning if ECT enable is preventing trace operation */ 301 if (ect_ret) 302 dev_info(&csdev->dev, "Associated ECT device (%s) %s failed\n", 303 dev_name(&ect_csdev->dev), 304 enable ? "enable" : "disable"); 305 return ect_ret; 306 } 307 308 /* 309 * Set the associated ect / cti device while holding the coresight_mutex 310 * to avoid a race with coresight_enable that may try to use this value. 311 */ 312 void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev, 313 struct coresight_device *ect_csdev) 314 { 315 mutex_lock(&coresight_mutex); 316 csdev->ect_dev = ect_csdev; 317 mutex_unlock(&coresight_mutex); 318 } 319 EXPORT_SYMBOL_GPL(coresight_set_assoc_ectdev_mutex); 320 321 static int coresight_enable_sink(struct coresight_device *csdev, 322 u32 mode, void *data) 323 { 324 int ret; 325 326 /* 327 * We need to make sure the "new" session is compatible with the 328 * existing "mode" of operation. 329 */ 330 if (!sink_ops(csdev)->enable) 331 return -EINVAL; 332 333 ret = coresight_control_assoc_ectdev(csdev, true); 334 if (ret) 335 return ret; 336 ret = sink_ops(csdev)->enable(csdev, mode, data); 337 if (ret) { 338 coresight_control_assoc_ectdev(csdev, false); 339 return ret; 340 } 341 csdev->enable = true; 342 343 return 0; 344 } 345 346 static void coresight_disable_sink(struct coresight_device *csdev) 347 { 348 int ret; 349 350 if (!sink_ops(csdev)->disable) 351 return; 352 353 ret = sink_ops(csdev)->disable(csdev); 354 if (ret) 355 return; 356 coresight_control_assoc_ectdev(csdev, false); 357 csdev->enable = false; 358 } 359 360 static int coresight_enable_link(struct coresight_device *csdev, 361 struct coresight_device *parent, 362 struct coresight_device *child) 363 { 364 int ret = 0; 365 int link_subtype; 366 int inport, outport; 367 368 if (!parent || !child) 369 return -EINVAL; 370 371 inport = coresight_find_link_inport(csdev, parent); 372 outport = coresight_find_link_outport(csdev, child); 373 link_subtype = csdev->subtype.link_subtype; 374 375 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG && inport < 0) 376 return inport; 377 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT && outport < 0) 378 return outport; 379 380 if (link_ops(csdev)->enable) { 381 ret = coresight_control_assoc_ectdev(csdev, true); 382 if (!ret) { 383 ret = link_ops(csdev)->enable(csdev, inport, outport); 384 if (ret) 385 coresight_control_assoc_ectdev(csdev, false); 386 } 387 } 388 389 if (!ret) 390 csdev->enable = true; 391 392 return ret; 393 } 394 395 static void coresight_disable_link(struct coresight_device *csdev, 396 struct coresight_device *parent, 397 struct coresight_device *child) 398 { 399 int i, nr_conns; 400 int link_subtype; 401 int inport, outport; 402 403 if (!parent || !child) 404 return; 405 406 inport = coresight_find_link_inport(csdev, parent); 407 outport = coresight_find_link_outport(csdev, child); 408 link_subtype = csdev->subtype.link_subtype; 409 410 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) { 411 nr_conns = csdev->pdata->nr_inport; 412 } else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) { 413 nr_conns = csdev->pdata->nr_outport; 414 } else { 415 nr_conns = 1; 416 } 417 418 if (link_ops(csdev)->disable) { 419 link_ops(csdev)->disable(csdev, inport, outport); 420 coresight_control_assoc_ectdev(csdev, false); 421 } 422 423 for (i = 0; i < nr_conns; i++) 424 if (atomic_read(&csdev->refcnt[i]) != 0) 425 return; 426 427 csdev->enable = false; 428 } 429 430 static int coresight_enable_source(struct coresight_device *csdev, u32 mode) 431 { 432 int ret; 433 434 if (!coresight_source_is_unique(csdev)) { 435 dev_warn(&csdev->dev, "traceID %d not unique\n", 436 source_ops(csdev)->trace_id(csdev)); 437 return -EINVAL; 438 } 439 440 if (!csdev->enable) { 441 if (source_ops(csdev)->enable) { 442 ret = coresight_control_assoc_ectdev(csdev, true); 443 if (ret) 444 return ret; 445 ret = source_ops(csdev)->enable(csdev, NULL, mode); 446 if (ret) { 447 coresight_control_assoc_ectdev(csdev, false); 448 return ret; 449 } 450 } 451 csdev->enable = true; 452 } 453 454 atomic_inc(csdev->refcnt); 455 456 return 0; 457 } 458 459 /** 460 * coresight_disable_source - Drop the reference count by 1 and disable 461 * the device if there are no users left. 462 * 463 * @csdev: The coresight device to disable 464 * 465 * Returns true if the device has been disabled. 466 */ 467 static bool coresight_disable_source(struct coresight_device *csdev) 468 { 469 if (atomic_dec_return(csdev->refcnt) == 0) { 470 if (source_ops(csdev)->disable) 471 source_ops(csdev)->disable(csdev, NULL); 472 coresight_control_assoc_ectdev(csdev, false); 473 csdev->enable = false; 474 } 475 return !csdev->enable; 476 } 477 478 /* 479 * coresight_disable_path_from : Disable components in the given path beyond 480 * @nd in the list. If @nd is NULL, all the components, except the SOURCE are 481 * disabled. 482 */ 483 static void coresight_disable_path_from(struct list_head *path, 484 struct coresight_node *nd) 485 { 486 u32 type; 487 struct coresight_device *csdev, *parent, *child; 488 489 if (!nd) 490 nd = list_first_entry(path, struct coresight_node, link); 491 492 list_for_each_entry_continue(nd, path, link) { 493 csdev = nd->csdev; 494 type = csdev->type; 495 496 /* 497 * ETF devices are tricky... They can be a link or a sink, 498 * depending on how they are configured. If an ETF has been 499 * "activated" it will be configured as a sink, otherwise 500 * go ahead with the link configuration. 501 */ 502 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 503 type = (csdev == coresight_get_sink(path)) ? 504 CORESIGHT_DEV_TYPE_SINK : 505 CORESIGHT_DEV_TYPE_LINK; 506 507 switch (type) { 508 case CORESIGHT_DEV_TYPE_SINK: 509 coresight_disable_sink(csdev); 510 break; 511 case CORESIGHT_DEV_TYPE_SOURCE: 512 /* 513 * We skip the first node in the path assuming that it 514 * is the source. So we don't expect a source device in 515 * the middle of a path. 516 */ 517 WARN_ON(1); 518 break; 519 case CORESIGHT_DEV_TYPE_LINK: 520 parent = list_prev_entry(nd, link)->csdev; 521 child = list_next_entry(nd, link)->csdev; 522 coresight_disable_link(csdev, parent, child); 523 break; 524 default: 525 break; 526 } 527 } 528 } 529 530 void coresight_disable_path(struct list_head *path) 531 { 532 coresight_disable_path_from(path, NULL); 533 } 534 EXPORT_SYMBOL_GPL(coresight_disable_path); 535 536 int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) 537 { 538 539 int ret = 0; 540 u32 type; 541 struct coresight_node *nd; 542 struct coresight_device *csdev, *parent, *child; 543 544 list_for_each_entry_reverse(nd, path, link) { 545 csdev = nd->csdev; 546 type = csdev->type; 547 548 /* 549 * ETF devices are tricky... They can be a link or a sink, 550 * depending on how they are configured. If an ETF has been 551 * "activated" it will be configured as a sink, otherwise 552 * go ahead with the link configuration. 553 */ 554 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 555 type = (csdev == coresight_get_sink(path)) ? 556 CORESIGHT_DEV_TYPE_SINK : 557 CORESIGHT_DEV_TYPE_LINK; 558 559 switch (type) { 560 case CORESIGHT_DEV_TYPE_SINK: 561 ret = coresight_enable_sink(csdev, mode, sink_data); 562 /* 563 * Sink is the first component turned on. If we 564 * failed to enable the sink, there are no components 565 * that need disabling. Disabling the path here 566 * would mean we could disrupt an existing session. 567 */ 568 if (ret) 569 goto out; 570 break; 571 case CORESIGHT_DEV_TYPE_SOURCE: 572 /* sources are enabled from either sysFS or Perf */ 573 break; 574 case CORESIGHT_DEV_TYPE_LINK: 575 parent = list_prev_entry(nd, link)->csdev; 576 child = list_next_entry(nd, link)->csdev; 577 ret = coresight_enable_link(csdev, parent, child); 578 if (ret) 579 goto err; 580 break; 581 default: 582 goto err; 583 } 584 } 585 586 out: 587 return ret; 588 err: 589 coresight_disable_path_from(path, nd); 590 goto out; 591 } 592 593 struct coresight_device *coresight_get_sink(struct list_head *path) 594 { 595 struct coresight_device *csdev; 596 597 if (!path) 598 return NULL; 599 600 csdev = list_last_entry(path, struct coresight_node, link)->csdev; 601 if (csdev->type != CORESIGHT_DEV_TYPE_SINK && 602 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) 603 return NULL; 604 605 return csdev; 606 } 607 608 static struct coresight_device * 609 coresight_find_enabled_sink(struct coresight_device *csdev) 610 { 611 int i; 612 struct coresight_device *sink = NULL; 613 614 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || 615 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && 616 csdev->activated) 617 return csdev; 618 619 /* 620 * Recursively explore each port found on this element. 621 */ 622 for (i = 0; i < csdev->pdata->nr_outport; i++) { 623 struct coresight_device *child_dev; 624 625 child_dev = csdev->pdata->conns[i].child_dev; 626 if (child_dev) 627 sink = coresight_find_enabled_sink(child_dev); 628 if (sink) 629 return sink; 630 } 631 632 return NULL; 633 } 634 635 /** 636 * coresight_get_enabled_sink - returns the first enabled sink using 637 * connection based search starting from the source reference 638 * 639 * @source: Coresight source device reference 640 */ 641 struct coresight_device * 642 coresight_get_enabled_sink(struct coresight_device *source) 643 { 644 if (!source) 645 return NULL; 646 647 return coresight_find_enabled_sink(source); 648 } 649 650 static int coresight_sink_by_id(struct device *dev, const void *data) 651 { 652 struct coresight_device *csdev = to_coresight_device(dev); 653 unsigned long hash; 654 655 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 656 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 657 658 if (!csdev->ea) 659 return 0; 660 /* 661 * See function etm_perf_add_symlink_sink() to know where 662 * this comes from. 663 */ 664 hash = (unsigned long)csdev->ea->var; 665 666 if ((u32)hash == *(u32 *)data) 667 return 1; 668 } 669 670 return 0; 671 } 672 673 /** 674 * coresight_get_sink_by_id - returns the sink that matches the id 675 * @id: Id of the sink to match 676 * 677 * The name of a sink is unique, whether it is found on the AMBA bus or 678 * otherwise. As such the hash of that name can easily be used to identify 679 * a sink. 680 */ 681 struct coresight_device *coresight_get_sink_by_id(u32 id) 682 { 683 struct device *dev = NULL; 684 685 dev = bus_find_device(&coresight_bustype, NULL, &id, 686 coresight_sink_by_id); 687 688 return dev ? to_coresight_device(dev) : NULL; 689 } 690 691 /** 692 * coresight_get_ref- Helper function to increase reference count to module 693 * and device. 694 * 695 * @csdev: The coresight device to get a reference on. 696 * 697 * Return true in successful case and power up the device. 698 * Return false when failed to get reference of module. 699 */ 700 static inline bool coresight_get_ref(struct coresight_device *csdev) 701 { 702 struct device *dev = csdev->dev.parent; 703 704 /* Make sure the driver can't be removed */ 705 if (!try_module_get(dev->driver->owner)) 706 return false; 707 /* Make sure the device can't go away */ 708 get_device(dev); 709 pm_runtime_get_sync(dev); 710 return true; 711 } 712 713 /** 714 * coresight_put_ref- Helper function to decrease reference count to module 715 * and device. Power off the device. 716 * 717 * @csdev: The coresight device to decrement a reference from. 718 */ 719 static inline void coresight_put_ref(struct coresight_device *csdev) 720 { 721 struct device *dev = csdev->dev.parent; 722 723 pm_runtime_put(dev); 724 put_device(dev); 725 module_put(dev->driver->owner); 726 } 727 728 /* 729 * coresight_grab_device - Power up this device and any of the helper 730 * devices connected to it for trace operation. Since the helper devices 731 * don't appear on the trace path, they should be handled along with the 732 * master device. 733 */ 734 static int coresight_grab_device(struct coresight_device *csdev) 735 { 736 int i; 737 738 for (i = 0; i < csdev->pdata->nr_outport; i++) { 739 struct coresight_device *child; 740 741 child = csdev->pdata->conns[i].child_dev; 742 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 743 if (!coresight_get_ref(child)) 744 goto err; 745 } 746 if (coresight_get_ref(csdev)) 747 return 0; 748 err: 749 for (i--; i >= 0; i--) { 750 struct coresight_device *child; 751 752 child = csdev->pdata->conns[i].child_dev; 753 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 754 coresight_put_ref(child); 755 } 756 return -ENODEV; 757 } 758 759 /* 760 * coresight_drop_device - Release this device and any of the helper 761 * devices connected to it. 762 */ 763 static void coresight_drop_device(struct coresight_device *csdev) 764 { 765 int i; 766 767 coresight_put_ref(csdev); 768 for (i = 0; i < csdev->pdata->nr_outport; i++) { 769 struct coresight_device *child; 770 771 child = csdev->pdata->conns[i].child_dev; 772 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) 773 coresight_put_ref(child); 774 } 775 } 776 777 /** 778 * _coresight_build_path - recursively build a path from a @csdev to a sink. 779 * @csdev: The device to start from. 780 * @sink: The final sink we want in this path. 781 * @path: The list to add devices to. 782 * 783 * The tree of Coresight device is traversed until an activated sink is 784 * found. From there the sink is added to the list along with all the 785 * devices that led to that point - the end result is a list from source 786 * to sink. In that list the source is the first device and the sink the 787 * last one. 788 */ 789 static int _coresight_build_path(struct coresight_device *csdev, 790 struct coresight_device *sink, 791 struct list_head *path) 792 { 793 int i, ret; 794 bool found = false; 795 struct coresight_node *node; 796 797 /* An activated sink has been found. Enqueue the element */ 798 if (csdev == sink) 799 goto out; 800 801 if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && 802 sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) { 803 if (_coresight_build_path(sink, sink, path) == 0) { 804 found = true; 805 goto out; 806 } 807 } 808 809 /* Not a sink - recursively explore each port found on this element */ 810 for (i = 0; i < csdev->pdata->nr_outport; i++) { 811 struct coresight_device *child_dev; 812 813 child_dev = csdev->pdata->conns[i].child_dev; 814 if (child_dev && 815 _coresight_build_path(child_dev, sink, path) == 0) { 816 found = true; 817 break; 818 } 819 } 820 821 if (!found) 822 return -ENODEV; 823 824 out: 825 /* 826 * A path from this element to a sink has been found. The elements 827 * leading to the sink are already enqueued, all that is left to do 828 * is tell the PM runtime core we need this element and add a node 829 * for it. 830 */ 831 ret = coresight_grab_device(csdev); 832 if (ret) 833 return ret; 834 835 node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL); 836 if (!node) 837 return -ENOMEM; 838 839 node->csdev = csdev; 840 list_add(&node->link, path); 841 842 return 0; 843 } 844 845 struct list_head *coresight_build_path(struct coresight_device *source, 846 struct coresight_device *sink) 847 { 848 struct list_head *path; 849 int rc; 850 851 if (!sink) 852 return ERR_PTR(-EINVAL); 853 854 path = kzalloc(sizeof(struct list_head), GFP_KERNEL); 855 if (!path) 856 return ERR_PTR(-ENOMEM); 857 858 INIT_LIST_HEAD(path); 859 860 rc = _coresight_build_path(source, sink, path); 861 if (rc) { 862 kfree(path); 863 return ERR_PTR(rc); 864 } 865 866 return path; 867 } 868 869 /** 870 * coresight_release_path - release a previously built path. 871 * @path: the path to release. 872 * 873 * Go through all the elements of a path and 1) removed it from the list and 874 * 2) free the memory allocated for each node. 875 */ 876 void coresight_release_path(struct list_head *path) 877 { 878 struct coresight_device *csdev; 879 struct coresight_node *nd, *next; 880 881 list_for_each_entry_safe(nd, next, path, link) { 882 csdev = nd->csdev; 883 884 coresight_drop_device(csdev); 885 list_del(&nd->link); 886 kfree(nd); 887 } 888 889 kfree(path); 890 } 891 892 /* return true if the device is a suitable type for a default sink */ 893 static inline bool coresight_is_def_sink_type(struct coresight_device *csdev) 894 { 895 /* sink & correct subtype */ 896 if (((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 897 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) && 898 (csdev->subtype.sink_subtype >= CORESIGHT_DEV_SUBTYPE_SINK_BUFFER)) 899 return true; 900 return false; 901 } 902 903 /** 904 * coresight_select_best_sink - return the best sink for use as default from 905 * the two provided. 906 * 907 * @sink: current best sink. 908 * @depth: search depth where current sink was found. 909 * @new_sink: new sink for comparison with current sink. 910 * @new_depth: search depth where new sink was found. 911 * 912 * Sinks prioritised according to coresight_dev_subtype_sink, with only 913 * subtypes CORESIGHT_DEV_SUBTYPE_SINK_BUFFER or higher being used. 914 * 915 * Where two sinks of equal priority are found, the sink closest to the 916 * source is used (smallest search depth). 917 * 918 * return @new_sink & update @depth if better than @sink, else return @sink. 919 */ 920 static struct coresight_device * 921 coresight_select_best_sink(struct coresight_device *sink, int *depth, 922 struct coresight_device *new_sink, int new_depth) 923 { 924 bool update = false; 925 926 if (!sink) { 927 /* first found at this level */ 928 update = true; 929 } else if (new_sink->subtype.sink_subtype > 930 sink->subtype.sink_subtype) { 931 /* found better sink */ 932 update = true; 933 } else if ((new_sink->subtype.sink_subtype == 934 sink->subtype.sink_subtype) && 935 (*depth > new_depth)) { 936 /* found same but closer sink */ 937 update = true; 938 } 939 940 if (update) 941 *depth = new_depth; 942 return update ? new_sink : sink; 943 } 944 945 /** 946 * coresight_find_sink - recursive function to walk trace connections from 947 * source to find a suitable default sink. 948 * 949 * @csdev: source / current device to check. 950 * @depth: [in] search depth of calling dev, [out] depth of found sink. 951 * 952 * This will walk the connection path from a source (ETM) till a suitable 953 * sink is encountered and return that sink to the original caller. 954 * 955 * If current device is a plain sink return that & depth, otherwise recursively 956 * call child connections looking for a sink. Select best possible using 957 * coresight_select_best_sink. 958 * 959 * return best sink found, or NULL if not found at this node or child nodes. 960 */ 961 static struct coresight_device * 962 coresight_find_sink(struct coresight_device *csdev, int *depth) 963 { 964 int i, curr_depth = *depth + 1, found_depth = 0; 965 struct coresight_device *found_sink = NULL; 966 967 if (coresight_is_def_sink_type(csdev)) { 968 found_depth = curr_depth; 969 found_sink = csdev; 970 if (csdev->type == CORESIGHT_DEV_TYPE_SINK) 971 goto return_def_sink; 972 /* look past LINKSINK for something better */ 973 } 974 975 /* 976 * Not a sink we want - or possible child sink may be better. 977 * recursively explore each port found on this element. 978 */ 979 for (i = 0; i < csdev->pdata->nr_outport; i++) { 980 struct coresight_device *child_dev, *sink = NULL; 981 int child_depth = curr_depth; 982 983 child_dev = csdev->pdata->conns[i].child_dev; 984 if (child_dev) 985 sink = coresight_find_sink(child_dev, &child_depth); 986 987 if (sink) 988 found_sink = coresight_select_best_sink(found_sink, 989 &found_depth, 990 sink, 991 child_depth); 992 } 993 994 return_def_sink: 995 /* return found sink and depth */ 996 if (found_sink) 997 *depth = found_depth; 998 return found_sink; 999 } 1000 1001 /** 1002 * coresight_find_default_sink: Find a sink suitable for use as a 1003 * default sink. 1004 * 1005 * @csdev: starting source to find a connected sink. 1006 * 1007 * Walks connections graph looking for a suitable sink to enable for the 1008 * supplied source. Uses CoreSight device subtypes and distance from source 1009 * to select the best sink. 1010 * 1011 * If a sink is found, then the default sink for this device is set and 1012 * will be automatically used in future. 1013 * 1014 * Used in cases where the CoreSight user (perf / sysfs) has not selected a 1015 * sink. 1016 */ 1017 struct coresight_device * 1018 coresight_find_default_sink(struct coresight_device *csdev) 1019 { 1020 int depth = 0; 1021 1022 /* look for a default sink if we have not found for this device */ 1023 if (!csdev->def_sink) { 1024 if (coresight_is_percpu_source(csdev)) 1025 csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev)); 1026 if (!csdev->def_sink) 1027 csdev->def_sink = coresight_find_sink(csdev, &depth); 1028 } 1029 return csdev->def_sink; 1030 } 1031 1032 static int coresight_remove_sink_ref(struct device *dev, void *data) 1033 { 1034 struct coresight_device *sink = data; 1035 struct coresight_device *source = to_coresight_device(dev); 1036 1037 if (source->def_sink == sink) 1038 source->def_sink = NULL; 1039 return 0; 1040 } 1041 1042 /** 1043 * coresight_clear_default_sink: Remove all default sink references to the 1044 * supplied sink. 1045 * 1046 * If supplied device is a sink, then check all the bus devices and clear 1047 * out all the references to this sink from the coresight_device def_sink 1048 * parameter. 1049 * 1050 * @csdev: coresight sink - remove references to this from all sources. 1051 */ 1052 static void coresight_clear_default_sink(struct coresight_device *csdev) 1053 { 1054 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 1055 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) { 1056 bus_for_each_dev(&coresight_bustype, NULL, csdev, 1057 coresight_remove_sink_ref); 1058 } 1059 } 1060 1061 /** coresight_validate_source - make sure a source has the right credentials 1062 * @csdev: the device structure for a source. 1063 * @function: the function this was called from. 1064 * 1065 * Assumes the coresight_mutex is held. 1066 */ 1067 static int coresight_validate_source(struct coresight_device *csdev, 1068 const char *function) 1069 { 1070 u32 type, subtype; 1071 1072 type = csdev->type; 1073 subtype = csdev->subtype.source_subtype; 1074 1075 if (type != CORESIGHT_DEV_TYPE_SOURCE) { 1076 dev_err(&csdev->dev, "wrong device type in %s\n", function); 1077 return -EINVAL; 1078 } 1079 1080 if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC && 1081 subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) { 1082 dev_err(&csdev->dev, "wrong device subtype in %s\n", function); 1083 return -EINVAL; 1084 } 1085 1086 return 0; 1087 } 1088 1089 int coresight_enable(struct coresight_device *csdev) 1090 { 1091 int cpu, ret = 0; 1092 struct coresight_device *sink; 1093 struct list_head *path; 1094 enum coresight_dev_subtype_source subtype; 1095 1096 subtype = csdev->subtype.source_subtype; 1097 1098 mutex_lock(&coresight_mutex); 1099 1100 ret = coresight_validate_source(csdev, __func__); 1101 if (ret) 1102 goto out; 1103 1104 if (csdev->enable) { 1105 /* 1106 * There could be multiple applications driving the software 1107 * source. So keep the refcount for each such user when the 1108 * source is already enabled. 1109 */ 1110 if (subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) 1111 atomic_inc(csdev->refcnt); 1112 goto out; 1113 } 1114 1115 sink = coresight_get_enabled_sink(csdev); 1116 if (!sink) { 1117 ret = -EINVAL; 1118 goto out; 1119 } 1120 1121 path = coresight_build_path(csdev, sink); 1122 if (IS_ERR(path)) { 1123 pr_err("building path(s) failed\n"); 1124 ret = PTR_ERR(path); 1125 goto out; 1126 } 1127 1128 ret = coresight_enable_path(path, CS_MODE_SYSFS, NULL); 1129 if (ret) 1130 goto err_path; 1131 1132 ret = coresight_enable_source(csdev, CS_MODE_SYSFS); 1133 if (ret) 1134 goto err_source; 1135 1136 switch (subtype) { 1137 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: 1138 /* 1139 * When working from sysFS it is important to keep track 1140 * of the paths that were created so that they can be 1141 * undone in 'coresight_disable()'. Since there can only 1142 * be a single session per tracer (when working from sysFS) 1143 * a per-cpu variable will do just fine. 1144 */ 1145 cpu = source_ops(csdev)->cpu_id(csdev); 1146 per_cpu(tracer_path, cpu) = path; 1147 break; 1148 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: 1149 stm_path = path; 1150 break; 1151 default: 1152 /* We can't be here */ 1153 break; 1154 } 1155 1156 out: 1157 mutex_unlock(&coresight_mutex); 1158 return ret; 1159 1160 err_source: 1161 coresight_disable_path(path); 1162 1163 err_path: 1164 coresight_release_path(path); 1165 goto out; 1166 } 1167 EXPORT_SYMBOL_GPL(coresight_enable); 1168 1169 void coresight_disable(struct coresight_device *csdev) 1170 { 1171 int cpu, ret; 1172 struct list_head *path = NULL; 1173 1174 mutex_lock(&coresight_mutex); 1175 1176 ret = coresight_validate_source(csdev, __func__); 1177 if (ret) 1178 goto out; 1179 1180 if (!csdev->enable || !coresight_disable_source(csdev)) 1181 goto out; 1182 1183 switch (csdev->subtype.source_subtype) { 1184 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC: 1185 cpu = source_ops(csdev)->cpu_id(csdev); 1186 path = per_cpu(tracer_path, cpu); 1187 per_cpu(tracer_path, cpu) = NULL; 1188 break; 1189 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE: 1190 path = stm_path; 1191 stm_path = NULL; 1192 break; 1193 default: 1194 /* We can't be here */ 1195 break; 1196 } 1197 1198 coresight_disable_path(path); 1199 coresight_release_path(path); 1200 1201 out: 1202 mutex_unlock(&coresight_mutex); 1203 } 1204 EXPORT_SYMBOL_GPL(coresight_disable); 1205 1206 static ssize_t enable_sink_show(struct device *dev, 1207 struct device_attribute *attr, char *buf) 1208 { 1209 struct coresight_device *csdev = to_coresight_device(dev); 1210 1211 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->activated); 1212 } 1213 1214 static ssize_t enable_sink_store(struct device *dev, 1215 struct device_attribute *attr, 1216 const char *buf, size_t size) 1217 { 1218 int ret; 1219 unsigned long val; 1220 struct coresight_device *csdev = to_coresight_device(dev); 1221 1222 ret = kstrtoul(buf, 10, &val); 1223 if (ret) 1224 return ret; 1225 1226 if (val) 1227 csdev->activated = true; 1228 else 1229 csdev->activated = false; 1230 1231 return size; 1232 1233 } 1234 static DEVICE_ATTR_RW(enable_sink); 1235 1236 static ssize_t enable_source_show(struct device *dev, 1237 struct device_attribute *attr, char *buf) 1238 { 1239 struct coresight_device *csdev = to_coresight_device(dev); 1240 1241 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->enable); 1242 } 1243 1244 static ssize_t enable_source_store(struct device *dev, 1245 struct device_attribute *attr, 1246 const char *buf, size_t size) 1247 { 1248 int ret = 0; 1249 unsigned long val; 1250 struct coresight_device *csdev = to_coresight_device(dev); 1251 1252 ret = kstrtoul(buf, 10, &val); 1253 if (ret) 1254 return ret; 1255 1256 if (val) { 1257 ret = coresight_enable(csdev); 1258 if (ret) 1259 return ret; 1260 } else { 1261 coresight_disable(csdev); 1262 } 1263 1264 return size; 1265 } 1266 static DEVICE_ATTR_RW(enable_source); 1267 1268 static struct attribute *coresight_sink_attrs[] = { 1269 &dev_attr_enable_sink.attr, 1270 NULL, 1271 }; 1272 ATTRIBUTE_GROUPS(coresight_sink); 1273 1274 static struct attribute *coresight_source_attrs[] = { 1275 &dev_attr_enable_source.attr, 1276 NULL, 1277 }; 1278 ATTRIBUTE_GROUPS(coresight_source); 1279 1280 static struct device_type coresight_dev_type[] = { 1281 { 1282 .name = "sink", 1283 .groups = coresight_sink_groups, 1284 }, 1285 { 1286 .name = "link", 1287 }, 1288 { 1289 .name = "linksink", 1290 .groups = coresight_sink_groups, 1291 }, 1292 { 1293 .name = "source", 1294 .groups = coresight_source_groups, 1295 }, 1296 { 1297 .name = "helper", 1298 }, 1299 { 1300 .name = "ect", 1301 }, 1302 }; 1303 1304 static void coresight_device_release(struct device *dev) 1305 { 1306 struct coresight_device *csdev = to_coresight_device(dev); 1307 1308 fwnode_handle_put(csdev->dev.fwnode); 1309 kfree(csdev->refcnt); 1310 kfree(csdev); 1311 } 1312 1313 static int coresight_orphan_match(struct device *dev, void *data) 1314 { 1315 int i, ret = 0; 1316 bool still_orphan = false; 1317 struct coresight_device *csdev, *i_csdev; 1318 struct coresight_connection *conn; 1319 1320 csdev = data; 1321 i_csdev = to_coresight_device(dev); 1322 1323 /* No need to check oneself */ 1324 if (csdev == i_csdev) 1325 return 0; 1326 1327 /* Move on to another component if no connection is orphan */ 1328 if (!i_csdev->orphan) 1329 return 0; 1330 /* 1331 * Circle throuch all the connection of that component. If we find 1332 * an orphan connection whose name matches @csdev, link it. 1333 */ 1334 for (i = 0; i < i_csdev->pdata->nr_outport; i++) { 1335 conn = &i_csdev->pdata->conns[i]; 1336 1337 /* Skip the port if FW doesn't describe it */ 1338 if (!conn->child_fwnode) 1339 continue; 1340 /* We have found at least one orphan connection */ 1341 if (conn->child_dev == NULL) { 1342 /* Does it match this newly added device? */ 1343 if (conn->child_fwnode == csdev->dev.fwnode) { 1344 ret = coresight_make_links(i_csdev, 1345 conn, csdev); 1346 if (ret) 1347 return ret; 1348 } else { 1349 /* This component still has an orphan */ 1350 still_orphan = true; 1351 } 1352 } 1353 } 1354 1355 i_csdev->orphan = still_orphan; 1356 1357 /* 1358 * Returning '0' in case we didn't encounter any error, 1359 * ensures that all known component on the bus will be checked. 1360 */ 1361 return 0; 1362 } 1363 1364 static int coresight_fixup_orphan_conns(struct coresight_device *csdev) 1365 { 1366 return bus_for_each_dev(&coresight_bustype, NULL, 1367 csdev, coresight_orphan_match); 1368 } 1369 1370 1371 static int coresight_fixup_device_conns(struct coresight_device *csdev) 1372 { 1373 int i, ret = 0; 1374 1375 for (i = 0; i < csdev->pdata->nr_outport; i++) { 1376 struct coresight_connection *conn = &csdev->pdata->conns[i]; 1377 1378 if (!conn->child_fwnode) 1379 continue; 1380 conn->child_dev = 1381 coresight_find_csdev_by_fwnode(conn->child_fwnode); 1382 if (conn->child_dev) { 1383 ret = coresight_make_links(csdev, conn, 1384 conn->child_dev); 1385 if (ret) 1386 break; 1387 } else { 1388 csdev->orphan = true; 1389 } 1390 } 1391 1392 return ret; 1393 } 1394 1395 static int coresight_remove_match(struct device *dev, void *data) 1396 { 1397 int i; 1398 struct coresight_device *csdev, *iterator; 1399 struct coresight_connection *conn; 1400 1401 csdev = data; 1402 iterator = to_coresight_device(dev); 1403 1404 /* No need to check oneself */ 1405 if (csdev == iterator) 1406 return 0; 1407 1408 /* 1409 * Circle throuch all the connection of that component. If we find 1410 * a connection whose name matches @csdev, remove it. 1411 */ 1412 for (i = 0; i < iterator->pdata->nr_outport; i++) { 1413 conn = &iterator->pdata->conns[i]; 1414 1415 if (conn->child_dev == NULL || conn->child_fwnode == NULL) 1416 continue; 1417 1418 if (csdev->dev.fwnode == conn->child_fwnode) { 1419 iterator->orphan = true; 1420 coresight_remove_links(iterator, conn); 1421 /* 1422 * Drop the reference to the handle for the remote 1423 * device acquired in parsing the connections from 1424 * platform data. 1425 */ 1426 fwnode_handle_put(conn->child_fwnode); 1427 /* No need to continue */ 1428 break; 1429 } 1430 } 1431 1432 /* 1433 * Returning '0' ensures that all known component on the 1434 * bus will be checked. 1435 */ 1436 return 0; 1437 } 1438 1439 /* 1440 * coresight_remove_conns - Remove references to this given devices 1441 * from the connections of other devices. 1442 */ 1443 static void coresight_remove_conns(struct coresight_device *csdev) 1444 { 1445 /* 1446 * Another device will point to this device only if there is 1447 * an output port connected to this one. i.e, if the device 1448 * doesn't have at least one input port, there is no point 1449 * in searching all the devices. 1450 */ 1451 if (csdev->pdata->nr_inport) 1452 bus_for_each_dev(&coresight_bustype, NULL, 1453 csdev, coresight_remove_match); 1454 } 1455 1456 /** 1457 * coresight_timeout - loop until a bit has changed to a specific register 1458 * state. 1459 * @csa: coresight device access for the device 1460 * @offset: Offset of the register from the base of the device. 1461 * @position: the position of the bit of interest. 1462 * @value: the value the bit should have. 1463 * 1464 * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if 1465 * TIMEOUT_US has elapsed, which ever happens first. 1466 */ 1467 int coresight_timeout(struct csdev_access *csa, u32 offset, 1468 int position, int value) 1469 { 1470 int i; 1471 u32 val; 1472 1473 for (i = TIMEOUT_US; i > 0; i--) { 1474 val = csdev_access_read32(csa, offset); 1475 /* waiting on the bit to go from 0 to 1 */ 1476 if (value) { 1477 if (val & BIT(position)) 1478 return 0; 1479 /* waiting on the bit to go from 1 to 0 */ 1480 } else { 1481 if (!(val & BIT(position))) 1482 return 0; 1483 } 1484 1485 /* 1486 * Delay is arbitrary - the specification doesn't say how long 1487 * we are expected to wait. Extra check required to make sure 1488 * we don't wait needlessly on the last iteration. 1489 */ 1490 if (i - 1) 1491 udelay(1); 1492 } 1493 1494 return -EAGAIN; 1495 } 1496 EXPORT_SYMBOL_GPL(coresight_timeout); 1497 1498 u32 coresight_relaxed_read32(struct coresight_device *csdev, u32 offset) 1499 { 1500 return csdev_access_relaxed_read32(&csdev->access, offset); 1501 } 1502 1503 u32 coresight_read32(struct coresight_device *csdev, u32 offset) 1504 { 1505 return csdev_access_read32(&csdev->access, offset); 1506 } 1507 1508 void coresight_relaxed_write32(struct coresight_device *csdev, 1509 u32 val, u32 offset) 1510 { 1511 csdev_access_relaxed_write32(&csdev->access, val, offset); 1512 } 1513 1514 void coresight_write32(struct coresight_device *csdev, u32 val, u32 offset) 1515 { 1516 csdev_access_write32(&csdev->access, val, offset); 1517 } 1518 1519 u64 coresight_relaxed_read64(struct coresight_device *csdev, u32 offset) 1520 { 1521 return csdev_access_relaxed_read64(&csdev->access, offset); 1522 } 1523 1524 u64 coresight_read64(struct coresight_device *csdev, u32 offset) 1525 { 1526 return csdev_access_read64(&csdev->access, offset); 1527 } 1528 1529 void coresight_relaxed_write64(struct coresight_device *csdev, 1530 u64 val, u32 offset) 1531 { 1532 csdev_access_relaxed_write64(&csdev->access, val, offset); 1533 } 1534 1535 void coresight_write64(struct coresight_device *csdev, u64 val, u32 offset) 1536 { 1537 csdev_access_write64(&csdev->access, val, offset); 1538 } 1539 1540 /* 1541 * coresight_release_platform_data: Release references to the devices connected 1542 * to the output port of this device. 1543 */ 1544 void coresight_release_platform_data(struct coresight_device *csdev, 1545 struct coresight_platform_data *pdata) 1546 { 1547 int i; 1548 struct coresight_connection *conns = pdata->conns; 1549 1550 for (i = 0; i < pdata->nr_outport; i++) { 1551 /* If we have made the links, remove them now */ 1552 if (csdev && conns[i].child_dev) 1553 coresight_remove_links(csdev, &conns[i]); 1554 /* 1555 * Drop the refcount and clear the handle as this device 1556 * is going away 1557 */ 1558 if (conns[i].child_fwnode) { 1559 fwnode_handle_put(conns[i].child_fwnode); 1560 pdata->conns[i].child_fwnode = NULL; 1561 } 1562 } 1563 if (csdev) 1564 coresight_remove_conns_sysfs_group(csdev); 1565 } 1566 1567 struct coresight_device *coresight_register(struct coresight_desc *desc) 1568 { 1569 int ret; 1570 int link_subtype; 1571 int nr_refcnts = 1; 1572 atomic_t *refcnts = NULL; 1573 struct coresight_device *csdev; 1574 1575 csdev = kzalloc(sizeof(*csdev), GFP_KERNEL); 1576 if (!csdev) { 1577 ret = -ENOMEM; 1578 goto err_out; 1579 } 1580 1581 if (desc->type == CORESIGHT_DEV_TYPE_LINK || 1582 desc->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1583 link_subtype = desc->subtype.link_subtype; 1584 1585 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) 1586 nr_refcnts = desc->pdata->nr_inport; 1587 else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) 1588 nr_refcnts = desc->pdata->nr_outport; 1589 } 1590 1591 refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL); 1592 if (!refcnts) { 1593 ret = -ENOMEM; 1594 goto err_free_csdev; 1595 } 1596 1597 csdev->refcnt = refcnts; 1598 1599 csdev->pdata = desc->pdata; 1600 1601 csdev->type = desc->type; 1602 csdev->subtype = desc->subtype; 1603 csdev->ops = desc->ops; 1604 csdev->access = desc->access; 1605 csdev->orphan = false; 1606 1607 csdev->dev.type = &coresight_dev_type[desc->type]; 1608 csdev->dev.groups = desc->groups; 1609 csdev->dev.parent = desc->dev; 1610 csdev->dev.release = coresight_device_release; 1611 csdev->dev.bus = &coresight_bustype; 1612 /* 1613 * Hold the reference to our parent device. This will be 1614 * dropped only in coresight_device_release(). 1615 */ 1616 csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev)); 1617 dev_set_name(&csdev->dev, "%s", desc->name); 1618 1619 ret = device_register(&csdev->dev); 1620 if (ret) { 1621 put_device(&csdev->dev); 1622 /* 1623 * All resources are free'd explicitly via 1624 * coresight_device_release(), triggered from put_device(). 1625 */ 1626 goto err_out; 1627 } 1628 1629 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 1630 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1631 ret = etm_perf_add_symlink_sink(csdev); 1632 1633 if (ret) { 1634 device_unregister(&csdev->dev); 1635 /* 1636 * As with the above, all resources are free'd 1637 * explicitly via coresight_device_release() triggered 1638 * from put_device(), which is in turn called from 1639 * function device_unregister(). 1640 */ 1641 goto err_out; 1642 } 1643 } 1644 1645 mutex_lock(&coresight_mutex); 1646 1647 ret = coresight_create_conns_sysfs_group(csdev); 1648 if (!ret) 1649 ret = coresight_fixup_device_conns(csdev); 1650 if (!ret) 1651 ret = coresight_fixup_orphan_conns(csdev); 1652 if (!ret && cti_assoc_ops && cti_assoc_ops->add) 1653 cti_assoc_ops->add(csdev); 1654 1655 mutex_unlock(&coresight_mutex); 1656 if (ret) { 1657 coresight_unregister(csdev); 1658 return ERR_PTR(ret); 1659 } 1660 1661 return csdev; 1662 1663 err_free_csdev: 1664 kfree(csdev); 1665 err_out: 1666 /* Cleanup the connection information */ 1667 coresight_release_platform_data(NULL, desc->pdata); 1668 return ERR_PTR(ret); 1669 } 1670 EXPORT_SYMBOL_GPL(coresight_register); 1671 1672 void coresight_unregister(struct coresight_device *csdev) 1673 { 1674 etm_perf_del_symlink_sink(csdev); 1675 /* Remove references of that device in the topology */ 1676 if (cti_assoc_ops && cti_assoc_ops->remove) 1677 cti_assoc_ops->remove(csdev); 1678 coresight_remove_conns(csdev); 1679 coresight_clear_default_sink(csdev); 1680 coresight_release_platform_data(csdev, csdev->pdata); 1681 device_unregister(&csdev->dev); 1682 } 1683 EXPORT_SYMBOL_GPL(coresight_unregister); 1684 1685 1686 /* 1687 * coresight_search_device_idx - Search the fwnode handle of a device 1688 * in the given dev_idx list. Must be called with the coresight_mutex held. 1689 * 1690 * Returns the index of the entry, when found. Otherwise, -ENOENT. 1691 */ 1692 static inline int coresight_search_device_idx(struct coresight_dev_list *dict, 1693 struct fwnode_handle *fwnode) 1694 { 1695 int i; 1696 1697 for (i = 0; i < dict->nr_idx; i++) 1698 if (dict->fwnode_list[i] == fwnode) 1699 return i; 1700 return -ENOENT; 1701 } 1702 1703 bool coresight_loses_context_with_cpu(struct device *dev) 1704 { 1705 return fwnode_property_present(dev_fwnode(dev), 1706 "arm,coresight-loses-context-with-cpu"); 1707 } 1708 EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu); 1709 1710 /* 1711 * coresight_alloc_device_name - Get an index for a given device in the 1712 * device index list specific to a driver. An index is allocated for a 1713 * device and is tracked with the fwnode_handle to prevent allocating 1714 * duplicate indices for the same device (e.g, if we defer probing of 1715 * a device due to dependencies), in case the index is requested again. 1716 */ 1717 char *coresight_alloc_device_name(struct coresight_dev_list *dict, 1718 struct device *dev) 1719 { 1720 int idx; 1721 char *name = NULL; 1722 struct fwnode_handle **list; 1723 1724 mutex_lock(&coresight_mutex); 1725 1726 idx = coresight_search_device_idx(dict, dev_fwnode(dev)); 1727 if (idx < 0) { 1728 /* Make space for the new entry */ 1729 idx = dict->nr_idx; 1730 list = krealloc_array(dict->fwnode_list, 1731 idx + 1, sizeof(*dict->fwnode_list), 1732 GFP_KERNEL); 1733 if (ZERO_OR_NULL_PTR(list)) { 1734 idx = -ENOMEM; 1735 goto done; 1736 } 1737 1738 list[idx] = dev_fwnode(dev); 1739 dict->fwnode_list = list; 1740 dict->nr_idx = idx + 1; 1741 } 1742 1743 name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", dict->pfx, idx); 1744 done: 1745 mutex_unlock(&coresight_mutex); 1746 return name; 1747 } 1748 EXPORT_SYMBOL_GPL(coresight_alloc_device_name); 1749 1750 struct bus_type coresight_bustype = { 1751 .name = "coresight", 1752 }; 1753 1754 static int __init coresight_init(void) 1755 { 1756 int ret; 1757 1758 ret = bus_register(&coresight_bustype); 1759 if (ret) 1760 return ret; 1761 1762 ret = etm_perf_init(); 1763 if (ret) 1764 goto exit_bus_unregister; 1765 1766 /* initialise the coresight syscfg API */ 1767 ret = cscfg_init(); 1768 if (!ret) 1769 return 0; 1770 1771 etm_perf_exit(); 1772 exit_bus_unregister: 1773 bus_unregister(&coresight_bustype); 1774 return ret; 1775 } 1776 1777 static void __exit coresight_exit(void) 1778 { 1779 cscfg_exit(); 1780 etm_perf_exit(); 1781 bus_unregister(&coresight_bustype); 1782 } 1783 1784 module_init(coresight_init); 1785 module_exit(coresight_exit); 1786 1787 MODULE_LICENSE("GPL v2"); 1788 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>"); 1789 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>"); 1790 MODULE_DESCRIPTION("Arm CoreSight tracer driver"); 1791