1# 2# Coresight configuration 3# 4menuconfig CORESIGHT 5 bool "CoreSight Tracing Support" 6 select ARM_AMBA 7 help 8 This framework provides a kernel interface for the CoreSight debug 9 and trace drivers to register themselves with. It's intended to build 10 a topological view of the CoreSight components based on a DT 11 specification and configure the right serie of components when a 12 trace source gets enabled. 13 14if CORESIGHT 15config CORESIGHT_LINKS_AND_SINKS 16 bool "CoreSight Link and Sink drivers" 17 help 18 This enables support for CoreSight link and sink drivers that are 19 responsible for transporting and collecting the trace data 20 respectively. Link and sinks are dynamically aggregated with a trace 21 entity at run time to form a complete trace path. 22 23config CORESIGHT_LINK_AND_SINK_TMC 24 bool "Coresight generic TMC driver" 25 depends on CORESIGHT_LINKS_AND_SINKS 26 help 27 This enables support for the Trace Memory Controller driver. 28 Depending on its configuration the device can act as a link (embedded 29 trace router - ETR) or sink (embedded trace FIFO). The driver 30 complies with the generic implementation of the component without 31 special enhancement or added features. 32 33config CORESIGHT_SINK_TPIU 34 bool "Coresight generic TPIU driver" 35 depends on CORESIGHT_LINKS_AND_SINKS 36 help 37 This enables support for the Trace Port Interface Unit driver, 38 responsible for bridging the gap between the on-chip coresight 39 components and a trace for bridging the gap between the on-chip 40 coresight components and a trace port collection engine, typically 41 connected to an external host for use case capturing more traces than 42 the on-board coresight memory can handle. 43 44config CORESIGHT_SINK_ETBV10 45 bool "Coresight ETBv1.0 driver" 46 depends on CORESIGHT_LINKS_AND_SINKS 47 help 48 This enables support for the Embedded Trace Buffer version 1.0 driver 49 that complies with the generic implementation of the component without 50 special enhancement or added features. 51 52config CORESIGHT_SOURCE_ETM3X 53 bool "CoreSight Embedded Trace Macrocell 3.x driver" 54 depends on !ARM64 55 select CORESIGHT_LINKS_AND_SINKS 56 help 57 This driver provides support for processor ETM3.x and PTM1.x modules, 58 which allows tracing the instructions that a processor is executing 59 This is primarily useful for instruction level tracing. Depending 60 the ETM version data tracing may also be available. 61 62config CORESIGHT_SOURCE_ETM4X 63 bool "CoreSight Embedded Trace Macrocell 4.x driver" 64 depends on ARM64 65 select CORESIGHT_LINKS_AND_SINKS 66 help 67 This driver provides support for the ETM4.x tracer module, tracing the 68 instructions that a processor is executing. This is primarily useful 69 for instruction level tracing. Depending on the implemented version 70 data tracing may also be available. 71 72config CORESIGHT_QCOM_REPLICATOR 73 bool "Qualcomm CoreSight Replicator driver" 74 depends on CORESIGHT_LINKS_AND_SINKS 75 help 76 This enables support for Qualcomm CoreSight link driver. The 77 programmable ATB replicator sends the ATB trace stream from the 78 ETB/ETF to the TPIUi and ETR. 79 80endif 81