1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) STMicroelectronics SA 2018 4 * Author: Benjamin Gaignard <benjamin.gaignard@st.com> for STMicroelectronics. 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/delay.h> 9 #include <linux/hwspinlock.h> 10 #include <linux/io.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/of.h> 14 #include <linux/platform_device.h> 15 #include <linux/pm_runtime.h> 16 17 #include "hwspinlock_internal.h" 18 19 #define STM32_MUTEX_COREID BIT(8) 20 #define STM32_MUTEX_LOCK_BIT BIT(31) 21 #define STM32_MUTEX_NUM_LOCKS 32 22 23 struct stm32_hwspinlock { 24 struct clk *clk; 25 struct hwspinlock_device bank; 26 }; 27 28 static int stm32_hwspinlock_trylock(struct hwspinlock *lock) 29 { 30 void __iomem *lock_addr = lock->priv; 31 u32 status; 32 33 writel(STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID, lock_addr); 34 status = readl(lock_addr); 35 36 return status == (STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID); 37 } 38 39 static void stm32_hwspinlock_unlock(struct hwspinlock *lock) 40 { 41 void __iomem *lock_addr = lock->priv; 42 43 writel(STM32_MUTEX_COREID, lock_addr); 44 } 45 46 static void stm32_hwspinlock_relax(struct hwspinlock *lock) 47 { 48 ndelay(50); 49 } 50 51 static const struct hwspinlock_ops stm32_hwspinlock_ops = { 52 .trylock = stm32_hwspinlock_trylock, 53 .unlock = stm32_hwspinlock_unlock, 54 .relax = stm32_hwspinlock_relax, 55 }; 56 57 static void stm32_hwspinlock_disable_clk(void *data) 58 { 59 struct platform_device *pdev = data; 60 struct stm32_hwspinlock *hw = platform_get_drvdata(pdev); 61 struct device *dev = &pdev->dev; 62 63 pm_runtime_get_sync(dev); 64 pm_runtime_disable(dev); 65 pm_runtime_set_suspended(dev); 66 pm_runtime_put_noidle(dev); 67 68 clk_disable_unprepare(hw->clk); 69 } 70 71 static int stm32_hwspinlock_probe(struct platform_device *pdev) 72 { 73 struct device *dev = &pdev->dev; 74 struct stm32_hwspinlock *hw; 75 void __iomem *io_base; 76 size_t array_size; 77 int i, ret; 78 79 io_base = devm_platform_ioremap_resource(pdev, 0); 80 if (IS_ERR(io_base)) 81 return PTR_ERR(io_base); 82 83 array_size = STM32_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock); 84 hw = devm_kzalloc(dev, sizeof(*hw) + array_size, GFP_KERNEL); 85 if (!hw) 86 return -ENOMEM; 87 88 hw->clk = devm_clk_get(dev, "hsem"); 89 if (IS_ERR(hw->clk)) 90 return PTR_ERR(hw->clk); 91 92 ret = clk_prepare_enable(hw->clk); 93 if (ret) { 94 dev_err(dev, "Failed to prepare_enable clock\n"); 95 return ret; 96 } 97 98 platform_set_drvdata(pdev, hw); 99 100 pm_runtime_get_noresume(dev); 101 pm_runtime_set_active(dev); 102 pm_runtime_enable(dev); 103 pm_runtime_put(dev); 104 105 ret = devm_add_action_or_reset(dev, stm32_hwspinlock_disable_clk, pdev); 106 if (ret) { 107 dev_err(dev, "Failed to register action\n"); 108 return ret; 109 } 110 111 for (i = 0; i < STM32_MUTEX_NUM_LOCKS; i++) 112 hw->bank.lock[i].priv = io_base + i * sizeof(u32); 113 114 ret = devm_hwspin_lock_register(dev, &hw->bank, &stm32_hwspinlock_ops, 115 0, STM32_MUTEX_NUM_LOCKS); 116 117 if (ret) 118 dev_err(dev, "Failed to register hwspinlock\n"); 119 120 return ret; 121 } 122 123 static int __maybe_unused stm32_hwspinlock_runtime_suspend(struct device *dev) 124 { 125 struct stm32_hwspinlock *hw = dev_get_drvdata(dev); 126 127 clk_disable_unprepare(hw->clk); 128 129 return 0; 130 } 131 132 static int __maybe_unused stm32_hwspinlock_runtime_resume(struct device *dev) 133 { 134 struct stm32_hwspinlock *hw = dev_get_drvdata(dev); 135 136 clk_prepare_enable(hw->clk); 137 138 return 0; 139 } 140 141 static const struct dev_pm_ops stm32_hwspinlock_pm_ops = { 142 SET_RUNTIME_PM_OPS(stm32_hwspinlock_runtime_suspend, 143 stm32_hwspinlock_runtime_resume, 144 NULL) 145 }; 146 147 static const struct of_device_id stm32_hwpinlock_ids[] = { 148 { .compatible = "st,stm32-hwspinlock", }, 149 {}, 150 }; 151 MODULE_DEVICE_TABLE(of, stm32_hwpinlock_ids); 152 153 static struct platform_driver stm32_hwspinlock_driver = { 154 .probe = stm32_hwspinlock_probe, 155 .driver = { 156 .name = "stm32_hwspinlock", 157 .of_match_table = stm32_hwpinlock_ids, 158 .pm = &stm32_hwspinlock_pm_ops, 159 }, 160 }; 161 162 static int __init stm32_hwspinlock_init(void) 163 { 164 return platform_driver_register(&stm32_hwspinlock_driver); 165 } 166 /* board init code might need to reserve hwspinlocks for predefined purposes */ 167 postcore_initcall(stm32_hwspinlock_init); 168 169 static void __exit stm32_hwspinlock_exit(void) 170 { 171 platform_driver_unregister(&stm32_hwspinlock_driver); 172 } 173 module_exit(stm32_hwspinlock_exit); 174 175 MODULE_LICENSE("GPL v2"); 176 MODULE_DESCRIPTION("Hardware spinlock driver for STM32 SoCs"); 177 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); 178