1f24fcff1SBenjamin Gaignard // SPDX-License-Identifier: GPL-2.0 2f24fcff1SBenjamin Gaignard /* 3f24fcff1SBenjamin Gaignard * Copyright (C) STMicroelectronics SA 2018 4f24fcff1SBenjamin Gaignard * Author: Benjamin Gaignard <benjamin.gaignard@st.com> for STMicroelectronics. 5f24fcff1SBenjamin Gaignard */ 6f24fcff1SBenjamin Gaignard 7f24fcff1SBenjamin Gaignard #include <linux/clk.h> 85cd69f13SFabien Dessenne #include <linux/delay.h> 9f24fcff1SBenjamin Gaignard #include <linux/hwspinlock.h> 10f24fcff1SBenjamin Gaignard #include <linux/io.h> 11f24fcff1SBenjamin Gaignard #include <linux/kernel.h> 12f24fcff1SBenjamin Gaignard #include <linux/module.h> 13f24fcff1SBenjamin Gaignard #include <linux/of.h> 14f24fcff1SBenjamin Gaignard #include <linux/platform_device.h> 15f24fcff1SBenjamin Gaignard #include <linux/pm_runtime.h> 16f24fcff1SBenjamin Gaignard 17f24fcff1SBenjamin Gaignard #include "hwspinlock_internal.h" 18f24fcff1SBenjamin Gaignard 19f24fcff1SBenjamin Gaignard #define STM32_MUTEX_COREID BIT(8) 20f24fcff1SBenjamin Gaignard #define STM32_MUTEX_LOCK_BIT BIT(31) 21f24fcff1SBenjamin Gaignard #define STM32_MUTEX_NUM_LOCKS 32 22f24fcff1SBenjamin Gaignard 23f24fcff1SBenjamin Gaignard struct stm32_hwspinlock { 24f24fcff1SBenjamin Gaignard struct clk *clk; 25f24fcff1SBenjamin Gaignard struct hwspinlock_device bank; 26f24fcff1SBenjamin Gaignard }; 27f24fcff1SBenjamin Gaignard 28f24fcff1SBenjamin Gaignard static int stm32_hwspinlock_trylock(struct hwspinlock *lock) 29f24fcff1SBenjamin Gaignard { 30f24fcff1SBenjamin Gaignard void __iomem *lock_addr = lock->priv; 31f24fcff1SBenjamin Gaignard u32 status; 32f24fcff1SBenjamin Gaignard 33f24fcff1SBenjamin Gaignard writel(STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID, lock_addr); 34f24fcff1SBenjamin Gaignard status = readl(lock_addr); 35f24fcff1SBenjamin Gaignard 36f24fcff1SBenjamin Gaignard return status == (STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID); 37f24fcff1SBenjamin Gaignard } 38f24fcff1SBenjamin Gaignard 39f24fcff1SBenjamin Gaignard static void stm32_hwspinlock_unlock(struct hwspinlock *lock) 40f24fcff1SBenjamin Gaignard { 41f24fcff1SBenjamin Gaignard void __iomem *lock_addr = lock->priv; 42f24fcff1SBenjamin Gaignard 43f24fcff1SBenjamin Gaignard writel(STM32_MUTEX_COREID, lock_addr); 44f24fcff1SBenjamin Gaignard } 45f24fcff1SBenjamin Gaignard 465cd69f13SFabien Dessenne static void stm32_hwspinlock_relax(struct hwspinlock *lock) 475cd69f13SFabien Dessenne { 485cd69f13SFabien Dessenne ndelay(50); 495cd69f13SFabien Dessenne } 505cd69f13SFabien Dessenne 51f24fcff1SBenjamin Gaignard static const struct hwspinlock_ops stm32_hwspinlock_ops = { 52f24fcff1SBenjamin Gaignard .trylock = stm32_hwspinlock_trylock, 53f24fcff1SBenjamin Gaignard .unlock = stm32_hwspinlock_unlock, 545cd69f13SFabien Dessenne .relax = stm32_hwspinlock_relax, 55f24fcff1SBenjamin Gaignard }; 56f24fcff1SBenjamin Gaignard 57f24fcff1SBenjamin Gaignard static int stm32_hwspinlock_probe(struct platform_device *pdev) 58f24fcff1SBenjamin Gaignard { 59f24fcff1SBenjamin Gaignard struct stm32_hwspinlock *hw; 60f24fcff1SBenjamin Gaignard void __iomem *io_base; 61f24fcff1SBenjamin Gaignard size_t array_size; 62f24fcff1SBenjamin Gaignard int i, ret; 63f24fcff1SBenjamin Gaignard 64*d4824486SYangtao Li io_base = devm_platform_ioremap_resource(pdev, 0); 654d5a91fdSWei Yongjun if (IS_ERR(io_base)) 664d5a91fdSWei Yongjun return PTR_ERR(io_base); 67f24fcff1SBenjamin Gaignard 68f24fcff1SBenjamin Gaignard array_size = STM32_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock); 69f24fcff1SBenjamin Gaignard hw = devm_kzalloc(&pdev->dev, sizeof(*hw) + array_size, GFP_KERNEL); 70f24fcff1SBenjamin Gaignard if (!hw) 71f24fcff1SBenjamin Gaignard return -ENOMEM; 72f24fcff1SBenjamin Gaignard 73f24fcff1SBenjamin Gaignard hw->clk = devm_clk_get(&pdev->dev, "hsem"); 74f24fcff1SBenjamin Gaignard if (IS_ERR(hw->clk)) 75f24fcff1SBenjamin Gaignard return PTR_ERR(hw->clk); 76f24fcff1SBenjamin Gaignard 77f24fcff1SBenjamin Gaignard for (i = 0; i < STM32_MUTEX_NUM_LOCKS; i++) 78f24fcff1SBenjamin Gaignard hw->bank.lock[i].priv = io_base + i * sizeof(u32); 79f24fcff1SBenjamin Gaignard 80f24fcff1SBenjamin Gaignard platform_set_drvdata(pdev, hw); 81f24fcff1SBenjamin Gaignard pm_runtime_enable(&pdev->dev); 82f24fcff1SBenjamin Gaignard 83f24fcff1SBenjamin Gaignard ret = hwspin_lock_register(&hw->bank, &pdev->dev, &stm32_hwspinlock_ops, 84f24fcff1SBenjamin Gaignard 0, STM32_MUTEX_NUM_LOCKS); 85f24fcff1SBenjamin Gaignard 86f24fcff1SBenjamin Gaignard if (ret) 87f24fcff1SBenjamin Gaignard pm_runtime_disable(&pdev->dev); 88f24fcff1SBenjamin Gaignard 89f24fcff1SBenjamin Gaignard return ret; 90f24fcff1SBenjamin Gaignard } 91f24fcff1SBenjamin Gaignard 92f24fcff1SBenjamin Gaignard static int stm32_hwspinlock_remove(struct platform_device *pdev) 93f24fcff1SBenjamin Gaignard { 94f24fcff1SBenjamin Gaignard struct stm32_hwspinlock *hw = platform_get_drvdata(pdev); 95f24fcff1SBenjamin Gaignard int ret; 96f24fcff1SBenjamin Gaignard 97f24fcff1SBenjamin Gaignard ret = hwspin_lock_unregister(&hw->bank); 98f24fcff1SBenjamin Gaignard if (ret) 99f24fcff1SBenjamin Gaignard dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret); 100f24fcff1SBenjamin Gaignard 101f24fcff1SBenjamin Gaignard pm_runtime_disable(&pdev->dev); 102f24fcff1SBenjamin Gaignard 103f24fcff1SBenjamin Gaignard return 0; 104f24fcff1SBenjamin Gaignard } 105f24fcff1SBenjamin Gaignard 106f24fcff1SBenjamin Gaignard static int __maybe_unused stm32_hwspinlock_runtime_suspend(struct device *dev) 107f24fcff1SBenjamin Gaignard { 108f24fcff1SBenjamin Gaignard struct stm32_hwspinlock *hw = dev_get_drvdata(dev); 109f24fcff1SBenjamin Gaignard 110f24fcff1SBenjamin Gaignard clk_disable_unprepare(hw->clk); 111f24fcff1SBenjamin Gaignard 112f24fcff1SBenjamin Gaignard return 0; 113f24fcff1SBenjamin Gaignard } 114f24fcff1SBenjamin Gaignard 115f24fcff1SBenjamin Gaignard static int __maybe_unused stm32_hwspinlock_runtime_resume(struct device *dev) 116f24fcff1SBenjamin Gaignard { 117f24fcff1SBenjamin Gaignard struct stm32_hwspinlock *hw = dev_get_drvdata(dev); 118f24fcff1SBenjamin Gaignard 119f24fcff1SBenjamin Gaignard clk_prepare_enable(hw->clk); 120f24fcff1SBenjamin Gaignard 121f24fcff1SBenjamin Gaignard return 0; 122f24fcff1SBenjamin Gaignard } 123f24fcff1SBenjamin Gaignard 124f24fcff1SBenjamin Gaignard static const struct dev_pm_ops stm32_hwspinlock_pm_ops = { 125f24fcff1SBenjamin Gaignard SET_RUNTIME_PM_OPS(stm32_hwspinlock_runtime_suspend, 126f24fcff1SBenjamin Gaignard stm32_hwspinlock_runtime_resume, 127f24fcff1SBenjamin Gaignard NULL) 128f24fcff1SBenjamin Gaignard }; 129f24fcff1SBenjamin Gaignard 130f24fcff1SBenjamin Gaignard static const struct of_device_id stm32_hwpinlock_ids[] = { 131f24fcff1SBenjamin Gaignard { .compatible = "st,stm32-hwspinlock", }, 132f24fcff1SBenjamin Gaignard {}, 133f24fcff1SBenjamin Gaignard }; 134f24fcff1SBenjamin Gaignard MODULE_DEVICE_TABLE(of, stm32_hwpinlock_ids); 135f24fcff1SBenjamin Gaignard 136f24fcff1SBenjamin Gaignard static struct platform_driver stm32_hwspinlock_driver = { 137f24fcff1SBenjamin Gaignard .probe = stm32_hwspinlock_probe, 138f24fcff1SBenjamin Gaignard .remove = stm32_hwspinlock_remove, 139f24fcff1SBenjamin Gaignard .driver = { 140f24fcff1SBenjamin Gaignard .name = "stm32_hwspinlock", 141f24fcff1SBenjamin Gaignard .of_match_table = stm32_hwpinlock_ids, 142f24fcff1SBenjamin Gaignard .pm = &stm32_hwspinlock_pm_ops, 143f24fcff1SBenjamin Gaignard }, 144f24fcff1SBenjamin Gaignard }; 145f24fcff1SBenjamin Gaignard 146f24fcff1SBenjamin Gaignard static int __init stm32_hwspinlock_init(void) 147f24fcff1SBenjamin Gaignard { 148f24fcff1SBenjamin Gaignard return platform_driver_register(&stm32_hwspinlock_driver); 149f24fcff1SBenjamin Gaignard } 150f24fcff1SBenjamin Gaignard /* board init code might need to reserve hwspinlocks for predefined purposes */ 151f24fcff1SBenjamin Gaignard postcore_initcall(stm32_hwspinlock_init); 152f24fcff1SBenjamin Gaignard 153f24fcff1SBenjamin Gaignard static void __exit stm32_hwspinlock_exit(void) 154f24fcff1SBenjamin Gaignard { 155f24fcff1SBenjamin Gaignard platform_driver_unregister(&stm32_hwspinlock_driver); 156f24fcff1SBenjamin Gaignard } 157f24fcff1SBenjamin Gaignard module_exit(stm32_hwspinlock_exit); 158f24fcff1SBenjamin Gaignard 159f24fcff1SBenjamin Gaignard MODULE_LICENSE("GPL v2"); 160f24fcff1SBenjamin Gaignard MODULE_DESCRIPTION("Hardware spinlock driver for STM32 SoCs"); 161f24fcff1SBenjamin Gaignard MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); 162