xref: /linux/drivers/hwspinlock/stm32_hwspinlock.c (revision 4d5a91fd1f42a821d14b92b082b8e71be9911ba5)
1f24fcff1SBenjamin Gaignard // SPDX-License-Identifier: GPL-2.0
2f24fcff1SBenjamin Gaignard /*
3f24fcff1SBenjamin Gaignard  * Copyright (C) STMicroelectronics SA 2018
4f24fcff1SBenjamin Gaignard  * Author: Benjamin Gaignard <benjamin.gaignard@st.com> for STMicroelectronics.
5f24fcff1SBenjamin Gaignard  */
6f24fcff1SBenjamin Gaignard 
7f24fcff1SBenjamin Gaignard #include <linux/clk.h>
8f24fcff1SBenjamin Gaignard #include <linux/hwspinlock.h>
9f24fcff1SBenjamin Gaignard #include <linux/io.h>
10f24fcff1SBenjamin Gaignard #include <linux/kernel.h>
11f24fcff1SBenjamin Gaignard #include <linux/module.h>
12f24fcff1SBenjamin Gaignard #include <linux/of.h>
13f24fcff1SBenjamin Gaignard #include <linux/platform_device.h>
14f24fcff1SBenjamin Gaignard #include <linux/pm_runtime.h>
15f24fcff1SBenjamin Gaignard 
16f24fcff1SBenjamin Gaignard #include "hwspinlock_internal.h"
17f24fcff1SBenjamin Gaignard 
18f24fcff1SBenjamin Gaignard #define STM32_MUTEX_COREID	BIT(8)
19f24fcff1SBenjamin Gaignard #define STM32_MUTEX_LOCK_BIT	BIT(31)
20f24fcff1SBenjamin Gaignard #define STM32_MUTEX_NUM_LOCKS	32
21f24fcff1SBenjamin Gaignard 
22f24fcff1SBenjamin Gaignard struct stm32_hwspinlock {
23f24fcff1SBenjamin Gaignard 	struct clk *clk;
24f24fcff1SBenjamin Gaignard 	struct hwspinlock_device bank;
25f24fcff1SBenjamin Gaignard };
26f24fcff1SBenjamin Gaignard 
27f24fcff1SBenjamin Gaignard static int stm32_hwspinlock_trylock(struct hwspinlock *lock)
28f24fcff1SBenjamin Gaignard {
29f24fcff1SBenjamin Gaignard 	void __iomem *lock_addr = lock->priv;
30f24fcff1SBenjamin Gaignard 	u32 status;
31f24fcff1SBenjamin Gaignard 
32f24fcff1SBenjamin Gaignard 	writel(STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID, lock_addr);
33f24fcff1SBenjamin Gaignard 	status = readl(lock_addr);
34f24fcff1SBenjamin Gaignard 
35f24fcff1SBenjamin Gaignard 	return status == (STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID);
36f24fcff1SBenjamin Gaignard }
37f24fcff1SBenjamin Gaignard 
38f24fcff1SBenjamin Gaignard static void stm32_hwspinlock_unlock(struct hwspinlock *lock)
39f24fcff1SBenjamin Gaignard {
40f24fcff1SBenjamin Gaignard 	void __iomem *lock_addr = lock->priv;
41f24fcff1SBenjamin Gaignard 
42f24fcff1SBenjamin Gaignard 	writel(STM32_MUTEX_COREID, lock_addr);
43f24fcff1SBenjamin Gaignard }
44f24fcff1SBenjamin Gaignard 
45f24fcff1SBenjamin Gaignard static const struct hwspinlock_ops stm32_hwspinlock_ops = {
46f24fcff1SBenjamin Gaignard 	.trylock	= stm32_hwspinlock_trylock,
47f24fcff1SBenjamin Gaignard 	.unlock		= stm32_hwspinlock_unlock,
48f24fcff1SBenjamin Gaignard };
49f24fcff1SBenjamin Gaignard 
50f24fcff1SBenjamin Gaignard static int stm32_hwspinlock_probe(struct platform_device *pdev)
51f24fcff1SBenjamin Gaignard {
52f24fcff1SBenjamin Gaignard 	struct stm32_hwspinlock *hw;
53f24fcff1SBenjamin Gaignard 	void __iomem *io_base;
54f24fcff1SBenjamin Gaignard 	struct resource *res;
55f24fcff1SBenjamin Gaignard 	size_t array_size;
56f24fcff1SBenjamin Gaignard 	int i, ret;
57f24fcff1SBenjamin Gaignard 
58f24fcff1SBenjamin Gaignard 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
59f24fcff1SBenjamin Gaignard 	io_base = devm_ioremap_resource(&pdev->dev, res);
60*4d5a91fdSWei Yongjun 	if (IS_ERR(io_base))
61*4d5a91fdSWei Yongjun 		return PTR_ERR(io_base);
62f24fcff1SBenjamin Gaignard 
63f24fcff1SBenjamin Gaignard 	array_size = STM32_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock);
64f24fcff1SBenjamin Gaignard 	hw = devm_kzalloc(&pdev->dev, sizeof(*hw) + array_size, GFP_KERNEL);
65f24fcff1SBenjamin Gaignard 	if (!hw)
66f24fcff1SBenjamin Gaignard 		return -ENOMEM;
67f24fcff1SBenjamin Gaignard 
68f24fcff1SBenjamin Gaignard 	hw->clk = devm_clk_get(&pdev->dev, "hsem");
69f24fcff1SBenjamin Gaignard 	if (IS_ERR(hw->clk))
70f24fcff1SBenjamin Gaignard 		return PTR_ERR(hw->clk);
71f24fcff1SBenjamin Gaignard 
72f24fcff1SBenjamin Gaignard 	for (i = 0; i < STM32_MUTEX_NUM_LOCKS; i++)
73f24fcff1SBenjamin Gaignard 		hw->bank.lock[i].priv = io_base + i * sizeof(u32);
74f24fcff1SBenjamin Gaignard 
75f24fcff1SBenjamin Gaignard 	platform_set_drvdata(pdev, hw);
76f24fcff1SBenjamin Gaignard 	pm_runtime_enable(&pdev->dev);
77f24fcff1SBenjamin Gaignard 
78f24fcff1SBenjamin Gaignard 	ret = hwspin_lock_register(&hw->bank, &pdev->dev, &stm32_hwspinlock_ops,
79f24fcff1SBenjamin Gaignard 				   0, STM32_MUTEX_NUM_LOCKS);
80f24fcff1SBenjamin Gaignard 
81f24fcff1SBenjamin Gaignard 	if (ret)
82f24fcff1SBenjamin Gaignard 		pm_runtime_disable(&pdev->dev);
83f24fcff1SBenjamin Gaignard 
84f24fcff1SBenjamin Gaignard 	return ret;
85f24fcff1SBenjamin Gaignard }
86f24fcff1SBenjamin Gaignard 
87f24fcff1SBenjamin Gaignard static int stm32_hwspinlock_remove(struct platform_device *pdev)
88f24fcff1SBenjamin Gaignard {
89f24fcff1SBenjamin Gaignard 	struct stm32_hwspinlock *hw = platform_get_drvdata(pdev);
90f24fcff1SBenjamin Gaignard 	int ret;
91f24fcff1SBenjamin Gaignard 
92f24fcff1SBenjamin Gaignard 	ret = hwspin_lock_unregister(&hw->bank);
93f24fcff1SBenjamin Gaignard 	if (ret)
94f24fcff1SBenjamin Gaignard 		dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
95f24fcff1SBenjamin Gaignard 
96f24fcff1SBenjamin Gaignard 	pm_runtime_disable(&pdev->dev);
97f24fcff1SBenjamin Gaignard 
98f24fcff1SBenjamin Gaignard 	return 0;
99f24fcff1SBenjamin Gaignard }
100f24fcff1SBenjamin Gaignard 
101f24fcff1SBenjamin Gaignard static int __maybe_unused stm32_hwspinlock_runtime_suspend(struct device *dev)
102f24fcff1SBenjamin Gaignard {
103f24fcff1SBenjamin Gaignard 	struct stm32_hwspinlock *hw = dev_get_drvdata(dev);
104f24fcff1SBenjamin Gaignard 
105f24fcff1SBenjamin Gaignard 	clk_disable_unprepare(hw->clk);
106f24fcff1SBenjamin Gaignard 
107f24fcff1SBenjamin Gaignard 	return 0;
108f24fcff1SBenjamin Gaignard }
109f24fcff1SBenjamin Gaignard 
110f24fcff1SBenjamin Gaignard static int __maybe_unused stm32_hwspinlock_runtime_resume(struct device *dev)
111f24fcff1SBenjamin Gaignard {
112f24fcff1SBenjamin Gaignard 	struct stm32_hwspinlock *hw = dev_get_drvdata(dev);
113f24fcff1SBenjamin Gaignard 
114f24fcff1SBenjamin Gaignard 	clk_prepare_enable(hw->clk);
115f24fcff1SBenjamin Gaignard 
116f24fcff1SBenjamin Gaignard 	return 0;
117f24fcff1SBenjamin Gaignard }
118f24fcff1SBenjamin Gaignard 
119f24fcff1SBenjamin Gaignard static const struct dev_pm_ops stm32_hwspinlock_pm_ops = {
120f24fcff1SBenjamin Gaignard 	SET_RUNTIME_PM_OPS(stm32_hwspinlock_runtime_suspend,
121f24fcff1SBenjamin Gaignard 			   stm32_hwspinlock_runtime_resume,
122f24fcff1SBenjamin Gaignard 			   NULL)
123f24fcff1SBenjamin Gaignard };
124f24fcff1SBenjamin Gaignard 
125f24fcff1SBenjamin Gaignard static const struct of_device_id stm32_hwpinlock_ids[] = {
126f24fcff1SBenjamin Gaignard 	{ .compatible = "st,stm32-hwspinlock", },
127f24fcff1SBenjamin Gaignard 	{},
128f24fcff1SBenjamin Gaignard };
129f24fcff1SBenjamin Gaignard MODULE_DEVICE_TABLE(of, stm32_hwpinlock_ids);
130f24fcff1SBenjamin Gaignard 
131f24fcff1SBenjamin Gaignard static struct platform_driver stm32_hwspinlock_driver = {
132f24fcff1SBenjamin Gaignard 	.probe		= stm32_hwspinlock_probe,
133f24fcff1SBenjamin Gaignard 	.remove		= stm32_hwspinlock_remove,
134f24fcff1SBenjamin Gaignard 	.driver		= {
135f24fcff1SBenjamin Gaignard 		.name	= "stm32_hwspinlock",
136f24fcff1SBenjamin Gaignard 		.of_match_table = stm32_hwpinlock_ids,
137f24fcff1SBenjamin Gaignard 		.pm	= &stm32_hwspinlock_pm_ops,
138f24fcff1SBenjamin Gaignard 	},
139f24fcff1SBenjamin Gaignard };
140f24fcff1SBenjamin Gaignard 
141f24fcff1SBenjamin Gaignard static int __init stm32_hwspinlock_init(void)
142f24fcff1SBenjamin Gaignard {
143f24fcff1SBenjamin Gaignard 	return platform_driver_register(&stm32_hwspinlock_driver);
144f24fcff1SBenjamin Gaignard }
145f24fcff1SBenjamin Gaignard /* board init code might need to reserve hwspinlocks for predefined purposes */
146f24fcff1SBenjamin Gaignard postcore_initcall(stm32_hwspinlock_init);
147f24fcff1SBenjamin Gaignard 
148f24fcff1SBenjamin Gaignard static void __exit stm32_hwspinlock_exit(void)
149f24fcff1SBenjamin Gaignard {
150f24fcff1SBenjamin Gaignard 	platform_driver_unregister(&stm32_hwspinlock_driver);
151f24fcff1SBenjamin Gaignard }
152f24fcff1SBenjamin Gaignard module_exit(stm32_hwspinlock_exit);
153f24fcff1SBenjamin Gaignard 
154f24fcff1SBenjamin Gaignard MODULE_LICENSE("GPL v2");
155f24fcff1SBenjamin Gaignard MODULE_DESCRIPTION("Hardware spinlock driver for STM32 SoCs");
156f24fcff1SBenjamin Gaignard MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
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