1f24fcff1SBenjamin Gaignard // SPDX-License-Identifier: GPL-2.0 2f24fcff1SBenjamin Gaignard /* 3f24fcff1SBenjamin Gaignard * Copyright (C) STMicroelectronics SA 2018 4f24fcff1SBenjamin Gaignard * Author: Benjamin Gaignard <benjamin.gaignard@st.com> for STMicroelectronics. 5f24fcff1SBenjamin Gaignard */ 6f24fcff1SBenjamin Gaignard 7f24fcff1SBenjamin Gaignard #include <linux/clk.h> 85cd69f13SFabien Dessenne #include <linux/delay.h> 9f24fcff1SBenjamin Gaignard #include <linux/hwspinlock.h> 10f24fcff1SBenjamin Gaignard #include <linux/io.h> 11f24fcff1SBenjamin Gaignard #include <linux/kernel.h> 12f24fcff1SBenjamin Gaignard #include <linux/module.h> 13f24fcff1SBenjamin Gaignard #include <linux/of.h> 14f24fcff1SBenjamin Gaignard #include <linux/platform_device.h> 15f24fcff1SBenjamin Gaignard #include <linux/pm_runtime.h> 16f24fcff1SBenjamin Gaignard 17f24fcff1SBenjamin Gaignard #include "hwspinlock_internal.h" 18f24fcff1SBenjamin Gaignard 19f24fcff1SBenjamin Gaignard #define STM32_MUTEX_COREID BIT(8) 20f24fcff1SBenjamin Gaignard #define STM32_MUTEX_LOCK_BIT BIT(31) 21f24fcff1SBenjamin Gaignard #define STM32_MUTEX_NUM_LOCKS 32 22f24fcff1SBenjamin Gaignard 23f24fcff1SBenjamin Gaignard struct stm32_hwspinlock { 24f24fcff1SBenjamin Gaignard struct clk *clk; 25f24fcff1SBenjamin Gaignard struct hwspinlock_device bank; 26f24fcff1SBenjamin Gaignard }; 27f24fcff1SBenjamin Gaignard 28f24fcff1SBenjamin Gaignard static int stm32_hwspinlock_trylock(struct hwspinlock *lock) 29f24fcff1SBenjamin Gaignard { 30f24fcff1SBenjamin Gaignard void __iomem *lock_addr = lock->priv; 31f24fcff1SBenjamin Gaignard u32 status; 32f24fcff1SBenjamin Gaignard 33f24fcff1SBenjamin Gaignard writel(STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID, lock_addr); 34f24fcff1SBenjamin Gaignard status = readl(lock_addr); 35f24fcff1SBenjamin Gaignard 36f24fcff1SBenjamin Gaignard return status == (STM32_MUTEX_LOCK_BIT | STM32_MUTEX_COREID); 37f24fcff1SBenjamin Gaignard } 38f24fcff1SBenjamin Gaignard 39f24fcff1SBenjamin Gaignard static void stm32_hwspinlock_unlock(struct hwspinlock *lock) 40f24fcff1SBenjamin Gaignard { 41f24fcff1SBenjamin Gaignard void __iomem *lock_addr = lock->priv; 42f24fcff1SBenjamin Gaignard 43f24fcff1SBenjamin Gaignard writel(STM32_MUTEX_COREID, lock_addr); 44f24fcff1SBenjamin Gaignard } 45f24fcff1SBenjamin Gaignard 465cd69f13SFabien Dessenne static void stm32_hwspinlock_relax(struct hwspinlock *lock) 475cd69f13SFabien Dessenne { 485cd69f13SFabien Dessenne ndelay(50); 495cd69f13SFabien Dessenne } 505cd69f13SFabien Dessenne 51f24fcff1SBenjamin Gaignard static const struct hwspinlock_ops stm32_hwspinlock_ops = { 52f24fcff1SBenjamin Gaignard .trylock = stm32_hwspinlock_trylock, 53f24fcff1SBenjamin Gaignard .unlock = stm32_hwspinlock_unlock, 545cd69f13SFabien Dessenne .relax = stm32_hwspinlock_relax, 55f24fcff1SBenjamin Gaignard }; 56f24fcff1SBenjamin Gaignard 5760630924SFabien Dessenne static void stm32_hwspinlock_disable_clk(void *data) 5860630924SFabien Dessenne { 5960630924SFabien Dessenne struct platform_device *pdev = data; 6060630924SFabien Dessenne struct stm32_hwspinlock *hw = platform_get_drvdata(pdev); 6160630924SFabien Dessenne struct device *dev = &pdev->dev; 6260630924SFabien Dessenne 6360630924SFabien Dessenne pm_runtime_get_sync(dev); 6460630924SFabien Dessenne pm_runtime_disable(dev); 6560630924SFabien Dessenne pm_runtime_set_suspended(dev); 6660630924SFabien Dessenne pm_runtime_put_noidle(dev); 6760630924SFabien Dessenne 6860630924SFabien Dessenne clk_disable_unprepare(hw->clk); 6960630924SFabien Dessenne } 7060630924SFabien Dessenne 71f24fcff1SBenjamin Gaignard static int stm32_hwspinlock_probe(struct platform_device *pdev) 72f24fcff1SBenjamin Gaignard { 7360630924SFabien Dessenne struct device *dev = &pdev->dev; 74f24fcff1SBenjamin Gaignard struct stm32_hwspinlock *hw; 75f24fcff1SBenjamin Gaignard void __iomem *io_base; 76f24fcff1SBenjamin Gaignard int i, ret; 77f24fcff1SBenjamin Gaignard 78d4824486SYangtao Li io_base = devm_platform_ioremap_resource(pdev, 0); 794d5a91fdSWei Yongjun if (IS_ERR(io_base)) 804d5a91fdSWei Yongjun return PTR_ERR(io_base); 81f24fcff1SBenjamin Gaignard 82*3e5f1ff7SGustavo A. R. Silva hw = devm_kzalloc(dev, struct_size(hw, bank.lock, STM32_MUTEX_NUM_LOCKS), GFP_KERNEL); 83f24fcff1SBenjamin Gaignard if (!hw) 84f24fcff1SBenjamin Gaignard return -ENOMEM; 85f24fcff1SBenjamin Gaignard 8660630924SFabien Dessenne hw->clk = devm_clk_get(dev, "hsem"); 87f24fcff1SBenjamin Gaignard if (IS_ERR(hw->clk)) 88f24fcff1SBenjamin Gaignard return PTR_ERR(hw->clk); 89f24fcff1SBenjamin Gaignard 9060630924SFabien Dessenne ret = clk_prepare_enable(hw->clk); 9160630924SFabien Dessenne if (ret) { 9260630924SFabien Dessenne dev_err(dev, "Failed to prepare_enable clock\n"); 9360630924SFabien Dessenne return ret; 9460630924SFabien Dessenne } 9560630924SFabien Dessenne 9660630924SFabien Dessenne platform_set_drvdata(pdev, hw); 9760630924SFabien Dessenne 9860630924SFabien Dessenne pm_runtime_get_noresume(dev); 9960630924SFabien Dessenne pm_runtime_set_active(dev); 10060630924SFabien Dessenne pm_runtime_enable(dev); 10160630924SFabien Dessenne pm_runtime_put(dev); 10260630924SFabien Dessenne 10360630924SFabien Dessenne ret = devm_add_action_or_reset(dev, stm32_hwspinlock_disable_clk, pdev); 10460630924SFabien Dessenne if (ret) { 10560630924SFabien Dessenne dev_err(dev, "Failed to register action\n"); 10660630924SFabien Dessenne return ret; 10760630924SFabien Dessenne } 10860630924SFabien Dessenne 109f24fcff1SBenjamin Gaignard for (i = 0; i < STM32_MUTEX_NUM_LOCKS; i++) 110f24fcff1SBenjamin Gaignard hw->bank.lock[i].priv = io_base + i * sizeof(u32); 111f24fcff1SBenjamin Gaignard 11260630924SFabien Dessenne ret = devm_hwspin_lock_register(dev, &hw->bank, &stm32_hwspinlock_ops, 113f24fcff1SBenjamin Gaignard 0, STM32_MUTEX_NUM_LOCKS); 114f24fcff1SBenjamin Gaignard 115f24fcff1SBenjamin Gaignard if (ret) 11660630924SFabien Dessenne dev_err(dev, "Failed to register hwspinlock\n"); 117f24fcff1SBenjamin Gaignard 118f24fcff1SBenjamin Gaignard return ret; 119f24fcff1SBenjamin Gaignard } 120f24fcff1SBenjamin Gaignard 121f24fcff1SBenjamin Gaignard static int __maybe_unused stm32_hwspinlock_runtime_suspend(struct device *dev) 122f24fcff1SBenjamin Gaignard { 123f24fcff1SBenjamin Gaignard struct stm32_hwspinlock *hw = dev_get_drvdata(dev); 124f24fcff1SBenjamin Gaignard 125f24fcff1SBenjamin Gaignard clk_disable_unprepare(hw->clk); 126f24fcff1SBenjamin Gaignard 127f24fcff1SBenjamin Gaignard return 0; 128f24fcff1SBenjamin Gaignard } 129f24fcff1SBenjamin Gaignard 130f24fcff1SBenjamin Gaignard static int __maybe_unused stm32_hwspinlock_runtime_resume(struct device *dev) 131f24fcff1SBenjamin Gaignard { 132f24fcff1SBenjamin Gaignard struct stm32_hwspinlock *hw = dev_get_drvdata(dev); 133f24fcff1SBenjamin Gaignard 134f24fcff1SBenjamin Gaignard clk_prepare_enable(hw->clk); 135f24fcff1SBenjamin Gaignard 136f24fcff1SBenjamin Gaignard return 0; 137f24fcff1SBenjamin Gaignard } 138f24fcff1SBenjamin Gaignard 139f24fcff1SBenjamin Gaignard static const struct dev_pm_ops stm32_hwspinlock_pm_ops = { 140f24fcff1SBenjamin Gaignard SET_RUNTIME_PM_OPS(stm32_hwspinlock_runtime_suspend, 141f24fcff1SBenjamin Gaignard stm32_hwspinlock_runtime_resume, 142f24fcff1SBenjamin Gaignard NULL) 143f24fcff1SBenjamin Gaignard }; 144f24fcff1SBenjamin Gaignard 145f24fcff1SBenjamin Gaignard static const struct of_device_id stm32_hwpinlock_ids[] = { 146f24fcff1SBenjamin Gaignard { .compatible = "st,stm32-hwspinlock", }, 147f24fcff1SBenjamin Gaignard {}, 148f24fcff1SBenjamin Gaignard }; 149f24fcff1SBenjamin Gaignard MODULE_DEVICE_TABLE(of, stm32_hwpinlock_ids); 150f24fcff1SBenjamin Gaignard 151f24fcff1SBenjamin Gaignard static struct platform_driver stm32_hwspinlock_driver = { 152f24fcff1SBenjamin Gaignard .probe = stm32_hwspinlock_probe, 153f24fcff1SBenjamin Gaignard .driver = { 154f24fcff1SBenjamin Gaignard .name = "stm32_hwspinlock", 155f24fcff1SBenjamin Gaignard .of_match_table = stm32_hwpinlock_ids, 156f24fcff1SBenjamin Gaignard .pm = &stm32_hwspinlock_pm_ops, 157f24fcff1SBenjamin Gaignard }, 158f24fcff1SBenjamin Gaignard }; 159f24fcff1SBenjamin Gaignard 160f24fcff1SBenjamin Gaignard static int __init stm32_hwspinlock_init(void) 161f24fcff1SBenjamin Gaignard { 162f24fcff1SBenjamin Gaignard return platform_driver_register(&stm32_hwspinlock_driver); 163f24fcff1SBenjamin Gaignard } 164f24fcff1SBenjamin Gaignard /* board init code might need to reserve hwspinlocks for predefined purposes */ 165f24fcff1SBenjamin Gaignard postcore_initcall(stm32_hwspinlock_init); 166f24fcff1SBenjamin Gaignard 167f24fcff1SBenjamin Gaignard static void __exit stm32_hwspinlock_exit(void) 168f24fcff1SBenjamin Gaignard { 169f24fcff1SBenjamin Gaignard platform_driver_unregister(&stm32_hwspinlock_driver); 170f24fcff1SBenjamin Gaignard } 171f24fcff1SBenjamin Gaignard module_exit(stm32_hwspinlock_exit); 172f24fcff1SBenjamin Gaignard 173f24fcff1SBenjamin Gaignard MODULE_LICENSE("GPL v2"); 174f24fcff1SBenjamin Gaignard MODULE_DESCRIPTION("Hardware spinlock driver for STM32 SoCs"); 175f24fcff1SBenjamin Gaignard MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); 176