1eebba71eSSuman Anna# SPDX-License-Identifier: GPL-2.0 2bd9a4c7dSOhad Ben-Cohen# 3bd9a4c7dSOhad Ben-Cohen# Generic HWSPINLOCK framework 4bd9a4c7dSOhad Ben-Cohen# 5bd9a4c7dSOhad Ben-Cohen 635fc8a07SVincent Legollmenuconfig HWSPINLOCK 7d048236dSBaolin Wang bool "Hardware Spinlock drivers" 870ba4cc2SSimon Que 970ba4cc2SSimon Queconfig HWSPINLOCK_OMAP 1070ba4cc2SSimon Que tristate "OMAP Hardware Spinlock device" 1135fc8a07SVincent Legoll depends on HWSPINLOCK 12*ffd0bbfbSBaolin Wang depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX || ARCH_K3 || COMPILE_TEST 1370ba4cc2SSimon Que help 1470ba4cc2SSimon Que Say y here to support the OMAP Hardware Spinlock device (firstly 1570ba4cc2SSimon Que introduced in OMAP4). 1670ba4cc2SSimon Que 1770ba4cc2SSimon Que If unsure, say N. 18315d8f5cSOhad Ben-Cohen 1919a0f612SBjorn Anderssonconfig HWSPINLOCK_QCOM 2019a0f612SBjorn Andersson tristate "Qualcomm Hardware Spinlock device" 2135fc8a07SVincent Legoll depends on HWSPINLOCK 22*ffd0bbfbSBaolin Wang depends on ARCH_QCOM || COMPILE_TEST 2319a0f612SBjorn Andersson select MFD_SYSCON 2419a0f612SBjorn Andersson help 2519a0f612SBjorn Andersson Say y here to support the Qualcomm Hardware Mutex functionality, which 2619a0f612SBjorn Andersson provides a synchronisation mechanism for the various processors on 2719a0f612SBjorn Andersson the SoC. 2819a0f612SBjorn Andersson 2919a0f612SBjorn Andersson If unsure, say N. 3019a0f612SBjorn Andersson 31cc16d664SWei Chenconfig HWSPINLOCK_SIRF 32cc16d664SWei Chen tristate "SIRF Hardware Spinlock device" 3335fc8a07SVincent Legoll depends on HWSPINLOCK 34*ffd0bbfbSBaolin Wang depends on ARCH_SIRF || COMPILE_TEST 35cc16d664SWei Chen help 36cc16d664SWei Chen Say y here to support the SIRF Hardware Spinlock device, which 37cc16d664SWei Chen provides a synchronisation mechanism for the various processors 38cc16d664SWei Chen on the SoC. 39cc16d664SWei Chen 40cc16d664SWei Chen It's safe to say n here if you're not interested in SIRF hardware 41cc16d664SWei Chen spinlock or just want a bare minimum kernel. 42cc16d664SWei Chen 43d8c8bbbbSBaolin Wangconfig HWSPINLOCK_SPRD 44d8c8bbbbSBaolin Wang tristate "SPRD Hardware Spinlock device" 45*ffd0bbfbSBaolin Wang depends on ARCH_SPRD || COMPILE_TEST 46d8c8bbbbSBaolin Wang depends on HWSPINLOCK 47d8c8bbbbSBaolin Wang help 48d8c8bbbbSBaolin Wang Say y here to support the SPRD Hardware Spinlock device. 49d8c8bbbbSBaolin Wang 50d8c8bbbbSBaolin Wang If unsure, say N. 51d8c8bbbbSBaolin Wang 52f24fcff1SBenjamin Gaignardconfig HWSPINLOCK_STM32 53f24fcff1SBenjamin Gaignard tristate "STM32 Hardware Spinlock device" 54*ffd0bbfbSBaolin Wang depends on MACH_STM32MP157 || COMPILE_TEST 55f24fcff1SBenjamin Gaignard depends on HWSPINLOCK 56f24fcff1SBenjamin Gaignard help 57f24fcff1SBenjamin Gaignard Say y here to support the STM32 Hardware Spinlock device. 58f24fcff1SBenjamin Gaignard 59f24fcff1SBenjamin Gaignard If unsure, say N. 60f24fcff1SBenjamin Gaignard 61f84a8ecfSMathieu J. Poirierconfig HSEM_U8500 62f84a8ecfSMathieu J. Poirier tristate "STE Hardware Semaphore functionality" 6335fc8a07SVincent Legoll depends on HWSPINLOCK 64*ffd0bbfbSBaolin Wang depends on ARCH_U8500 || COMPILE_TEST 65f84a8ecfSMathieu J. Poirier help 66f84a8ecfSMathieu J. Poirier Say y here to support the STE Hardware Semaphore functionality, which 67f84a8ecfSMathieu J. Poirier provides a synchronisation mechanism for the various processor on the 68f84a8ecfSMathieu J. Poirier SoC. 69f84a8ecfSMathieu J. Poirier 70f84a8ecfSMathieu J. Poirier If unsure, say N. 71