1 /* 2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware 3 monitoring 4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>, 5 Philip Edelbrock <phil@netroedge.com>, 6 and Mark Studebaker <mdsxyz123@yahoo.com> 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 2 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, write to the Free Software 20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23 /* 24 Supports following chips: 25 26 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA 27 as99127f 7 3 0 3 0x31 0x12c3 yes no 28 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no 29 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes 30 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC) 31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes 32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no 33 34 */ 35 36 #include <linux/module.h> 37 #include <linux/init.h> 38 #include <linux/slab.h> 39 #include <linux/jiffies.h> 40 #include <linux/i2c.h> 41 #include <linux/i2c-isa.h> 42 #include <linux/hwmon.h> 43 #include <linux/hwmon-vid.h> 44 #include <linux/err.h> 45 #include <asm/io.h> 46 #include "lm75.h" 47 48 /* Addresses to scan */ 49 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 50 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 51 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END }; 52 static unsigned short isa_address = 0x290; 53 54 /* Insmod parameters */ 55 I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f); 56 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: " 57 "{bus, clientaddr, subclientaddr1, subclientaddr2}"); 58 59 static int init = 1; 60 module_param(init, bool, 0); 61 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); 62 63 /* Constants specified below */ 64 65 /* Length of ISA address segment */ 66 #define W83781D_EXTENT 8 67 68 /* Where are the ISA address/data registers relative to the base address */ 69 #define W83781D_ADDR_REG_OFFSET 5 70 #define W83781D_DATA_REG_OFFSET 6 71 72 /* The W83781D registers */ 73 /* The W83782D registers for nr=7,8 are in bank 5 */ 74 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ 75 (0x554 + (((nr) - 7) * 2))) 76 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ 77 (0x555 + (((nr) - 7) * 2))) 78 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ 79 (0x550 + (nr) - 7)) 80 81 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr)) 82 #define W83781D_REG_FAN(nr) (0x27 + (nr)) 83 84 #define W83781D_REG_BANK 0x4E 85 #define W83781D_REG_TEMP2_CONFIG 0x152 86 #define W83781D_REG_TEMP3_CONFIG 0x252 87 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ 88 ((nr == 2) ? (0x0150) : \ 89 (0x27))) 90 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ 91 ((nr == 2) ? (0x153) : \ 92 (0x3A))) 93 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ 94 ((nr == 2) ? (0x155) : \ 95 (0x39))) 96 97 #define W83781D_REG_CONFIG 0x40 98 #define W83781D_REG_ALARM1 0x41 99 #define W83781D_REG_ALARM2 0x42 100 #define W83781D_REG_ALARM3 0x450 /* not on W83781D */ 101 102 #define W83781D_REG_IRQ 0x4C 103 #define W83781D_REG_BEEP_CONFIG 0x4D 104 #define W83781D_REG_BEEP_INTS1 0x56 105 #define W83781D_REG_BEEP_INTS2 0x57 106 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */ 107 108 #define W83781D_REG_VID_FANDIV 0x47 109 110 #define W83781D_REG_CHIPID 0x49 111 #define W83781D_REG_WCHIPID 0x58 112 #define W83781D_REG_CHIPMAN 0x4F 113 #define W83781D_REG_PIN 0x4B 114 115 /* 782D/783S only */ 116 #define W83781D_REG_VBAT 0x5D 117 118 /* PWM 782D (1-4) and 783S (1-2) only */ 119 #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */ 120 /* on which is which; */ 121 #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */ 122 /* However 782d is probably wrong. */ 123 #define W83781D_REG_PWM3 0x5E 124 #define W83781D_REG_PWM4 0x5F 125 #define W83781D_REG_PWMCLK12 0x5C 126 #define W83781D_REG_PWMCLK34 0x45C 127 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2, 128 W83781D_REG_PWM3, W83781D_REG_PWM4 129 }; 130 131 #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1]) 132 133 #define W83781D_REG_I2C_ADDR 0x48 134 #define W83781D_REG_I2C_SUBADDR 0x4A 135 136 /* The following are undocumented in the data sheets however we 137 received the information in an email from Winbond tech support */ 138 /* Sensor selection - not on 781d */ 139 #define W83781D_REG_SCFG1 0x5D 140 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; 141 142 #define W83781D_REG_SCFG2 0x59 143 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; 144 145 #define W83781D_DEFAULT_BETA 3435 146 147 /* RT Table registers */ 148 #define W83781D_REG_RT_IDX 0x50 149 #define W83781D_REG_RT_VAL 0x51 150 151 /* Conversions. Rounding and limit checking is only done on the TO_REG 152 variants. Note that you should be a bit careful with which arguments 153 these macros are called: arguments may be evaluated more than once. 154 Fixing this is just not worth it. */ 155 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255)) 156 #define IN_FROM_REG(val) (((val) * 16) / 10) 157 158 static inline u8 159 FAN_TO_REG(long rpm, int div) 160 { 161 if (rpm == 0) 162 return 255; 163 rpm = SENSORS_LIMIT(rpm, 1, 1000000); 164 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254); 165 } 166 167 #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \ 168 ((val) == 255 ? 0 : \ 169 1350000 / ((val) * (div)))) 170 171 #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \ 172 : (val)) / 1000, 0, 0xff)) 173 #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000) 174 175 #define PWM_FROM_REG(val) (val) 176 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) 177 #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \ 178 (val) ^ 0x7fff : (val)) 179 #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \ 180 (~(val)) & 0x7fff : (val) & 0xffffff) 181 182 #define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0) 183 #define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0) 184 185 #define DIV_FROM_REG(val) (1 << (val)) 186 187 static inline u8 188 DIV_TO_REG(long val, enum chips type) 189 { 190 int i; 191 val = SENSORS_LIMIT(val, 1, 192 ((type == w83781d 193 || type == as99127f) ? 8 : 128)) >> 1; 194 for (i = 0; i < 7; i++) { 195 if (val == 0) 196 break; 197 val >>= 1; 198 } 199 return ((u8) i); 200 } 201 202 /* There are some complications in a module like this. First off, W83781D chips 203 may be both present on the SMBus and the ISA bus, and we have to handle 204 those cases separately at some places. Second, there might be several 205 W83781D chips available (well, actually, that is probably never done; but 206 it is a clean illustration of how to handle a case like that). Finally, 207 a specific chip may be attached to *both* ISA and SMBus, and we would 208 not like to detect it double. Fortunately, in the case of the W83781D at 209 least, a register tells us what SMBus address we are on, so that helps 210 a bit - except if there could be more than one SMBus. Groan. No solution 211 for this yet. */ 212 213 /* This module may seem overly long and complicated. In fact, it is not so 214 bad. Quite a lot of bookkeeping is done. A real driver can often cut 215 some corners. */ 216 217 /* For each registered W83781D, we need to keep some data in memory. That 218 data is pointed to by w83781d_list[NR]->data. The structure itself is 219 dynamically allocated, at the same time when a new w83781d client is 220 allocated. */ 221 struct w83781d_data { 222 struct i2c_client client; 223 struct class_device *class_dev; 224 struct semaphore lock; 225 enum chips type; 226 227 struct semaphore update_lock; 228 char valid; /* !=0 if following fields are valid */ 229 unsigned long last_updated; /* In jiffies */ 230 231 struct i2c_client *lm75[2]; /* for secondary I2C addresses */ 232 /* array of 2 pointers to subclients */ 233 234 u8 in[9]; /* Register value - 8 & 9 for 782D only */ 235 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */ 236 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */ 237 u8 fan[3]; /* Register value */ 238 u8 fan_min[3]; /* Register value */ 239 u8 temp; 240 u8 temp_max; /* Register value */ 241 u8 temp_max_hyst; /* Register value */ 242 u16 temp_add[2]; /* Register value */ 243 u16 temp_max_add[2]; /* Register value */ 244 u16 temp_max_hyst_add[2]; /* Register value */ 245 u8 fan_div[3]; /* Register encoding, shifted right */ 246 u8 vid; /* Register encoding, combined */ 247 u32 alarms; /* Register encoding, combined */ 248 u32 beep_mask; /* Register encoding, combined */ 249 u8 beep_enable; /* Boolean */ 250 u8 pwm[4]; /* Register value */ 251 u8 pwmenable[4]; /* Boolean */ 252 u16 sens[3]; /* 782D/783S only. 253 1 = pentium diode; 2 = 3904 diode; 254 3000-5000 = thermistor beta. 255 Default = 3435. 256 Other Betas unimplemented */ 257 u8 vrm; 258 }; 259 260 static int w83781d_attach_adapter(struct i2c_adapter *adapter); 261 static int w83781d_isa_attach_adapter(struct i2c_adapter *adapter); 262 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind); 263 static int w83781d_detach_client(struct i2c_client *client); 264 265 static int w83781d_read_value(struct i2c_client *client, u16 register); 266 static int w83781d_write_value(struct i2c_client *client, u16 register, 267 u16 value); 268 static struct w83781d_data *w83781d_update_device(struct device *dev); 269 static void w83781d_init_client(struct i2c_client *client); 270 271 static struct i2c_driver w83781d_driver = { 272 .owner = THIS_MODULE, 273 .name = "w83781d", 274 .id = I2C_DRIVERID_W83781D, 275 .flags = I2C_DF_NOTIFY, 276 .attach_adapter = w83781d_attach_adapter, 277 .detach_client = w83781d_detach_client, 278 }; 279 280 static struct i2c_driver w83781d_isa_driver = { 281 .owner = THIS_MODULE, 282 .name = "w83781d-isa", 283 .attach_adapter = w83781d_isa_attach_adapter, 284 .detach_client = w83781d_detach_client, 285 }; 286 287 288 /* following are the sysfs callback functions */ 289 #define show_in_reg(reg) \ 290 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ 291 { \ 292 struct w83781d_data *data = w83781d_update_device(dev); \ 293 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \ 294 } 295 show_in_reg(in); 296 show_in_reg(in_min); 297 show_in_reg(in_max); 298 299 #define store_in_reg(REG, reg) \ 300 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \ 301 { \ 302 struct i2c_client *client = to_i2c_client(dev); \ 303 struct w83781d_data *data = i2c_get_clientdata(client); \ 304 u32 val; \ 305 \ 306 val = simple_strtoul(buf, NULL, 10) / 10; \ 307 \ 308 down(&data->update_lock); \ 309 data->in_##reg[nr] = IN_TO_REG(val); \ 310 w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \ 311 \ 312 up(&data->update_lock); \ 313 return count; \ 314 } 315 store_in_reg(MIN, min); 316 store_in_reg(MAX, max); 317 318 #define sysfs_in_offset(offset) \ 319 static ssize_t \ 320 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 321 { \ 322 return show_in(dev, buf, offset); \ 323 } \ 324 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL); 325 326 #define sysfs_in_reg_offset(reg, offset) \ 327 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 328 { \ 329 return show_in_##reg (dev, buf, offset); \ 330 } \ 331 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 332 { \ 333 return store_in_##reg (dev, buf, count, offset); \ 334 } \ 335 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset); 336 337 #define sysfs_in_offsets(offset) \ 338 sysfs_in_offset(offset); \ 339 sysfs_in_reg_offset(min, offset); \ 340 sysfs_in_reg_offset(max, offset); 341 342 sysfs_in_offsets(0); 343 sysfs_in_offsets(1); 344 sysfs_in_offsets(2); 345 sysfs_in_offsets(3); 346 sysfs_in_offsets(4); 347 sysfs_in_offsets(5); 348 sysfs_in_offsets(6); 349 sysfs_in_offsets(7); 350 sysfs_in_offsets(8); 351 352 #define device_create_file_in(client, offset) \ 353 do { \ 354 device_create_file(&client->dev, &dev_attr_in##offset##_input); \ 355 device_create_file(&client->dev, &dev_attr_in##offset##_min); \ 356 device_create_file(&client->dev, &dev_attr_in##offset##_max); \ 357 } while (0) 358 359 #define show_fan_reg(reg) \ 360 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ 361 { \ 362 struct w83781d_data *data = w83781d_update_device(dev); \ 363 return sprintf(buf,"%ld\n", \ 364 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \ 365 } 366 show_fan_reg(fan); 367 show_fan_reg(fan_min); 368 369 static ssize_t 370 store_fan_min(struct device *dev, const char *buf, size_t count, int nr) 371 { 372 struct i2c_client *client = to_i2c_client(dev); 373 struct w83781d_data *data = i2c_get_clientdata(client); 374 u32 val; 375 376 val = simple_strtoul(buf, NULL, 10); 377 378 down(&data->update_lock); 379 data->fan_min[nr - 1] = 380 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1])); 381 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr), 382 data->fan_min[nr - 1]); 383 384 up(&data->update_lock); 385 return count; 386 } 387 388 #define sysfs_fan_offset(offset) \ 389 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 390 { \ 391 return show_fan(dev, buf, offset); \ 392 } \ 393 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL); 394 395 #define sysfs_fan_min_offset(offset) \ 396 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 397 { \ 398 return show_fan_min(dev, buf, offset); \ 399 } \ 400 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 401 { \ 402 return store_fan_min(dev, buf, count, offset); \ 403 } \ 404 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset); 405 406 sysfs_fan_offset(1); 407 sysfs_fan_min_offset(1); 408 sysfs_fan_offset(2); 409 sysfs_fan_min_offset(2); 410 sysfs_fan_offset(3); 411 sysfs_fan_min_offset(3); 412 413 #define device_create_file_fan(client, offset) \ 414 do { \ 415 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \ 416 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \ 417 } while (0) 418 419 #define show_temp_reg(reg) \ 420 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ 421 { \ 422 struct w83781d_data *data = w83781d_update_device(dev); \ 423 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 424 return sprintf(buf,"%d\n", \ 425 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ 426 } else { /* TEMP1 */ \ 427 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ 428 } \ 429 } 430 show_temp_reg(temp); 431 show_temp_reg(temp_max); 432 show_temp_reg(temp_max_hyst); 433 434 #define store_temp_reg(REG, reg) \ 435 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \ 436 { \ 437 struct i2c_client *client = to_i2c_client(dev); \ 438 struct w83781d_data *data = i2c_get_clientdata(client); \ 439 s32 val; \ 440 \ 441 val = simple_strtol(buf, NULL, 10); \ 442 \ 443 down(&data->update_lock); \ 444 \ 445 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 446 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ 447 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ 448 data->temp_##reg##_add[nr-2]); \ 449 } else { /* TEMP1 */ \ 450 data->temp_##reg = TEMP_TO_REG(val); \ 451 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ 452 data->temp_##reg); \ 453 } \ 454 \ 455 up(&data->update_lock); \ 456 return count; \ 457 } 458 store_temp_reg(OVER, max); 459 store_temp_reg(HYST, max_hyst); 460 461 #define sysfs_temp_offset(offset) \ 462 static ssize_t \ 463 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 464 { \ 465 return show_temp(dev, buf, offset); \ 466 } \ 467 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL); 468 469 #define sysfs_temp_reg_offset(reg, offset) \ 470 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 471 { \ 472 return show_temp_##reg (dev, buf, offset); \ 473 } \ 474 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 475 { \ 476 return store_temp_##reg (dev, buf, count, offset); \ 477 } \ 478 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset); 479 480 #define sysfs_temp_offsets(offset) \ 481 sysfs_temp_offset(offset); \ 482 sysfs_temp_reg_offset(max, offset); \ 483 sysfs_temp_reg_offset(max_hyst, offset); 484 485 sysfs_temp_offsets(1); 486 sysfs_temp_offsets(2); 487 sysfs_temp_offsets(3); 488 489 #define device_create_file_temp(client, offset) \ 490 do { \ 491 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \ 492 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \ 493 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \ 494 } while (0) 495 496 static ssize_t 497 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) 498 { 499 struct w83781d_data *data = w83781d_update_device(dev); 500 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); 501 } 502 503 static 504 DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); 505 #define device_create_file_vid(client) \ 506 device_create_file(&client->dev, &dev_attr_cpu0_vid); 507 static ssize_t 508 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) 509 { 510 struct w83781d_data *data = w83781d_update_device(dev); 511 return sprintf(buf, "%ld\n", (long) data->vrm); 512 } 513 514 static ssize_t 515 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 516 { 517 struct i2c_client *client = to_i2c_client(dev); 518 struct w83781d_data *data = i2c_get_clientdata(client); 519 u32 val; 520 521 val = simple_strtoul(buf, NULL, 10); 522 data->vrm = val; 523 524 return count; 525 } 526 527 static 528 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); 529 #define device_create_file_vrm(client) \ 530 device_create_file(&client->dev, &dev_attr_vrm); 531 static ssize_t 532 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) 533 { 534 struct w83781d_data *data = w83781d_update_device(dev); 535 return sprintf(buf, "%u\n", data->alarms); 536 } 537 538 static 539 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); 540 #define device_create_file_alarms(client) \ 541 device_create_file(&client->dev, &dev_attr_alarms); 542 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf) 543 { 544 struct w83781d_data *data = w83781d_update_device(dev); 545 return sprintf(buf, "%ld\n", 546 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type)); 547 } 548 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf) 549 { 550 struct w83781d_data *data = w83781d_update_device(dev); 551 return sprintf(buf, "%ld\n", 552 (long)BEEP_ENABLE_FROM_REG(data->beep_enable)); 553 } 554 555 #define BEEP_ENABLE 0 /* Store beep_enable */ 556 #define BEEP_MASK 1 /* Store beep_mask */ 557 558 static ssize_t 559 store_beep_reg(struct device *dev, const char *buf, size_t count, 560 int update_mask) 561 { 562 struct i2c_client *client = to_i2c_client(dev); 563 struct w83781d_data *data = i2c_get_clientdata(client); 564 u32 val, val2; 565 566 val = simple_strtoul(buf, NULL, 10); 567 568 down(&data->update_lock); 569 570 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */ 571 data->beep_mask = BEEP_MASK_TO_REG(val, data->type); 572 w83781d_write_value(client, W83781D_REG_BEEP_INTS1, 573 data->beep_mask & 0xff); 574 575 if ((data->type != w83781d) && (data->type != as99127f)) { 576 w83781d_write_value(client, W83781D_REG_BEEP_INTS3, 577 ((data->beep_mask) >> 16) & 0xff); 578 } 579 580 val2 = (data->beep_mask >> 8) & 0x7f; 581 } else { /* We are storing beep_enable */ 582 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f; 583 data->beep_enable = BEEP_ENABLE_TO_REG(val); 584 } 585 586 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 587 val2 | data->beep_enable << 7); 588 589 up(&data->update_lock); 590 return count; 591 } 592 593 #define sysfs_beep(REG, reg) \ 594 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ 595 { \ 596 return show_beep_##reg(dev, attr, buf); \ 597 } \ 598 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 599 { \ 600 return store_beep_reg(dev, buf, count, BEEP_##REG); \ 601 } \ 602 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg); 603 604 sysfs_beep(ENABLE, enable); 605 sysfs_beep(MASK, mask); 606 607 #define device_create_file_beep(client) \ 608 do { \ 609 device_create_file(&client->dev, &dev_attr_beep_enable); \ 610 device_create_file(&client->dev, &dev_attr_beep_mask); \ 611 } while (0) 612 613 static ssize_t 614 show_fan_div_reg(struct device *dev, char *buf, int nr) 615 { 616 struct w83781d_data *data = w83781d_update_device(dev); 617 return sprintf(buf, "%ld\n", 618 (long) DIV_FROM_REG(data->fan_div[nr - 1])); 619 } 620 621 /* Note: we save and restore the fan minimum here, because its value is 622 determined in part by the fan divisor. This follows the principle of 623 least suprise; the user doesn't expect the fan minimum to change just 624 because the divisor changed. */ 625 static ssize_t 626 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr) 627 { 628 struct i2c_client *client = to_i2c_client(dev); 629 struct w83781d_data *data = i2c_get_clientdata(client); 630 unsigned long min; 631 u8 reg; 632 unsigned long val = simple_strtoul(buf, NULL, 10); 633 634 down(&data->update_lock); 635 636 /* Save fan_min */ 637 min = FAN_FROM_REG(data->fan_min[nr], 638 DIV_FROM_REG(data->fan_div[nr])); 639 640 data->fan_div[nr] = DIV_TO_REG(val, data->type); 641 642 reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) 643 & (nr==0 ? 0xcf : 0x3f)) 644 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); 645 w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); 646 647 /* w83781d and as99127f don't have extended divisor bits */ 648 if (data->type != w83781d && data->type != as99127f) { 649 reg = (w83781d_read_value(client, W83781D_REG_VBAT) 650 & ~(1 << (5 + nr))) 651 | ((data->fan_div[nr] & 0x04) << (3 + nr)); 652 w83781d_write_value(client, W83781D_REG_VBAT, reg); 653 } 654 655 /* Restore fan_min */ 656 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 657 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]); 658 659 up(&data->update_lock); 660 return count; 661 } 662 663 #define sysfs_fan_div(offset) \ 664 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 665 { \ 666 return show_fan_div_reg(dev, buf, offset); \ 667 } \ 668 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 669 { \ 670 return store_fan_div_reg(dev, buf, count, offset - 1); \ 671 } \ 672 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset); 673 674 sysfs_fan_div(1); 675 sysfs_fan_div(2); 676 sysfs_fan_div(3); 677 678 #define device_create_file_fan_div(client, offset) \ 679 do { \ 680 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \ 681 } while (0) 682 683 static ssize_t 684 show_pwm_reg(struct device *dev, char *buf, int nr) 685 { 686 struct w83781d_data *data = w83781d_update_device(dev); 687 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1])); 688 } 689 690 static ssize_t 691 show_pwmenable_reg(struct device *dev, char *buf, int nr) 692 { 693 struct w83781d_data *data = w83781d_update_device(dev); 694 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]); 695 } 696 697 static ssize_t 698 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr) 699 { 700 struct i2c_client *client = to_i2c_client(dev); 701 struct w83781d_data *data = i2c_get_clientdata(client); 702 u32 val; 703 704 val = simple_strtoul(buf, NULL, 10); 705 706 down(&data->update_lock); 707 data->pwm[nr - 1] = PWM_TO_REG(val); 708 w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]); 709 up(&data->update_lock); 710 return count; 711 } 712 713 static ssize_t 714 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr) 715 { 716 struct i2c_client *client = to_i2c_client(dev); 717 struct w83781d_data *data = i2c_get_clientdata(client); 718 u32 val, reg; 719 720 val = simple_strtoul(buf, NULL, 10); 721 722 down(&data->update_lock); 723 724 switch (val) { 725 case 0: 726 case 1: 727 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12); 728 w83781d_write_value(client, W83781D_REG_PWMCLK12, 729 (reg & 0xf7) | (val << 3)); 730 731 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); 732 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, 733 (reg & 0xef) | (!val << 4)); 734 735 data->pwmenable[nr - 1] = val; 736 break; 737 738 default: 739 up(&data->update_lock); 740 return -EINVAL; 741 } 742 743 up(&data->update_lock); 744 return count; 745 } 746 747 #define sysfs_pwm(offset) \ 748 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 749 { \ 750 return show_pwm_reg(dev, buf, offset); \ 751 } \ 752 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \ 753 const char *buf, size_t count) \ 754 { \ 755 return store_pwm_reg(dev, buf, count, offset); \ 756 } \ 757 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \ 758 show_regs_pwm_##offset, store_regs_pwm_##offset); 759 760 #define sysfs_pwmenable(offset) \ 761 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 762 { \ 763 return show_pwmenable_reg(dev, buf, offset); \ 764 } \ 765 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \ 766 const char *buf, size_t count) \ 767 { \ 768 return store_pwmenable_reg(dev, buf, count, offset); \ 769 } \ 770 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \ 771 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset); 772 773 sysfs_pwm(1); 774 sysfs_pwm(2); 775 sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */ 776 sysfs_pwm(3); 777 sysfs_pwm(4); 778 779 #define device_create_file_pwm(client, offset) \ 780 do { \ 781 device_create_file(&client->dev, &dev_attr_pwm##offset); \ 782 } while (0) 783 784 #define device_create_file_pwmenable(client, offset) \ 785 do { \ 786 device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \ 787 } while (0) 788 789 static ssize_t 790 show_sensor_reg(struct device *dev, char *buf, int nr) 791 { 792 struct w83781d_data *data = w83781d_update_device(dev); 793 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]); 794 } 795 796 static ssize_t 797 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr) 798 { 799 struct i2c_client *client = to_i2c_client(dev); 800 struct w83781d_data *data = i2c_get_clientdata(client); 801 u32 val, tmp; 802 803 val = simple_strtoul(buf, NULL, 10); 804 805 down(&data->update_lock); 806 807 switch (val) { 808 case 1: /* PII/Celeron diode */ 809 tmp = w83781d_read_value(client, W83781D_REG_SCFG1); 810 w83781d_write_value(client, W83781D_REG_SCFG1, 811 tmp | BIT_SCFG1[nr - 1]); 812 tmp = w83781d_read_value(client, W83781D_REG_SCFG2); 813 w83781d_write_value(client, W83781D_REG_SCFG2, 814 tmp | BIT_SCFG2[nr - 1]); 815 data->sens[nr - 1] = val; 816 break; 817 case 2: /* 3904 */ 818 tmp = w83781d_read_value(client, W83781D_REG_SCFG1); 819 w83781d_write_value(client, W83781D_REG_SCFG1, 820 tmp | BIT_SCFG1[nr - 1]); 821 tmp = w83781d_read_value(client, W83781D_REG_SCFG2); 822 w83781d_write_value(client, W83781D_REG_SCFG2, 823 tmp & ~BIT_SCFG2[nr - 1]); 824 data->sens[nr - 1] = val; 825 break; 826 case W83781D_DEFAULT_BETA: /* thermistor */ 827 tmp = w83781d_read_value(client, W83781D_REG_SCFG1); 828 w83781d_write_value(client, W83781D_REG_SCFG1, 829 tmp & ~BIT_SCFG1[nr - 1]); 830 data->sens[nr - 1] = val; 831 break; 832 default: 833 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n", 834 (long) val, W83781D_DEFAULT_BETA); 835 break; 836 } 837 838 up(&data->update_lock); 839 return count; 840 } 841 842 #define sysfs_sensor(offset) \ 843 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 844 { \ 845 return show_sensor_reg(dev, buf, offset); \ 846 } \ 847 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 848 { \ 849 return store_sensor_reg(dev, buf, count, offset); \ 850 } \ 851 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset); 852 853 sysfs_sensor(1); 854 sysfs_sensor(2); 855 sysfs_sensor(3); 856 857 #define device_create_file_sensor(client, offset) \ 858 do { \ 859 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \ 860 } while (0) 861 862 /* This function is called when: 863 * w83781d_driver is inserted (when this module is loaded), for each 864 available adapter 865 * when a new adapter is inserted (and w83781d_driver is still present) */ 866 static int 867 w83781d_attach_adapter(struct i2c_adapter *adapter) 868 { 869 if (!(adapter->class & I2C_CLASS_HWMON)) 870 return 0; 871 return i2c_probe(adapter, &addr_data, w83781d_detect); 872 } 873 874 static int 875 w83781d_isa_attach_adapter(struct i2c_adapter *adapter) 876 { 877 return w83781d_detect(adapter, isa_address, -1); 878 } 879 880 /* Assumes that adapter is of I2C, not ISA variety. 881 * OTHERWISE DON'T CALL THIS 882 */ 883 static int 884 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind, 885 struct i2c_client *new_client) 886 { 887 int i, val1 = 0, id; 888 int err; 889 const char *client_name = ""; 890 struct w83781d_data *data = i2c_get_clientdata(new_client); 891 892 data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); 893 if (!(data->lm75[0])) { 894 err = -ENOMEM; 895 goto ERROR_SC_0; 896 } 897 898 id = i2c_adapter_id(adapter); 899 900 if (force_subclients[0] == id && force_subclients[1] == address) { 901 for (i = 2; i <= 3; i++) { 902 if (force_subclients[i] < 0x48 || 903 force_subclients[i] > 0x4f) { 904 dev_err(&new_client->dev, "Invalid subclient " 905 "address %d; must be 0x48-0x4f\n", 906 force_subclients[i]); 907 err = -EINVAL; 908 goto ERROR_SC_1; 909 } 910 } 911 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR, 912 (force_subclients[2] & 0x07) | 913 ((force_subclients[3] & 0x07) << 4)); 914 data->lm75[0]->addr = force_subclients[2]; 915 } else { 916 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR); 917 data->lm75[0]->addr = 0x48 + (val1 & 0x07); 918 } 919 920 if (kind != w83783s) { 921 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); 922 if (!(data->lm75[1])) { 923 err = -ENOMEM; 924 goto ERROR_SC_1; 925 } 926 927 if (force_subclients[0] == id && 928 force_subclients[1] == address) { 929 data->lm75[1]->addr = force_subclients[3]; 930 } else { 931 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07); 932 } 933 if (data->lm75[0]->addr == data->lm75[1]->addr) { 934 dev_err(&new_client->dev, 935 "Duplicate addresses 0x%x for subclients.\n", 936 data->lm75[0]->addr); 937 err = -EBUSY; 938 goto ERROR_SC_2; 939 } 940 } 941 942 if (kind == w83781d) 943 client_name = "w83781d subclient"; 944 else if (kind == w83782d) 945 client_name = "w83782d subclient"; 946 else if (kind == w83783s) 947 client_name = "w83783s subclient"; 948 else if (kind == w83627hf) 949 client_name = "w83627hf subclient"; 950 else if (kind == as99127f) 951 client_name = "as99127f subclient"; 952 953 for (i = 0; i <= 1; i++) { 954 /* store all data in w83781d */ 955 i2c_set_clientdata(data->lm75[i], NULL); 956 data->lm75[i]->adapter = adapter; 957 data->lm75[i]->driver = &w83781d_driver; 958 data->lm75[i]->flags = 0; 959 strlcpy(data->lm75[i]->name, client_name, 960 I2C_NAME_SIZE); 961 if ((err = i2c_attach_client(data->lm75[i]))) { 962 dev_err(&new_client->dev, "Subclient %d " 963 "registration at address 0x%x " 964 "failed.\n", i, data->lm75[i]->addr); 965 if (i == 1) 966 goto ERROR_SC_3; 967 goto ERROR_SC_2; 968 } 969 if (kind == w83783s) 970 break; 971 } 972 973 return 0; 974 975 /* Undo inits in case of errors */ 976 ERROR_SC_3: 977 i2c_detach_client(data->lm75[0]); 978 ERROR_SC_2: 979 kfree(data->lm75[1]); 980 ERROR_SC_1: 981 kfree(data->lm75[0]); 982 ERROR_SC_0: 983 return err; 984 } 985 986 static int 987 w83781d_detect(struct i2c_adapter *adapter, int address, int kind) 988 { 989 int i = 0, val1 = 0, val2; 990 struct i2c_client *new_client; 991 struct w83781d_data *data; 992 int err; 993 const char *client_name = ""; 994 int is_isa = i2c_is_isa_adapter(adapter); 995 enum vendor { winbond, asus } vendid; 996 997 if (!is_isa 998 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { 999 err = -EINVAL; 1000 goto ERROR0; 1001 } 1002 1003 /* Prevent users from forcing a kind for a bus it isn't supposed 1004 to possibly be on */ 1005 if (is_isa && (kind == as99127f || kind == w83783s)) { 1006 dev_err(&adapter->dev, 1007 "Cannot force I2C-only chip for ISA address 0x%02x.\n", 1008 address); 1009 err = -EINVAL; 1010 goto ERROR0; 1011 } 1012 1013 if (is_isa) 1014 if (!request_region(address, W83781D_EXTENT, 1015 w83781d_isa_driver.name)) { 1016 dev_dbg(&adapter->dev, "Request of region " 1017 "0x%x-0x%x for w83781d failed\n", address, 1018 address + W83781D_EXTENT - 1); 1019 err = -EBUSY; 1020 goto ERROR0; 1021 } 1022 1023 /* Probe whether there is anything available on this address. Already 1024 done for SMBus clients */ 1025 if (kind < 0) { 1026 if (is_isa) { 1027 1028 #define REALLY_SLOW_IO 1029 /* We need the timeouts for at least some LM78-like 1030 chips. But only if we read 'undefined' registers. */ 1031 i = inb_p(address + 1); 1032 if (inb_p(address + 2) != i 1033 || inb_p(address + 3) != i 1034 || inb_p(address + 7) != i) { 1035 dev_dbg(&adapter->dev, "Detection of w83781d " 1036 "chip failed at step 1\n"); 1037 err = -ENODEV; 1038 goto ERROR1; 1039 } 1040 #undef REALLY_SLOW_IO 1041 1042 /* Let's just hope nothing breaks here */ 1043 i = inb_p(address + 5) & 0x7f; 1044 outb_p(~i & 0x7f, address + 5); 1045 val2 = inb_p(address + 5) & 0x7f; 1046 if (val2 != (~i & 0x7f)) { 1047 outb_p(i, address + 5); 1048 dev_dbg(&adapter->dev, "Detection of w83781d " 1049 "chip failed at step 2 (0x%x != " 1050 "0x%x at 0x%x)\n", val2, ~i & 0x7f, 1051 address + 5); 1052 err = -ENODEV; 1053 goto ERROR1; 1054 } 1055 } 1056 } 1057 1058 /* OK. For now, we presume we have a valid client. We now create the 1059 client structure, even though we cannot fill it completely yet. 1060 But it allows us to access w83781d_{read,write}_value. */ 1061 1062 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) { 1063 err = -ENOMEM; 1064 goto ERROR1; 1065 } 1066 1067 new_client = &data->client; 1068 i2c_set_clientdata(new_client, data); 1069 new_client->addr = address; 1070 init_MUTEX(&data->lock); 1071 new_client->adapter = adapter; 1072 new_client->driver = is_isa ? &w83781d_isa_driver : &w83781d_driver; 1073 new_client->flags = 0; 1074 1075 /* Now, we do the remaining detection. */ 1076 1077 /* The w8378?d may be stuck in some other bank than bank 0. This may 1078 make reading other information impossible. Specify a force=... or 1079 force_*=... parameter, and the Winbond will be reset to the right 1080 bank. */ 1081 if (kind < 0) { 1082 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) { 1083 dev_dbg(&new_client->dev, "Detection failed at step " 1084 "3\n"); 1085 err = -ENODEV; 1086 goto ERROR2; 1087 } 1088 val1 = w83781d_read_value(new_client, W83781D_REG_BANK); 1089 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN); 1090 /* Check for Winbond or Asus ID if in bank 0 */ 1091 if ((!(val1 & 0x07)) && 1092 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3)) 1093 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) { 1094 dev_dbg(&new_client->dev, "Detection failed at step " 1095 "4\n"); 1096 err = -ENODEV; 1097 goto ERROR2; 1098 } 1099 /* If Winbond SMBus, check address at 0x48. 1100 Asus doesn't support, except for as99127f rev.2 */ 1101 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) || 1102 ((val1 & 0x80) && (val2 == 0x5c)))) { 1103 if (w83781d_read_value 1104 (new_client, W83781D_REG_I2C_ADDR) != address) { 1105 dev_dbg(&new_client->dev, "Detection failed " 1106 "at step 5\n"); 1107 err = -ENODEV; 1108 goto ERROR2; 1109 } 1110 } 1111 } 1112 1113 /* We have either had a force parameter, or we have already detected the 1114 Winbond. Put it now into bank 0 and Vendor ID High Byte */ 1115 w83781d_write_value(new_client, W83781D_REG_BANK, 1116 (w83781d_read_value(new_client, 1117 W83781D_REG_BANK) & 0x78) | 1118 0x80); 1119 1120 /* Determine the chip type. */ 1121 if (kind <= 0) { 1122 /* get vendor ID */ 1123 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN); 1124 if (val2 == 0x5c) 1125 vendid = winbond; 1126 else if (val2 == 0x12) 1127 vendid = asus; 1128 else { 1129 dev_dbg(&new_client->dev, "Chip was made by neither " 1130 "Winbond nor Asus?\n"); 1131 err = -ENODEV; 1132 goto ERROR2; 1133 } 1134 1135 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID); 1136 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) 1137 kind = w83781d; 1138 else if (val1 == 0x30 && vendid == winbond) 1139 kind = w83782d; 1140 else if (val1 == 0x40 && vendid == winbond && !is_isa 1141 && address == 0x2d) 1142 kind = w83783s; 1143 else if (val1 == 0x21 && vendid == winbond) 1144 kind = w83627hf; 1145 else if (val1 == 0x31 && !is_isa && address >= 0x28) 1146 kind = as99127f; 1147 else { 1148 if (kind == 0) 1149 dev_warn(&new_client->dev, "Ignoring 'force' " 1150 "parameter for unknown chip at " 1151 "adapter %d, address 0x%02x\n", 1152 i2c_adapter_id(adapter), address); 1153 err = -EINVAL; 1154 goto ERROR2; 1155 } 1156 } 1157 1158 if (kind == w83781d) { 1159 client_name = "w83781d"; 1160 } else if (kind == w83782d) { 1161 client_name = "w83782d"; 1162 } else if (kind == w83783s) { 1163 client_name = "w83783s"; 1164 } else if (kind == w83627hf) { 1165 client_name = "w83627hf"; 1166 } else if (kind == as99127f) { 1167 client_name = "as99127f"; 1168 } 1169 1170 /* Fill in the remaining client fields and put into the global list */ 1171 strlcpy(new_client->name, client_name, I2C_NAME_SIZE); 1172 data->type = kind; 1173 1174 data->valid = 0; 1175 init_MUTEX(&data->update_lock); 1176 1177 /* Tell the I2C layer a new client has arrived */ 1178 if ((err = i2c_attach_client(new_client))) 1179 goto ERROR2; 1180 1181 /* attach secondary i2c lm75-like clients */ 1182 if (!is_isa) { 1183 if ((err = w83781d_detect_subclients(adapter, address, 1184 kind, new_client))) 1185 goto ERROR3; 1186 } else { 1187 data->lm75[0] = NULL; 1188 data->lm75[1] = NULL; 1189 } 1190 1191 /* Initialize the chip */ 1192 w83781d_init_client(new_client); 1193 1194 /* A few vars need to be filled upon startup */ 1195 for (i = 1; i <= 3; i++) { 1196 data->fan_min[i - 1] = w83781d_read_value(new_client, 1197 W83781D_REG_FAN_MIN(i)); 1198 } 1199 if (kind != w83781d && kind != as99127f) 1200 for (i = 0; i < 4; i++) 1201 data->pwmenable[i] = 1; 1202 1203 /* Register sysfs hooks */ 1204 data->class_dev = hwmon_device_register(&new_client->dev); 1205 if (IS_ERR(data->class_dev)) { 1206 err = PTR_ERR(data->class_dev); 1207 goto ERROR4; 1208 } 1209 1210 device_create_file_in(new_client, 0); 1211 if (kind != w83783s) 1212 device_create_file_in(new_client, 1); 1213 device_create_file_in(new_client, 2); 1214 device_create_file_in(new_client, 3); 1215 device_create_file_in(new_client, 4); 1216 device_create_file_in(new_client, 5); 1217 device_create_file_in(new_client, 6); 1218 if (kind != as99127f && kind != w83781d && kind != w83783s) { 1219 device_create_file_in(new_client, 7); 1220 device_create_file_in(new_client, 8); 1221 } 1222 1223 device_create_file_fan(new_client, 1); 1224 device_create_file_fan(new_client, 2); 1225 device_create_file_fan(new_client, 3); 1226 1227 device_create_file_temp(new_client, 1); 1228 device_create_file_temp(new_client, 2); 1229 if (kind != w83783s) 1230 device_create_file_temp(new_client, 3); 1231 1232 device_create_file_vid(new_client); 1233 device_create_file_vrm(new_client); 1234 1235 device_create_file_fan_div(new_client, 1); 1236 device_create_file_fan_div(new_client, 2); 1237 device_create_file_fan_div(new_client, 3); 1238 1239 device_create_file_alarms(new_client); 1240 1241 device_create_file_beep(new_client); 1242 1243 if (kind != w83781d && kind != as99127f) { 1244 device_create_file_pwm(new_client, 1); 1245 device_create_file_pwm(new_client, 2); 1246 device_create_file_pwmenable(new_client, 2); 1247 } 1248 if (kind == w83782d && !is_isa) { 1249 device_create_file_pwm(new_client, 3); 1250 device_create_file_pwm(new_client, 4); 1251 } 1252 1253 if (kind != as99127f && kind != w83781d) { 1254 device_create_file_sensor(new_client, 1); 1255 device_create_file_sensor(new_client, 2); 1256 if (kind != w83783s) 1257 device_create_file_sensor(new_client, 3); 1258 } 1259 1260 return 0; 1261 1262 ERROR4: 1263 if (data->lm75[1]) { 1264 i2c_detach_client(data->lm75[1]); 1265 kfree(data->lm75[1]); 1266 } 1267 if (data->lm75[0]) { 1268 i2c_detach_client(data->lm75[0]); 1269 kfree(data->lm75[0]); 1270 } 1271 ERROR3: 1272 i2c_detach_client(new_client); 1273 ERROR2: 1274 kfree(data); 1275 ERROR1: 1276 if (is_isa) 1277 release_region(address, W83781D_EXTENT); 1278 ERROR0: 1279 return err; 1280 } 1281 1282 static int 1283 w83781d_detach_client(struct i2c_client *client) 1284 { 1285 struct w83781d_data *data = i2c_get_clientdata(client); 1286 int err; 1287 1288 /* main client */ 1289 if (data) 1290 hwmon_device_unregister(data->class_dev); 1291 1292 if (i2c_is_isa_client(client)) 1293 release_region(client->addr, W83781D_EXTENT); 1294 1295 if ((err = i2c_detach_client(client))) 1296 return err; 1297 1298 /* main client */ 1299 if (data) 1300 kfree(data); 1301 1302 /* subclient */ 1303 else 1304 kfree(client); 1305 1306 return 0; 1307 } 1308 1309 /* The SMBus locks itself, usually, but nothing may access the Winbond between 1310 bank switches. ISA access must always be locked explicitly! 1311 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, 1312 would slow down the W83781D access and should not be necessary. 1313 There are some ugly typecasts here, but the good news is - they should 1314 nowhere else be necessary! */ 1315 static int 1316 w83781d_read_value(struct i2c_client *client, u16 reg) 1317 { 1318 struct w83781d_data *data = i2c_get_clientdata(client); 1319 int res, word_sized, bank; 1320 struct i2c_client *cl; 1321 1322 down(&data->lock); 1323 if (i2c_is_isa_client(client)) { 1324 word_sized = (((reg & 0xff00) == 0x100) 1325 || ((reg & 0xff00) == 0x200)) 1326 && (((reg & 0x00ff) == 0x50) 1327 || ((reg & 0x00ff) == 0x53) 1328 || ((reg & 0x00ff) == 0x55)); 1329 if (reg & 0xff00) { 1330 outb_p(W83781D_REG_BANK, 1331 client->addr + W83781D_ADDR_REG_OFFSET); 1332 outb_p(reg >> 8, 1333 client->addr + W83781D_DATA_REG_OFFSET); 1334 } 1335 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); 1336 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET); 1337 if (word_sized) { 1338 outb_p((reg & 0xff) + 1, 1339 client->addr + W83781D_ADDR_REG_OFFSET); 1340 res = 1341 (res << 8) + inb_p(client->addr + 1342 W83781D_DATA_REG_OFFSET); 1343 } 1344 if (reg & 0xff00) { 1345 outb_p(W83781D_REG_BANK, 1346 client->addr + W83781D_ADDR_REG_OFFSET); 1347 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); 1348 } 1349 } else { 1350 bank = (reg >> 8) & 0x0f; 1351 if (bank > 2) 1352 /* switch banks */ 1353 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1354 bank); 1355 if (bank == 0 || bank > 2) { 1356 res = i2c_smbus_read_byte_data(client, reg & 0xff); 1357 } else { 1358 /* switch to subclient */ 1359 cl = data->lm75[bank - 1]; 1360 /* convert from ISA to LM75 I2C addresses */ 1361 switch (reg & 0xff) { 1362 case 0x50: /* TEMP */ 1363 res = swab16(i2c_smbus_read_word_data(cl, 0)); 1364 break; 1365 case 0x52: /* CONFIG */ 1366 res = i2c_smbus_read_byte_data(cl, 1); 1367 break; 1368 case 0x53: /* HYST */ 1369 res = swab16(i2c_smbus_read_word_data(cl, 2)); 1370 break; 1371 case 0x55: /* OVER */ 1372 default: 1373 res = swab16(i2c_smbus_read_word_data(cl, 3)); 1374 break; 1375 } 1376 } 1377 if (bank > 2) 1378 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); 1379 } 1380 up(&data->lock); 1381 return res; 1382 } 1383 1384 static int 1385 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value) 1386 { 1387 struct w83781d_data *data = i2c_get_clientdata(client); 1388 int word_sized, bank; 1389 struct i2c_client *cl; 1390 1391 down(&data->lock); 1392 if (i2c_is_isa_client(client)) { 1393 word_sized = (((reg & 0xff00) == 0x100) 1394 || ((reg & 0xff00) == 0x200)) 1395 && (((reg & 0x00ff) == 0x53) 1396 || ((reg & 0x00ff) == 0x55)); 1397 if (reg & 0xff00) { 1398 outb_p(W83781D_REG_BANK, 1399 client->addr + W83781D_ADDR_REG_OFFSET); 1400 outb_p(reg >> 8, 1401 client->addr + W83781D_DATA_REG_OFFSET); 1402 } 1403 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); 1404 if (word_sized) { 1405 outb_p(value >> 8, 1406 client->addr + W83781D_DATA_REG_OFFSET); 1407 outb_p((reg & 0xff) + 1, 1408 client->addr + W83781D_ADDR_REG_OFFSET); 1409 } 1410 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET); 1411 if (reg & 0xff00) { 1412 outb_p(W83781D_REG_BANK, 1413 client->addr + W83781D_ADDR_REG_OFFSET); 1414 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); 1415 } 1416 } else { 1417 bank = (reg >> 8) & 0x0f; 1418 if (bank > 2) 1419 /* switch banks */ 1420 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1421 bank); 1422 if (bank == 0 || bank > 2) { 1423 i2c_smbus_write_byte_data(client, reg & 0xff, 1424 value & 0xff); 1425 } else { 1426 /* switch to subclient */ 1427 cl = data->lm75[bank - 1]; 1428 /* convert from ISA to LM75 I2C addresses */ 1429 switch (reg & 0xff) { 1430 case 0x52: /* CONFIG */ 1431 i2c_smbus_write_byte_data(cl, 1, value & 0xff); 1432 break; 1433 case 0x53: /* HYST */ 1434 i2c_smbus_write_word_data(cl, 2, swab16(value)); 1435 break; 1436 case 0x55: /* OVER */ 1437 i2c_smbus_write_word_data(cl, 3, swab16(value)); 1438 break; 1439 } 1440 } 1441 if (bank > 2) 1442 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); 1443 } 1444 up(&data->lock); 1445 return 0; 1446 } 1447 1448 static void 1449 w83781d_init_client(struct i2c_client *client) 1450 { 1451 struct w83781d_data *data = i2c_get_clientdata(client); 1452 int i, p; 1453 int type = data->type; 1454 u8 tmp; 1455 1456 if (init && type != as99127f) { /* this resets registers we don't have 1457 documentation for on the as99127f */ 1458 /* save these registers */ 1459 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); 1460 p = w83781d_read_value(client, W83781D_REG_PWMCLK12); 1461 /* Reset all except Watchdog values and last conversion values 1462 This sets fan-divs to 2, among others */ 1463 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80); 1464 /* Restore the registers and disable power-on abnormal beep. 1465 This saves FAN 1/2/3 input/output values set by BIOS. */ 1466 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80); 1467 w83781d_write_value(client, W83781D_REG_PWMCLK12, p); 1468 /* Disable master beep-enable (reset turns it on). 1469 Individual beep_mask should be reset to off but for some reason 1470 disabling this bit helps some people not get beeped */ 1471 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0); 1472 } 1473 1474 data->vrm = vid_which_vrm(); 1475 1476 if ((type != w83781d) && (type != as99127f)) { 1477 tmp = w83781d_read_value(client, W83781D_REG_SCFG1); 1478 for (i = 1; i <= 3; i++) { 1479 if (!(tmp & BIT_SCFG1[i - 1])) { 1480 data->sens[i - 1] = W83781D_DEFAULT_BETA; 1481 } else { 1482 if (w83781d_read_value 1483 (client, 1484 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) 1485 data->sens[i - 1] = 1; 1486 else 1487 data->sens[i - 1] = 2; 1488 } 1489 if (type == w83783s && i == 2) 1490 break; 1491 } 1492 } 1493 1494 if (init && type != as99127f) { 1495 /* Enable temp2 */ 1496 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG); 1497 if (tmp & 0x01) { 1498 dev_warn(&client->dev, "Enabling temp2, readings " 1499 "might not make sense\n"); 1500 w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG, 1501 tmp & 0xfe); 1502 } 1503 1504 /* Enable temp3 */ 1505 if (type != w83783s) { 1506 tmp = w83781d_read_value(client, 1507 W83781D_REG_TEMP3_CONFIG); 1508 if (tmp & 0x01) { 1509 dev_warn(&client->dev, "Enabling temp3, " 1510 "readings might not make sense\n"); 1511 w83781d_write_value(client, 1512 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); 1513 } 1514 } 1515 1516 if (type != w83781d) { 1517 /* enable comparator mode for temp2 and temp3 so 1518 alarm indication will work correctly */ 1519 i = w83781d_read_value(client, W83781D_REG_IRQ); 1520 if (!(i & 0x40)) 1521 w83781d_write_value(client, W83781D_REG_IRQ, 1522 i | 0x40); 1523 } 1524 } 1525 1526 /* Start monitoring */ 1527 w83781d_write_value(client, W83781D_REG_CONFIG, 1528 (w83781d_read_value(client, 1529 W83781D_REG_CONFIG) & 0xf7) 1530 | 0x01); 1531 } 1532 1533 static struct w83781d_data *w83781d_update_device(struct device *dev) 1534 { 1535 struct i2c_client *client = to_i2c_client(dev); 1536 struct w83781d_data *data = i2c_get_clientdata(client); 1537 int i; 1538 1539 down(&data->update_lock); 1540 1541 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1542 || !data->valid) { 1543 dev_dbg(dev, "Starting device update\n"); 1544 1545 for (i = 0; i <= 8; i++) { 1546 if (data->type == w83783s && i == 1) 1547 continue; /* 783S has no in1 */ 1548 data->in[i] = 1549 w83781d_read_value(client, W83781D_REG_IN(i)); 1550 data->in_min[i] = 1551 w83781d_read_value(client, W83781D_REG_IN_MIN(i)); 1552 data->in_max[i] = 1553 w83781d_read_value(client, W83781D_REG_IN_MAX(i)); 1554 if ((data->type != w83782d) 1555 && (data->type != w83627hf) && (i == 6)) 1556 break; 1557 } 1558 for (i = 1; i <= 3; i++) { 1559 data->fan[i - 1] = 1560 w83781d_read_value(client, W83781D_REG_FAN(i)); 1561 data->fan_min[i - 1] = 1562 w83781d_read_value(client, W83781D_REG_FAN_MIN(i)); 1563 } 1564 if (data->type != w83781d && data->type != as99127f) { 1565 for (i = 1; i <= 4; i++) { 1566 data->pwm[i - 1] = 1567 w83781d_read_value(client, 1568 W83781D_REG_PWM(i)); 1569 if ((data->type != w83782d 1570 || i2c_is_isa_client(client)) 1571 && i == 2) 1572 break; 1573 } 1574 /* Only PWM2 can be disabled */ 1575 data->pwmenable[1] = (w83781d_read_value(client, 1576 W83781D_REG_PWMCLK12) & 0x08) >> 3; 1577 } 1578 1579 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1)); 1580 data->temp_max = 1581 w83781d_read_value(client, W83781D_REG_TEMP_OVER(1)); 1582 data->temp_max_hyst = 1583 w83781d_read_value(client, W83781D_REG_TEMP_HYST(1)); 1584 data->temp_add[0] = 1585 w83781d_read_value(client, W83781D_REG_TEMP(2)); 1586 data->temp_max_add[0] = 1587 w83781d_read_value(client, W83781D_REG_TEMP_OVER(2)); 1588 data->temp_max_hyst_add[0] = 1589 w83781d_read_value(client, W83781D_REG_TEMP_HYST(2)); 1590 if (data->type != w83783s) { 1591 data->temp_add[1] = 1592 w83781d_read_value(client, W83781D_REG_TEMP(3)); 1593 data->temp_max_add[1] = 1594 w83781d_read_value(client, 1595 W83781D_REG_TEMP_OVER(3)); 1596 data->temp_max_hyst_add[1] = 1597 w83781d_read_value(client, 1598 W83781D_REG_TEMP_HYST(3)); 1599 } 1600 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV); 1601 data->vid = i & 0x0f; 1602 data->vid |= (w83781d_read_value(client, 1603 W83781D_REG_CHIPID) & 0x01) << 4; 1604 data->fan_div[0] = (i >> 4) & 0x03; 1605 data->fan_div[1] = (i >> 6) & 0x03; 1606 data->fan_div[2] = (w83781d_read_value(client, 1607 W83781D_REG_PIN) >> 6) & 0x03; 1608 if ((data->type != w83781d) && (data->type != as99127f)) { 1609 i = w83781d_read_value(client, W83781D_REG_VBAT); 1610 data->fan_div[0] |= (i >> 3) & 0x04; 1611 data->fan_div[1] |= (i >> 4) & 0x04; 1612 data->fan_div[2] |= (i >> 5) & 0x04; 1613 } 1614 data->alarms = 1615 w83781d_read_value(client, 1616 W83781D_REG_ALARM1) + 1617 (w83781d_read_value(client, W83781D_REG_ALARM2) << 8); 1618 if ((data->type == w83782d) || (data->type == w83627hf)) { 1619 data->alarms |= 1620 w83781d_read_value(client, 1621 W83781D_REG_ALARM3) << 16; 1622 } 1623 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2); 1624 data->beep_enable = i >> 7; 1625 data->beep_mask = ((i & 0x7f) << 8) + 1626 w83781d_read_value(client, W83781D_REG_BEEP_INTS1); 1627 if ((data->type != w83781d) && (data->type != as99127f)) { 1628 data->beep_mask |= 1629 w83781d_read_value(client, 1630 W83781D_REG_BEEP_INTS3) << 16; 1631 } 1632 data->last_updated = jiffies; 1633 data->valid = 1; 1634 } 1635 1636 up(&data->update_lock); 1637 1638 return data; 1639 } 1640 1641 static int __init 1642 sensors_w83781d_init(void) 1643 { 1644 int res; 1645 1646 res = i2c_add_driver(&w83781d_driver); 1647 if (res) 1648 return res; 1649 1650 res = i2c_isa_add_driver(&w83781d_isa_driver); 1651 if (res) { 1652 i2c_del_driver(&w83781d_driver); 1653 return res; 1654 } 1655 1656 return 0; 1657 } 1658 1659 static void __exit 1660 sensors_w83781d_exit(void) 1661 { 1662 i2c_isa_del_driver(&w83781d_isa_driver); 1663 i2c_del_driver(&w83781d_driver); 1664 } 1665 1666 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " 1667 "Philip Edelbrock <phil@netroedge.com>, " 1668 "and Mark Studebaker <mdsxyz123@yahoo.com>"); 1669 MODULE_DESCRIPTION("W83781D driver"); 1670 MODULE_LICENSE("GPL"); 1671 1672 module_init(sensors_w83781d_init); 1673 module_exit(sensors_w83781d_exit); 1674