1 /* 2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware 3 monitoring 4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>, 5 Philip Edelbrock <phil@netroedge.com>, 6 and Mark Studebaker <mdsxyz123@yahoo.com> 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 2 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, write to the Free Software 20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23 /* 24 Supports following chips: 25 26 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA 27 as99127f 7 3 0 3 0x31 0x12c3 yes no 28 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no 29 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes 30 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC) 31 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes 32 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no 33 34 */ 35 36 #include <linux/module.h> 37 #include <linux/init.h> 38 #include <linux/slab.h> 39 #include <linux/jiffies.h> 40 #include <linux/i2c.h> 41 #include <linux/i2c-sensor.h> 42 #include <linux/i2c-vid.h> 43 #include <asm/io.h> 44 #include "lm75.h" 45 46 /* Addresses to scan */ 47 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 48 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 49 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END }; 50 static unsigned int normal_isa[] = { 0x0290, I2C_CLIENT_ISA_END }; 51 52 /* Insmod parameters */ 53 SENSORS_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f); 54 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: " 55 "{bus, clientaddr, subclientaddr1, subclientaddr2}"); 56 57 static int init = 1; 58 module_param(init, bool, 0); 59 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); 60 61 /* Constants specified below */ 62 63 /* Length of ISA address segment */ 64 #define W83781D_EXTENT 8 65 66 /* Where are the ISA address/data registers relative to the base address */ 67 #define W83781D_ADDR_REG_OFFSET 5 68 #define W83781D_DATA_REG_OFFSET 6 69 70 /* The W83781D registers */ 71 /* The W83782D registers for nr=7,8 are in bank 5 */ 72 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ 73 (0x554 + (((nr) - 7) * 2))) 74 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ 75 (0x555 + (((nr) - 7) * 2))) 76 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ 77 (0x550 + (nr) - 7)) 78 79 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr)) 80 #define W83781D_REG_FAN(nr) (0x27 + (nr)) 81 82 #define W83781D_REG_BANK 0x4E 83 #define W83781D_REG_TEMP2_CONFIG 0x152 84 #define W83781D_REG_TEMP3_CONFIG 0x252 85 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ 86 ((nr == 2) ? (0x0150) : \ 87 (0x27))) 88 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ 89 ((nr == 2) ? (0x153) : \ 90 (0x3A))) 91 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ 92 ((nr == 2) ? (0x155) : \ 93 (0x39))) 94 95 #define W83781D_REG_CONFIG 0x40 96 #define W83781D_REG_ALARM1 0x41 97 #define W83781D_REG_ALARM2 0x42 98 #define W83781D_REG_ALARM3 0x450 /* not on W83781D */ 99 100 #define W83781D_REG_IRQ 0x4C 101 #define W83781D_REG_BEEP_CONFIG 0x4D 102 #define W83781D_REG_BEEP_INTS1 0x56 103 #define W83781D_REG_BEEP_INTS2 0x57 104 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */ 105 106 #define W83781D_REG_VID_FANDIV 0x47 107 108 #define W83781D_REG_CHIPID 0x49 109 #define W83781D_REG_WCHIPID 0x58 110 #define W83781D_REG_CHIPMAN 0x4F 111 #define W83781D_REG_PIN 0x4B 112 113 /* 782D/783S only */ 114 #define W83781D_REG_VBAT 0x5D 115 116 /* PWM 782D (1-4) and 783S (1-2) only */ 117 #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */ 118 /* on which is which; */ 119 #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */ 120 /* However 782d is probably wrong. */ 121 #define W83781D_REG_PWM3 0x5E 122 #define W83781D_REG_PWM4 0x5F 123 #define W83781D_REG_PWMCLK12 0x5C 124 #define W83781D_REG_PWMCLK34 0x45C 125 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2, 126 W83781D_REG_PWM3, W83781D_REG_PWM4 127 }; 128 129 #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1]) 130 131 #define W83781D_REG_I2C_ADDR 0x48 132 #define W83781D_REG_I2C_SUBADDR 0x4A 133 134 /* The following are undocumented in the data sheets however we 135 received the information in an email from Winbond tech support */ 136 /* Sensor selection - not on 781d */ 137 #define W83781D_REG_SCFG1 0x5D 138 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; 139 140 #define W83781D_REG_SCFG2 0x59 141 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; 142 143 #define W83781D_DEFAULT_BETA 3435 144 145 /* RT Table registers */ 146 #define W83781D_REG_RT_IDX 0x50 147 #define W83781D_REG_RT_VAL 0x51 148 149 /* Conversions. Rounding and limit checking is only done on the TO_REG 150 variants. Note that you should be a bit careful with which arguments 151 these macros are called: arguments may be evaluated more than once. 152 Fixing this is just not worth it. */ 153 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255)) 154 #define IN_FROM_REG(val) (((val) * 16) / 10) 155 156 static inline u8 157 FAN_TO_REG(long rpm, int div) 158 { 159 if (rpm == 0) 160 return 255; 161 rpm = SENSORS_LIMIT(rpm, 1, 1000000); 162 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254); 163 } 164 165 #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \ 166 ((val) == 255 ? 0 : \ 167 1350000 / ((val) * (div)))) 168 169 #define TEMP_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \ 170 : (val)) / 1000, 0, 0xff)) 171 #define TEMP_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000) 172 173 #define PWM_FROM_REG(val) (val) 174 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) 175 #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \ 176 (val) ^ 0x7fff : (val)) 177 #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \ 178 (~(val)) & 0x7fff : (val) & 0xffffff) 179 180 #define BEEP_ENABLE_TO_REG(val) ((val) ? 1 : 0) 181 #define BEEP_ENABLE_FROM_REG(val) ((val) ? 1 : 0) 182 183 #define DIV_FROM_REG(val) (1 << (val)) 184 185 static inline u8 186 DIV_TO_REG(long val, enum chips type) 187 { 188 int i; 189 val = SENSORS_LIMIT(val, 1, 190 ((type == w83781d 191 || type == as99127f) ? 8 : 128)) >> 1; 192 for (i = 0; i < 7; i++) { 193 if (val == 0) 194 break; 195 val >>= 1; 196 } 197 return ((u8) i); 198 } 199 200 /* There are some complications in a module like this. First off, W83781D chips 201 may be both present on the SMBus and the ISA bus, and we have to handle 202 those cases separately at some places. Second, there might be several 203 W83781D chips available (well, actually, that is probably never done; but 204 it is a clean illustration of how to handle a case like that). Finally, 205 a specific chip may be attached to *both* ISA and SMBus, and we would 206 not like to detect it double. Fortunately, in the case of the W83781D at 207 least, a register tells us what SMBus address we are on, so that helps 208 a bit - except if there could be more than one SMBus. Groan. No solution 209 for this yet. */ 210 211 /* This module may seem overly long and complicated. In fact, it is not so 212 bad. Quite a lot of bookkeeping is done. A real driver can often cut 213 some corners. */ 214 215 /* For each registered W83781D, we need to keep some data in memory. That 216 data is pointed to by w83781d_list[NR]->data. The structure itself is 217 dynamically allocated, at the same time when a new w83781d client is 218 allocated. */ 219 struct w83781d_data { 220 struct i2c_client client; 221 struct semaphore lock; 222 enum chips type; 223 224 struct semaphore update_lock; 225 char valid; /* !=0 if following fields are valid */ 226 unsigned long last_updated; /* In jiffies */ 227 228 struct i2c_client *lm75[2]; /* for secondary I2C addresses */ 229 /* array of 2 pointers to subclients */ 230 231 u8 in[9]; /* Register value - 8 & 9 for 782D only */ 232 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */ 233 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */ 234 u8 fan[3]; /* Register value */ 235 u8 fan_min[3]; /* Register value */ 236 u8 temp; 237 u8 temp_max; /* Register value */ 238 u8 temp_max_hyst; /* Register value */ 239 u16 temp_add[2]; /* Register value */ 240 u16 temp_max_add[2]; /* Register value */ 241 u16 temp_max_hyst_add[2]; /* Register value */ 242 u8 fan_div[3]; /* Register encoding, shifted right */ 243 u8 vid; /* Register encoding, combined */ 244 u32 alarms; /* Register encoding, combined */ 245 u32 beep_mask; /* Register encoding, combined */ 246 u8 beep_enable; /* Boolean */ 247 u8 pwm[4]; /* Register value */ 248 u8 pwmenable[4]; /* Boolean */ 249 u16 sens[3]; /* 782D/783S only. 250 1 = pentium diode; 2 = 3904 diode; 251 3000-5000 = thermistor beta. 252 Default = 3435. 253 Other Betas unimplemented */ 254 u8 vrm; 255 }; 256 257 static int w83781d_attach_adapter(struct i2c_adapter *adapter); 258 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind); 259 static int w83781d_detach_client(struct i2c_client *client); 260 261 static int w83781d_read_value(struct i2c_client *client, u16 register); 262 static int w83781d_write_value(struct i2c_client *client, u16 register, 263 u16 value); 264 static struct w83781d_data *w83781d_update_device(struct device *dev); 265 static void w83781d_init_client(struct i2c_client *client); 266 267 static struct i2c_driver w83781d_driver = { 268 .owner = THIS_MODULE, 269 .name = "w83781d", 270 .id = I2C_DRIVERID_W83781D, 271 .flags = I2C_DF_NOTIFY, 272 .attach_adapter = w83781d_attach_adapter, 273 .detach_client = w83781d_detach_client, 274 }; 275 276 /* following are the sysfs callback functions */ 277 #define show_in_reg(reg) \ 278 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ 279 { \ 280 struct w83781d_data *data = w83781d_update_device(dev); \ 281 return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \ 282 } 283 show_in_reg(in); 284 show_in_reg(in_min); 285 show_in_reg(in_max); 286 287 #define store_in_reg(REG, reg) \ 288 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \ 289 { \ 290 struct i2c_client *client = to_i2c_client(dev); \ 291 struct w83781d_data *data = i2c_get_clientdata(client); \ 292 u32 val; \ 293 \ 294 val = simple_strtoul(buf, NULL, 10) / 10; \ 295 \ 296 down(&data->update_lock); \ 297 data->in_##reg[nr] = IN_TO_REG(val); \ 298 w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \ 299 \ 300 up(&data->update_lock); \ 301 return count; \ 302 } 303 store_in_reg(MIN, min); 304 store_in_reg(MAX, max); 305 306 #define sysfs_in_offset(offset) \ 307 static ssize_t \ 308 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 309 { \ 310 return show_in(dev, buf, offset); \ 311 } \ 312 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL); 313 314 #define sysfs_in_reg_offset(reg, offset) \ 315 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 316 { \ 317 return show_in_##reg (dev, buf, offset); \ 318 } \ 319 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 320 { \ 321 return store_in_##reg (dev, buf, count, offset); \ 322 } \ 323 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset); 324 325 #define sysfs_in_offsets(offset) \ 326 sysfs_in_offset(offset); \ 327 sysfs_in_reg_offset(min, offset); \ 328 sysfs_in_reg_offset(max, offset); 329 330 sysfs_in_offsets(0); 331 sysfs_in_offsets(1); 332 sysfs_in_offsets(2); 333 sysfs_in_offsets(3); 334 sysfs_in_offsets(4); 335 sysfs_in_offsets(5); 336 sysfs_in_offsets(6); 337 sysfs_in_offsets(7); 338 sysfs_in_offsets(8); 339 340 #define device_create_file_in(client, offset) \ 341 do { \ 342 device_create_file(&client->dev, &dev_attr_in##offset##_input); \ 343 device_create_file(&client->dev, &dev_attr_in##offset##_min); \ 344 device_create_file(&client->dev, &dev_attr_in##offset##_max); \ 345 } while (0) 346 347 #define show_fan_reg(reg) \ 348 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ 349 { \ 350 struct w83781d_data *data = w83781d_update_device(dev); \ 351 return sprintf(buf,"%ld\n", \ 352 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \ 353 } 354 show_fan_reg(fan); 355 show_fan_reg(fan_min); 356 357 static ssize_t 358 store_fan_min(struct device *dev, const char *buf, size_t count, int nr) 359 { 360 struct i2c_client *client = to_i2c_client(dev); 361 struct w83781d_data *data = i2c_get_clientdata(client); 362 u32 val; 363 364 val = simple_strtoul(buf, NULL, 10); 365 366 down(&data->update_lock); 367 data->fan_min[nr - 1] = 368 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1])); 369 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr), 370 data->fan_min[nr - 1]); 371 372 up(&data->update_lock); 373 return count; 374 } 375 376 #define sysfs_fan_offset(offset) \ 377 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 378 { \ 379 return show_fan(dev, buf, offset); \ 380 } \ 381 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL); 382 383 #define sysfs_fan_min_offset(offset) \ 384 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 385 { \ 386 return show_fan_min(dev, buf, offset); \ 387 } \ 388 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 389 { \ 390 return store_fan_min(dev, buf, count, offset); \ 391 } \ 392 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset); 393 394 sysfs_fan_offset(1); 395 sysfs_fan_min_offset(1); 396 sysfs_fan_offset(2); 397 sysfs_fan_min_offset(2); 398 sysfs_fan_offset(3); 399 sysfs_fan_min_offset(3); 400 401 #define device_create_file_fan(client, offset) \ 402 do { \ 403 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \ 404 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \ 405 } while (0) 406 407 #define show_temp_reg(reg) \ 408 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \ 409 { \ 410 struct w83781d_data *data = w83781d_update_device(dev); \ 411 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 412 return sprintf(buf,"%d\n", \ 413 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \ 414 } else { /* TEMP1 */ \ 415 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \ 416 } \ 417 } 418 show_temp_reg(temp); 419 show_temp_reg(temp_max); 420 show_temp_reg(temp_max_hyst); 421 422 #define store_temp_reg(REG, reg) \ 423 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \ 424 { \ 425 struct i2c_client *client = to_i2c_client(dev); \ 426 struct w83781d_data *data = i2c_get_clientdata(client); \ 427 s32 val; \ 428 \ 429 val = simple_strtol(buf, NULL, 10); \ 430 \ 431 down(&data->update_lock); \ 432 \ 433 if (nr >= 2) { /* TEMP2 and TEMP3 */ \ 434 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ 435 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ 436 data->temp_##reg##_add[nr-2]); \ 437 } else { /* TEMP1 */ \ 438 data->temp_##reg = TEMP_TO_REG(val); \ 439 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ 440 data->temp_##reg); \ 441 } \ 442 \ 443 up(&data->update_lock); \ 444 return count; \ 445 } 446 store_temp_reg(OVER, max); 447 store_temp_reg(HYST, max_hyst); 448 449 #define sysfs_temp_offset(offset) \ 450 static ssize_t \ 451 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 452 { \ 453 return show_temp(dev, buf, offset); \ 454 } \ 455 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL); 456 457 #define sysfs_temp_reg_offset(reg, offset) \ 458 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 459 { \ 460 return show_temp_##reg (dev, buf, offset); \ 461 } \ 462 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 463 { \ 464 return store_temp_##reg (dev, buf, count, offset); \ 465 } \ 466 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset); 467 468 #define sysfs_temp_offsets(offset) \ 469 sysfs_temp_offset(offset); \ 470 sysfs_temp_reg_offset(max, offset); \ 471 sysfs_temp_reg_offset(max_hyst, offset); 472 473 sysfs_temp_offsets(1); 474 sysfs_temp_offsets(2); 475 sysfs_temp_offsets(3); 476 477 #define device_create_file_temp(client, offset) \ 478 do { \ 479 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \ 480 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \ 481 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \ 482 } while (0) 483 484 static ssize_t 485 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) 486 { 487 struct w83781d_data *data = w83781d_update_device(dev); 488 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); 489 } 490 491 static 492 DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); 493 #define device_create_file_vid(client) \ 494 device_create_file(&client->dev, &dev_attr_cpu0_vid); 495 static ssize_t 496 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) 497 { 498 struct w83781d_data *data = w83781d_update_device(dev); 499 return sprintf(buf, "%ld\n", (long) data->vrm); 500 } 501 502 static ssize_t 503 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 504 { 505 struct i2c_client *client = to_i2c_client(dev); 506 struct w83781d_data *data = i2c_get_clientdata(client); 507 u32 val; 508 509 val = simple_strtoul(buf, NULL, 10); 510 data->vrm = val; 511 512 return count; 513 } 514 515 static 516 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); 517 #define device_create_file_vrm(client) \ 518 device_create_file(&client->dev, &dev_attr_vrm); 519 static ssize_t 520 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) 521 { 522 struct w83781d_data *data = w83781d_update_device(dev); 523 return sprintf(buf, "%u\n", data->alarms); 524 } 525 526 static 527 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); 528 #define device_create_file_alarms(client) \ 529 device_create_file(&client->dev, &dev_attr_alarms); 530 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf) 531 { 532 struct w83781d_data *data = w83781d_update_device(dev); 533 return sprintf(buf, "%ld\n", 534 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type)); 535 } 536 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf) 537 { 538 struct w83781d_data *data = w83781d_update_device(dev); 539 return sprintf(buf, "%ld\n", 540 (long)BEEP_ENABLE_FROM_REG(data->beep_enable)); 541 } 542 543 #define BEEP_ENABLE 0 /* Store beep_enable */ 544 #define BEEP_MASK 1 /* Store beep_mask */ 545 546 static ssize_t 547 store_beep_reg(struct device *dev, const char *buf, size_t count, 548 int update_mask) 549 { 550 struct i2c_client *client = to_i2c_client(dev); 551 struct w83781d_data *data = i2c_get_clientdata(client); 552 u32 val, val2; 553 554 val = simple_strtoul(buf, NULL, 10); 555 556 down(&data->update_lock); 557 558 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */ 559 data->beep_mask = BEEP_MASK_TO_REG(val, data->type); 560 w83781d_write_value(client, W83781D_REG_BEEP_INTS1, 561 data->beep_mask & 0xff); 562 563 if ((data->type != w83781d) && (data->type != as99127f)) { 564 w83781d_write_value(client, W83781D_REG_BEEP_INTS3, 565 ((data->beep_mask) >> 16) & 0xff); 566 } 567 568 val2 = (data->beep_mask >> 8) & 0x7f; 569 } else { /* We are storing beep_enable */ 570 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f; 571 data->beep_enable = BEEP_ENABLE_TO_REG(val); 572 } 573 574 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 575 val2 | data->beep_enable << 7); 576 577 up(&data->update_lock); 578 return count; 579 } 580 581 #define sysfs_beep(REG, reg) \ 582 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ 583 { \ 584 return show_beep_##reg(dev, attr, buf); \ 585 } \ 586 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 587 { \ 588 return store_beep_reg(dev, buf, count, BEEP_##REG); \ 589 } \ 590 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg); 591 592 sysfs_beep(ENABLE, enable); 593 sysfs_beep(MASK, mask); 594 595 #define device_create_file_beep(client) \ 596 do { \ 597 device_create_file(&client->dev, &dev_attr_beep_enable); \ 598 device_create_file(&client->dev, &dev_attr_beep_mask); \ 599 } while (0) 600 601 static ssize_t 602 show_fan_div_reg(struct device *dev, char *buf, int nr) 603 { 604 struct w83781d_data *data = w83781d_update_device(dev); 605 return sprintf(buf, "%ld\n", 606 (long) DIV_FROM_REG(data->fan_div[nr - 1])); 607 } 608 609 /* Note: we save and restore the fan minimum here, because its value is 610 determined in part by the fan divisor. This follows the principle of 611 least suprise; the user doesn't expect the fan minimum to change just 612 because the divisor changed. */ 613 static ssize_t 614 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr) 615 { 616 struct i2c_client *client = to_i2c_client(dev); 617 struct w83781d_data *data = i2c_get_clientdata(client); 618 unsigned long min; 619 u8 reg; 620 unsigned long val = simple_strtoul(buf, NULL, 10); 621 622 down(&data->update_lock); 623 624 /* Save fan_min */ 625 min = FAN_FROM_REG(data->fan_min[nr], 626 DIV_FROM_REG(data->fan_div[nr])); 627 628 data->fan_div[nr] = DIV_TO_REG(val, data->type); 629 630 reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) 631 & (nr==0 ? 0xcf : 0x3f)) 632 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); 633 w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); 634 635 /* w83781d and as99127f don't have extended divisor bits */ 636 if (data->type != w83781d && data->type != as99127f) { 637 reg = (w83781d_read_value(client, W83781D_REG_VBAT) 638 & ~(1 << (5 + nr))) 639 | ((data->fan_div[nr] & 0x04) << (3 + nr)); 640 w83781d_write_value(client, W83781D_REG_VBAT, reg); 641 } 642 643 /* Restore fan_min */ 644 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 645 w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]); 646 647 up(&data->update_lock); 648 return count; 649 } 650 651 #define sysfs_fan_div(offset) \ 652 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 653 { \ 654 return show_fan_div_reg(dev, buf, offset); \ 655 } \ 656 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 657 { \ 658 return store_fan_div_reg(dev, buf, count, offset - 1); \ 659 } \ 660 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset); 661 662 sysfs_fan_div(1); 663 sysfs_fan_div(2); 664 sysfs_fan_div(3); 665 666 #define device_create_file_fan_div(client, offset) \ 667 do { \ 668 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \ 669 } while (0) 670 671 static ssize_t 672 show_pwm_reg(struct device *dev, char *buf, int nr) 673 { 674 struct w83781d_data *data = w83781d_update_device(dev); 675 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1])); 676 } 677 678 static ssize_t 679 show_pwmenable_reg(struct device *dev, char *buf, int nr) 680 { 681 struct w83781d_data *data = w83781d_update_device(dev); 682 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]); 683 } 684 685 static ssize_t 686 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr) 687 { 688 struct i2c_client *client = to_i2c_client(dev); 689 struct w83781d_data *data = i2c_get_clientdata(client); 690 u32 val; 691 692 val = simple_strtoul(buf, NULL, 10); 693 694 down(&data->update_lock); 695 data->pwm[nr - 1] = PWM_TO_REG(val); 696 w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]); 697 up(&data->update_lock); 698 return count; 699 } 700 701 static ssize_t 702 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr) 703 { 704 struct i2c_client *client = to_i2c_client(dev); 705 struct w83781d_data *data = i2c_get_clientdata(client); 706 u32 val, reg; 707 708 val = simple_strtoul(buf, NULL, 10); 709 710 down(&data->update_lock); 711 712 switch (val) { 713 case 0: 714 case 1: 715 reg = w83781d_read_value(client, W83781D_REG_PWMCLK12); 716 w83781d_write_value(client, W83781D_REG_PWMCLK12, 717 (reg & 0xf7) | (val << 3)); 718 719 reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); 720 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, 721 (reg & 0xef) | (!val << 4)); 722 723 data->pwmenable[nr - 1] = val; 724 break; 725 726 default: 727 up(&data->update_lock); 728 return -EINVAL; 729 } 730 731 up(&data->update_lock); 732 return count; 733 } 734 735 #define sysfs_pwm(offset) \ 736 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 737 { \ 738 return show_pwm_reg(dev, buf, offset); \ 739 } \ 740 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \ 741 const char *buf, size_t count) \ 742 { \ 743 return store_pwm_reg(dev, buf, count, offset); \ 744 } \ 745 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \ 746 show_regs_pwm_##offset, store_regs_pwm_##offset); 747 748 #define sysfs_pwmenable(offset) \ 749 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 750 { \ 751 return show_pwmenable_reg(dev, buf, offset); \ 752 } \ 753 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \ 754 const char *buf, size_t count) \ 755 { \ 756 return store_pwmenable_reg(dev, buf, count, offset); \ 757 } \ 758 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \ 759 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset); 760 761 sysfs_pwm(1); 762 sysfs_pwm(2); 763 sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */ 764 sysfs_pwm(3); 765 sysfs_pwm(4); 766 767 #define device_create_file_pwm(client, offset) \ 768 do { \ 769 device_create_file(&client->dev, &dev_attr_pwm##offset); \ 770 } while (0) 771 772 #define device_create_file_pwmenable(client, offset) \ 773 do { \ 774 device_create_file(&client->dev, &dev_attr_pwm##offset##_enable); \ 775 } while (0) 776 777 static ssize_t 778 show_sensor_reg(struct device *dev, char *buf, int nr) 779 { 780 struct w83781d_data *data = w83781d_update_device(dev); 781 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]); 782 } 783 784 static ssize_t 785 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr) 786 { 787 struct i2c_client *client = to_i2c_client(dev); 788 struct w83781d_data *data = i2c_get_clientdata(client); 789 u32 val, tmp; 790 791 val = simple_strtoul(buf, NULL, 10); 792 793 down(&data->update_lock); 794 795 switch (val) { 796 case 1: /* PII/Celeron diode */ 797 tmp = w83781d_read_value(client, W83781D_REG_SCFG1); 798 w83781d_write_value(client, W83781D_REG_SCFG1, 799 tmp | BIT_SCFG1[nr - 1]); 800 tmp = w83781d_read_value(client, W83781D_REG_SCFG2); 801 w83781d_write_value(client, W83781D_REG_SCFG2, 802 tmp | BIT_SCFG2[nr - 1]); 803 data->sens[nr - 1] = val; 804 break; 805 case 2: /* 3904 */ 806 tmp = w83781d_read_value(client, W83781D_REG_SCFG1); 807 w83781d_write_value(client, W83781D_REG_SCFG1, 808 tmp | BIT_SCFG1[nr - 1]); 809 tmp = w83781d_read_value(client, W83781D_REG_SCFG2); 810 w83781d_write_value(client, W83781D_REG_SCFG2, 811 tmp & ~BIT_SCFG2[nr - 1]); 812 data->sens[nr - 1] = val; 813 break; 814 case W83781D_DEFAULT_BETA: /* thermistor */ 815 tmp = w83781d_read_value(client, W83781D_REG_SCFG1); 816 w83781d_write_value(client, W83781D_REG_SCFG1, 817 tmp & ~BIT_SCFG1[nr - 1]); 818 data->sens[nr - 1] = val; 819 break; 820 default: 821 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n", 822 (long) val, W83781D_DEFAULT_BETA); 823 break; 824 } 825 826 up(&data->update_lock); 827 return count; 828 } 829 830 #define sysfs_sensor(offset) \ 831 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 832 { \ 833 return show_sensor_reg(dev, buf, offset); \ 834 } \ 835 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 836 { \ 837 return store_sensor_reg(dev, buf, count, offset); \ 838 } \ 839 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset); 840 841 sysfs_sensor(1); 842 sysfs_sensor(2); 843 sysfs_sensor(3); 844 845 #define device_create_file_sensor(client, offset) \ 846 do { \ 847 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \ 848 } while (0) 849 850 /* This function is called when: 851 * w83781d_driver is inserted (when this module is loaded), for each 852 available adapter 853 * when a new adapter is inserted (and w83781d_driver is still present) */ 854 static int 855 w83781d_attach_adapter(struct i2c_adapter *adapter) 856 { 857 if (!(adapter->class & I2C_CLASS_HWMON)) 858 return 0; 859 return i2c_detect(adapter, &addr_data, w83781d_detect); 860 } 861 862 /* Assumes that adapter is of I2C, not ISA variety. 863 * OTHERWISE DON'T CALL THIS 864 */ 865 static int 866 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind, 867 struct i2c_client *new_client) 868 { 869 int i, val1 = 0, id; 870 int err; 871 const char *client_name = ""; 872 struct w83781d_data *data = i2c_get_clientdata(new_client); 873 874 data->lm75[0] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL); 875 if (!(data->lm75[0])) { 876 err = -ENOMEM; 877 goto ERROR_SC_0; 878 } 879 memset(data->lm75[0], 0x00, sizeof (struct i2c_client)); 880 881 id = i2c_adapter_id(adapter); 882 883 if (force_subclients[0] == id && force_subclients[1] == address) { 884 for (i = 2; i <= 3; i++) { 885 if (force_subclients[i] < 0x48 || 886 force_subclients[i] > 0x4f) { 887 dev_err(&new_client->dev, "Invalid subclient " 888 "address %d; must be 0x48-0x4f\n", 889 force_subclients[i]); 890 err = -EINVAL; 891 goto ERROR_SC_1; 892 } 893 } 894 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR, 895 (force_subclients[2] & 0x07) | 896 ((force_subclients[3] & 0x07) << 4)); 897 data->lm75[0]->addr = force_subclients[2]; 898 } else { 899 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR); 900 data->lm75[0]->addr = 0x48 + (val1 & 0x07); 901 } 902 903 if (kind != w83783s) { 904 905 data->lm75[1] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL); 906 if (!(data->lm75[1])) { 907 err = -ENOMEM; 908 goto ERROR_SC_1; 909 } 910 memset(data->lm75[1], 0x0, sizeof(struct i2c_client)); 911 912 if (force_subclients[0] == id && 913 force_subclients[1] == address) { 914 data->lm75[1]->addr = force_subclients[3]; 915 } else { 916 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07); 917 } 918 if (data->lm75[0]->addr == data->lm75[1]->addr) { 919 dev_err(&new_client->dev, 920 "Duplicate addresses 0x%x for subclients.\n", 921 data->lm75[0]->addr); 922 err = -EBUSY; 923 goto ERROR_SC_2; 924 } 925 } 926 927 if (kind == w83781d) 928 client_name = "w83781d subclient"; 929 else if (kind == w83782d) 930 client_name = "w83782d subclient"; 931 else if (kind == w83783s) 932 client_name = "w83783s subclient"; 933 else if (kind == w83627hf) 934 client_name = "w83627hf subclient"; 935 else if (kind == as99127f) 936 client_name = "as99127f subclient"; 937 938 for (i = 0; i <= 1; i++) { 939 /* store all data in w83781d */ 940 i2c_set_clientdata(data->lm75[i], NULL); 941 data->lm75[i]->adapter = adapter; 942 data->lm75[i]->driver = &w83781d_driver; 943 data->lm75[i]->flags = 0; 944 strlcpy(data->lm75[i]->name, client_name, 945 I2C_NAME_SIZE); 946 if ((err = i2c_attach_client(data->lm75[i]))) { 947 dev_err(&new_client->dev, "Subclient %d " 948 "registration at address 0x%x " 949 "failed.\n", i, data->lm75[i]->addr); 950 if (i == 1) 951 goto ERROR_SC_3; 952 goto ERROR_SC_2; 953 } 954 if (kind == w83783s) 955 break; 956 } 957 958 return 0; 959 960 /* Undo inits in case of errors */ 961 ERROR_SC_3: 962 i2c_detach_client(data->lm75[0]); 963 ERROR_SC_2: 964 if (NULL != data->lm75[1]) 965 kfree(data->lm75[1]); 966 ERROR_SC_1: 967 if (NULL != data->lm75[0]) 968 kfree(data->lm75[0]); 969 ERROR_SC_0: 970 return err; 971 } 972 973 static int 974 w83781d_detect(struct i2c_adapter *adapter, int address, int kind) 975 { 976 int i = 0, val1 = 0, val2; 977 struct i2c_client *new_client; 978 struct w83781d_data *data; 979 int err; 980 const char *client_name = ""; 981 int is_isa = i2c_is_isa_adapter(adapter); 982 enum vendor { winbond, asus } vendid; 983 984 if (!is_isa 985 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { 986 err = -EINVAL; 987 goto ERROR0; 988 } 989 990 /* Prevent users from forcing a kind for a bus it isn't supposed 991 to possibly be on */ 992 if (is_isa && (kind == as99127f || kind == w83783s)) { 993 dev_err(&adapter->dev, 994 "Cannot force I2C-only chip for ISA address 0x%02x.\n", 995 address); 996 err = -EINVAL; 997 goto ERROR0; 998 } 999 1000 if (is_isa) 1001 if (!request_region(address, W83781D_EXTENT, 1002 w83781d_driver.name)) { 1003 dev_dbg(&adapter->dev, "Request of region " 1004 "0x%x-0x%x for w83781d failed\n", address, 1005 address + W83781D_EXTENT - 1); 1006 err = -EBUSY; 1007 goto ERROR0; 1008 } 1009 1010 /* Probe whether there is anything available on this address. Already 1011 done for SMBus clients */ 1012 if (kind < 0) { 1013 if (is_isa) { 1014 1015 #define REALLY_SLOW_IO 1016 /* We need the timeouts for at least some LM78-like 1017 chips. But only if we read 'undefined' registers. */ 1018 i = inb_p(address + 1); 1019 if (inb_p(address + 2) != i 1020 || inb_p(address + 3) != i 1021 || inb_p(address + 7) != i) { 1022 dev_dbg(&adapter->dev, "Detection of w83781d " 1023 "chip failed at step 1\n"); 1024 err = -ENODEV; 1025 goto ERROR1; 1026 } 1027 #undef REALLY_SLOW_IO 1028 1029 /* Let's just hope nothing breaks here */ 1030 i = inb_p(address + 5) & 0x7f; 1031 outb_p(~i & 0x7f, address + 5); 1032 val2 = inb_p(address + 5) & 0x7f; 1033 if (val2 != (~i & 0x7f)) { 1034 outb_p(i, address + 5); 1035 dev_dbg(&adapter->dev, "Detection of w83781d " 1036 "chip failed at step 2 (0x%x != " 1037 "0x%x at 0x%x)\n", val2, ~i & 0x7f, 1038 address + 5); 1039 err = -ENODEV; 1040 goto ERROR1; 1041 } 1042 } 1043 } 1044 1045 /* OK. For now, we presume we have a valid client. We now create the 1046 client structure, even though we cannot fill it completely yet. 1047 But it allows us to access w83781d_{read,write}_value. */ 1048 1049 if (!(data = kmalloc(sizeof(struct w83781d_data), GFP_KERNEL))) { 1050 err = -ENOMEM; 1051 goto ERROR1; 1052 } 1053 memset(data, 0, sizeof(struct w83781d_data)); 1054 1055 new_client = &data->client; 1056 i2c_set_clientdata(new_client, data); 1057 new_client->addr = address; 1058 init_MUTEX(&data->lock); 1059 new_client->adapter = adapter; 1060 new_client->driver = &w83781d_driver; 1061 new_client->flags = 0; 1062 1063 /* Now, we do the remaining detection. */ 1064 1065 /* The w8378?d may be stuck in some other bank than bank 0. This may 1066 make reading other information impossible. Specify a force=... or 1067 force_*=... parameter, and the Winbond will be reset to the right 1068 bank. */ 1069 if (kind < 0) { 1070 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80) { 1071 dev_dbg(&new_client->dev, "Detection failed at step " 1072 "3\n"); 1073 err = -ENODEV; 1074 goto ERROR2; 1075 } 1076 val1 = w83781d_read_value(new_client, W83781D_REG_BANK); 1077 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN); 1078 /* Check for Winbond or Asus ID if in bank 0 */ 1079 if ((!(val1 & 0x07)) && 1080 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3)) 1081 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) { 1082 dev_dbg(&new_client->dev, "Detection failed at step " 1083 "4\n"); 1084 err = -ENODEV; 1085 goto ERROR2; 1086 } 1087 /* If Winbond SMBus, check address at 0x48. 1088 Asus doesn't support, except for as99127f rev.2 */ 1089 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) || 1090 ((val1 & 0x80) && (val2 == 0x5c)))) { 1091 if (w83781d_read_value 1092 (new_client, W83781D_REG_I2C_ADDR) != address) { 1093 dev_dbg(&new_client->dev, "Detection failed " 1094 "at step 5\n"); 1095 err = -ENODEV; 1096 goto ERROR2; 1097 } 1098 } 1099 } 1100 1101 /* We have either had a force parameter, or we have already detected the 1102 Winbond. Put it now into bank 0 and Vendor ID High Byte */ 1103 w83781d_write_value(new_client, W83781D_REG_BANK, 1104 (w83781d_read_value(new_client, 1105 W83781D_REG_BANK) & 0x78) | 1106 0x80); 1107 1108 /* Determine the chip type. */ 1109 if (kind <= 0) { 1110 /* get vendor ID */ 1111 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN); 1112 if (val2 == 0x5c) 1113 vendid = winbond; 1114 else if (val2 == 0x12) 1115 vendid = asus; 1116 else { 1117 dev_dbg(&new_client->dev, "Chip was made by neither " 1118 "Winbond nor Asus?\n"); 1119 err = -ENODEV; 1120 goto ERROR2; 1121 } 1122 1123 val1 = w83781d_read_value(new_client, W83781D_REG_WCHIPID); 1124 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) 1125 kind = w83781d; 1126 else if (val1 == 0x30 && vendid == winbond) 1127 kind = w83782d; 1128 else if (val1 == 0x40 && vendid == winbond && !is_isa 1129 && address == 0x2d) 1130 kind = w83783s; 1131 else if (val1 == 0x21 && vendid == winbond) 1132 kind = w83627hf; 1133 else if (val1 == 0x31 && !is_isa && address >= 0x28) 1134 kind = as99127f; 1135 else { 1136 if (kind == 0) 1137 dev_warn(&new_client->dev, "Ignoring 'force' " 1138 "parameter for unknown chip at " 1139 "adapter %d, address 0x%02x\n", 1140 i2c_adapter_id(adapter), address); 1141 err = -EINVAL; 1142 goto ERROR2; 1143 } 1144 } 1145 1146 if (kind == w83781d) { 1147 client_name = "w83781d"; 1148 } else if (kind == w83782d) { 1149 client_name = "w83782d"; 1150 } else if (kind == w83783s) { 1151 client_name = "w83783s"; 1152 } else if (kind == w83627hf) { 1153 client_name = "w83627hf"; 1154 } else if (kind == as99127f) { 1155 client_name = "as99127f"; 1156 } 1157 1158 /* Fill in the remaining client fields and put into the global list */ 1159 strlcpy(new_client->name, client_name, I2C_NAME_SIZE); 1160 data->type = kind; 1161 1162 data->valid = 0; 1163 init_MUTEX(&data->update_lock); 1164 1165 /* Tell the I2C layer a new client has arrived */ 1166 if ((err = i2c_attach_client(new_client))) 1167 goto ERROR2; 1168 1169 /* attach secondary i2c lm75-like clients */ 1170 if (!is_isa) { 1171 if ((err = w83781d_detect_subclients(adapter, address, 1172 kind, new_client))) 1173 goto ERROR3; 1174 } else { 1175 data->lm75[0] = NULL; 1176 data->lm75[1] = NULL; 1177 } 1178 1179 /* Initialize the chip */ 1180 w83781d_init_client(new_client); 1181 1182 /* A few vars need to be filled upon startup */ 1183 for (i = 1; i <= 3; i++) { 1184 data->fan_min[i - 1] = w83781d_read_value(new_client, 1185 W83781D_REG_FAN_MIN(i)); 1186 } 1187 if (kind != w83781d && kind != as99127f) 1188 for (i = 0; i < 4; i++) 1189 data->pwmenable[i] = 1; 1190 1191 /* Register sysfs hooks */ 1192 device_create_file_in(new_client, 0); 1193 if (kind != w83783s) 1194 device_create_file_in(new_client, 1); 1195 device_create_file_in(new_client, 2); 1196 device_create_file_in(new_client, 3); 1197 device_create_file_in(new_client, 4); 1198 device_create_file_in(new_client, 5); 1199 device_create_file_in(new_client, 6); 1200 if (kind != as99127f && kind != w83781d && kind != w83783s) { 1201 device_create_file_in(new_client, 7); 1202 device_create_file_in(new_client, 8); 1203 } 1204 1205 device_create_file_fan(new_client, 1); 1206 device_create_file_fan(new_client, 2); 1207 device_create_file_fan(new_client, 3); 1208 1209 device_create_file_temp(new_client, 1); 1210 device_create_file_temp(new_client, 2); 1211 if (kind != w83783s) 1212 device_create_file_temp(new_client, 3); 1213 1214 device_create_file_vid(new_client); 1215 device_create_file_vrm(new_client); 1216 1217 device_create_file_fan_div(new_client, 1); 1218 device_create_file_fan_div(new_client, 2); 1219 device_create_file_fan_div(new_client, 3); 1220 1221 device_create_file_alarms(new_client); 1222 1223 device_create_file_beep(new_client); 1224 1225 if (kind != w83781d && kind != as99127f) { 1226 device_create_file_pwm(new_client, 1); 1227 device_create_file_pwm(new_client, 2); 1228 device_create_file_pwmenable(new_client, 2); 1229 } 1230 if (kind == w83782d && !is_isa) { 1231 device_create_file_pwm(new_client, 3); 1232 device_create_file_pwm(new_client, 4); 1233 } 1234 1235 if (kind != as99127f && kind != w83781d) { 1236 device_create_file_sensor(new_client, 1); 1237 device_create_file_sensor(new_client, 2); 1238 if (kind != w83783s) 1239 device_create_file_sensor(new_client, 3); 1240 } 1241 1242 return 0; 1243 1244 ERROR3: 1245 i2c_detach_client(new_client); 1246 ERROR2: 1247 kfree(data); 1248 ERROR1: 1249 if (is_isa) 1250 release_region(address, W83781D_EXTENT); 1251 ERROR0: 1252 return err; 1253 } 1254 1255 static int 1256 w83781d_detach_client(struct i2c_client *client) 1257 { 1258 int err; 1259 1260 if (i2c_is_isa_client(client)) 1261 release_region(client->addr, W83781D_EXTENT); 1262 1263 if ((err = i2c_detach_client(client))) { 1264 dev_err(&client->dev, 1265 "Client deregistration failed, client not detached.\n"); 1266 return err; 1267 } 1268 1269 if (i2c_get_clientdata(client)==NULL) { 1270 /* subclients */ 1271 kfree(client); 1272 } else { 1273 /* main client */ 1274 kfree(i2c_get_clientdata(client)); 1275 } 1276 1277 return 0; 1278 } 1279 1280 /* The SMBus locks itself, usually, but nothing may access the Winbond between 1281 bank switches. ISA access must always be locked explicitly! 1282 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks, 1283 would slow down the W83781D access and should not be necessary. 1284 There are some ugly typecasts here, but the good news is - they should 1285 nowhere else be necessary! */ 1286 static int 1287 w83781d_read_value(struct i2c_client *client, u16 reg) 1288 { 1289 struct w83781d_data *data = i2c_get_clientdata(client); 1290 int res, word_sized, bank; 1291 struct i2c_client *cl; 1292 1293 down(&data->lock); 1294 if (i2c_is_isa_client(client)) { 1295 word_sized = (((reg & 0xff00) == 0x100) 1296 || ((reg & 0xff00) == 0x200)) 1297 && (((reg & 0x00ff) == 0x50) 1298 || ((reg & 0x00ff) == 0x53) 1299 || ((reg & 0x00ff) == 0x55)); 1300 if (reg & 0xff00) { 1301 outb_p(W83781D_REG_BANK, 1302 client->addr + W83781D_ADDR_REG_OFFSET); 1303 outb_p(reg >> 8, 1304 client->addr + W83781D_DATA_REG_OFFSET); 1305 } 1306 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); 1307 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET); 1308 if (word_sized) { 1309 outb_p((reg & 0xff) + 1, 1310 client->addr + W83781D_ADDR_REG_OFFSET); 1311 res = 1312 (res << 8) + inb_p(client->addr + 1313 W83781D_DATA_REG_OFFSET); 1314 } 1315 if (reg & 0xff00) { 1316 outb_p(W83781D_REG_BANK, 1317 client->addr + W83781D_ADDR_REG_OFFSET); 1318 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); 1319 } 1320 } else { 1321 bank = (reg >> 8) & 0x0f; 1322 if (bank > 2) 1323 /* switch banks */ 1324 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1325 bank); 1326 if (bank == 0 || bank > 2) { 1327 res = i2c_smbus_read_byte_data(client, reg & 0xff); 1328 } else { 1329 /* switch to subclient */ 1330 cl = data->lm75[bank - 1]; 1331 /* convert from ISA to LM75 I2C addresses */ 1332 switch (reg & 0xff) { 1333 case 0x50: /* TEMP */ 1334 res = swab16(i2c_smbus_read_word_data(cl, 0)); 1335 break; 1336 case 0x52: /* CONFIG */ 1337 res = i2c_smbus_read_byte_data(cl, 1); 1338 break; 1339 case 0x53: /* HYST */ 1340 res = swab16(i2c_smbus_read_word_data(cl, 2)); 1341 break; 1342 case 0x55: /* OVER */ 1343 default: 1344 res = swab16(i2c_smbus_read_word_data(cl, 3)); 1345 break; 1346 } 1347 } 1348 if (bank > 2) 1349 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); 1350 } 1351 up(&data->lock); 1352 return res; 1353 } 1354 1355 static int 1356 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value) 1357 { 1358 struct w83781d_data *data = i2c_get_clientdata(client); 1359 int word_sized, bank; 1360 struct i2c_client *cl; 1361 1362 down(&data->lock); 1363 if (i2c_is_isa_client(client)) { 1364 word_sized = (((reg & 0xff00) == 0x100) 1365 || ((reg & 0xff00) == 0x200)) 1366 && (((reg & 0x00ff) == 0x53) 1367 || ((reg & 0x00ff) == 0x55)); 1368 if (reg & 0xff00) { 1369 outb_p(W83781D_REG_BANK, 1370 client->addr + W83781D_ADDR_REG_OFFSET); 1371 outb_p(reg >> 8, 1372 client->addr + W83781D_DATA_REG_OFFSET); 1373 } 1374 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET); 1375 if (word_sized) { 1376 outb_p(value >> 8, 1377 client->addr + W83781D_DATA_REG_OFFSET); 1378 outb_p((reg & 0xff) + 1, 1379 client->addr + W83781D_ADDR_REG_OFFSET); 1380 } 1381 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET); 1382 if (reg & 0xff00) { 1383 outb_p(W83781D_REG_BANK, 1384 client->addr + W83781D_ADDR_REG_OFFSET); 1385 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET); 1386 } 1387 } else { 1388 bank = (reg >> 8) & 0x0f; 1389 if (bank > 2) 1390 /* switch banks */ 1391 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 1392 bank); 1393 if (bank == 0 || bank > 2) { 1394 i2c_smbus_write_byte_data(client, reg & 0xff, 1395 value & 0xff); 1396 } else { 1397 /* switch to subclient */ 1398 cl = data->lm75[bank - 1]; 1399 /* convert from ISA to LM75 I2C addresses */ 1400 switch (reg & 0xff) { 1401 case 0x52: /* CONFIG */ 1402 i2c_smbus_write_byte_data(cl, 1, value & 0xff); 1403 break; 1404 case 0x53: /* HYST */ 1405 i2c_smbus_write_word_data(cl, 2, swab16(value)); 1406 break; 1407 case 0x55: /* OVER */ 1408 i2c_smbus_write_word_data(cl, 3, swab16(value)); 1409 break; 1410 } 1411 } 1412 if (bank > 2) 1413 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0); 1414 } 1415 up(&data->lock); 1416 return 0; 1417 } 1418 1419 /* Called when we have found a new W83781D. It should set limits, etc. */ 1420 static void 1421 w83781d_init_client(struct i2c_client *client) 1422 { 1423 struct w83781d_data *data = i2c_get_clientdata(client); 1424 int i, p; 1425 int type = data->type; 1426 u8 tmp; 1427 1428 if (init && type != as99127f) { /* this resets registers we don't have 1429 documentation for on the as99127f */ 1430 /* save these registers */ 1431 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); 1432 p = w83781d_read_value(client, W83781D_REG_PWMCLK12); 1433 /* Reset all except Watchdog values and last conversion values 1434 This sets fan-divs to 2, among others */ 1435 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80); 1436 /* Restore the registers and disable power-on abnormal beep. 1437 This saves FAN 1/2/3 input/output values set by BIOS. */ 1438 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80); 1439 w83781d_write_value(client, W83781D_REG_PWMCLK12, p); 1440 /* Disable master beep-enable (reset turns it on). 1441 Individual beep_mask should be reset to off but for some reason 1442 disabling this bit helps some people not get beeped */ 1443 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0); 1444 } 1445 1446 data->vrm = i2c_which_vrm(); 1447 1448 if ((type != w83781d) && (type != as99127f)) { 1449 tmp = w83781d_read_value(client, W83781D_REG_SCFG1); 1450 for (i = 1; i <= 3; i++) { 1451 if (!(tmp & BIT_SCFG1[i - 1])) { 1452 data->sens[i - 1] = W83781D_DEFAULT_BETA; 1453 } else { 1454 if (w83781d_read_value 1455 (client, 1456 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) 1457 data->sens[i - 1] = 1; 1458 else 1459 data->sens[i - 1] = 2; 1460 } 1461 if (type == w83783s && i == 2) 1462 break; 1463 } 1464 } 1465 1466 if (init && type != as99127f) { 1467 /* Enable temp2 */ 1468 tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG); 1469 if (tmp & 0x01) { 1470 dev_warn(&client->dev, "Enabling temp2, readings " 1471 "might not make sense\n"); 1472 w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG, 1473 tmp & 0xfe); 1474 } 1475 1476 /* Enable temp3 */ 1477 if (type != w83783s) { 1478 tmp = w83781d_read_value(client, 1479 W83781D_REG_TEMP3_CONFIG); 1480 if (tmp & 0x01) { 1481 dev_warn(&client->dev, "Enabling temp3, " 1482 "readings might not make sense\n"); 1483 w83781d_write_value(client, 1484 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); 1485 } 1486 } 1487 1488 if (type != w83781d) { 1489 /* enable comparator mode for temp2 and temp3 so 1490 alarm indication will work correctly */ 1491 i = w83781d_read_value(client, W83781D_REG_IRQ); 1492 if (!(i & 0x40)) 1493 w83781d_write_value(client, W83781D_REG_IRQ, 1494 i | 0x40); 1495 } 1496 } 1497 1498 /* Start monitoring */ 1499 w83781d_write_value(client, W83781D_REG_CONFIG, 1500 (w83781d_read_value(client, 1501 W83781D_REG_CONFIG) & 0xf7) 1502 | 0x01); 1503 } 1504 1505 static struct w83781d_data *w83781d_update_device(struct device *dev) 1506 { 1507 struct i2c_client *client = to_i2c_client(dev); 1508 struct w83781d_data *data = i2c_get_clientdata(client); 1509 int i; 1510 1511 down(&data->update_lock); 1512 1513 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1514 || !data->valid) { 1515 dev_dbg(dev, "Starting device update\n"); 1516 1517 for (i = 0; i <= 8; i++) { 1518 if (data->type == w83783s && i == 1) 1519 continue; /* 783S has no in1 */ 1520 data->in[i] = 1521 w83781d_read_value(client, W83781D_REG_IN(i)); 1522 data->in_min[i] = 1523 w83781d_read_value(client, W83781D_REG_IN_MIN(i)); 1524 data->in_max[i] = 1525 w83781d_read_value(client, W83781D_REG_IN_MAX(i)); 1526 if ((data->type != w83782d) 1527 && (data->type != w83627hf) && (i == 6)) 1528 break; 1529 } 1530 for (i = 1; i <= 3; i++) { 1531 data->fan[i - 1] = 1532 w83781d_read_value(client, W83781D_REG_FAN(i)); 1533 data->fan_min[i - 1] = 1534 w83781d_read_value(client, W83781D_REG_FAN_MIN(i)); 1535 } 1536 if (data->type != w83781d && data->type != as99127f) { 1537 for (i = 1; i <= 4; i++) { 1538 data->pwm[i - 1] = 1539 w83781d_read_value(client, 1540 W83781D_REG_PWM(i)); 1541 if ((data->type != w83782d 1542 || i2c_is_isa_client(client)) 1543 && i == 2) 1544 break; 1545 } 1546 /* Only PWM2 can be disabled */ 1547 data->pwmenable[1] = (w83781d_read_value(client, 1548 W83781D_REG_PWMCLK12) & 0x08) >> 3; 1549 } 1550 1551 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1)); 1552 data->temp_max = 1553 w83781d_read_value(client, W83781D_REG_TEMP_OVER(1)); 1554 data->temp_max_hyst = 1555 w83781d_read_value(client, W83781D_REG_TEMP_HYST(1)); 1556 data->temp_add[0] = 1557 w83781d_read_value(client, W83781D_REG_TEMP(2)); 1558 data->temp_max_add[0] = 1559 w83781d_read_value(client, W83781D_REG_TEMP_OVER(2)); 1560 data->temp_max_hyst_add[0] = 1561 w83781d_read_value(client, W83781D_REG_TEMP_HYST(2)); 1562 if (data->type != w83783s) { 1563 data->temp_add[1] = 1564 w83781d_read_value(client, W83781D_REG_TEMP(3)); 1565 data->temp_max_add[1] = 1566 w83781d_read_value(client, 1567 W83781D_REG_TEMP_OVER(3)); 1568 data->temp_max_hyst_add[1] = 1569 w83781d_read_value(client, 1570 W83781D_REG_TEMP_HYST(3)); 1571 } 1572 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV); 1573 data->vid = i & 0x0f; 1574 data->vid |= (w83781d_read_value(client, 1575 W83781D_REG_CHIPID) & 0x01) << 4; 1576 data->fan_div[0] = (i >> 4) & 0x03; 1577 data->fan_div[1] = (i >> 6) & 0x03; 1578 data->fan_div[2] = (w83781d_read_value(client, 1579 W83781D_REG_PIN) >> 6) & 0x03; 1580 if ((data->type != w83781d) && (data->type != as99127f)) { 1581 i = w83781d_read_value(client, W83781D_REG_VBAT); 1582 data->fan_div[0] |= (i >> 3) & 0x04; 1583 data->fan_div[1] |= (i >> 4) & 0x04; 1584 data->fan_div[2] |= (i >> 5) & 0x04; 1585 } 1586 data->alarms = 1587 w83781d_read_value(client, 1588 W83781D_REG_ALARM1) + 1589 (w83781d_read_value(client, W83781D_REG_ALARM2) << 8); 1590 if ((data->type == w83782d) || (data->type == w83627hf)) { 1591 data->alarms |= 1592 w83781d_read_value(client, 1593 W83781D_REG_ALARM3) << 16; 1594 } 1595 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2); 1596 data->beep_enable = i >> 7; 1597 data->beep_mask = ((i & 0x7f) << 8) + 1598 w83781d_read_value(client, W83781D_REG_BEEP_INTS1); 1599 if ((data->type != w83781d) && (data->type != as99127f)) { 1600 data->beep_mask |= 1601 w83781d_read_value(client, 1602 W83781D_REG_BEEP_INTS3) << 16; 1603 } 1604 data->last_updated = jiffies; 1605 data->valid = 1; 1606 } 1607 1608 up(&data->update_lock); 1609 1610 return data; 1611 } 1612 1613 static int __init 1614 sensors_w83781d_init(void) 1615 { 1616 return i2c_add_driver(&w83781d_driver); 1617 } 1618 1619 static void __exit 1620 sensors_w83781d_exit(void) 1621 { 1622 i2c_del_driver(&w83781d_driver); 1623 } 1624 1625 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " 1626 "Philip Edelbrock <phil@netroedge.com>, " 1627 "and Mark Studebaker <mdsxyz123@yahoo.com>"); 1628 MODULE_DESCRIPTION("W83781D driver"); 1629 MODULE_LICENSE("GPL"); 1630 1631 module_init(sensors_w83781d_init); 1632 module_exit(sensors_w83781d_exit); 1633