1 /* 2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware 3 monitoring 4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>, 5 Philip Edelbrock <phil@netroedge.com>, 6 and Mark Studebaker <mdsxyz123@yahoo.com> 7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org> 8 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org> 9 10 This program is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 2 of the License, or 13 (at your option) any later version. 14 15 This program is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software 22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 /* 26 Supports following chips: 27 28 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA 29 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC) 30 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) 31 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC) 32 w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) 33 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC) 34 35 For other winbond chips, and for i2c support in the above chips, 36 use w83781d.c. 37 38 Note: automatic ("cruise") fan control for 697, 637 & 627thf not 39 supported yet. 40 */ 41 42 #include <linux/module.h> 43 #include <linux/init.h> 44 #include <linux/slab.h> 45 #include <linux/jiffies.h> 46 #include <linux/platform_device.h> 47 #include <linux/hwmon.h> 48 #include <linux/hwmon-sysfs.h> 49 #include <linux/hwmon-vid.h> 50 #include <linux/err.h> 51 #include <linux/mutex.h> 52 #include <linux/ioport.h> 53 #include <asm/io.h> 54 #include "lm75.h" 55 56 static struct platform_device *pdev; 57 58 #define DRVNAME "w83627hf" 59 enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf }; 60 61 static u16 force_addr; 62 module_param(force_addr, ushort, 0); 63 MODULE_PARM_DESC(force_addr, 64 "Initialize the base address of the sensors"); 65 static u8 force_i2c = 0x1f; 66 module_param(force_i2c, byte, 0); 67 MODULE_PARM_DESC(force_i2c, 68 "Initialize the i2c address of the sensors"); 69 70 static int reset; 71 module_param(reset, bool, 0); 72 MODULE_PARM_DESC(reset, "Set to one to reset chip on load"); 73 74 static int init = 1; 75 module_param(init, bool, 0); 76 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization"); 77 78 /* modified from kernel/include/traps.c */ 79 static int REG; /* The register to read/write */ 80 #define DEV 0x07 /* Register: Logical device select */ 81 static int VAL; /* The value to read/write */ 82 83 /* logical device numbers for superio_select (below) */ 84 #define W83627HF_LD_FDC 0x00 85 #define W83627HF_LD_PRT 0x01 86 #define W83627HF_LD_UART1 0x02 87 #define W83627HF_LD_UART2 0x03 88 #define W83627HF_LD_KBC 0x05 89 #define W83627HF_LD_CIR 0x06 /* w83627hf only */ 90 #define W83627HF_LD_GAME 0x07 91 #define W83627HF_LD_MIDI 0x07 92 #define W83627HF_LD_GPIO1 0x07 93 #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */ 94 #define W83627HF_LD_GPIO2 0x08 95 #define W83627HF_LD_GPIO3 0x09 96 #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */ 97 #define W83627HF_LD_ACPI 0x0a 98 #define W83627HF_LD_HWM 0x0b 99 100 #define DEVID 0x20 /* Register: Device ID */ 101 102 #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */ 103 #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */ 104 #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */ 105 106 #define W83687THF_VID_EN 0x29 /* w83687thf only */ 107 #define W83687THF_VID_CFG 0xF0 /* w83687thf only */ 108 #define W83687THF_VID_DATA 0xF1 /* w83687thf only */ 109 110 static inline void 111 superio_outb(int reg, int val) 112 { 113 outb(reg, REG); 114 outb(val, VAL); 115 } 116 117 static inline int 118 superio_inb(int reg) 119 { 120 outb(reg, REG); 121 return inb(VAL); 122 } 123 124 static inline void 125 superio_select(int ld) 126 { 127 outb(DEV, REG); 128 outb(ld, VAL); 129 } 130 131 static inline void 132 superio_enter(void) 133 { 134 outb(0x87, REG); 135 outb(0x87, REG); 136 } 137 138 static inline void 139 superio_exit(void) 140 { 141 outb(0xAA, REG); 142 } 143 144 #define W627_DEVID 0x52 145 #define W627THF_DEVID 0x82 146 #define W697_DEVID 0x60 147 #define W637_DEVID 0x70 148 #define W687THF_DEVID 0x85 149 #define WINB_ACT_REG 0x30 150 #define WINB_BASE_REG 0x60 151 /* Constants specified below */ 152 153 /* Alignment of the base address */ 154 #define WINB_ALIGNMENT ~7 155 156 /* Offset & size of I/O region we are interested in */ 157 #define WINB_REGION_OFFSET 5 158 #define WINB_REGION_SIZE 2 159 160 /* Where are the sensors address/data registers relative to the region offset */ 161 #define W83781D_ADDR_REG_OFFSET 0 162 #define W83781D_DATA_REG_OFFSET 1 163 164 /* The W83781D registers */ 165 /* The W83782D registers for nr=7,8 are in bank 5 */ 166 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ 167 (0x554 + (((nr) - 7) * 2))) 168 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ 169 (0x555 + (((nr) - 7) * 2))) 170 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ 171 (0x550 + (nr) - 7)) 172 173 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr)) 174 #define W83781D_REG_FAN(nr) (0x27 + (nr)) 175 176 #define W83781D_REG_TEMP2_CONFIG 0x152 177 #define W83781D_REG_TEMP3_CONFIG 0x252 178 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \ 179 ((nr == 2) ? (0x0150) : \ 180 (0x27))) 181 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \ 182 ((nr == 2) ? (0x153) : \ 183 (0x3A))) 184 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \ 185 ((nr == 2) ? (0x155) : \ 186 (0x39))) 187 188 #define W83781D_REG_BANK 0x4E 189 190 #define W83781D_REG_CONFIG 0x40 191 #define W83781D_REG_ALARM1 0x459 192 #define W83781D_REG_ALARM2 0x45A 193 #define W83781D_REG_ALARM3 0x45B 194 195 #define W83781D_REG_BEEP_CONFIG 0x4D 196 #define W83781D_REG_BEEP_INTS1 0x56 197 #define W83781D_REG_BEEP_INTS2 0x57 198 #define W83781D_REG_BEEP_INTS3 0x453 199 200 #define W83781D_REG_VID_FANDIV 0x47 201 202 #define W83781D_REG_CHIPID 0x49 203 #define W83781D_REG_WCHIPID 0x58 204 #define W83781D_REG_CHIPMAN 0x4F 205 #define W83781D_REG_PIN 0x4B 206 207 #define W83781D_REG_VBAT 0x5D 208 209 #define W83627HF_REG_PWM1 0x5A 210 #define W83627HF_REG_PWM2 0x5B 211 212 #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */ 213 #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */ 214 #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */ 215 216 #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */ 217 218 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 }; 219 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2, 220 W83627THF_REG_PWM3 }; 221 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \ 222 regpwm_627hf[nr] : regpwm[nr]) 223 224 #define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */ 225 226 #define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */ 227 #define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */ 228 #define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */ 229 230 static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1, 231 W83637HF_REG_PWM_FREQ2, 232 W83637HF_REG_PWM_FREQ3 }; 233 234 #define W83627HF_BASE_PWM_FREQ 46870 235 236 #define W83781D_REG_I2C_ADDR 0x48 237 #define W83781D_REG_I2C_SUBADDR 0x4A 238 239 /* Sensor selection */ 240 #define W83781D_REG_SCFG1 0x5D 241 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 }; 242 #define W83781D_REG_SCFG2 0x59 243 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 }; 244 #define W83781D_DEFAULT_BETA 3435 245 246 /* Conversions. Limit checking is only done on the TO_REG 247 variants. Note that you should be a bit careful with which arguments 248 these macros are called: arguments may be evaluated more than once. 249 Fixing this is just not worth it. */ 250 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255)) 251 #define IN_FROM_REG(val) ((val) * 16) 252 253 static inline u8 FAN_TO_REG(long rpm, int div) 254 { 255 if (rpm == 0) 256 return 255; 257 rpm = SENSORS_LIMIT(rpm, 1, 1000000); 258 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 259 254); 260 } 261 262 #define TEMP_MIN (-128000) 263 #define TEMP_MAX ( 127000) 264 265 /* TEMP: 0.001C/bit (-128C to +127C) 266 REG: 1C/bit, two's complement */ 267 static u8 TEMP_TO_REG(long temp) 268 { 269 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX); 270 ntemp += (ntemp<0 ? -500 : 500); 271 return (u8)(ntemp / 1000); 272 } 273 274 static int TEMP_FROM_REG(u8 reg) 275 { 276 return (s8)reg * 1000; 277 } 278 279 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div))) 280 281 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) 282 283 static inline unsigned long pwm_freq_from_reg_627hf(u8 reg) 284 { 285 unsigned long freq; 286 freq = W83627HF_BASE_PWM_FREQ >> reg; 287 return freq; 288 } 289 static inline u8 pwm_freq_to_reg_627hf(unsigned long val) 290 { 291 u8 i; 292 /* Only 5 dividers (1 2 4 8 16) 293 Search for the nearest available frequency */ 294 for (i = 0; i < 4; i++) { 295 if (val > (((W83627HF_BASE_PWM_FREQ >> i) + 296 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2)) 297 break; 298 } 299 return i; 300 } 301 302 static inline unsigned long pwm_freq_from_reg(u8 reg) 303 { 304 /* Clock bit 8 -> 180 kHz or 24 MHz */ 305 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL; 306 307 reg &= 0x7f; 308 /* This should not happen but anyway... */ 309 if (reg == 0) 310 reg++; 311 return (clock / (reg << 8)); 312 } 313 static inline u8 pwm_freq_to_reg(unsigned long val) 314 { 315 /* Minimum divider value is 0x01 and maximum is 0x7F */ 316 if (val >= 93750) /* The highest we can do */ 317 return 0x01; 318 if (val >= 720) /* Use 24 MHz clock */ 319 return (24000000UL / (val << 8)); 320 if (val < 6) /* The lowest we can do */ 321 return 0xFF; 322 else /* Use 180 kHz clock */ 323 return (0x80 | (180000UL / (val << 8))); 324 } 325 326 #define BEEP_MASK_FROM_REG(val) (val) 327 #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff) 328 #define BEEP_ENABLE_TO_REG(val) ((val)?1:0) 329 #define BEEP_ENABLE_FROM_REG(val) ((val)?1:0) 330 331 #define DIV_FROM_REG(val) (1 << (val)) 332 333 static inline u8 DIV_TO_REG(long val) 334 { 335 int i; 336 val = SENSORS_LIMIT(val, 1, 128) >> 1; 337 for (i = 0; i < 7; i++) { 338 if (val == 0) 339 break; 340 val >>= 1; 341 } 342 return ((u8) i); 343 } 344 345 /* For each registered chip, we need to keep some data in memory. 346 The structure is dynamically allocated. */ 347 struct w83627hf_data { 348 unsigned short addr; 349 const char *name; 350 struct device *hwmon_dev; 351 struct mutex lock; 352 enum chips type; 353 354 struct mutex update_lock; 355 char valid; /* !=0 if following fields are valid */ 356 unsigned long last_updated; /* In jiffies */ 357 358 u8 in[9]; /* Register value */ 359 u8 in_max[9]; /* Register value */ 360 u8 in_min[9]; /* Register value */ 361 u8 fan[3]; /* Register value */ 362 u8 fan_min[3]; /* Register value */ 363 u8 temp; 364 u8 temp_max; /* Register value */ 365 u8 temp_max_hyst; /* Register value */ 366 u16 temp_add[2]; /* Register value */ 367 u16 temp_max_add[2]; /* Register value */ 368 u16 temp_max_hyst_add[2]; /* Register value */ 369 u8 fan_div[3]; /* Register encoding, shifted right */ 370 u8 vid; /* Register encoding, combined */ 371 u32 alarms; /* Register encoding, combined */ 372 u32 beep_mask; /* Register encoding, combined */ 373 u8 beep_enable; /* Boolean */ 374 u8 pwm[3]; /* Register value */ 375 u8 pwm_freq[3]; /* Register value */ 376 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode; 377 4 = thermistor */ 378 u8 vrm; 379 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */ 380 }; 381 382 struct w83627hf_sio_data { 383 enum chips type; 384 }; 385 386 387 static int w83627hf_probe(struct platform_device *pdev); 388 static int __devexit w83627hf_remove(struct platform_device *pdev); 389 390 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg); 391 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value); 392 static void w83627hf_update_fan_div(struct w83627hf_data *data); 393 static struct w83627hf_data *w83627hf_update_device(struct device *dev); 394 static void w83627hf_init_device(struct platform_device *pdev); 395 396 static struct platform_driver w83627hf_driver = { 397 .driver = { 398 .owner = THIS_MODULE, 399 .name = DRVNAME, 400 }, 401 .probe = w83627hf_probe, 402 .remove = __devexit_p(w83627hf_remove), 403 }; 404 405 static ssize_t 406 show_in_input(struct device *dev, struct device_attribute *devattr, char *buf) 407 { 408 int nr = to_sensor_dev_attr(devattr)->index; 409 struct w83627hf_data *data = w83627hf_update_device(dev); 410 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr])); 411 } 412 static ssize_t 413 show_in_min(struct device *dev, struct device_attribute *devattr, char *buf) 414 { 415 int nr = to_sensor_dev_attr(devattr)->index; 416 struct w83627hf_data *data = w83627hf_update_device(dev); 417 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr])); 418 } 419 static ssize_t 420 show_in_max(struct device *dev, struct device_attribute *devattr, char *buf) 421 { 422 int nr = to_sensor_dev_attr(devattr)->index; 423 struct w83627hf_data *data = w83627hf_update_device(dev); 424 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr])); 425 } 426 static ssize_t 427 store_in_min(struct device *dev, struct device_attribute *devattr, 428 const char *buf, size_t count) 429 { 430 int nr = to_sensor_dev_attr(devattr)->index; 431 struct w83627hf_data *data = dev_get_drvdata(dev); 432 long val = simple_strtol(buf, NULL, 10); 433 434 mutex_lock(&data->update_lock); 435 data->in_min[nr] = IN_TO_REG(val); 436 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]); 437 mutex_unlock(&data->update_lock); 438 return count; 439 } 440 static ssize_t 441 store_in_max(struct device *dev, struct device_attribute *devattr, 442 const char *buf, size_t count) 443 { 444 int nr = to_sensor_dev_attr(devattr)->index; 445 struct w83627hf_data *data = dev_get_drvdata(dev); 446 long val = simple_strtol(buf, NULL, 10); 447 448 mutex_lock(&data->update_lock); 449 data->in_max[nr] = IN_TO_REG(val); 450 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]); 451 mutex_unlock(&data->update_lock); 452 return count; 453 } 454 #define sysfs_vin_decl(offset) \ 455 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \ 456 show_in_input, NULL, offset); \ 457 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \ 458 show_in_min, store_in_min, offset); \ 459 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \ 460 show_in_max, store_in_max, offset); 461 462 sysfs_vin_decl(1); 463 sysfs_vin_decl(2); 464 sysfs_vin_decl(3); 465 sysfs_vin_decl(4); 466 sysfs_vin_decl(5); 467 sysfs_vin_decl(6); 468 sysfs_vin_decl(7); 469 sysfs_vin_decl(8); 470 471 /* use a different set of functions for in0 */ 472 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg) 473 { 474 long in0; 475 476 if ((data->vrm_ovt & 0x01) && 477 (w83627thf == data->type || w83637hf == data->type 478 || w83687thf == data->type)) 479 480 /* use VRM9 calculation */ 481 in0 = (long)((reg * 488 + 70000 + 50) / 100); 482 else 483 /* use VRM8 (standard) calculation */ 484 in0 = (long)IN_FROM_REG(reg); 485 486 return sprintf(buf,"%ld\n", in0); 487 } 488 489 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf) 490 { 491 struct w83627hf_data *data = w83627hf_update_device(dev); 492 return show_in_0(data, buf, data->in[0]); 493 } 494 495 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf) 496 { 497 struct w83627hf_data *data = w83627hf_update_device(dev); 498 return show_in_0(data, buf, data->in_min[0]); 499 } 500 501 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf) 502 { 503 struct w83627hf_data *data = w83627hf_update_device(dev); 504 return show_in_0(data, buf, data->in_max[0]); 505 } 506 507 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr, 508 const char *buf, size_t count) 509 { 510 struct w83627hf_data *data = dev_get_drvdata(dev); 511 u32 val; 512 513 val = simple_strtoul(buf, NULL, 10); 514 515 mutex_lock(&data->update_lock); 516 517 if ((data->vrm_ovt & 0x01) && 518 (w83627thf == data->type || w83637hf == data->type 519 || w83687thf == data->type)) 520 521 /* use VRM9 calculation */ 522 data->in_min[0] = 523 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0, 524 255); 525 else 526 /* use VRM8 (standard) calculation */ 527 data->in_min[0] = IN_TO_REG(val); 528 529 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]); 530 mutex_unlock(&data->update_lock); 531 return count; 532 } 533 534 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr, 535 const char *buf, size_t count) 536 { 537 struct w83627hf_data *data = dev_get_drvdata(dev); 538 u32 val; 539 540 val = simple_strtoul(buf, NULL, 10); 541 542 mutex_lock(&data->update_lock); 543 544 if ((data->vrm_ovt & 0x01) && 545 (w83627thf == data->type || w83637hf == data->type 546 || w83687thf == data->type)) 547 548 /* use VRM9 calculation */ 549 data->in_max[0] = 550 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0, 551 255); 552 else 553 /* use VRM8 (standard) calculation */ 554 data->in_max[0] = IN_TO_REG(val); 555 556 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]); 557 mutex_unlock(&data->update_lock); 558 return count; 559 } 560 561 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL); 562 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR, 563 show_regs_in_min0, store_regs_in_min0); 564 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR, 565 show_regs_in_max0, store_regs_in_max0); 566 567 static ssize_t 568 show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf) 569 { 570 int nr = to_sensor_dev_attr(devattr)->index; 571 struct w83627hf_data *data = w83627hf_update_device(dev); 572 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr], 573 (long)DIV_FROM_REG(data->fan_div[nr]))); 574 } 575 static ssize_t 576 show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf) 577 { 578 int nr = to_sensor_dev_attr(devattr)->index; 579 struct w83627hf_data *data = w83627hf_update_device(dev); 580 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr], 581 (long)DIV_FROM_REG(data->fan_div[nr]))); 582 } 583 static ssize_t 584 store_fan_min(struct device *dev, struct device_attribute *devattr, 585 const char *buf, size_t count) 586 { 587 int nr = to_sensor_dev_attr(devattr)->index; 588 struct w83627hf_data *data = dev_get_drvdata(dev); 589 u32 val = simple_strtoul(buf, NULL, 10); 590 591 mutex_lock(&data->update_lock); 592 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); 593 w83627hf_write_value(data, W83781D_REG_FAN_MIN(nr+1), 594 data->fan_min[nr]); 595 596 mutex_unlock(&data->update_lock); 597 return count; 598 } 599 #define sysfs_fan_decl(offset) \ 600 static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \ 601 show_fan_input, NULL, offset - 1); \ 602 static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \ 603 show_fan_min, store_fan_min, offset - 1); 604 605 sysfs_fan_decl(1); 606 sysfs_fan_decl(2); 607 sysfs_fan_decl(3); 608 609 static ssize_t 610 show_temp(struct device *dev, struct device_attribute *devattr, char *buf) 611 { 612 int nr = to_sensor_dev_attr(devattr)->index; 613 struct w83627hf_data *data = w83627hf_update_device(dev); 614 if (nr >= 2) { /* TEMP2 and TEMP3 */ 615 return sprintf(buf, "%ld\n", 616 (long)LM75_TEMP_FROM_REG(data->temp_add[nr-2])); 617 } else { /* TEMP1 */ 618 return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->temp)); 619 } 620 } 621 622 static ssize_t 623 show_temp_max(struct device *dev, struct device_attribute *devattr, 624 char *buf) 625 { 626 int nr = to_sensor_dev_attr(devattr)->index; 627 struct w83627hf_data *data = w83627hf_update_device(dev); 628 if (nr >= 2) { /* TEMP2 and TEMP3 */ 629 return sprintf(buf, "%ld\n", 630 (long)LM75_TEMP_FROM_REG(data->temp_max_add[nr-2])); 631 } else { /* TEMP1 */ 632 return sprintf(buf, "%ld\n", 633 (long)TEMP_FROM_REG(data->temp_max)); 634 } 635 } 636 637 static ssize_t 638 show_temp_max_hyst(struct device *dev, struct device_attribute *devattr, 639 char *buf) 640 { 641 int nr = to_sensor_dev_attr(devattr)->index; 642 struct w83627hf_data *data = w83627hf_update_device(dev); 643 if (nr >= 2) { /* TEMP2 and TEMP3 */ 644 return sprintf(buf, "%ld\n", 645 (long)LM75_TEMP_FROM_REG(data->temp_max_hyst_add[nr-2])); 646 } else { /* TEMP1 */ 647 return sprintf(buf, "%ld\n", 648 (long)TEMP_FROM_REG(data->temp_max_hyst)); 649 } 650 } 651 652 static ssize_t 653 store_temp_max(struct device *dev, struct device_attribute *devattr, 654 const char *buf, size_t count) 655 { 656 int nr = to_sensor_dev_attr(devattr)->index; 657 struct w83627hf_data *data = dev_get_drvdata(dev); 658 long val = simple_strtol(buf, NULL, 10); 659 660 mutex_lock(&data->update_lock); 661 662 if (nr >= 2) { /* TEMP2 and TEMP3 */ 663 data->temp_max_add[nr-2] = LM75_TEMP_TO_REG(val); 664 w83627hf_write_value(data, W83781D_REG_TEMP_OVER(nr), 665 data->temp_max_add[nr-2]); 666 } else { /* TEMP1 */ 667 data->temp_max = TEMP_TO_REG(val); 668 w83627hf_write_value(data, W83781D_REG_TEMP_OVER(nr), 669 data->temp_max); 670 } 671 mutex_unlock(&data->update_lock); 672 return count; 673 } 674 675 static ssize_t 676 store_temp_max_hyst(struct device *dev, struct device_attribute *devattr, 677 const char *buf, size_t count) 678 { 679 int nr = to_sensor_dev_attr(devattr)->index; 680 struct w83627hf_data *data = dev_get_drvdata(dev); 681 long val = simple_strtol(buf, NULL, 10); 682 683 mutex_lock(&data->update_lock); 684 685 if (nr >= 2) { /* TEMP2 and TEMP3 */ 686 data->temp_max_hyst_add[nr-2] = LM75_TEMP_TO_REG(val); 687 w83627hf_write_value(data, W83781D_REG_TEMP_HYST(nr), 688 data->temp_max_hyst_add[nr-2]); 689 } else { /* TEMP1 */ 690 data->temp_max_hyst = TEMP_TO_REG(val); 691 w83627hf_write_value(data, W83781D_REG_TEMP_HYST(nr), 692 data->temp_max_hyst); 693 } 694 mutex_unlock(&data->update_lock); 695 return count; 696 } 697 698 #define sysfs_temp_decl(offset) \ 699 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \ 700 show_temp, NULL, offset); \ 701 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \ 702 show_temp_max, store_temp_max, offset); \ 703 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \ 704 show_temp_max_hyst, store_temp_max_hyst, offset); 705 706 sysfs_temp_decl(1); 707 sysfs_temp_decl(2); 708 sysfs_temp_decl(3); 709 710 static ssize_t 711 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf) 712 { 713 struct w83627hf_data *data = w83627hf_update_device(dev); 714 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm)); 715 } 716 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); 717 718 static ssize_t 719 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf) 720 { 721 struct w83627hf_data *data = dev_get_drvdata(dev); 722 return sprintf(buf, "%ld\n", (long) data->vrm); 723 } 724 static ssize_t 725 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 726 { 727 struct w83627hf_data *data = dev_get_drvdata(dev); 728 u32 val; 729 730 val = simple_strtoul(buf, NULL, 10); 731 data->vrm = val; 732 733 return count; 734 } 735 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); 736 737 static ssize_t 738 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf) 739 { 740 struct w83627hf_data *data = w83627hf_update_device(dev); 741 return sprintf(buf, "%ld\n", (long) data->alarms); 742 } 743 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); 744 745 #define show_beep_reg(REG, reg) \ 746 static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ 747 { \ 748 struct w83627hf_data *data = w83627hf_update_device(dev); \ 749 return sprintf(buf,"%ld\n", \ 750 (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \ 751 } 752 show_beep_reg(ENABLE, enable) 753 show_beep_reg(MASK, mask) 754 755 #define BEEP_ENABLE 0 /* Store beep_enable */ 756 #define BEEP_MASK 1 /* Store beep_mask */ 757 758 static ssize_t 759 store_beep_reg(struct device *dev, const char *buf, size_t count, 760 int update_mask) 761 { 762 struct w83627hf_data *data = dev_get_drvdata(dev); 763 u32 val, val2; 764 765 val = simple_strtoul(buf, NULL, 10); 766 767 mutex_lock(&data->update_lock); 768 769 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */ 770 data->beep_mask = BEEP_MASK_TO_REG(val); 771 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, 772 data->beep_mask & 0xff); 773 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, 774 ((data->beep_mask) >> 16) & 0xff); 775 val2 = (data->beep_mask >> 8) & 0x7f; 776 } else { /* We are storing beep_enable */ 777 val2 = 778 w83627hf_read_value(data, W83781D_REG_BEEP_INTS2) & 0x7f; 779 data->beep_enable = BEEP_ENABLE_TO_REG(val); 780 } 781 782 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, 783 val2 | data->beep_enable << 7); 784 785 mutex_unlock(&data->update_lock); 786 return count; 787 } 788 789 #define sysfs_beep(REG, reg) \ 790 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \ 791 { \ 792 return show_beep_##reg(dev, attr, buf); \ 793 } \ 794 static ssize_t \ 795 store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \ 796 { \ 797 return store_beep_reg(dev, buf, count, BEEP_##REG); \ 798 } \ 799 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \ 800 show_regs_beep_##reg, store_regs_beep_##reg); 801 802 sysfs_beep(ENABLE, enable); 803 sysfs_beep(MASK, mask); 804 805 static ssize_t 806 show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf) 807 { 808 int nr = to_sensor_dev_attr(devattr)->index; 809 struct w83627hf_data *data = w83627hf_update_device(dev); 810 return sprintf(buf, "%ld\n", 811 (long) DIV_FROM_REG(data->fan_div[nr])); 812 } 813 /* Note: we save and restore the fan minimum here, because its value is 814 determined in part by the fan divisor. This follows the principle of 815 least surprise; the user doesn't expect the fan minimum to change just 816 because the divisor changed. */ 817 static ssize_t 818 store_fan_div(struct device *dev, struct device_attribute *devattr, 819 const char *buf, size_t count) 820 { 821 int nr = to_sensor_dev_attr(devattr)->index; 822 struct w83627hf_data *data = dev_get_drvdata(dev); 823 unsigned long min; 824 u8 reg; 825 unsigned long val = simple_strtoul(buf, NULL, 10); 826 827 mutex_lock(&data->update_lock); 828 829 /* Save fan_min */ 830 min = FAN_FROM_REG(data->fan_min[nr], 831 DIV_FROM_REG(data->fan_div[nr])); 832 833 data->fan_div[nr] = DIV_TO_REG(val); 834 835 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) 836 & (nr==0 ? 0xcf : 0x3f)) 837 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); 838 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); 839 840 reg = (w83627hf_read_value(data, W83781D_REG_VBAT) 841 & ~(1 << (5 + nr))) 842 | ((data->fan_div[nr] & 0x04) << (3 + nr)); 843 w83627hf_write_value(data, W83781D_REG_VBAT, reg); 844 845 /* Restore fan_min */ 846 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 847 w83627hf_write_value(data, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]); 848 849 mutex_unlock(&data->update_lock); 850 return count; 851 } 852 853 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR, 854 show_fan_div, store_fan_div, 0); 855 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR, 856 show_fan_div, store_fan_div, 1); 857 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR, 858 show_fan_div, store_fan_div, 2); 859 860 static ssize_t 861 show_pwm(struct device *dev, struct device_attribute *devattr, char *buf) 862 { 863 int nr = to_sensor_dev_attr(devattr)->index; 864 struct w83627hf_data *data = w83627hf_update_device(dev); 865 return sprintf(buf, "%ld\n", (long) data->pwm[nr]); 866 } 867 868 static ssize_t 869 store_pwm(struct device *dev, struct device_attribute *devattr, 870 const char *buf, size_t count) 871 { 872 int nr = to_sensor_dev_attr(devattr)->index; 873 struct w83627hf_data *data = dev_get_drvdata(dev); 874 u32 val = simple_strtoul(buf, NULL, 10); 875 876 mutex_lock(&data->update_lock); 877 878 if (data->type == w83627thf) { 879 /* bits 0-3 are reserved in 627THF */ 880 data->pwm[nr] = PWM_TO_REG(val) & 0xf0; 881 w83627hf_write_value(data, 882 W836X7HF_REG_PWM(data->type, nr), 883 data->pwm[nr] | 884 (w83627hf_read_value(data, 885 W836X7HF_REG_PWM(data->type, nr)) & 0x0f)); 886 } else { 887 data->pwm[nr] = PWM_TO_REG(val); 888 w83627hf_write_value(data, 889 W836X7HF_REG_PWM(data->type, nr), 890 data->pwm[nr]); 891 } 892 893 mutex_unlock(&data->update_lock); 894 return count; 895 } 896 897 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0); 898 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1); 899 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2); 900 901 static ssize_t 902 show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf) 903 { 904 int nr = to_sensor_dev_attr(devattr)->index; 905 struct w83627hf_data *data = w83627hf_update_device(dev); 906 if (data->type == w83627hf) 907 return sprintf(buf, "%ld\n", 908 pwm_freq_from_reg_627hf(data->pwm_freq[nr])); 909 else 910 return sprintf(buf, "%ld\n", 911 pwm_freq_from_reg(data->pwm_freq[nr])); 912 } 913 914 static ssize_t 915 store_pwm_freq(struct device *dev, struct device_attribute *devattr, 916 const char *buf, size_t count) 917 { 918 int nr = to_sensor_dev_attr(devattr)->index; 919 struct w83627hf_data *data = dev_get_drvdata(dev); 920 static const u8 mask[]={0xF8, 0x8F}; 921 u32 val; 922 923 val = simple_strtoul(buf, NULL, 10); 924 925 mutex_lock(&data->update_lock); 926 927 if (data->type == w83627hf) { 928 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val); 929 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ, 930 (data->pwm_freq[nr] << (nr*4)) | 931 (w83627hf_read_value(data, 932 W83627HF_REG_PWM_FREQ) & mask[nr])); 933 } else { 934 data->pwm_freq[nr] = pwm_freq_to_reg(val); 935 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr], 936 data->pwm_freq[nr]); 937 } 938 939 mutex_unlock(&data->update_lock); 940 return count; 941 } 942 943 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR, 944 show_pwm_freq, store_pwm_freq, 0); 945 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR, 946 show_pwm_freq, store_pwm_freq, 1); 947 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR, 948 show_pwm_freq, store_pwm_freq, 2); 949 950 static ssize_t 951 show_temp_type(struct device *dev, struct device_attribute *devattr, 952 char *buf) 953 { 954 int nr = to_sensor_dev_attr(devattr)->index; 955 struct w83627hf_data *data = w83627hf_update_device(dev); 956 return sprintf(buf, "%ld\n", (long) data->sens[nr]); 957 } 958 959 static ssize_t 960 store_temp_type(struct device *dev, struct device_attribute *devattr, 961 const char *buf, size_t count) 962 { 963 int nr = to_sensor_dev_attr(devattr)->index; 964 struct w83627hf_data *data = dev_get_drvdata(dev); 965 u32 val, tmp; 966 967 val = simple_strtoul(buf, NULL, 10); 968 969 mutex_lock(&data->update_lock); 970 971 switch (val) { 972 case 1: /* PII/Celeron diode */ 973 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); 974 w83627hf_write_value(data, W83781D_REG_SCFG1, 975 tmp | BIT_SCFG1[nr]); 976 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2); 977 w83627hf_write_value(data, W83781D_REG_SCFG2, 978 tmp | BIT_SCFG2[nr]); 979 data->sens[nr] = val; 980 break; 981 case 2: /* 3904 */ 982 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); 983 w83627hf_write_value(data, W83781D_REG_SCFG1, 984 tmp | BIT_SCFG1[nr]); 985 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2); 986 w83627hf_write_value(data, W83781D_REG_SCFG2, 987 tmp & ~BIT_SCFG2[nr]); 988 data->sens[nr] = val; 989 break; 990 case W83781D_DEFAULT_BETA: 991 dev_warn(dev, "Sensor type %d is deprecated, please use 4 " 992 "instead\n", W83781D_DEFAULT_BETA); 993 /* fall through */ 994 case 4: /* thermistor */ 995 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); 996 w83627hf_write_value(data, W83781D_REG_SCFG1, 997 tmp & ~BIT_SCFG1[nr]); 998 data->sens[nr] = val; 999 break; 1000 default: 1001 dev_err(dev, 1002 "Invalid sensor type %ld; must be 1, 2, or 4\n", 1003 (long) val); 1004 break; 1005 } 1006 1007 mutex_unlock(&data->update_lock); 1008 return count; 1009 } 1010 1011 #define sysfs_temp_type(offset) \ 1012 static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \ 1013 show_temp_type, store_temp_type, offset - 1); 1014 1015 sysfs_temp_type(1); 1016 sysfs_temp_type(2); 1017 sysfs_temp_type(3); 1018 1019 static ssize_t 1020 show_name(struct device *dev, struct device_attribute *devattr, char *buf) 1021 { 1022 struct w83627hf_data *data = dev_get_drvdata(dev); 1023 1024 return sprintf(buf, "%s\n", data->name); 1025 } 1026 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); 1027 1028 static int __init w83627hf_find(int sioaddr, unsigned short *addr, 1029 struct w83627hf_sio_data *sio_data) 1030 { 1031 int err = -ENODEV; 1032 u16 val; 1033 1034 static const __initdata char *names[] = { 1035 "W83627HF", 1036 "W83627THF", 1037 "W83697HF", 1038 "W83637HF", 1039 "W83687THF", 1040 }; 1041 1042 REG = sioaddr; 1043 VAL = sioaddr + 1; 1044 1045 superio_enter(); 1046 val= superio_inb(DEVID); 1047 switch (val) { 1048 case W627_DEVID: 1049 sio_data->type = w83627hf; 1050 break; 1051 case W627THF_DEVID: 1052 sio_data->type = w83627thf; 1053 break; 1054 case W697_DEVID: 1055 sio_data->type = w83697hf; 1056 break; 1057 case W637_DEVID: 1058 sio_data->type = w83637hf; 1059 break; 1060 case W687THF_DEVID: 1061 sio_data->type = w83687thf; 1062 break; 1063 case 0xff: /* No device at all */ 1064 goto exit; 1065 default: 1066 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val); 1067 goto exit; 1068 } 1069 1070 superio_select(W83627HF_LD_HWM); 1071 force_addr &= WINB_ALIGNMENT; 1072 if (force_addr) { 1073 printk(KERN_WARNING DRVNAME ": Forcing address 0x%x\n", 1074 force_addr); 1075 superio_outb(WINB_BASE_REG, force_addr >> 8); 1076 superio_outb(WINB_BASE_REG + 1, force_addr & 0xff); 1077 } 1078 val = (superio_inb(WINB_BASE_REG) << 8) | 1079 superio_inb(WINB_BASE_REG + 1); 1080 *addr = val & WINB_ALIGNMENT; 1081 if (*addr == 0) { 1082 printk(KERN_WARNING DRVNAME ": Base address not set, " 1083 "skipping\n"); 1084 goto exit; 1085 } 1086 1087 val = superio_inb(WINB_ACT_REG); 1088 if (!(val & 0x01)) { 1089 printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n"); 1090 superio_outb(WINB_ACT_REG, val | 0x01); 1091 } 1092 1093 err = 0; 1094 pr_info(DRVNAME ": Found %s chip at %#x\n", 1095 names[sio_data->type], *addr); 1096 1097 exit: 1098 superio_exit(); 1099 return err; 1100 } 1101 1102 #define VIN_UNIT_ATTRS(_X_) \ 1103 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \ 1104 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \ 1105 &sensor_dev_attr_in##_X_##_max.dev_attr.attr 1106 1107 #define FAN_UNIT_ATTRS(_X_) \ 1108 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \ 1109 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \ 1110 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr 1111 1112 #define TEMP_UNIT_ATTRS(_X_) \ 1113 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \ 1114 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \ 1115 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \ 1116 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr 1117 1118 static struct attribute *w83627hf_attributes[] = { 1119 &dev_attr_in0_input.attr, 1120 &dev_attr_in0_min.attr, 1121 &dev_attr_in0_max.attr, 1122 VIN_UNIT_ATTRS(2), 1123 VIN_UNIT_ATTRS(3), 1124 VIN_UNIT_ATTRS(4), 1125 VIN_UNIT_ATTRS(7), 1126 VIN_UNIT_ATTRS(8), 1127 1128 FAN_UNIT_ATTRS(1), 1129 FAN_UNIT_ATTRS(2), 1130 1131 TEMP_UNIT_ATTRS(1), 1132 TEMP_UNIT_ATTRS(2), 1133 1134 &dev_attr_alarms.attr, 1135 &dev_attr_beep_enable.attr, 1136 &dev_attr_beep_mask.attr, 1137 1138 &sensor_dev_attr_pwm1.dev_attr.attr, 1139 &sensor_dev_attr_pwm2.dev_attr.attr, 1140 &dev_attr_name.attr, 1141 NULL 1142 }; 1143 1144 static const struct attribute_group w83627hf_group = { 1145 .attrs = w83627hf_attributes, 1146 }; 1147 1148 static struct attribute *w83627hf_attributes_opt[] = { 1149 VIN_UNIT_ATTRS(1), 1150 VIN_UNIT_ATTRS(5), 1151 VIN_UNIT_ATTRS(6), 1152 1153 FAN_UNIT_ATTRS(3), 1154 TEMP_UNIT_ATTRS(3), 1155 &sensor_dev_attr_pwm3.dev_attr.attr, 1156 1157 &sensor_dev_attr_pwm1_freq.dev_attr.attr, 1158 &sensor_dev_attr_pwm2_freq.dev_attr.attr, 1159 &sensor_dev_attr_pwm3_freq.dev_attr.attr, 1160 NULL 1161 }; 1162 1163 static const struct attribute_group w83627hf_group_opt = { 1164 .attrs = w83627hf_attributes_opt, 1165 }; 1166 1167 static int __devinit w83627hf_probe(struct platform_device *pdev) 1168 { 1169 struct device *dev = &pdev->dev; 1170 struct w83627hf_sio_data *sio_data = dev->platform_data; 1171 struct w83627hf_data *data; 1172 struct resource *res; 1173 int err; 1174 1175 static const char *names[] = { 1176 "w83627hf", 1177 "w83627thf", 1178 "w83697hf", 1179 "w83637hf", 1180 "w83687thf", 1181 }; 1182 1183 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 1184 if (!request_region(res->start, WINB_REGION_SIZE, DRVNAME)) { 1185 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n", 1186 (unsigned long)res->start, 1187 (unsigned long)(res->start + WINB_REGION_SIZE - 1)); 1188 err = -EBUSY; 1189 goto ERROR0; 1190 } 1191 1192 if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) { 1193 err = -ENOMEM; 1194 goto ERROR1; 1195 } 1196 data->addr = res->start; 1197 data->type = sio_data->type; 1198 data->name = names[sio_data->type]; 1199 mutex_init(&data->lock); 1200 mutex_init(&data->update_lock); 1201 platform_set_drvdata(pdev, data); 1202 1203 /* Initialize the chip */ 1204 w83627hf_init_device(pdev); 1205 1206 /* A few vars need to be filled upon startup */ 1207 data->fan_min[0] = w83627hf_read_value(data, W83781D_REG_FAN_MIN(1)); 1208 data->fan_min[1] = w83627hf_read_value(data, W83781D_REG_FAN_MIN(2)); 1209 data->fan_min[2] = w83627hf_read_value(data, W83781D_REG_FAN_MIN(3)); 1210 w83627hf_update_fan_div(data); 1211 1212 /* Register common device attributes */ 1213 if ((err = sysfs_create_group(&dev->kobj, &w83627hf_group))) 1214 goto ERROR3; 1215 1216 /* Register chip-specific device attributes */ 1217 if (data->type == w83627hf || data->type == w83697hf) 1218 if ((err = device_create_file(dev, 1219 &sensor_dev_attr_in5_input.dev_attr)) 1220 || (err = device_create_file(dev, 1221 &sensor_dev_attr_in5_min.dev_attr)) 1222 || (err = device_create_file(dev, 1223 &sensor_dev_attr_in5_max.dev_attr)) 1224 || (err = device_create_file(dev, 1225 &sensor_dev_attr_in6_input.dev_attr)) 1226 || (err = device_create_file(dev, 1227 &sensor_dev_attr_in6_min.dev_attr)) 1228 || (err = device_create_file(dev, 1229 &sensor_dev_attr_in6_max.dev_attr)) 1230 || (err = device_create_file(dev, 1231 &sensor_dev_attr_pwm1_freq.dev_attr)) 1232 || (err = device_create_file(dev, 1233 &sensor_dev_attr_pwm2_freq.dev_attr))) 1234 goto ERROR4; 1235 1236 if (data->type != w83697hf) 1237 if ((err = device_create_file(dev, 1238 &sensor_dev_attr_in1_input.dev_attr)) 1239 || (err = device_create_file(dev, 1240 &sensor_dev_attr_in1_min.dev_attr)) 1241 || (err = device_create_file(dev, 1242 &sensor_dev_attr_in1_max.dev_attr)) 1243 || (err = device_create_file(dev, 1244 &sensor_dev_attr_fan3_input.dev_attr)) 1245 || (err = device_create_file(dev, 1246 &sensor_dev_attr_fan3_min.dev_attr)) 1247 || (err = device_create_file(dev, 1248 &sensor_dev_attr_fan3_div.dev_attr)) 1249 || (err = device_create_file(dev, 1250 &sensor_dev_attr_temp3_input.dev_attr)) 1251 || (err = device_create_file(dev, 1252 &sensor_dev_attr_temp3_max.dev_attr)) 1253 || (err = device_create_file(dev, 1254 &sensor_dev_attr_temp3_max_hyst.dev_attr)) 1255 || (err = device_create_file(dev, 1256 &sensor_dev_attr_temp3_type.dev_attr))) 1257 goto ERROR4; 1258 1259 if (data->type != w83697hf && data->vid != 0xff) { 1260 /* Convert VID to voltage based on VRM */ 1261 data->vrm = vid_which_vrm(); 1262 1263 if ((err = device_create_file(dev, &dev_attr_cpu0_vid)) 1264 || (err = device_create_file(dev, &dev_attr_vrm))) 1265 goto ERROR4; 1266 } 1267 1268 if (data->type == w83627thf || data->type == w83637hf 1269 || data->type == w83687thf) 1270 if ((err = device_create_file(dev, 1271 &sensor_dev_attr_pwm3.dev_attr))) 1272 goto ERROR4; 1273 1274 if (data->type == w83637hf || data->type == w83687thf) 1275 if ((err = device_create_file(dev, 1276 &sensor_dev_attr_pwm1_freq.dev_attr)) 1277 || (err = device_create_file(dev, 1278 &sensor_dev_attr_pwm2_freq.dev_attr)) 1279 || (err = device_create_file(dev, 1280 &sensor_dev_attr_pwm3_freq.dev_attr))) 1281 goto ERROR4; 1282 1283 data->hwmon_dev = hwmon_device_register(dev); 1284 if (IS_ERR(data->hwmon_dev)) { 1285 err = PTR_ERR(data->hwmon_dev); 1286 goto ERROR4; 1287 } 1288 1289 return 0; 1290 1291 ERROR4: 1292 sysfs_remove_group(&dev->kobj, &w83627hf_group); 1293 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt); 1294 ERROR3: 1295 platform_set_drvdata(pdev, NULL); 1296 kfree(data); 1297 ERROR1: 1298 release_region(res->start, WINB_REGION_SIZE); 1299 ERROR0: 1300 return err; 1301 } 1302 1303 static int __devexit w83627hf_remove(struct platform_device *pdev) 1304 { 1305 struct w83627hf_data *data = platform_get_drvdata(pdev); 1306 struct resource *res; 1307 1308 hwmon_device_unregister(data->hwmon_dev); 1309 1310 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group); 1311 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt); 1312 platform_set_drvdata(pdev, NULL); 1313 kfree(data); 1314 1315 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 1316 release_region(res->start, WINB_REGION_SIZE); 1317 1318 return 0; 1319 } 1320 1321 1322 /* Registers 0x50-0x5f are banked */ 1323 static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg) 1324 { 1325 if ((reg & 0x00f0) == 0x50) { 1326 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET); 1327 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET); 1328 } 1329 } 1330 1331 /* Not strictly necessary, but play it safe for now */ 1332 static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg) 1333 { 1334 if (reg & 0xff00) { 1335 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET); 1336 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET); 1337 } 1338 } 1339 1340 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg) 1341 { 1342 int res, word_sized; 1343 1344 mutex_lock(&data->lock); 1345 word_sized = (((reg & 0xff00) == 0x100) 1346 || ((reg & 0xff00) == 0x200)) 1347 && (((reg & 0x00ff) == 0x50) 1348 || ((reg & 0x00ff) == 0x53) 1349 || ((reg & 0x00ff) == 0x55)); 1350 w83627hf_set_bank(data, reg); 1351 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET); 1352 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET); 1353 if (word_sized) { 1354 outb_p((reg & 0xff) + 1, 1355 data->addr + W83781D_ADDR_REG_OFFSET); 1356 res = 1357 (res << 8) + inb_p(data->addr + 1358 W83781D_DATA_REG_OFFSET); 1359 } 1360 w83627hf_reset_bank(data, reg); 1361 mutex_unlock(&data->lock); 1362 return res; 1363 } 1364 1365 static int __devinit w83627thf_read_gpio5(struct platform_device *pdev) 1366 { 1367 int res = 0xff, sel; 1368 1369 superio_enter(); 1370 superio_select(W83627HF_LD_GPIO5); 1371 1372 /* Make sure these GPIO pins are enabled */ 1373 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) { 1374 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n"); 1375 goto exit; 1376 } 1377 1378 /* Make sure the pins are configured for input 1379 There must be at least five (VRM 9), and possibly 6 (VRM 10) */ 1380 sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f; 1381 if ((sel & 0x1f) != 0x1f) { 1382 dev_dbg(&pdev->dev, "GPIO5 not configured for VID " 1383 "function\n"); 1384 goto exit; 1385 } 1386 1387 dev_info(&pdev->dev, "Reading VID from GPIO5\n"); 1388 res = superio_inb(W83627THF_GPIO5_DR) & sel; 1389 1390 exit: 1391 superio_exit(); 1392 return res; 1393 } 1394 1395 static int __devinit w83687thf_read_vid(struct platform_device *pdev) 1396 { 1397 int res = 0xff; 1398 1399 superio_enter(); 1400 superio_select(W83627HF_LD_HWM); 1401 1402 /* Make sure these GPIO pins are enabled */ 1403 if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) { 1404 dev_dbg(&pdev->dev, "VID disabled, no VID function\n"); 1405 goto exit; 1406 } 1407 1408 /* Make sure the pins are configured for input */ 1409 if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) { 1410 dev_dbg(&pdev->dev, "VID configured as output, " 1411 "no VID function\n"); 1412 goto exit; 1413 } 1414 1415 res = superio_inb(W83687THF_VID_DATA) & 0x3f; 1416 1417 exit: 1418 superio_exit(); 1419 return res; 1420 } 1421 1422 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value) 1423 { 1424 int word_sized; 1425 1426 mutex_lock(&data->lock); 1427 word_sized = (((reg & 0xff00) == 0x100) 1428 || ((reg & 0xff00) == 0x200)) 1429 && (((reg & 0x00ff) == 0x53) 1430 || ((reg & 0x00ff) == 0x55)); 1431 w83627hf_set_bank(data, reg); 1432 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET); 1433 if (word_sized) { 1434 outb_p(value >> 8, 1435 data->addr + W83781D_DATA_REG_OFFSET); 1436 outb_p((reg & 0xff) + 1, 1437 data->addr + W83781D_ADDR_REG_OFFSET); 1438 } 1439 outb_p(value & 0xff, 1440 data->addr + W83781D_DATA_REG_OFFSET); 1441 w83627hf_reset_bank(data, reg); 1442 mutex_unlock(&data->lock); 1443 return 0; 1444 } 1445 1446 static void __devinit w83627hf_init_device(struct platform_device *pdev) 1447 { 1448 struct w83627hf_data *data = platform_get_drvdata(pdev); 1449 int i; 1450 enum chips type = data->type; 1451 u8 tmp; 1452 1453 if (reset) { 1454 /* Resetting the chip has been the default for a long time, 1455 but repeatedly caused problems (fans going to full 1456 speed...) so it is now optional. It might even go away if 1457 nobody reports it as being useful, as I see very little 1458 reason why this would be needed at all. */ 1459 dev_info(&pdev->dev, "If reset=1 solved a problem you were " 1460 "having, please report!\n"); 1461 1462 /* save this register */ 1463 i = w83627hf_read_value(data, W83781D_REG_BEEP_CONFIG); 1464 /* Reset all except Watchdog values and last conversion values 1465 This sets fan-divs to 2, among others */ 1466 w83627hf_write_value(data, W83781D_REG_CONFIG, 0x80); 1467 /* Restore the register and disable power-on abnormal beep. 1468 This saves FAN 1/2/3 input/output values set by BIOS. */ 1469 w83627hf_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); 1470 /* Disable master beep-enable (reset turns it on). 1471 Individual beeps should be reset to off but for some reason 1472 disabling this bit helps some people not get beeped */ 1473 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, 0); 1474 } 1475 1476 /* Minimize conflicts with other winbond i2c-only clients... */ 1477 /* disable i2c subclients... how to disable main i2c client?? */ 1478 /* force i2c address to relatively uncommon address */ 1479 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89); 1480 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c); 1481 1482 /* Read VID only once */ 1483 if (type == w83627hf || type == w83637hf) { 1484 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV); 1485 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID); 1486 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4); 1487 } else if (type == w83627thf) { 1488 data->vid = w83627thf_read_gpio5(pdev); 1489 } else if (type == w83687thf) { 1490 data->vid = w83687thf_read_vid(pdev); 1491 } 1492 1493 /* Read VRM & OVT Config only once */ 1494 if (type == w83627thf || type == w83637hf || type == w83687thf) { 1495 data->vrm_ovt = 1496 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG); 1497 } 1498 1499 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1); 1500 for (i = 1; i <= 3; i++) { 1501 if (!(tmp & BIT_SCFG1[i - 1])) { 1502 data->sens[i - 1] = 4; 1503 } else { 1504 if (w83627hf_read_value 1505 (data, 1506 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) 1507 data->sens[i - 1] = 1; 1508 else 1509 data->sens[i - 1] = 2; 1510 } 1511 if ((type == w83697hf) && (i == 2)) 1512 break; 1513 } 1514 1515 if(init) { 1516 /* Enable temp2 */ 1517 tmp = w83627hf_read_value(data, W83781D_REG_TEMP2_CONFIG); 1518 if (tmp & 0x01) { 1519 dev_warn(&pdev->dev, "Enabling temp2, readings " 1520 "might not make sense\n"); 1521 w83627hf_write_value(data, W83781D_REG_TEMP2_CONFIG, 1522 tmp & 0xfe); 1523 } 1524 1525 /* Enable temp3 */ 1526 if (type != w83697hf) { 1527 tmp = w83627hf_read_value(data, 1528 W83781D_REG_TEMP3_CONFIG); 1529 if (tmp & 0x01) { 1530 dev_warn(&pdev->dev, "Enabling temp3, " 1531 "readings might not make sense\n"); 1532 w83627hf_write_value(data, 1533 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); 1534 } 1535 } 1536 } 1537 1538 /* Start monitoring */ 1539 w83627hf_write_value(data, W83781D_REG_CONFIG, 1540 (w83627hf_read_value(data, 1541 W83781D_REG_CONFIG) & 0xf7) 1542 | 0x01); 1543 } 1544 1545 static void w83627hf_update_fan_div(struct w83627hf_data *data) 1546 { 1547 int reg; 1548 1549 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV); 1550 data->fan_div[0] = (reg >> 4) & 0x03; 1551 data->fan_div[1] = (reg >> 6) & 0x03; 1552 if (data->type != w83697hf) { 1553 data->fan_div[2] = (w83627hf_read_value(data, 1554 W83781D_REG_PIN) >> 6) & 0x03; 1555 } 1556 reg = w83627hf_read_value(data, W83781D_REG_VBAT); 1557 data->fan_div[0] |= (reg >> 3) & 0x04; 1558 data->fan_div[1] |= (reg >> 4) & 0x04; 1559 if (data->type != w83697hf) 1560 data->fan_div[2] |= (reg >> 5) & 0x04; 1561 } 1562 1563 static struct w83627hf_data *w83627hf_update_device(struct device *dev) 1564 { 1565 struct w83627hf_data *data = dev_get_drvdata(dev); 1566 int i; 1567 1568 mutex_lock(&data->update_lock); 1569 1570 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1571 || !data->valid) { 1572 for (i = 0; i <= 8; i++) { 1573 /* skip missing sensors */ 1574 if (((data->type == w83697hf) && (i == 1)) || 1575 ((data->type != w83627hf && data->type != w83697hf) 1576 && (i == 5 || i == 6))) 1577 continue; 1578 data->in[i] = 1579 w83627hf_read_value(data, W83781D_REG_IN(i)); 1580 data->in_min[i] = 1581 w83627hf_read_value(data, 1582 W83781D_REG_IN_MIN(i)); 1583 data->in_max[i] = 1584 w83627hf_read_value(data, 1585 W83781D_REG_IN_MAX(i)); 1586 } 1587 for (i = 1; i <= 3; i++) { 1588 data->fan[i - 1] = 1589 w83627hf_read_value(data, W83781D_REG_FAN(i)); 1590 data->fan_min[i - 1] = 1591 w83627hf_read_value(data, 1592 W83781D_REG_FAN_MIN(i)); 1593 } 1594 for (i = 0; i <= 2; i++) { 1595 u8 tmp = w83627hf_read_value(data, 1596 W836X7HF_REG_PWM(data->type, i)); 1597 /* bits 0-3 are reserved in 627THF */ 1598 if (data->type == w83627thf) 1599 tmp &= 0xf0; 1600 data->pwm[i] = tmp; 1601 if (i == 1 && 1602 (data->type == w83627hf || data->type == w83697hf)) 1603 break; 1604 } 1605 if (data->type == w83627hf) { 1606 u8 tmp = w83627hf_read_value(data, 1607 W83627HF_REG_PWM_FREQ); 1608 data->pwm_freq[0] = tmp & 0x07; 1609 data->pwm_freq[1] = (tmp >> 4) & 0x07; 1610 } else if (data->type != w83627thf) { 1611 for (i = 1; i <= 3; i++) { 1612 data->pwm_freq[i - 1] = 1613 w83627hf_read_value(data, 1614 W83637HF_REG_PWM_FREQ[i - 1]); 1615 if (i == 2 && (data->type == w83697hf)) 1616 break; 1617 } 1618 } 1619 1620 data->temp = w83627hf_read_value(data, W83781D_REG_TEMP(1)); 1621 data->temp_max = 1622 w83627hf_read_value(data, W83781D_REG_TEMP_OVER(1)); 1623 data->temp_max_hyst = 1624 w83627hf_read_value(data, W83781D_REG_TEMP_HYST(1)); 1625 data->temp_add[0] = 1626 w83627hf_read_value(data, W83781D_REG_TEMP(2)); 1627 data->temp_max_add[0] = 1628 w83627hf_read_value(data, W83781D_REG_TEMP_OVER(2)); 1629 data->temp_max_hyst_add[0] = 1630 w83627hf_read_value(data, W83781D_REG_TEMP_HYST(2)); 1631 if (data->type != w83697hf) { 1632 data->temp_add[1] = 1633 w83627hf_read_value(data, W83781D_REG_TEMP(3)); 1634 data->temp_max_add[1] = 1635 w83627hf_read_value(data, W83781D_REG_TEMP_OVER(3)); 1636 data->temp_max_hyst_add[1] = 1637 w83627hf_read_value(data, W83781D_REG_TEMP_HYST(3)); 1638 } 1639 1640 w83627hf_update_fan_div(data); 1641 1642 data->alarms = 1643 w83627hf_read_value(data, W83781D_REG_ALARM1) | 1644 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) | 1645 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16); 1646 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2); 1647 data->beep_enable = i >> 7; 1648 data->beep_mask = ((i & 0x7f) << 8) | 1649 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) | 1650 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16; 1651 data->last_updated = jiffies; 1652 data->valid = 1; 1653 } 1654 1655 mutex_unlock(&data->update_lock); 1656 1657 return data; 1658 } 1659 1660 static int __init w83627hf_device_add(unsigned short address, 1661 const struct w83627hf_sio_data *sio_data) 1662 { 1663 struct resource res = { 1664 .start = address + WINB_REGION_OFFSET, 1665 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1, 1666 .name = DRVNAME, 1667 .flags = IORESOURCE_IO, 1668 }; 1669 int err; 1670 1671 pdev = platform_device_alloc(DRVNAME, address); 1672 if (!pdev) { 1673 err = -ENOMEM; 1674 printk(KERN_ERR DRVNAME ": Device allocation failed\n"); 1675 goto exit; 1676 } 1677 1678 err = platform_device_add_resources(pdev, &res, 1); 1679 if (err) { 1680 printk(KERN_ERR DRVNAME ": Device resource addition failed " 1681 "(%d)\n", err); 1682 goto exit_device_put; 1683 } 1684 1685 err = platform_device_add_data(pdev, sio_data, 1686 sizeof(struct w83627hf_sio_data)); 1687 if (err) { 1688 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n"); 1689 goto exit_device_put; 1690 } 1691 1692 err = platform_device_add(pdev); 1693 if (err) { 1694 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n", 1695 err); 1696 goto exit_device_put; 1697 } 1698 1699 return 0; 1700 1701 exit_device_put: 1702 platform_device_put(pdev); 1703 exit: 1704 return err; 1705 } 1706 1707 static int __init sensors_w83627hf_init(void) 1708 { 1709 int err; 1710 unsigned short address; 1711 struct w83627hf_sio_data sio_data; 1712 1713 if (w83627hf_find(0x2e, &address, &sio_data) 1714 && w83627hf_find(0x4e, &address, &sio_data)) 1715 return -ENODEV; 1716 1717 err = platform_driver_register(&w83627hf_driver); 1718 if (err) 1719 goto exit; 1720 1721 /* Sets global pdev as a side effect */ 1722 err = w83627hf_device_add(address, &sio_data); 1723 if (err) 1724 goto exit_driver; 1725 1726 return 0; 1727 1728 exit_driver: 1729 platform_driver_unregister(&w83627hf_driver); 1730 exit: 1731 return err; 1732 } 1733 1734 static void __exit sensors_w83627hf_exit(void) 1735 { 1736 platform_device_unregister(pdev); 1737 platform_driver_unregister(&w83627hf_driver); 1738 } 1739 1740 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, " 1741 "Philip Edelbrock <phil@netroedge.com>, " 1742 "and Mark Studebaker <mdsxyz123@yahoo.com>"); 1743 MODULE_DESCRIPTION("W83627HF driver"); 1744 MODULE_LICENSE("GPL"); 1745 1746 module_init(sensors_w83627hf_init); 1747 module_exit(sensors_w83627hf_exit); 1748