1c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2cff37c9eSJean Delvare /* Texas Instruments TMP102 SMBus temperature sensor driver
3beb1b6bbSSteven King *
4cff37c9eSJean Delvare * Copyright (C) 2010 Steven King <sfking@fdwdc.com>
5beb1b6bbSSteven King */
6beb1b6bbSSteven King
73d8f7a89SGuenter Roeck #include <linux/delay.h>
8beb1b6bbSSteven King #include <linux/module.h>
9beb1b6bbSSteven King #include <linux/init.h>
10beb1b6bbSSteven King #include <linux/slab.h>
11beb1b6bbSSteven King #include <linux/i2c.h>
12beb1b6bbSSteven King #include <linux/hwmon.h>
13beb1b6bbSSteven King #include <linux/hwmon-sysfs.h>
14beb1b6bbSSteven King #include <linux/err.h>
15beb1b6bbSSteven King #include <linux/mutex.h>
16cff37c9eSJean Delvare #include <linux/device.h>
17dcd8f392SJean Delvare #include <linux/jiffies.h>
1828a340dbSGuenter Roeck #include <linux/regmap.h>
196a027523SEduardo Valentin #include <linux/of.h>
20beb1b6bbSSteven King
21beb1b6bbSSteven King #define DRIVER_NAME "tmp102"
22beb1b6bbSSteven King
23beb1b6bbSSteven King #define TMP102_TEMP_REG 0x00
24beb1b6bbSSteven King #define TMP102_CONF_REG 0x01
25beb1b6bbSSteven King /* note: these bit definitions are byte swapped */
26beb1b6bbSSteven King #define TMP102_CONF_SD 0x0100
27beb1b6bbSSteven King #define TMP102_CONF_TM 0x0200
28beb1b6bbSSteven King #define TMP102_CONF_POL 0x0400
29beb1b6bbSSteven King #define TMP102_CONF_F0 0x0800
30beb1b6bbSSteven King #define TMP102_CONF_F1 0x1000
31beb1b6bbSSteven King #define TMP102_CONF_R0 0x2000
32beb1b6bbSSteven King #define TMP102_CONF_R1 0x4000
33beb1b6bbSSteven King #define TMP102_CONF_OS 0x8000
34beb1b6bbSSteven King #define TMP102_CONF_EM 0x0010
35beb1b6bbSSteven King #define TMP102_CONF_AL 0x0020
36beb1b6bbSSteven King #define TMP102_CONF_CR0 0x0040
37beb1b6bbSSteven King #define TMP102_CONF_CR1 0x0080
38beb1b6bbSSteven King #define TMP102_TLOW_REG 0x02
39beb1b6bbSSteven King #define TMP102_THIGH_REG 0x03
40beb1b6bbSSteven King
41a9f92ccfSGuenter Roeck #define TMP102_CONFREG_MASK (TMP102_CONF_SD | TMP102_CONF_TM | \
42a9f92ccfSGuenter Roeck TMP102_CONF_POL | TMP102_CONF_F0 | \
43a9f92ccfSGuenter Roeck TMP102_CONF_F1 | TMP102_CONF_OS | \
44a9f92ccfSGuenter Roeck TMP102_CONF_EM | TMP102_CONF_AL | \
45a9f92ccfSGuenter Roeck TMP102_CONF_CR0 | TMP102_CONF_CR1)
46a9f92ccfSGuenter Roeck
47a9f92ccfSGuenter Roeck #define TMP102_CONFIG_CLEAR (TMP102_CONF_SD | TMP102_CONF_OS | \
48a9f92ccfSGuenter Roeck TMP102_CONF_CR0)
49a9f92ccfSGuenter Roeck #define TMP102_CONFIG_SET (TMP102_CONF_TM | TMP102_CONF_EM | \
50a9f92ccfSGuenter Roeck TMP102_CONF_CR1)
51a9f92ccfSGuenter Roeck
523d8f7a89SGuenter Roeck #define CONVERSION_TIME_MS 35 /* in milli-seconds */
533d8f7a89SGuenter Roeck
54beb1b6bbSSteven King struct tmp102 {
5528a340dbSGuenter Roeck struct regmap *regmap;
5638806bdaSJean Delvare u16 config_orig;
573d8f7a89SGuenter Roeck unsigned long ready_time;
58beb1b6bbSSteven King };
59beb1b6bbSSteven King
60cff37c9eSJean Delvare /* convert left adjusted 13-bit TMP102 register value to milliCelsius */
tmp102_reg_to_mC(s16 val)61cff37c9eSJean Delvare static inline int tmp102_reg_to_mC(s16 val)
62beb1b6bbSSteven King {
63cff37c9eSJean Delvare return ((val & ~0x01) * 1000) / 128;
64beb1b6bbSSteven King }
65beb1b6bbSSteven King
66cff37c9eSJean Delvare /* convert milliCelsius to left adjusted 13-bit TMP102 register value */
tmp102_mC_to_reg(int val)67cff37c9eSJean Delvare static inline u16 tmp102_mC_to_reg(int val)
68beb1b6bbSSteven King {
69beb1b6bbSSteven King return (val * 128) / 1000;
70beb1b6bbSSteven King }
71beb1b6bbSSteven King
tmp102_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * temp)720208531dSGuenter Roeck static int tmp102_read(struct device *dev, enum hwmon_sensor_types type,
730208531dSGuenter Roeck u32 attr, int channel, long *temp)
746a027523SEduardo Valentin {
753d8f7a89SGuenter Roeck struct tmp102 *tmp102 = dev_get_drvdata(dev);
760208531dSGuenter Roeck unsigned int regval;
770208531dSGuenter Roeck int err, reg;
786a027523SEduardo Valentin
790208531dSGuenter Roeck switch (attr) {
800208531dSGuenter Roeck case hwmon_temp_input:
810208531dSGuenter Roeck /* Is it too early to return a conversion ? */
823d8f7a89SGuenter Roeck if (time_before(jiffies, tmp102->ready_time)) {
8300917b5cSNishanth Menon dev_dbg(dev, "%s: Conversion not ready yet..\n", __func__);
8400917b5cSNishanth Menon return -EAGAIN;
8500917b5cSNishanth Menon }
860208531dSGuenter Roeck reg = TMP102_TEMP_REG;
870208531dSGuenter Roeck break;
880208531dSGuenter Roeck case hwmon_temp_max_hyst:
890208531dSGuenter Roeck reg = TMP102_TLOW_REG;
900208531dSGuenter Roeck break;
910208531dSGuenter Roeck case hwmon_temp_max:
920208531dSGuenter Roeck reg = TMP102_THIGH_REG;
930208531dSGuenter Roeck break;
940208531dSGuenter Roeck default:
950208531dSGuenter Roeck return -EOPNOTSUPP;
960208531dSGuenter Roeck }
9700917b5cSNishanth Menon
980208531dSGuenter Roeck err = regmap_read(tmp102->regmap, reg, ®val);
990208531dSGuenter Roeck if (err < 0)
1000208531dSGuenter Roeck return err;
1010208531dSGuenter Roeck *temp = tmp102_reg_to_mC(regval);
1026a027523SEduardo Valentin
1036a027523SEduardo Valentin return 0;
1046a027523SEduardo Valentin }
1056a027523SEduardo Valentin
tmp102_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long temp)1060208531dSGuenter Roeck static int tmp102_write(struct device *dev, enum hwmon_sensor_types type,
1070208531dSGuenter Roeck u32 attr, int channel, long temp)
108beb1b6bbSSteven King {
1093d8f7a89SGuenter Roeck struct tmp102 *tmp102 = dev_get_drvdata(dev);
1100208531dSGuenter Roeck int reg;
111beb1b6bbSSteven King
1120208531dSGuenter Roeck switch (attr) {
1130208531dSGuenter Roeck case hwmon_temp_max_hyst:
1140208531dSGuenter Roeck reg = TMP102_TLOW_REG;
1150208531dSGuenter Roeck break;
1160208531dSGuenter Roeck case hwmon_temp_max:
1170208531dSGuenter Roeck reg = TMP102_THIGH_REG;
1180208531dSGuenter Roeck break;
1190208531dSGuenter Roeck default:
1200208531dSGuenter Roeck return -EOPNOTSUPP;
121beb1b6bbSSteven King }
122beb1b6bbSSteven King
1230208531dSGuenter Roeck temp = clamp_val(temp, -256000, 255000);
1240208531dSGuenter Roeck return regmap_write(tmp102->regmap, reg, tmp102_mC_to_reg(temp));
125beb1b6bbSSteven King }
126beb1b6bbSSteven King
tmp102_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)1270208531dSGuenter Roeck static umode_t tmp102_is_visible(const void *data, enum hwmon_sensor_types type,
1280208531dSGuenter Roeck u32 attr, int channel)
1290208531dSGuenter Roeck {
1300208531dSGuenter Roeck if (type != hwmon_temp)
1310208531dSGuenter Roeck return 0;
132beb1b6bbSSteven King
1330208531dSGuenter Roeck switch (attr) {
1340208531dSGuenter Roeck case hwmon_temp_input:
13551148a23SGuenter Roeck return 0444;
1360208531dSGuenter Roeck case hwmon_temp_max_hyst:
1370208531dSGuenter Roeck case hwmon_temp_max:
13851148a23SGuenter Roeck return 0644;
1390208531dSGuenter Roeck default:
1400208531dSGuenter Roeck return 0;
1410208531dSGuenter Roeck }
1420208531dSGuenter Roeck }
143beb1b6bbSSteven King
144fc3ad668SKrzysztof Kozlowski static const struct hwmon_channel_info * const tmp102_info[] = {
14588078254SGuenter Roeck HWMON_CHANNEL_INFO(chip,
14688078254SGuenter Roeck HWMON_C_REGISTER_TZ),
14788078254SGuenter Roeck HWMON_CHANNEL_INFO(temp,
14888078254SGuenter Roeck HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST),
149beb1b6bbSSteven King NULL
150beb1b6bbSSteven King };
151beb1b6bbSSteven King
1520208531dSGuenter Roeck static const struct hwmon_ops tmp102_hwmon_ops = {
1530208531dSGuenter Roeck .is_visible = tmp102_is_visible,
1540208531dSGuenter Roeck .read = tmp102_read,
1550208531dSGuenter Roeck .write = tmp102_write,
1560208531dSGuenter Roeck };
1570208531dSGuenter Roeck
1580208531dSGuenter Roeck static const struct hwmon_chip_info tmp102_chip_info = {
1590208531dSGuenter Roeck .ops = &tmp102_hwmon_ops,
1600208531dSGuenter Roeck .info = tmp102_info,
1612251aef6SEduardo Valentin };
1622251aef6SEduardo Valentin
tmp102_restore_config(void * data)163b17ea1caSGuenter Roeck static void tmp102_restore_config(void *data)
164b17ea1caSGuenter Roeck {
165b17ea1caSGuenter Roeck struct tmp102 *tmp102 = data;
166b17ea1caSGuenter Roeck
16728a340dbSGuenter Roeck regmap_write(tmp102->regmap, TMP102_CONF_REG, tmp102->config_orig);
168b17ea1caSGuenter Roeck }
169b17ea1caSGuenter Roeck
tmp102_is_writeable_reg(struct device * dev,unsigned int reg)17028a340dbSGuenter Roeck static bool tmp102_is_writeable_reg(struct device *dev, unsigned int reg)
17128a340dbSGuenter Roeck {
17228a340dbSGuenter Roeck return reg != TMP102_TEMP_REG;
17328a340dbSGuenter Roeck }
17428a340dbSGuenter Roeck
tmp102_is_volatile_reg(struct device * dev,unsigned int reg)17528a340dbSGuenter Roeck static bool tmp102_is_volatile_reg(struct device *dev, unsigned int reg)
17628a340dbSGuenter Roeck {
17728a340dbSGuenter Roeck return reg == TMP102_TEMP_REG;
17828a340dbSGuenter Roeck }
17928a340dbSGuenter Roeck
18028a340dbSGuenter Roeck static const struct regmap_config tmp102_regmap_config = {
18128a340dbSGuenter Roeck .reg_bits = 8,
18228a340dbSGuenter Roeck .val_bits = 16,
18328a340dbSGuenter Roeck .max_register = TMP102_THIGH_REG,
18428a340dbSGuenter Roeck .writeable_reg = tmp102_is_writeable_reg,
18528a340dbSGuenter Roeck .volatile_reg = tmp102_is_volatile_reg,
18628a340dbSGuenter Roeck .val_format_endian = REGMAP_ENDIAN_BIG,
187729f1f73SMark Brown .cache_type = REGCACHE_MAPLE,
1881c96a2f6SDavid Frey .use_single_read = true,
1891c96a2f6SDavid Frey .use_single_write = true,
19028a340dbSGuenter Roeck };
19128a340dbSGuenter Roeck
tmp102_probe(struct i2c_client * client)19267487038SStephen Kitt static int tmp102_probe(struct i2c_client *client)
193beb1b6bbSSteven King {
194fbd9af16SGuenter Roeck struct device *dev = &client->dev;
195ad9beea4SGuenter Roeck struct device *hwmon_dev;
196beb1b6bbSSteven King struct tmp102 *tmp102;
19728a340dbSGuenter Roeck unsigned int regval;
19828a340dbSGuenter Roeck int err;
199beb1b6bbSSteven King
200cff37c9eSJean Delvare if (!i2c_check_functionality(client->adapter,
201beb1b6bbSSteven King I2C_FUNC_SMBUS_WORD_DATA)) {
202fbd9af16SGuenter Roeck dev_err(dev,
203b55f3757SGuenter Roeck "adapter doesn't support SMBus word transactions\n");
204beb1b6bbSSteven King return -ENODEV;
205beb1b6bbSSteven King }
206beb1b6bbSSteven King
207fbd9af16SGuenter Roeck tmp102 = devm_kzalloc(dev, sizeof(*tmp102), GFP_KERNEL);
208f511a21fSGuenter Roeck if (!tmp102)
209beb1b6bbSSteven King return -ENOMEM;
210f511a21fSGuenter Roeck
211beb1b6bbSSteven King i2c_set_clientdata(client, tmp102);
212beb1b6bbSSteven King
21328a340dbSGuenter Roeck tmp102->regmap = devm_regmap_init_i2c(client, &tmp102_regmap_config);
21428a340dbSGuenter Roeck if (IS_ERR(tmp102->regmap))
21528a340dbSGuenter Roeck return PTR_ERR(tmp102->regmap);
21628a340dbSGuenter Roeck
21728a340dbSGuenter Roeck err = regmap_read(tmp102->regmap, TMP102_CONF_REG, ®val);
21828a340dbSGuenter Roeck if (err < 0) {
219fbd9af16SGuenter Roeck dev_err(dev, "error reading config register\n");
22028a340dbSGuenter Roeck return err;
22138806bdaSJean Delvare }
222a9f92ccfSGuenter Roeck
22328a340dbSGuenter Roeck if ((regval & ~TMP102_CONFREG_MASK) !=
224a9f92ccfSGuenter Roeck (TMP102_CONF_R0 | TMP102_CONF_R1)) {
225a9f92ccfSGuenter Roeck dev_err(dev, "unexpected config register value\n");
226a9f92ccfSGuenter Roeck return -ENODEV;
227a9f92ccfSGuenter Roeck }
228a9f92ccfSGuenter Roeck
22928a340dbSGuenter Roeck tmp102->config_orig = regval;
230b17ea1caSGuenter Roeck
2311aa4f028SGuenter Roeck err = devm_add_action_or_reset(dev, tmp102_restore_config, tmp102);
2321aa4f028SGuenter Roeck if (err)
2331aa4f028SGuenter Roeck return err;
234b17ea1caSGuenter Roeck
23528a340dbSGuenter Roeck regval &= ~TMP102_CONFIG_CLEAR;
23628a340dbSGuenter Roeck regval |= TMP102_CONFIG_SET;
237a9f92ccfSGuenter Roeck
23828a340dbSGuenter Roeck err = regmap_write(tmp102->regmap, TMP102_CONF_REG, regval);
23928a340dbSGuenter Roeck if (err < 0) {
240fbd9af16SGuenter Roeck dev_err(dev, "error writing config register\n");
24128a340dbSGuenter Roeck return err;
242cff37c9eSJean Delvare }
2433d8f7a89SGuenter Roeck
2443d8f7a89SGuenter Roeck /*
2453d8f7a89SGuenter Roeck * Mark that we are not ready with data until the first
2463d8f7a89SGuenter Roeck * conversion is complete
2473d8f7a89SGuenter Roeck */
248d0725439SGuenter Roeck tmp102->ready_time = jiffies + msecs_to_jiffies(CONVERSION_TIME_MS);
2493d8f7a89SGuenter Roeck
2500208531dSGuenter Roeck hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
251b17ea1caSGuenter Roeck tmp102,
2520208531dSGuenter Roeck &tmp102_chip_info,
2530208531dSGuenter Roeck NULL);
254ad9beea4SGuenter Roeck if (IS_ERR(hwmon_dev)) {
255ad9beea4SGuenter Roeck dev_dbg(dev, "unable to register hwmon device\n");
256b17ea1caSGuenter Roeck return PTR_ERR(hwmon_dev);
257beb1b6bbSSteven King }
258fbd9af16SGuenter Roeck dev_info(dev, "initialized\n");
259beb1b6bbSSteven King
260beb1b6bbSSteven King return 0;
261beb1b6bbSSteven King }
262beb1b6bbSSteven King
tmp102_suspend(struct device * dev)263beb1b6bbSSteven King static int tmp102_suspend(struct device *dev)
264beb1b6bbSSteven King {
265beb1b6bbSSteven King struct i2c_client *client = to_i2c_client(dev);
26628a340dbSGuenter Roeck struct tmp102 *tmp102 = i2c_get_clientdata(client);
267beb1b6bbSSteven King
26828a340dbSGuenter Roeck return regmap_update_bits(tmp102->regmap, TMP102_CONF_REG,
26928a340dbSGuenter Roeck TMP102_CONF_SD, TMP102_CONF_SD);
270beb1b6bbSSteven King }
271beb1b6bbSSteven King
tmp102_resume(struct device * dev)272beb1b6bbSSteven King static int tmp102_resume(struct device *dev)
273beb1b6bbSSteven King {
274beb1b6bbSSteven King struct i2c_client *client = to_i2c_client(dev);
2753d8f7a89SGuenter Roeck struct tmp102 *tmp102 = i2c_get_clientdata(client);
27628a340dbSGuenter Roeck int err;
277beb1b6bbSSteven King
27828a340dbSGuenter Roeck err = regmap_update_bits(tmp102->regmap, TMP102_CONF_REG,
27928a340dbSGuenter Roeck TMP102_CONF_SD, 0);
280beb1b6bbSSteven King
2813d8f7a89SGuenter Roeck tmp102->ready_time = jiffies + msecs_to_jiffies(CONVERSION_TIME_MS);
2823d8f7a89SGuenter Roeck
28328a340dbSGuenter Roeck return err;
284beb1b6bbSSteven King }
285beb1b6bbSSteven King
28673568f92SJonathan Cameron static DEFINE_SIMPLE_DEV_PM_OPS(tmp102_dev_pm_ops, tmp102_suspend, tmp102_resume);
287dd378b1bSGrygorii Strashko
288beb1b6bbSSteven King static const struct i2c_device_id tmp102_id[] = {
289*d8a66f36SUwe Kleine-König { "tmp102" },
290beb1b6bbSSteven King { }
291beb1b6bbSSteven King };
292cff37c9eSJean Delvare MODULE_DEVICE_TABLE(i2c, tmp102_id);
293beb1b6bbSSteven King
29407af9a4aSGuenter Roeck static const struct of_device_id __maybe_unused tmp102_of_match[] = {
29515390c61SJavier Martinez Canillas { .compatible = "ti,tmp102" },
29615390c61SJavier Martinez Canillas { },
29715390c61SJavier Martinez Canillas };
29815390c61SJavier Martinez Canillas MODULE_DEVICE_TABLE(of, tmp102_of_match);
29915390c61SJavier Martinez Canillas
300beb1b6bbSSteven King static struct i2c_driver tmp102_driver = {
301beb1b6bbSSteven King .driver.name = DRIVER_NAME,
30215390c61SJavier Martinez Canillas .driver.of_match_table = of_match_ptr(tmp102_of_match),
30373568f92SJonathan Cameron .driver.pm = pm_sleep_ptr(&tmp102_dev_pm_ops),
3041975d167SUwe Kleine-König .probe = tmp102_probe,
305beb1b6bbSSteven King .id_table = tmp102_id,
306beb1b6bbSSteven King };
307beb1b6bbSSteven King
308f0967eeaSAxel Lin module_i2c_driver(tmp102_driver);
309beb1b6bbSSteven King
310beb1b6bbSSteven King MODULE_AUTHOR("Steven King <sfking@fdwdc.com>");
311beb1b6bbSSteven King MODULE_DESCRIPTION("Texas Instruments TMP102 temperature sensor driver");
312beb1b6bbSSteven King MODULE_LICENSE("GPL");
313