xref: /linux/drivers/hwmon/tmp102.c (revision 15390c610fd373117607a45d67fe0a8ae381edd3)
1cff37c9eSJean Delvare /* Texas Instruments TMP102 SMBus temperature sensor driver
2beb1b6bbSSteven King  *
3cff37c9eSJean Delvare  * Copyright (C) 2010 Steven King <sfking@fdwdc.com>
4beb1b6bbSSteven King  *
5beb1b6bbSSteven King  * This program is free software; you can redistribute it and/or modify
6beb1b6bbSSteven King  * it under the terms of the GNU General Public License as published by
7beb1b6bbSSteven King  * the Free Software Foundation; either version 2 of the License, or
8beb1b6bbSSteven King  * (at your option) any later version.
9beb1b6bbSSteven King  *
10beb1b6bbSSteven King  * This program is distributed in the hope that it will be useful,
11beb1b6bbSSteven King  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12beb1b6bbSSteven King  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13beb1b6bbSSteven King  * GNU General Public License for more details.
14beb1b6bbSSteven King  */
15beb1b6bbSSteven King 
163d8f7a89SGuenter Roeck #include <linux/delay.h>
17beb1b6bbSSteven King #include <linux/module.h>
18beb1b6bbSSteven King #include <linux/init.h>
19beb1b6bbSSteven King #include <linux/slab.h>
20beb1b6bbSSteven King #include <linux/i2c.h>
21beb1b6bbSSteven King #include <linux/hwmon.h>
22beb1b6bbSSteven King #include <linux/hwmon-sysfs.h>
23beb1b6bbSSteven King #include <linux/err.h>
24beb1b6bbSSteven King #include <linux/mutex.h>
25cff37c9eSJean Delvare #include <linux/device.h>
26dcd8f392SJean Delvare #include <linux/jiffies.h>
2728a340dbSGuenter Roeck #include <linux/regmap.h>
286a027523SEduardo Valentin #include <linux/of.h>
29beb1b6bbSSteven King 
30beb1b6bbSSteven King #define	DRIVER_NAME "tmp102"
31beb1b6bbSSteven King 
32beb1b6bbSSteven King #define	TMP102_TEMP_REG			0x00
33beb1b6bbSSteven King #define	TMP102_CONF_REG			0x01
34beb1b6bbSSteven King /* note: these bit definitions are byte swapped */
35beb1b6bbSSteven King #define		TMP102_CONF_SD		0x0100
36beb1b6bbSSteven King #define		TMP102_CONF_TM		0x0200
37beb1b6bbSSteven King #define		TMP102_CONF_POL		0x0400
38beb1b6bbSSteven King #define		TMP102_CONF_F0		0x0800
39beb1b6bbSSteven King #define		TMP102_CONF_F1		0x1000
40beb1b6bbSSteven King #define		TMP102_CONF_R0		0x2000
41beb1b6bbSSteven King #define		TMP102_CONF_R1		0x4000
42beb1b6bbSSteven King #define		TMP102_CONF_OS		0x8000
43beb1b6bbSSteven King #define		TMP102_CONF_EM		0x0010
44beb1b6bbSSteven King #define		TMP102_CONF_AL		0x0020
45beb1b6bbSSteven King #define		TMP102_CONF_CR0		0x0040
46beb1b6bbSSteven King #define		TMP102_CONF_CR1		0x0080
47beb1b6bbSSteven King #define	TMP102_TLOW_REG			0x02
48beb1b6bbSSteven King #define	TMP102_THIGH_REG		0x03
49beb1b6bbSSteven King 
50a9f92ccfSGuenter Roeck #define TMP102_CONFREG_MASK	(TMP102_CONF_SD | TMP102_CONF_TM | \
51a9f92ccfSGuenter Roeck 				 TMP102_CONF_POL | TMP102_CONF_F0 | \
52a9f92ccfSGuenter Roeck 				 TMP102_CONF_F1 | TMP102_CONF_OS | \
53a9f92ccfSGuenter Roeck 				 TMP102_CONF_EM | TMP102_CONF_AL | \
54a9f92ccfSGuenter Roeck 				 TMP102_CONF_CR0 | TMP102_CONF_CR1)
55a9f92ccfSGuenter Roeck 
56a9f92ccfSGuenter Roeck #define TMP102_CONFIG_CLEAR	(TMP102_CONF_SD | TMP102_CONF_OS | \
57a9f92ccfSGuenter Roeck 				 TMP102_CONF_CR0)
58a9f92ccfSGuenter Roeck #define TMP102_CONFIG_SET	(TMP102_CONF_TM | TMP102_CONF_EM | \
59a9f92ccfSGuenter Roeck 				 TMP102_CONF_CR1)
60a9f92ccfSGuenter Roeck 
613d8f7a89SGuenter Roeck #define CONVERSION_TIME_MS		35	/* in milli-seconds */
623d8f7a89SGuenter Roeck 
63beb1b6bbSSteven King struct tmp102 {
6428a340dbSGuenter Roeck 	struct regmap *regmap;
6538806bdaSJean Delvare 	u16 config_orig;
663d8f7a89SGuenter Roeck 	unsigned long ready_time;
67beb1b6bbSSteven King };
68beb1b6bbSSteven King 
69cff37c9eSJean Delvare /* convert left adjusted 13-bit TMP102 register value to milliCelsius */
70cff37c9eSJean Delvare static inline int tmp102_reg_to_mC(s16 val)
71beb1b6bbSSteven King {
72cff37c9eSJean Delvare 	return ((val & ~0x01) * 1000) / 128;
73beb1b6bbSSteven King }
74beb1b6bbSSteven King 
75cff37c9eSJean Delvare /* convert milliCelsius to left adjusted 13-bit TMP102 register value */
76cff37c9eSJean Delvare static inline u16 tmp102_mC_to_reg(int val)
77beb1b6bbSSteven King {
78beb1b6bbSSteven King 	return (val * 128) / 1000;
79beb1b6bbSSteven King }
80beb1b6bbSSteven King 
810208531dSGuenter Roeck static int tmp102_read(struct device *dev, enum hwmon_sensor_types type,
820208531dSGuenter Roeck 		       u32 attr, int channel, long *temp)
836a027523SEduardo Valentin {
843d8f7a89SGuenter Roeck 	struct tmp102 *tmp102 = dev_get_drvdata(dev);
850208531dSGuenter Roeck 	unsigned int regval;
860208531dSGuenter Roeck 	int err, reg;
876a027523SEduardo Valentin 
880208531dSGuenter Roeck 	switch (attr) {
890208531dSGuenter Roeck 	case hwmon_temp_input:
900208531dSGuenter Roeck 		/* Is it too early to return a conversion ? */
913d8f7a89SGuenter Roeck 		if (time_before(jiffies, tmp102->ready_time)) {
9200917b5cSNishanth Menon 			dev_dbg(dev, "%s: Conversion not ready yet..\n", __func__);
9300917b5cSNishanth Menon 			return -EAGAIN;
9400917b5cSNishanth Menon 		}
950208531dSGuenter Roeck 		reg = TMP102_TEMP_REG;
960208531dSGuenter Roeck 		break;
970208531dSGuenter Roeck 	case hwmon_temp_max_hyst:
980208531dSGuenter Roeck 		reg = TMP102_TLOW_REG;
990208531dSGuenter Roeck 		break;
1000208531dSGuenter Roeck 	case hwmon_temp_max:
1010208531dSGuenter Roeck 		reg = TMP102_THIGH_REG;
1020208531dSGuenter Roeck 		break;
1030208531dSGuenter Roeck 	default:
1040208531dSGuenter Roeck 		return -EOPNOTSUPP;
1050208531dSGuenter Roeck 	}
10600917b5cSNishanth Menon 
1070208531dSGuenter Roeck 	err = regmap_read(tmp102->regmap, reg, &regval);
1080208531dSGuenter Roeck 	if (err < 0)
1090208531dSGuenter Roeck 		return err;
1100208531dSGuenter Roeck 	*temp = tmp102_reg_to_mC(regval);
1116a027523SEduardo Valentin 
1126a027523SEduardo Valentin 	return 0;
1136a027523SEduardo Valentin }
1146a027523SEduardo Valentin 
1150208531dSGuenter Roeck static int tmp102_write(struct device *dev, enum hwmon_sensor_types type,
1160208531dSGuenter Roeck 			u32 attr, int channel, long temp)
117beb1b6bbSSteven King {
1183d8f7a89SGuenter Roeck 	struct tmp102 *tmp102 = dev_get_drvdata(dev);
1190208531dSGuenter Roeck 	int reg;
120beb1b6bbSSteven King 
1210208531dSGuenter Roeck 	switch (attr) {
1220208531dSGuenter Roeck 	case hwmon_temp_max_hyst:
1230208531dSGuenter Roeck 		reg = TMP102_TLOW_REG;
1240208531dSGuenter Roeck 		break;
1250208531dSGuenter Roeck 	case hwmon_temp_max:
1260208531dSGuenter Roeck 		reg = TMP102_THIGH_REG;
1270208531dSGuenter Roeck 		break;
1280208531dSGuenter Roeck 	default:
1290208531dSGuenter Roeck 		return -EOPNOTSUPP;
130beb1b6bbSSteven King 	}
131beb1b6bbSSteven King 
1320208531dSGuenter Roeck 	temp = clamp_val(temp, -256000, 255000);
1330208531dSGuenter Roeck 	return regmap_write(tmp102->regmap, reg, tmp102_mC_to_reg(temp));
134beb1b6bbSSteven King }
135beb1b6bbSSteven King 
1360208531dSGuenter Roeck static umode_t tmp102_is_visible(const void *data, enum hwmon_sensor_types type,
1370208531dSGuenter Roeck 				 u32 attr, int channel)
1380208531dSGuenter Roeck {
1390208531dSGuenter Roeck 	if (type != hwmon_temp)
1400208531dSGuenter Roeck 		return 0;
141beb1b6bbSSteven King 
1420208531dSGuenter Roeck 	switch (attr) {
1430208531dSGuenter Roeck 	case hwmon_temp_input:
1440208531dSGuenter Roeck 		return S_IRUGO;
1450208531dSGuenter Roeck 	case hwmon_temp_max_hyst:
1460208531dSGuenter Roeck 	case hwmon_temp_max:
1470208531dSGuenter Roeck 		return S_IRUGO | S_IWUSR;
1480208531dSGuenter Roeck 	default:
1490208531dSGuenter Roeck 		return 0;
1500208531dSGuenter Roeck 	}
1510208531dSGuenter Roeck }
152beb1b6bbSSteven King 
1530208531dSGuenter Roeck static u32 tmp102_chip_config[] = {
1540208531dSGuenter Roeck 	HWMON_C_REGISTER_TZ,
1550208531dSGuenter Roeck 	0
1560208531dSGuenter Roeck };
157beb1b6bbSSteven King 
1580208531dSGuenter Roeck static const struct hwmon_channel_info tmp102_chip = {
1590208531dSGuenter Roeck 	.type = hwmon_chip,
1600208531dSGuenter Roeck 	.config = tmp102_chip_config,
1610208531dSGuenter Roeck };
1620208531dSGuenter Roeck 
1630208531dSGuenter Roeck static u32 tmp102_temp_config[] = {
1640208531dSGuenter Roeck 	HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST,
1650208531dSGuenter Roeck 	0
1660208531dSGuenter Roeck };
1670208531dSGuenter Roeck 
1680208531dSGuenter Roeck static const struct hwmon_channel_info tmp102_temp = {
1690208531dSGuenter Roeck 	.type = hwmon_temp,
1700208531dSGuenter Roeck 	.config = tmp102_temp_config,
1710208531dSGuenter Roeck };
1720208531dSGuenter Roeck 
1730208531dSGuenter Roeck static const struct hwmon_channel_info *tmp102_info[] = {
1740208531dSGuenter Roeck 	&tmp102_chip,
1750208531dSGuenter Roeck 	&tmp102_temp,
176beb1b6bbSSteven King 	NULL
177beb1b6bbSSteven King };
178beb1b6bbSSteven King 
1790208531dSGuenter Roeck static const struct hwmon_ops tmp102_hwmon_ops = {
1800208531dSGuenter Roeck 	.is_visible = tmp102_is_visible,
1810208531dSGuenter Roeck 	.read = tmp102_read,
1820208531dSGuenter Roeck 	.write = tmp102_write,
1830208531dSGuenter Roeck };
1840208531dSGuenter Roeck 
1850208531dSGuenter Roeck static const struct hwmon_chip_info tmp102_chip_info = {
1860208531dSGuenter Roeck 	.ops = &tmp102_hwmon_ops,
1870208531dSGuenter Roeck 	.info = tmp102_info,
1882251aef6SEduardo Valentin };
1892251aef6SEduardo Valentin 
190b17ea1caSGuenter Roeck static void tmp102_restore_config(void *data)
191b17ea1caSGuenter Roeck {
192b17ea1caSGuenter Roeck 	struct tmp102 *tmp102 = data;
193b17ea1caSGuenter Roeck 
19428a340dbSGuenter Roeck 	regmap_write(tmp102->regmap, TMP102_CONF_REG, tmp102->config_orig);
195b17ea1caSGuenter Roeck }
196b17ea1caSGuenter Roeck 
19728a340dbSGuenter Roeck static bool tmp102_is_writeable_reg(struct device *dev, unsigned int reg)
19828a340dbSGuenter Roeck {
19928a340dbSGuenter Roeck 	return reg != TMP102_TEMP_REG;
20028a340dbSGuenter Roeck }
20128a340dbSGuenter Roeck 
20228a340dbSGuenter Roeck static bool tmp102_is_volatile_reg(struct device *dev, unsigned int reg)
20328a340dbSGuenter Roeck {
20428a340dbSGuenter Roeck 	return reg == TMP102_TEMP_REG;
20528a340dbSGuenter Roeck }
20628a340dbSGuenter Roeck 
20728a340dbSGuenter Roeck static const struct regmap_config tmp102_regmap_config = {
20828a340dbSGuenter Roeck 	.reg_bits = 8,
20928a340dbSGuenter Roeck 	.val_bits = 16,
21028a340dbSGuenter Roeck 	.max_register = TMP102_THIGH_REG,
21128a340dbSGuenter Roeck 	.writeable_reg = tmp102_is_writeable_reg,
21228a340dbSGuenter Roeck 	.volatile_reg = tmp102_is_volatile_reg,
21328a340dbSGuenter Roeck 	.val_format_endian = REGMAP_ENDIAN_BIG,
21428a340dbSGuenter Roeck 	.cache_type = REGCACHE_RBTREE,
21528a340dbSGuenter Roeck 	.use_single_rw = true,
21628a340dbSGuenter Roeck };
21728a340dbSGuenter Roeck 
2186c931ae1SBill Pemberton static int tmp102_probe(struct i2c_client *client,
219beb1b6bbSSteven King 			const struct i2c_device_id *id)
220beb1b6bbSSteven King {
221fbd9af16SGuenter Roeck 	struct device *dev = &client->dev;
222ad9beea4SGuenter Roeck 	struct device *hwmon_dev;
223beb1b6bbSSteven King 	struct tmp102 *tmp102;
22428a340dbSGuenter Roeck 	unsigned int regval;
22528a340dbSGuenter Roeck 	int err;
226beb1b6bbSSteven King 
227cff37c9eSJean Delvare 	if (!i2c_check_functionality(client->adapter,
228beb1b6bbSSteven King 				     I2C_FUNC_SMBUS_WORD_DATA)) {
229fbd9af16SGuenter Roeck 		dev_err(dev,
230b55f3757SGuenter Roeck 			"adapter doesn't support SMBus word transactions\n");
231beb1b6bbSSteven King 		return -ENODEV;
232beb1b6bbSSteven King 	}
233beb1b6bbSSteven King 
234fbd9af16SGuenter Roeck 	tmp102 = devm_kzalloc(dev, sizeof(*tmp102), GFP_KERNEL);
235f511a21fSGuenter Roeck 	if (!tmp102)
236beb1b6bbSSteven King 		return -ENOMEM;
237f511a21fSGuenter Roeck 
238beb1b6bbSSteven King 	i2c_set_clientdata(client, tmp102);
239beb1b6bbSSteven King 
24028a340dbSGuenter Roeck 	tmp102->regmap = devm_regmap_init_i2c(client, &tmp102_regmap_config);
24128a340dbSGuenter Roeck 	if (IS_ERR(tmp102->regmap))
24228a340dbSGuenter Roeck 		return PTR_ERR(tmp102->regmap);
24328a340dbSGuenter Roeck 
24428a340dbSGuenter Roeck 	err = regmap_read(tmp102->regmap, TMP102_CONF_REG, &regval);
24528a340dbSGuenter Roeck 	if (err < 0) {
246fbd9af16SGuenter Roeck 		dev_err(dev, "error reading config register\n");
24728a340dbSGuenter Roeck 		return err;
24838806bdaSJean Delvare 	}
249a9f92ccfSGuenter Roeck 
25028a340dbSGuenter Roeck 	if ((regval & ~TMP102_CONFREG_MASK) !=
251a9f92ccfSGuenter Roeck 	    (TMP102_CONF_R0 | TMP102_CONF_R1)) {
252a9f92ccfSGuenter Roeck 		dev_err(dev, "unexpected config register value\n");
253a9f92ccfSGuenter Roeck 		return -ENODEV;
254a9f92ccfSGuenter Roeck 	}
255a9f92ccfSGuenter Roeck 
25628a340dbSGuenter Roeck 	tmp102->config_orig = regval;
257b17ea1caSGuenter Roeck 
2581aa4f028SGuenter Roeck 	err = devm_add_action_or_reset(dev, tmp102_restore_config, tmp102);
2591aa4f028SGuenter Roeck 	if (err)
2601aa4f028SGuenter Roeck 		return err;
261b17ea1caSGuenter Roeck 
26228a340dbSGuenter Roeck 	regval &= ~TMP102_CONFIG_CLEAR;
26328a340dbSGuenter Roeck 	regval |= TMP102_CONFIG_SET;
264a9f92ccfSGuenter Roeck 
26528a340dbSGuenter Roeck 	err = regmap_write(tmp102->regmap, TMP102_CONF_REG, regval);
26628a340dbSGuenter Roeck 	if (err < 0) {
267fbd9af16SGuenter Roeck 		dev_err(dev, "error writing config register\n");
26828a340dbSGuenter Roeck 		return err;
269cff37c9eSJean Delvare 	}
2703d8f7a89SGuenter Roeck 
2713d8f7a89SGuenter Roeck 	tmp102->ready_time = jiffies;
2723d8f7a89SGuenter Roeck 	if (tmp102->config_orig & TMP102_CONF_SD) {
2733d8f7a89SGuenter Roeck 		/*
2743d8f7a89SGuenter Roeck 		 * Mark that we are not ready with data until the first
2753d8f7a89SGuenter Roeck 		 * conversion is complete
2763d8f7a89SGuenter Roeck 		 */
2773d8f7a89SGuenter Roeck 		tmp102->ready_time += msecs_to_jiffies(CONVERSION_TIME_MS);
2783d8f7a89SGuenter Roeck 	}
2793d8f7a89SGuenter Roeck 
2800208531dSGuenter Roeck 	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
281b17ea1caSGuenter Roeck 							 tmp102,
2820208531dSGuenter Roeck 							 &tmp102_chip_info,
2830208531dSGuenter Roeck 							 NULL);
284ad9beea4SGuenter Roeck 	if (IS_ERR(hwmon_dev)) {
285ad9beea4SGuenter Roeck 		dev_dbg(dev, "unable to register hwmon device\n");
286b17ea1caSGuenter Roeck 		return PTR_ERR(hwmon_dev);
287beb1b6bbSSteven King 	}
288fbd9af16SGuenter Roeck 	dev_info(dev, "initialized\n");
289beb1b6bbSSteven King 
290beb1b6bbSSteven King 	return 0;
291beb1b6bbSSteven King }
292beb1b6bbSSteven King 
293dd378b1bSGrygorii Strashko #ifdef CONFIG_PM_SLEEP
294beb1b6bbSSteven King static int tmp102_suspend(struct device *dev)
295beb1b6bbSSteven King {
296beb1b6bbSSteven King 	struct i2c_client *client = to_i2c_client(dev);
29728a340dbSGuenter Roeck 	struct tmp102 *tmp102 = i2c_get_clientdata(client);
298beb1b6bbSSteven King 
29928a340dbSGuenter Roeck 	return regmap_update_bits(tmp102->regmap, TMP102_CONF_REG,
30028a340dbSGuenter Roeck 				  TMP102_CONF_SD, TMP102_CONF_SD);
301beb1b6bbSSteven King }
302beb1b6bbSSteven King 
303beb1b6bbSSteven King static int tmp102_resume(struct device *dev)
304beb1b6bbSSteven King {
305beb1b6bbSSteven King 	struct i2c_client *client = to_i2c_client(dev);
3063d8f7a89SGuenter Roeck 	struct tmp102 *tmp102 = i2c_get_clientdata(client);
30728a340dbSGuenter Roeck 	int err;
308beb1b6bbSSteven King 
30928a340dbSGuenter Roeck 	err = regmap_update_bits(tmp102->regmap, TMP102_CONF_REG,
31028a340dbSGuenter Roeck 				 TMP102_CONF_SD, 0);
311beb1b6bbSSteven King 
3123d8f7a89SGuenter Roeck 	tmp102->ready_time = jiffies + msecs_to_jiffies(CONVERSION_TIME_MS);
3133d8f7a89SGuenter Roeck 
31428a340dbSGuenter Roeck 	return err;
315beb1b6bbSSteven King }
316beb1b6bbSSteven King #endif /* CONFIG_PM */
317beb1b6bbSSteven King 
318dd378b1bSGrygorii Strashko static SIMPLE_DEV_PM_OPS(tmp102_dev_pm_ops, tmp102_suspend, tmp102_resume);
319dd378b1bSGrygorii Strashko 
320beb1b6bbSSteven King static const struct i2c_device_id tmp102_id[] = {
321cff37c9eSJean Delvare 	{ "tmp102", 0 },
322beb1b6bbSSteven King 	{ }
323beb1b6bbSSteven King };
324cff37c9eSJean Delvare MODULE_DEVICE_TABLE(i2c, tmp102_id);
325beb1b6bbSSteven King 
326*15390c61SJavier Martinez Canillas static const struct of_device_id tmp102_of_match[] = {
327*15390c61SJavier Martinez Canillas 	{ .compatible = "ti,tmp102" },
328*15390c61SJavier Martinez Canillas 	{ },
329*15390c61SJavier Martinez Canillas };
330*15390c61SJavier Martinez Canillas MODULE_DEVICE_TABLE(of, tmp102_of_match);
331*15390c61SJavier Martinez Canillas 
332beb1b6bbSSteven King static struct i2c_driver tmp102_driver = {
333beb1b6bbSSteven King 	.driver.name	= DRIVER_NAME,
334*15390c61SJavier Martinez Canillas 	.driver.of_match_table = of_match_ptr(tmp102_of_match),
335dd378b1bSGrygorii Strashko 	.driver.pm	= &tmp102_dev_pm_ops,
336beb1b6bbSSteven King 	.probe		= tmp102_probe,
337beb1b6bbSSteven King 	.id_table	= tmp102_id,
338beb1b6bbSSteven King };
339beb1b6bbSSteven King 
340f0967eeaSAxel Lin module_i2c_driver(tmp102_driver);
341beb1b6bbSSteven King 
342beb1b6bbSSteven King MODULE_AUTHOR("Steven King <sfking@fdwdc.com>");
343beb1b6bbSSteven King MODULE_DESCRIPTION("Texas Instruments TMP102 temperature sensor driver");
344beb1b6bbSSteven King MODULE_LICENSE("GPL");
345