15a0f50d1SAkshay Gupta // SPDX-License-Identifier: GPL-2.0-or-later 25a0f50d1SAkshay Gupta /* 35a0f50d1SAkshay Gupta * sbrmi.c - hwmon driver for a SB-RMI mailbox 45a0f50d1SAkshay Gupta * compliant AMD SoC device. 55a0f50d1SAkshay Gupta * 65a0f50d1SAkshay Gupta * Copyright (C) 2020-2021 Advanced Micro Devices, Inc. 75a0f50d1SAkshay Gupta */ 85a0f50d1SAkshay Gupta 95a0f50d1SAkshay Gupta #include <linux/delay.h> 105a0f50d1SAkshay Gupta #include <linux/err.h> 115a0f50d1SAkshay Gupta #include <linux/hwmon.h> 125a0f50d1SAkshay Gupta #include <linux/i2c.h> 135a0f50d1SAkshay Gupta #include <linux/init.h> 145a0f50d1SAkshay Gupta #include <linux/module.h> 155a0f50d1SAkshay Gupta #include <linux/mutex.h> 165a0f50d1SAkshay Gupta #include <linux/of.h> 175a0f50d1SAkshay Gupta 185a0f50d1SAkshay Gupta /* Do not allow setting negative power limit */ 195a0f50d1SAkshay Gupta #define SBRMI_PWR_MIN 0 205a0f50d1SAkshay Gupta /* Mask for Status Register bit[1] */ 215a0f50d1SAkshay Gupta #define SW_ALERT_MASK 0x2 225a0f50d1SAkshay Gupta 235a0f50d1SAkshay Gupta /* Software Interrupt for triggering */ 245a0f50d1SAkshay Gupta #define START_CMD 0x80 255a0f50d1SAkshay Gupta #define TRIGGER_MAILBOX 0x01 265a0f50d1SAkshay Gupta 275a0f50d1SAkshay Gupta /* 285a0f50d1SAkshay Gupta * SB-RMI supports soft mailbox service request to MP1 (power management 295a0f50d1SAkshay Gupta * firmware) through SBRMI inbound/outbound message registers. 305a0f50d1SAkshay Gupta * SB-RMI message IDs 315a0f50d1SAkshay Gupta */ 325a0f50d1SAkshay Gupta enum sbrmi_msg_id { 335a0f50d1SAkshay Gupta SBRMI_READ_PKG_PWR_CONSUMPTION = 0x1, 345a0f50d1SAkshay Gupta SBRMI_WRITE_PKG_PWR_LIMIT, 355a0f50d1SAkshay Gupta SBRMI_READ_PKG_PWR_LIMIT, 365a0f50d1SAkshay Gupta SBRMI_READ_PKG_MAX_PWR_LIMIT, 375a0f50d1SAkshay Gupta }; 385a0f50d1SAkshay Gupta 395a0f50d1SAkshay Gupta /* SB-RMI registers */ 405a0f50d1SAkshay Gupta enum sbrmi_reg { 415a0f50d1SAkshay Gupta SBRMI_CTRL = 0x01, 425a0f50d1SAkshay Gupta SBRMI_STATUS, 435a0f50d1SAkshay Gupta SBRMI_OUTBNDMSG0 = 0x30, 445a0f50d1SAkshay Gupta SBRMI_OUTBNDMSG1, 455a0f50d1SAkshay Gupta SBRMI_OUTBNDMSG2, 465a0f50d1SAkshay Gupta SBRMI_OUTBNDMSG3, 475a0f50d1SAkshay Gupta SBRMI_OUTBNDMSG4, 485a0f50d1SAkshay Gupta SBRMI_OUTBNDMSG5, 495a0f50d1SAkshay Gupta SBRMI_OUTBNDMSG6, 505a0f50d1SAkshay Gupta SBRMI_OUTBNDMSG7, 515a0f50d1SAkshay Gupta SBRMI_INBNDMSG0, 525a0f50d1SAkshay Gupta SBRMI_INBNDMSG1, 535a0f50d1SAkshay Gupta SBRMI_INBNDMSG2, 545a0f50d1SAkshay Gupta SBRMI_INBNDMSG3, 555a0f50d1SAkshay Gupta SBRMI_INBNDMSG4, 565a0f50d1SAkshay Gupta SBRMI_INBNDMSG5, 575a0f50d1SAkshay Gupta SBRMI_INBNDMSG6, 585a0f50d1SAkshay Gupta SBRMI_INBNDMSG7, 595a0f50d1SAkshay Gupta SBRMI_SW_INTERRUPT, 605a0f50d1SAkshay Gupta }; 615a0f50d1SAkshay Gupta 625a0f50d1SAkshay Gupta /* Each client has this additional data */ 635a0f50d1SAkshay Gupta struct sbrmi_data { 645a0f50d1SAkshay Gupta struct i2c_client *client; 655a0f50d1SAkshay Gupta struct mutex lock; 665a0f50d1SAkshay Gupta u32 pwr_limit_max; 675a0f50d1SAkshay Gupta }; 685a0f50d1SAkshay Gupta 695a0f50d1SAkshay Gupta struct sbrmi_mailbox_msg { 705a0f50d1SAkshay Gupta u8 cmd; 715a0f50d1SAkshay Gupta bool read; 725a0f50d1SAkshay Gupta u32 data_in; 735a0f50d1SAkshay Gupta u32 data_out; 745a0f50d1SAkshay Gupta }; 755a0f50d1SAkshay Gupta 765a0f50d1SAkshay Gupta static int sbrmi_enable_alert(struct i2c_client *client) 775a0f50d1SAkshay Gupta { 785a0f50d1SAkshay Gupta int ctrl; 795a0f50d1SAkshay Gupta 805a0f50d1SAkshay Gupta /* 815a0f50d1SAkshay Gupta * Enable the SB-RMI Software alert status 825a0f50d1SAkshay Gupta * by writing 0 to bit 4 of Control register(0x1) 835a0f50d1SAkshay Gupta */ 845a0f50d1SAkshay Gupta ctrl = i2c_smbus_read_byte_data(client, SBRMI_CTRL); 855a0f50d1SAkshay Gupta if (ctrl < 0) 865a0f50d1SAkshay Gupta return ctrl; 875a0f50d1SAkshay Gupta 885a0f50d1SAkshay Gupta if (ctrl & 0x10) { 895a0f50d1SAkshay Gupta ctrl &= ~0x10; 905a0f50d1SAkshay Gupta return i2c_smbus_write_byte_data(client, 915a0f50d1SAkshay Gupta SBRMI_CTRL, ctrl); 925a0f50d1SAkshay Gupta } 935a0f50d1SAkshay Gupta 945a0f50d1SAkshay Gupta return 0; 955a0f50d1SAkshay Gupta } 965a0f50d1SAkshay Gupta 975a0f50d1SAkshay Gupta static int rmi_mailbox_xfer(struct sbrmi_data *data, 985a0f50d1SAkshay Gupta struct sbrmi_mailbox_msg *msg) 995a0f50d1SAkshay Gupta { 1005a0f50d1SAkshay Gupta int i, ret, retry = 10; 1015a0f50d1SAkshay Gupta int sw_status; 1025a0f50d1SAkshay Gupta u8 byte; 1035a0f50d1SAkshay Gupta 1045a0f50d1SAkshay Gupta mutex_lock(&data->lock); 1055a0f50d1SAkshay Gupta 1065a0f50d1SAkshay Gupta /* Indicate firmware a command is to be serviced */ 1075a0f50d1SAkshay Gupta ret = i2c_smbus_write_byte_data(data->client, 1085a0f50d1SAkshay Gupta SBRMI_INBNDMSG7, START_CMD); 1095a0f50d1SAkshay Gupta if (ret < 0) 1105a0f50d1SAkshay Gupta goto exit_unlock; 1115a0f50d1SAkshay Gupta 1125a0f50d1SAkshay Gupta /* Write the command to SBRMI::InBndMsg_inst0 */ 1135a0f50d1SAkshay Gupta ret = i2c_smbus_write_byte_data(data->client, 1145a0f50d1SAkshay Gupta SBRMI_INBNDMSG0, msg->cmd); 1155a0f50d1SAkshay Gupta if (ret < 0) 1165a0f50d1SAkshay Gupta goto exit_unlock; 1175a0f50d1SAkshay Gupta 1185a0f50d1SAkshay Gupta /* 1195a0f50d1SAkshay Gupta * For both read and write the initiator (BMC) writes 1205a0f50d1SAkshay Gupta * Command Data In[31:0] to SBRMI::InBndMsg_inst[4:1] 1215a0f50d1SAkshay Gupta * SBRMI_x3C(MSB):SBRMI_x39(LSB) 1225a0f50d1SAkshay Gupta */ 1235a0f50d1SAkshay Gupta for (i = 0; i < 4; i++) { 1245a0f50d1SAkshay Gupta byte = (msg->data_in >> i * 8) & 0xff; 1255a0f50d1SAkshay Gupta ret = i2c_smbus_write_byte_data(data->client, 1265a0f50d1SAkshay Gupta SBRMI_INBNDMSG1 + i, byte); 1275a0f50d1SAkshay Gupta if (ret < 0) 1285a0f50d1SAkshay Gupta goto exit_unlock; 1295a0f50d1SAkshay Gupta } 1305a0f50d1SAkshay Gupta 1315a0f50d1SAkshay Gupta /* 1325a0f50d1SAkshay Gupta * Write 0x01 to SBRMI::SoftwareInterrupt to notify firmware to 1335a0f50d1SAkshay Gupta * perform the requested read or write command 1345a0f50d1SAkshay Gupta */ 1355a0f50d1SAkshay Gupta ret = i2c_smbus_write_byte_data(data->client, 1365a0f50d1SAkshay Gupta SBRMI_SW_INTERRUPT, TRIGGER_MAILBOX); 1375a0f50d1SAkshay Gupta if (ret < 0) 1385a0f50d1SAkshay Gupta goto exit_unlock; 1395a0f50d1SAkshay Gupta 1405a0f50d1SAkshay Gupta /* 1415a0f50d1SAkshay Gupta * Firmware will write SBRMI::Status[SwAlertSts]=1 to generate 1425a0f50d1SAkshay Gupta * an ALERT (if enabled) to initiator (BMC) to indicate completion 1435a0f50d1SAkshay Gupta * of the requested command 1445a0f50d1SAkshay Gupta */ 1455a0f50d1SAkshay Gupta do { 1465a0f50d1SAkshay Gupta sw_status = i2c_smbus_read_byte_data(data->client, 1475a0f50d1SAkshay Gupta SBRMI_STATUS); 1485a0f50d1SAkshay Gupta if (sw_status < 0) { 1495a0f50d1SAkshay Gupta ret = sw_status; 1505a0f50d1SAkshay Gupta goto exit_unlock; 1515a0f50d1SAkshay Gupta } 1525a0f50d1SAkshay Gupta if (sw_status & SW_ALERT_MASK) 1535a0f50d1SAkshay Gupta break; 1545a0f50d1SAkshay Gupta usleep_range(50, 100); 1555a0f50d1SAkshay Gupta } while (retry--); 1565a0f50d1SAkshay Gupta 1575a0f50d1SAkshay Gupta if (retry < 0) { 1585a0f50d1SAkshay Gupta dev_err(&data->client->dev, 1595a0f50d1SAkshay Gupta "Firmware fail to indicate command completion\n"); 1605a0f50d1SAkshay Gupta ret = -EIO; 1615a0f50d1SAkshay Gupta goto exit_unlock; 1625a0f50d1SAkshay Gupta } 1635a0f50d1SAkshay Gupta 1645a0f50d1SAkshay Gupta /* 1655a0f50d1SAkshay Gupta * For a read operation, the initiator (BMC) reads the firmware 1665a0f50d1SAkshay Gupta * response Command Data Out[31:0] from SBRMI::OutBndMsg_inst[4:1] 1675a0f50d1SAkshay Gupta * {SBRMI_x34(MSB):SBRMI_x31(LSB)}. 1685a0f50d1SAkshay Gupta */ 1695a0f50d1SAkshay Gupta if (msg->read) { 1705a0f50d1SAkshay Gupta for (i = 0; i < 4; i++) { 1715a0f50d1SAkshay Gupta ret = i2c_smbus_read_byte_data(data->client, 1725a0f50d1SAkshay Gupta SBRMI_OUTBNDMSG1 + i); 1735a0f50d1SAkshay Gupta if (ret < 0) 1745a0f50d1SAkshay Gupta goto exit_unlock; 1755a0f50d1SAkshay Gupta msg->data_out |= ret << i * 8; 1765a0f50d1SAkshay Gupta } 1775a0f50d1SAkshay Gupta } 1785a0f50d1SAkshay Gupta 1795a0f50d1SAkshay Gupta /* 1805a0f50d1SAkshay Gupta * BMC must write 1'b1 to SBRMI::Status[SwAlertSts] to clear the 1815a0f50d1SAkshay Gupta * ALERT to initiator 1825a0f50d1SAkshay Gupta */ 1835a0f50d1SAkshay Gupta ret = i2c_smbus_write_byte_data(data->client, SBRMI_STATUS, 1845a0f50d1SAkshay Gupta sw_status | SW_ALERT_MASK); 1855a0f50d1SAkshay Gupta 1865a0f50d1SAkshay Gupta exit_unlock: 1875a0f50d1SAkshay Gupta mutex_unlock(&data->lock); 1885a0f50d1SAkshay Gupta return ret; 1895a0f50d1SAkshay Gupta } 1905a0f50d1SAkshay Gupta 1915a0f50d1SAkshay Gupta static int sbrmi_read(struct device *dev, enum hwmon_sensor_types type, 1925a0f50d1SAkshay Gupta u32 attr, int channel, long *val) 1935a0f50d1SAkshay Gupta { 1945a0f50d1SAkshay Gupta struct sbrmi_data *data = dev_get_drvdata(dev); 1955a0f50d1SAkshay Gupta struct sbrmi_mailbox_msg msg = { 0 }; 1965a0f50d1SAkshay Gupta int ret; 1975a0f50d1SAkshay Gupta 1985a0f50d1SAkshay Gupta if (type != hwmon_power) 1995a0f50d1SAkshay Gupta return -EINVAL; 2005a0f50d1SAkshay Gupta 2015a0f50d1SAkshay Gupta msg.read = true; 2025a0f50d1SAkshay Gupta switch (attr) { 2035a0f50d1SAkshay Gupta case hwmon_power_input: 2045a0f50d1SAkshay Gupta msg.cmd = SBRMI_READ_PKG_PWR_CONSUMPTION; 2055a0f50d1SAkshay Gupta ret = rmi_mailbox_xfer(data, &msg); 2065a0f50d1SAkshay Gupta break; 2075a0f50d1SAkshay Gupta case hwmon_power_cap: 2085a0f50d1SAkshay Gupta msg.cmd = SBRMI_READ_PKG_PWR_LIMIT; 2095a0f50d1SAkshay Gupta ret = rmi_mailbox_xfer(data, &msg); 2105a0f50d1SAkshay Gupta break; 2115a0f50d1SAkshay Gupta case hwmon_power_cap_max: 2125a0f50d1SAkshay Gupta msg.data_out = data->pwr_limit_max; 2135a0f50d1SAkshay Gupta ret = 0; 2145a0f50d1SAkshay Gupta break; 2155a0f50d1SAkshay Gupta default: 2165a0f50d1SAkshay Gupta return -EINVAL; 2175a0f50d1SAkshay Gupta } 2185a0f50d1SAkshay Gupta if (ret < 0) 2195a0f50d1SAkshay Gupta return ret; 2205a0f50d1SAkshay Gupta /* hwmon power attributes are in microWatt */ 2215a0f50d1SAkshay Gupta *val = (long)msg.data_out * 1000; 2225a0f50d1SAkshay Gupta return ret; 2235a0f50d1SAkshay Gupta } 2245a0f50d1SAkshay Gupta 2255a0f50d1SAkshay Gupta static int sbrmi_write(struct device *dev, enum hwmon_sensor_types type, 2265a0f50d1SAkshay Gupta u32 attr, int channel, long val) 2275a0f50d1SAkshay Gupta { 2285a0f50d1SAkshay Gupta struct sbrmi_data *data = dev_get_drvdata(dev); 2295a0f50d1SAkshay Gupta struct sbrmi_mailbox_msg msg = { 0 }; 2305a0f50d1SAkshay Gupta 2315a0f50d1SAkshay Gupta if (type != hwmon_power && attr != hwmon_power_cap) 2325a0f50d1SAkshay Gupta return -EINVAL; 2335a0f50d1SAkshay Gupta /* 2345a0f50d1SAkshay Gupta * hwmon power attributes are in microWatt 2355a0f50d1SAkshay Gupta * mailbox read/write is in mWatt 2365a0f50d1SAkshay Gupta */ 2375a0f50d1SAkshay Gupta val /= 1000; 2385a0f50d1SAkshay Gupta 2395a0f50d1SAkshay Gupta val = clamp_val(val, SBRMI_PWR_MIN, data->pwr_limit_max); 2405a0f50d1SAkshay Gupta 2415a0f50d1SAkshay Gupta msg.cmd = SBRMI_WRITE_PKG_PWR_LIMIT; 2425a0f50d1SAkshay Gupta msg.data_in = val; 2435a0f50d1SAkshay Gupta msg.read = false; 2445a0f50d1SAkshay Gupta 2455a0f50d1SAkshay Gupta return rmi_mailbox_xfer(data, &msg); 2465a0f50d1SAkshay Gupta } 2475a0f50d1SAkshay Gupta 2485a0f50d1SAkshay Gupta static umode_t sbrmi_is_visible(const void *data, 2495a0f50d1SAkshay Gupta enum hwmon_sensor_types type, 2505a0f50d1SAkshay Gupta u32 attr, int channel) 2515a0f50d1SAkshay Gupta { 2525a0f50d1SAkshay Gupta switch (type) { 2535a0f50d1SAkshay Gupta case hwmon_power: 2545a0f50d1SAkshay Gupta switch (attr) { 2555a0f50d1SAkshay Gupta case hwmon_power_input: 2565a0f50d1SAkshay Gupta case hwmon_power_cap_max: 2575a0f50d1SAkshay Gupta return 0444; 2585a0f50d1SAkshay Gupta case hwmon_power_cap: 2595a0f50d1SAkshay Gupta return 0644; 2605a0f50d1SAkshay Gupta } 2615a0f50d1SAkshay Gupta break; 2625a0f50d1SAkshay Gupta default: 2635a0f50d1SAkshay Gupta break; 2645a0f50d1SAkshay Gupta } 2655a0f50d1SAkshay Gupta return 0; 2665a0f50d1SAkshay Gupta } 2675a0f50d1SAkshay Gupta 268*29423978SKrzysztof Kozlowski static const struct hwmon_channel_info * const sbrmi_info[] = { 2695a0f50d1SAkshay Gupta HWMON_CHANNEL_INFO(power, 2705a0f50d1SAkshay Gupta HWMON_P_INPUT | HWMON_P_CAP | HWMON_P_CAP_MAX), 2715a0f50d1SAkshay Gupta NULL 2725a0f50d1SAkshay Gupta }; 2735a0f50d1SAkshay Gupta 2745a0f50d1SAkshay Gupta static const struct hwmon_ops sbrmi_hwmon_ops = { 2755a0f50d1SAkshay Gupta .is_visible = sbrmi_is_visible, 2765a0f50d1SAkshay Gupta .read = sbrmi_read, 2775a0f50d1SAkshay Gupta .write = sbrmi_write, 2785a0f50d1SAkshay Gupta }; 2795a0f50d1SAkshay Gupta 2805a0f50d1SAkshay Gupta static const struct hwmon_chip_info sbrmi_chip_info = { 2815a0f50d1SAkshay Gupta .ops = &sbrmi_hwmon_ops, 2825a0f50d1SAkshay Gupta .info = sbrmi_info, 2835a0f50d1SAkshay Gupta }; 2845a0f50d1SAkshay Gupta 2855a0f50d1SAkshay Gupta static int sbrmi_get_max_pwr_limit(struct sbrmi_data *data) 2865a0f50d1SAkshay Gupta { 2875a0f50d1SAkshay Gupta struct sbrmi_mailbox_msg msg = { 0 }; 2885a0f50d1SAkshay Gupta int ret; 2895a0f50d1SAkshay Gupta 2905a0f50d1SAkshay Gupta msg.cmd = SBRMI_READ_PKG_MAX_PWR_LIMIT; 2915a0f50d1SAkshay Gupta msg.read = true; 2925a0f50d1SAkshay Gupta ret = rmi_mailbox_xfer(data, &msg); 2935a0f50d1SAkshay Gupta if (ret < 0) 2945a0f50d1SAkshay Gupta return ret; 2955a0f50d1SAkshay Gupta data->pwr_limit_max = msg.data_out; 2965a0f50d1SAkshay Gupta 2975a0f50d1SAkshay Gupta return ret; 2985a0f50d1SAkshay Gupta } 2995a0f50d1SAkshay Gupta 300deeab9eaSStephen Kitt static int sbrmi_probe(struct i2c_client *client) 3015a0f50d1SAkshay Gupta { 3025a0f50d1SAkshay Gupta struct device *dev = &client->dev; 3035a0f50d1SAkshay Gupta struct device *hwmon_dev; 3045a0f50d1SAkshay Gupta struct sbrmi_data *data; 3055a0f50d1SAkshay Gupta int ret; 3065a0f50d1SAkshay Gupta 3075a0f50d1SAkshay Gupta data = devm_kzalloc(dev, sizeof(struct sbrmi_data), GFP_KERNEL); 3085a0f50d1SAkshay Gupta if (!data) 3095a0f50d1SAkshay Gupta return -ENOMEM; 3105a0f50d1SAkshay Gupta 3115a0f50d1SAkshay Gupta data->client = client; 3125a0f50d1SAkshay Gupta mutex_init(&data->lock); 3135a0f50d1SAkshay Gupta 3145a0f50d1SAkshay Gupta /* Enable alert for SB-RMI sequence */ 3155a0f50d1SAkshay Gupta ret = sbrmi_enable_alert(client); 3165a0f50d1SAkshay Gupta if (ret < 0) 3175a0f50d1SAkshay Gupta return ret; 3185a0f50d1SAkshay Gupta 3195a0f50d1SAkshay Gupta /* Cache maximum power limit */ 3205a0f50d1SAkshay Gupta ret = sbrmi_get_max_pwr_limit(data); 3215a0f50d1SAkshay Gupta if (ret < 0) 3225a0f50d1SAkshay Gupta return ret; 3235a0f50d1SAkshay Gupta 3245a0f50d1SAkshay Gupta hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data, 3255a0f50d1SAkshay Gupta &sbrmi_chip_info, NULL); 3265a0f50d1SAkshay Gupta 3275a0f50d1SAkshay Gupta return PTR_ERR_OR_ZERO(hwmon_dev); 3285a0f50d1SAkshay Gupta } 3295a0f50d1SAkshay Gupta 3305a0f50d1SAkshay Gupta static const struct i2c_device_id sbrmi_id[] = { 3315a0f50d1SAkshay Gupta {"sbrmi", 0}, 3325a0f50d1SAkshay Gupta {} 3335a0f50d1SAkshay Gupta }; 3345a0f50d1SAkshay Gupta MODULE_DEVICE_TABLE(i2c, sbrmi_id); 3355a0f50d1SAkshay Gupta 3365a0f50d1SAkshay Gupta static const struct of_device_id __maybe_unused sbrmi_of_match[] = { 3375a0f50d1SAkshay Gupta { 3385a0f50d1SAkshay Gupta .compatible = "amd,sbrmi", 3395a0f50d1SAkshay Gupta }, 3405a0f50d1SAkshay Gupta { }, 3415a0f50d1SAkshay Gupta }; 3425a0f50d1SAkshay Gupta MODULE_DEVICE_TABLE(of, sbrmi_of_match); 3435a0f50d1SAkshay Gupta 3445a0f50d1SAkshay Gupta static struct i2c_driver sbrmi_driver = { 3455a0f50d1SAkshay Gupta .class = I2C_CLASS_HWMON, 3465a0f50d1SAkshay Gupta .driver = { 3475a0f50d1SAkshay Gupta .name = "sbrmi", 3485a0f50d1SAkshay Gupta .of_match_table = of_match_ptr(sbrmi_of_match), 3495a0f50d1SAkshay Gupta }, 350deeab9eaSStephen Kitt .probe_new = sbrmi_probe, 3515a0f50d1SAkshay Gupta .id_table = sbrmi_id, 3525a0f50d1SAkshay Gupta }; 3535a0f50d1SAkshay Gupta 3545a0f50d1SAkshay Gupta module_i2c_driver(sbrmi_driver); 3555a0f50d1SAkshay Gupta 3565a0f50d1SAkshay Gupta MODULE_AUTHOR("Akshay Gupta <akshay.gupta@amd.com>"); 3575a0f50d1SAkshay Gupta MODULE_DESCRIPTION("Hwmon driver for AMD SB-RMI emulated sensor"); 3585a0f50d1SAkshay Gupta MODULE_LICENSE("GPL"); 359