1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Hardware monitoring driver for MPS Multi-phase Digital VR Controllers 4 * 5 * Copyright (C) 2020 Nvidia Technologies Ltd. 6 */ 7 8 #include <linux/bitops.h> 9 #include <linux/err.h> 10 #include <linux/i2c.h> 11 #include <linux/init.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/of_device.h> 15 #include "pmbus.h" 16 17 /* Vendor specific registers. */ 18 #define MP2975_MFR_APS_HYS_R2 0x0d 19 #define MP2975_MFR_SLOPE_TRIM3 0x1d 20 #define MP2975_MFR_VR_MULTI_CONFIG_R1 0x0d 21 #define MP2975_MFR_VR_MULTI_CONFIG_R2 0x1d 22 #define MP2975_MFR_APS_DECAY_ADV 0x56 23 #define MP2975_MFR_DC_LOOP_CTRL 0x59 24 #define MP2975_MFR_OCP_UCP_PHASE_SET 0x65 25 #define MP2975_MFR_VR_CONFIG1 0x68 26 #define MP2975_MFR_READ_CS1_2 0x82 27 #define MP2975_MFR_READ_CS3_4 0x83 28 #define MP2975_MFR_READ_CS5_6 0x84 29 #define MP2975_MFR_READ_CS7_8 0x85 30 #define MP2975_MFR_READ_CS9_10 0x86 31 #define MP2975_MFR_READ_CS11_12 0x87 32 #define MP2975_MFR_READ_IOUT_PK 0x90 33 #define MP2975_MFR_READ_POUT_PK 0x91 34 #define MP2975_MFR_READ_VREF_R1 0xa1 35 #define MP2975_MFR_READ_VREF_R2 0xa3 36 #define MP2975_MFR_OVP_TH_SET 0xe5 37 #define MP2975_MFR_UVP_SET 0xe6 38 39 #define MP2973_MFR_RESO_SET 0xc7 40 41 #define MP2975_VOUT_FORMAT BIT(15) 42 #define MP2975_VID_STEP_SEL_R1 BIT(4) 43 #define MP2975_IMVP9_EN_R1 BIT(13) 44 #define MP2975_VID_STEP_SEL_R2 BIT(3) 45 #define MP2975_IMVP9_EN_R2 BIT(12) 46 #define MP2975_PRT_THRES_DIV_OV_EN BIT(14) 47 #define MP2975_DRMOS_KCS GENMASK(13, 12) 48 #define MP2975_PROT_DEV_OV_OFF 10 49 #define MP2975_PROT_DEV_OV_ON 5 50 #define MP2975_SENSE_AMPL BIT(11) 51 #define MP2975_SENSE_AMPL_UNIT 1 52 #define MP2975_SENSE_AMPL_HALF 2 53 #define MP2975_VIN_UV_LIMIT_UNIT 8 54 55 #define MP2973_VOUT_FORMAT_R1 GENMASK(7, 6) 56 #define MP2973_VOUT_FORMAT_R2 GENMASK(4, 3) 57 #define MP2973_VOUT_FORMAT_DIRECT_R1 BIT(7) 58 #define MP2973_VOUT_FORMAT_LINEAR_R1 BIT(6) 59 #define MP2973_VOUT_FORMAT_DIRECT_R2 BIT(4) 60 #define MP2973_VOUT_FORMAT_LINEAR_R2 BIT(3) 61 62 #define MP2973_MFR_VR_MULTI_CONFIG_R1 0x0d 63 #define MP2973_MFR_VR_MULTI_CONFIG_R2 0x1d 64 #define MP2973_VID_STEP_SEL_R1 BIT(4) 65 #define MP2973_IMVP9_EN_R1 BIT(14) 66 #define MP2973_VID_STEP_SEL_R2 BIT(3) 67 #define MP2973_IMVP9_EN_R2 BIT(13) 68 69 #define MP2973_MFR_OCP_TOTAL_SET 0x5f 70 #define MP2973_OCP_TOTAL_CUR_MASK GENMASK(6, 0) 71 #define MP2973_MFR_OCP_LEVEL_RES BIT(15) 72 73 #define MP2973_MFR_READ_IOUT_PK 0x90 74 #define MP2973_MFR_READ_POUT_PK 0x91 75 76 #define MP2975_MAX_PHASE_RAIL1 8 77 #define MP2975_MAX_PHASE_RAIL2 4 78 79 #define MP2973_MAX_PHASE_RAIL1 14 80 #define MP2973_MAX_PHASE_RAIL2 6 81 82 #define MP2971_MAX_PHASE_RAIL1 8 83 #define MP2971_MAX_PHASE_RAIL2 3 84 85 #define MP2975_PAGE_NUM 2 86 87 #define MP2975_RAIL2_FUNC (PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | \ 88 PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | \ 89 PMBUS_HAVE_POUT | PMBUS_PHASE_VIRTUAL) 90 91 enum chips { 92 mp2971, mp2973, mp2975 93 }; 94 95 static const int mp2975_max_phases[][MP2975_PAGE_NUM] = { 96 [mp2975] = { MP2975_MAX_PHASE_RAIL1, MP2975_MAX_PHASE_RAIL2 }, 97 [mp2973] = { MP2973_MAX_PHASE_RAIL1, MP2973_MAX_PHASE_RAIL2 }, 98 [mp2971] = { MP2971_MAX_PHASE_RAIL1, MP2971_MAX_PHASE_RAIL2 }, 99 }; 100 101 struct mp2975_data { 102 struct pmbus_driver_info info; 103 enum chips chip_id; 104 int vout_scale; 105 int max_phases[MP2975_PAGE_NUM]; 106 int vid_step[MP2975_PAGE_NUM]; 107 int vref[MP2975_PAGE_NUM]; 108 int vref_off[MP2975_PAGE_NUM]; 109 int vout_max[MP2975_PAGE_NUM]; 110 int vout_ov_fixed[MP2975_PAGE_NUM]; 111 int curr_sense_gain[MP2975_PAGE_NUM]; 112 }; 113 114 static const struct i2c_device_id mp2975_id[] = { 115 {"mp2971", mp2971}, 116 {"mp2973", mp2973}, 117 {"mp2975", mp2975}, 118 {} 119 }; 120 121 MODULE_DEVICE_TABLE(i2c, mp2975_id); 122 123 static const struct regulator_desc __maybe_unused mp2975_reg_desc[] = { 124 PMBUS_REGULATOR("vout", 0), 125 PMBUS_REGULATOR("vout", 1), 126 }; 127 128 #define to_mp2975_data(x) container_of(x, struct mp2975_data, info) 129 130 static int mp2975_read_byte_data(struct i2c_client *client, int page, int reg) 131 { 132 switch (reg) { 133 case PMBUS_VOUT_MODE: 134 /* 135 * Report direct format as configured by MFR_DC_LOOP_CTRL. 136 * Unlike on MP2971/MP2973 the reported VOUT_MODE isn't automatically 137 * internally updated, but always reads as PB_VOUT_MODE_VID. 138 */ 139 return PB_VOUT_MODE_DIRECT; 140 default: 141 return -ENODATA; 142 } 143 } 144 145 static int 146 mp2975_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg, 147 u16 mask) 148 { 149 int ret = pmbus_read_word_data(client, page, phase, reg); 150 151 return (ret > 0) ? ret & mask : ret; 152 } 153 154 static int 155 mp2975_vid2direct(int vrf, int val) 156 { 157 switch (vrf) { 158 case vr12: 159 if (val >= 0x01) 160 return 250 + (val - 1) * 5; 161 break; 162 case vr13: 163 if (val >= 0x01) 164 return 500 + (val - 1) * 10; 165 break; 166 case imvp9: 167 if (val >= 0x01) 168 return 200 + (val - 1) * 10; 169 break; 170 default: 171 return -EINVAL; 172 } 173 return 0; 174 } 175 176 #define MAX_LIN_MANTISSA (1023 * 1000) 177 #define MIN_LIN_MANTISSA (511 * 1000) 178 179 /* Converts a milli-unit DIRECT value to LINEAR11 format */ 180 static u16 mp2975_data2reg_linear11(s64 val) 181 { 182 s16 exponent = 0, mantissa; 183 bool negative = false; 184 185 /* simple case */ 186 if (val == 0) 187 return 0; 188 189 /* Reduce large mantissa until it fits into 10 bit */ 190 while (val >= MAX_LIN_MANTISSA && exponent < 15) { 191 exponent++; 192 val >>= 1; 193 } 194 /* Increase small mantissa to improve precision */ 195 while (val < MIN_LIN_MANTISSA && exponent > -15) { 196 exponent--; 197 val <<= 1; 198 } 199 200 /* Convert mantissa from milli-units to units */ 201 mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff); 202 203 /* restore sign */ 204 if (negative) 205 mantissa = -mantissa; 206 207 /* Convert to 5 bit exponent, 11 bit mantissa */ 208 return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800); 209 } 210 211 static int 212 mp2975_read_phase(struct i2c_client *client, struct mp2975_data *data, 213 int page, int phase, u8 reg) 214 { 215 int ph_curr, ret; 216 217 ret = pmbus_read_word_data(client, page, phase, reg); 218 if (ret < 0) 219 return ret; 220 221 if (!((phase + 1) % MP2975_PAGE_NUM)) 222 ret >>= 8; 223 ret &= 0xff; 224 225 /* 226 * Output value is calculated as: (READ_CSx / 80 – 1.23) / (Kcs * Rcs) 227 * where: 228 * - Kcs is the DrMOS current sense gain of power stage, which is 229 * obtained from the register MP2975_MFR_VR_CONFIG1, bits 13-12 with 230 * the following selection of DrMOS (data->curr_sense_gain[page]): 231 * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. 232 * - Rcs is the internal phase current sense resistor which is constant 233 * value 1kΩ. 234 */ 235 ph_curr = ret * 100 - 9800; 236 237 /* 238 * Current phase sensing, providing by the device is not accurate 239 * for the light load. This because sampling of current occurrence of 240 * bit weight has a big deviation for light load. For handling such 241 * case phase current is represented as the maximum between the value 242 * calculated above and total rail current divided by number phases. 243 */ 244 ret = pmbus_read_word_data(client, page, phase, PMBUS_READ_IOUT); 245 if (ret < 0) 246 return ret; 247 248 return max_t(int, DIV_ROUND_CLOSEST(ret, data->info.phases[page]), 249 DIV_ROUND_CLOSEST(ph_curr, data->curr_sense_gain[page])); 250 } 251 252 static int 253 mp2975_read_phases(struct i2c_client *client, struct mp2975_data *data, 254 int page, int phase) 255 { 256 int ret; 257 258 if (page) { 259 switch (phase) { 260 case 0 ... 1: 261 ret = mp2975_read_phase(client, data, page, phase, 262 MP2975_MFR_READ_CS7_8); 263 break; 264 case 2 ... 3: 265 ret = mp2975_read_phase(client, data, page, phase, 266 MP2975_MFR_READ_CS9_10); 267 break; 268 case 4 ... 5: 269 ret = mp2975_read_phase(client, data, page, phase, 270 MP2975_MFR_READ_CS11_12); 271 break; 272 default: 273 return -ENODATA; 274 } 275 } else { 276 switch (phase) { 277 case 0 ... 1: 278 ret = mp2975_read_phase(client, data, page, phase, 279 MP2975_MFR_READ_CS1_2); 280 break; 281 case 2 ... 3: 282 ret = mp2975_read_phase(client, data, page, phase, 283 MP2975_MFR_READ_CS3_4); 284 break; 285 case 4 ... 5: 286 ret = mp2975_read_phase(client, data, page, phase, 287 MP2975_MFR_READ_CS5_6); 288 break; 289 case 6 ... 7: 290 ret = mp2975_read_phase(client, data, page, phase, 291 MP2975_MFR_READ_CS7_8); 292 break; 293 case 8 ... 9: 294 ret = mp2975_read_phase(client, data, page, phase, 295 MP2975_MFR_READ_CS9_10); 296 break; 297 case 10 ... 11: 298 ret = mp2975_read_phase(client, data, page, phase, 299 MP2975_MFR_READ_CS11_12); 300 break; 301 default: 302 return -ENODATA; 303 } 304 } 305 return ret; 306 } 307 308 static int mp2973_read_word_data(struct i2c_client *client, int page, 309 int phase, int reg) 310 { 311 const struct pmbus_driver_info *info = pmbus_get_driver_info(client); 312 struct mp2975_data *data = to_mp2975_data(info); 313 int ret; 314 315 switch (reg) { 316 case PMBUS_STATUS_WORD: 317 /* MP2973 & MP2971 return PGOOD instead of PB_STATUS_POWER_GOOD_N. */ 318 ret = pmbus_read_word_data(client, page, phase, reg); 319 ret ^= PB_STATUS_POWER_GOOD_N; 320 break; 321 case PMBUS_OT_FAULT_LIMIT: 322 ret = mp2975_read_word_helper(client, page, phase, reg, 323 GENMASK(7, 0)); 324 break; 325 case PMBUS_VIN_OV_FAULT_LIMIT: 326 ret = mp2975_read_word_helper(client, page, phase, reg, 327 GENMASK(7, 0)); 328 if (ret < 0) 329 return ret; 330 331 ret = DIV_ROUND_CLOSEST(ret, MP2975_VIN_UV_LIMIT_UNIT); 332 break; 333 case PMBUS_VOUT_OV_FAULT_LIMIT: 334 /* 335 * MP2971 and mp2973 only supports tracking (ovp1) mode. 336 */ 337 ret = mp2975_read_word_helper(client, page, phase, 338 MP2975_MFR_OVP_TH_SET, 339 GENMASK(2, 0)); 340 if (ret < 0) 341 return ret; 342 343 ret = data->vout_max[page] + 50 * (ret + 1); 344 break; 345 case PMBUS_VOUT_UV_FAULT_LIMIT: 346 ret = mp2975_read_word_helper(client, page, phase, reg, 347 GENMASK(8, 0)); 348 if (ret < 0) 349 return ret; 350 ret = mp2975_vid2direct(info->vrm_version[page], ret); 351 break; 352 case PMBUS_VIRT_READ_POUT_MAX: 353 ret = pmbus_read_word_data(client, page, phase, 354 MP2973_MFR_READ_POUT_PK); 355 break; 356 case PMBUS_VIRT_READ_IOUT_MAX: 357 ret = pmbus_read_word_data(client, page, phase, 358 MP2973_MFR_READ_IOUT_PK); 359 break; 360 case PMBUS_IOUT_OC_FAULT_LIMIT: 361 ret = mp2975_read_word_helper(client, page, phase, 362 MP2973_MFR_OCP_TOTAL_SET, 363 GENMASK(15, 0)); 364 if (ret < 0) 365 return ret; 366 367 if (ret & MP2973_MFR_OCP_LEVEL_RES) 368 ret = 2 * (ret & MP2973_OCP_TOTAL_CUR_MASK); 369 else 370 ret = ret & MP2973_OCP_TOTAL_CUR_MASK; 371 372 ret = mp2975_data2reg_linear11(ret * info->phases[page] * 1000); 373 break; 374 case PMBUS_UT_WARN_LIMIT: 375 case PMBUS_UT_FAULT_LIMIT: 376 case PMBUS_VIN_UV_WARN_LIMIT: 377 case PMBUS_VIN_UV_FAULT_LIMIT: 378 case PMBUS_VOUT_UV_WARN_LIMIT: 379 case PMBUS_VOUT_OV_WARN_LIMIT: 380 case PMBUS_VIN_OV_WARN_LIMIT: 381 case PMBUS_IIN_OC_FAULT_LIMIT: 382 case PMBUS_IOUT_OC_LV_FAULT_LIMIT: 383 case PMBUS_IOUT_OC_WARN_LIMIT: 384 case PMBUS_IOUT_UC_FAULT_LIMIT: 385 case PMBUS_POUT_OP_FAULT_LIMIT: 386 case PMBUS_POUT_OP_WARN_LIMIT: 387 case PMBUS_PIN_OP_WARN_LIMIT: 388 return -ENXIO; 389 default: 390 return -ENODATA; 391 } 392 393 return ret; 394 } 395 396 static int mp2973_write_word_data(struct i2c_client *client, int page, 397 int reg, u16 word) 398 { 399 u8 target, mask; 400 long ret; 401 402 if (reg != PMBUS_SMBALERT_MASK) 403 return -ENODATA; 404 405 /* 406 * Vendor-specific SMBALERT_MASK register with 16 maskable bits. 407 */ 408 ret = pmbus_read_word_data(client, 0, 0, PMBUS_SMBALERT_MASK); 409 if (ret < 0) 410 return ret; 411 412 target = word & 0xff; 413 mask = word >> 8; 414 415 /* 416 * Set/Clear 'bit' in 'ret' based on condition followed by define for each bit in SMBALERT_MASK. 417 * Also bit 2 & 15 are reserved. 418 */ 419 420 #define MP2973_TEMP_OT 0 421 #define MP2973_VIN_UVLO 1 422 #define MP2973_VIN_OVP 3 423 #define MP2973_MTP_FAULT 4 424 #define MP2973_OTHER_COMM 5 425 #define MP2973_MTP_BLK_TRIG 6 426 #define MP2973_PACKET_ERROR 7 427 #define MP2973_INVALID_DATA 8 428 #define MP2973_INVALID_COMMAND 9 429 #define MP2973_IOUT_OC_LV 10 430 #define MP2973_IOUT_OC 11 431 #define MP2973_VOUT_MAX_MIN_WARNING 12 432 #define MP2973_VOLTAGE_UV 13 433 #define MP2973_VOLTAGE_OV 14 434 435 switch (target) { 436 case PMBUS_STATUS_CML: 437 __assign_bit(MP2973_INVALID_DATA, &ret, !(mask & PB_CML_FAULT_INVALID_DATA)); 438 __assign_bit(MP2973_INVALID_COMMAND, &ret, !(mask & PB_CML_FAULT_INVALID_COMMAND)); 439 __assign_bit(MP2973_OTHER_COMM, &ret, !(mask & PB_CML_FAULT_OTHER_COMM)); 440 __assign_bit(MP2973_PACKET_ERROR, &ret, !(mask & PB_CML_FAULT_PACKET_ERROR)); 441 break; 442 case PMBUS_STATUS_VOUT: 443 __assign_bit(MP2973_VOLTAGE_UV, &ret, !(mask & PB_VOLTAGE_UV_FAULT)); 444 __assign_bit(MP2973_VOLTAGE_OV, &ret, !(mask & PB_VOLTAGE_OV_FAULT)); 445 break; 446 case PMBUS_STATUS_IOUT: 447 __assign_bit(MP2973_IOUT_OC, &ret, !(mask & PB_IOUT_OC_FAULT)); 448 __assign_bit(MP2973_IOUT_OC_LV, &ret, !(mask & PB_IOUT_OC_LV_FAULT)); 449 break; 450 case PMBUS_STATUS_TEMPERATURE: 451 __assign_bit(MP2973_TEMP_OT, &ret, !(mask & PB_TEMP_OT_FAULT)); 452 break; 453 /* 454 * Map remaining bits to MFR specific to let the PMBUS core mask 455 * those bits by default. 456 */ 457 case PMBUS_STATUS_MFR_SPECIFIC: 458 __assign_bit(MP2973_VIN_UVLO, &ret, !(mask & BIT(1))); 459 __assign_bit(MP2973_VIN_OVP, &ret, !(mask & BIT(3))); 460 __assign_bit(MP2973_MTP_FAULT, &ret, !(mask & BIT(4))); 461 __assign_bit(MP2973_MTP_BLK_TRIG, &ret, !(mask & BIT(6))); 462 break; 463 default: 464 return 0; 465 } 466 467 return pmbus_write_word_data(client, 0, PMBUS_SMBALERT_MASK, ret); 468 } 469 470 static int mp2975_read_word_data(struct i2c_client *client, int page, 471 int phase, int reg) 472 { 473 const struct pmbus_driver_info *info = pmbus_get_driver_info(client); 474 struct mp2975_data *data = to_mp2975_data(info); 475 int ret; 476 477 switch (reg) { 478 case PMBUS_OT_FAULT_LIMIT: 479 ret = mp2975_read_word_helper(client, page, phase, reg, 480 GENMASK(7, 0)); 481 break; 482 case PMBUS_VIN_OV_FAULT_LIMIT: 483 ret = mp2975_read_word_helper(client, page, phase, reg, 484 GENMASK(7, 0)); 485 if (ret < 0) 486 return ret; 487 488 ret = DIV_ROUND_CLOSEST(ret, MP2975_VIN_UV_LIMIT_UNIT); 489 break; 490 case PMBUS_VOUT_OV_FAULT_LIMIT: 491 /* 492 * Register provides two values for over-voltage protection 493 * threshold for fixed (ovp2) and tracking (ovp1) modes. The 494 * minimum of these two values is provided as over-voltage 495 * fault alarm. 496 */ 497 ret = mp2975_read_word_helper(client, page, phase, 498 MP2975_MFR_OVP_TH_SET, 499 GENMASK(2, 0)); 500 if (ret < 0) 501 return ret; 502 503 ret = min_t(int, data->vout_max[page] + 50 * (ret + 1), 504 data->vout_ov_fixed[page]); 505 break; 506 case PMBUS_VOUT_UV_FAULT_LIMIT: 507 ret = mp2975_read_word_helper(client, page, phase, 508 MP2975_MFR_UVP_SET, 509 GENMASK(2, 0)); 510 if (ret < 0) 511 return ret; 512 513 ret = DIV_ROUND_CLOSEST(data->vref[page] * 10 - 50 * 514 (ret + 1) * data->vout_scale, 10); 515 break; 516 case PMBUS_VIRT_READ_POUT_MAX: 517 ret = mp2975_read_word_helper(client, page, phase, 518 MP2975_MFR_READ_POUT_PK, 519 GENMASK(12, 0)); 520 if (ret < 0) 521 return ret; 522 523 ret = DIV_ROUND_CLOSEST(ret, 4); 524 break; 525 case PMBUS_VIRT_READ_IOUT_MAX: 526 ret = mp2975_read_word_helper(client, page, phase, 527 MP2975_MFR_READ_IOUT_PK, 528 GENMASK(12, 0)); 529 if (ret < 0) 530 return ret; 531 532 ret = DIV_ROUND_CLOSEST(ret, 4); 533 break; 534 case PMBUS_READ_IOUT: 535 ret = mp2975_read_phases(client, data, page, phase); 536 if (ret < 0) 537 return ret; 538 539 break; 540 case PMBUS_UT_WARN_LIMIT: 541 case PMBUS_UT_FAULT_LIMIT: 542 case PMBUS_VIN_UV_WARN_LIMIT: 543 case PMBUS_VIN_UV_FAULT_LIMIT: 544 case PMBUS_VOUT_UV_WARN_LIMIT: 545 case PMBUS_VOUT_OV_WARN_LIMIT: 546 case PMBUS_VIN_OV_WARN_LIMIT: 547 case PMBUS_IIN_OC_FAULT_LIMIT: 548 case PMBUS_IOUT_OC_LV_FAULT_LIMIT: 549 case PMBUS_IIN_OC_WARN_LIMIT: 550 case PMBUS_IOUT_OC_WARN_LIMIT: 551 case PMBUS_IOUT_OC_FAULT_LIMIT: 552 case PMBUS_IOUT_UC_FAULT_LIMIT: 553 case PMBUS_POUT_OP_FAULT_LIMIT: 554 case PMBUS_POUT_OP_WARN_LIMIT: 555 case PMBUS_PIN_OP_WARN_LIMIT: 556 return -ENXIO; 557 default: 558 return -ENODATA; 559 } 560 561 return ret; 562 } 563 564 static int mp2975_identify_multiphase_rail2(struct i2c_client *client, 565 struct mp2975_data *data) 566 { 567 int ret; 568 569 /* 570 * Identify multiphase for rail 2 - could be from 0 to data->max_phases[1]. 571 * In case phase number is zero – only page zero is supported 572 */ 573 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 574 if (ret < 0) 575 return ret; 576 577 ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R2); 578 if (ret < 0) 579 return ret; 580 581 ret &= GENMASK(2, 0); 582 return (ret >= data->max_phases[1]) ? data->max_phases[1] : ret; 583 } 584 585 static void mp2975_set_phase_rail1(struct pmbus_driver_info *info) 586 { 587 int i; 588 589 for (i = 0 ; i < info->phases[0]; i++) 590 info->pfunc[i] = PMBUS_HAVE_IOUT; 591 } 592 593 static void 594 mp2975_set_phase_rail2(struct pmbus_driver_info *info, int num_phases) 595 { 596 int i; 597 598 /* Set phases for rail 2 from upper to lower. */ 599 for (i = 1; i <= num_phases; i++) 600 info->pfunc[MP2975_MAX_PHASE_RAIL1 - i] = PMBUS_HAVE_IOUT; 601 } 602 603 static int 604 mp2975_identify_multiphase(struct i2c_client *client, struct mp2975_data *data, 605 struct pmbus_driver_info *info) 606 { 607 int num_phases2, ret; 608 609 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 610 if (ret < 0) 611 return ret; 612 613 /* Identify multiphase for rail 1 - could be from 1 to data->max_phases[0]. */ 614 ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R1); 615 if (ret <= 0) 616 return ret; 617 618 info->phases[0] = ret & GENMASK(3, 0); 619 620 /* 621 * The device provides a total of $n PWM pins, and can be configured 622 * to different phase count applications for rail 1 and rail 2. 623 * Rail 1 can be set to $n phases, while rail 2 can be set to less than 624 * that. When rail 1’s phase count is configured as 0, rail 625 * 1 operates with 1-phase DCM. When rail 2 phase count is configured 626 * as 0, rail 2 is disabled. 627 */ 628 if (info->phases[0] > data->max_phases[0]) 629 return -EINVAL; 630 631 if (data->chip_id == mp2975) { 632 mp2975_set_phase_rail1(info); 633 num_phases2 = min(data->max_phases[0] - info->phases[0], 634 data->max_phases[1]); 635 if (info->phases[1] && info->phases[1] <= num_phases2) 636 mp2975_set_phase_rail2(info, num_phases2); 637 } 638 639 return 0; 640 } 641 642 static int 643 mp2975_identify_vid(struct i2c_client *client, struct mp2975_data *data, 644 struct pmbus_driver_info *info, u32 reg, int page, 645 u32 imvp_bit, u32 vr_bit) 646 { 647 int ret; 648 649 /* Identify VID mode and step selection. */ 650 ret = i2c_smbus_read_word_data(client, reg); 651 if (ret < 0) 652 return ret; 653 654 if (ret & imvp_bit) { 655 info->vrm_version[page] = imvp9; 656 data->vid_step[page] = MP2975_PROT_DEV_OV_OFF; 657 } else if (ret & vr_bit) { 658 info->vrm_version[page] = vr12; 659 data->vid_step[page] = MP2975_PROT_DEV_OV_ON; 660 } else { 661 info->vrm_version[page] = vr13; 662 data->vid_step[page] = MP2975_PROT_DEV_OV_OFF; 663 } 664 665 return 0; 666 } 667 668 static int 669 mp2975_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data, 670 struct pmbus_driver_info *info) 671 { 672 int ret; 673 674 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 675 if (ret < 0) 676 return ret; 677 678 /* Identify VID mode for rail 1. */ 679 ret = mp2975_identify_vid(client, data, info, 680 MP2975_MFR_VR_MULTI_CONFIG_R1, 0, 681 MP2975_IMVP9_EN_R1, MP2975_VID_STEP_SEL_R1); 682 if (ret < 0) 683 return ret; 684 685 /* Identify VID mode for rail 2, if connected. */ 686 if (info->phases[1]) 687 ret = mp2975_identify_vid(client, data, info, 688 MP2975_MFR_VR_MULTI_CONFIG_R2, 1, 689 MP2975_IMVP9_EN_R2, 690 MP2975_VID_STEP_SEL_R2); 691 692 return ret; 693 } 694 695 static int 696 mp2973_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data, 697 struct pmbus_driver_info *info) 698 { 699 int ret; 700 701 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 702 if (ret < 0) 703 return ret; 704 705 /* Identify VID mode for rail 1. */ 706 ret = mp2975_identify_vid(client, data, info, 707 MP2973_MFR_VR_MULTI_CONFIG_R1, 0, 708 MP2973_IMVP9_EN_R1, MP2973_VID_STEP_SEL_R1); 709 710 if (ret < 0) 711 return ret; 712 713 /* Identify VID mode for rail 2, if connected. */ 714 if (info->phases[1]) 715 ret = mp2975_identify_vid(client, data, info, 716 MP2973_MFR_VR_MULTI_CONFIG_R2, 1, 717 MP2973_IMVP9_EN_R2, 718 MP2973_VID_STEP_SEL_R2); 719 720 return ret; 721 } 722 723 static int 724 mp2975_current_sense_gain_get(struct i2c_client *client, 725 struct mp2975_data *data) 726 { 727 int i, ret; 728 729 /* 730 * Obtain DrMOS current sense gain of power stage from the register 731 * MP2975_MFR_VR_CONFIG1, bits 13-12. The value is selected as below: 732 * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. Other 733 * values are invalid. 734 */ 735 for (i = 0 ; i < data->info.pages; i++) { 736 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i); 737 if (ret < 0) 738 return ret; 739 ret = i2c_smbus_read_word_data(client, 740 MP2975_MFR_VR_CONFIG1); 741 if (ret < 0) 742 return ret; 743 744 switch ((ret & MP2975_DRMOS_KCS) >> 12) { 745 case 0: 746 data->curr_sense_gain[i] = 50; 747 break; 748 case 1: 749 data->curr_sense_gain[i] = 85; 750 break; 751 case 2: 752 data->curr_sense_gain[i] = 97; 753 break; 754 default: 755 data->curr_sense_gain[i] = 100; 756 break; 757 } 758 } 759 760 return 0; 761 } 762 763 static int 764 mp2975_vref_get(struct i2c_client *client, struct mp2975_data *data, 765 struct pmbus_driver_info *info) 766 { 767 int ret; 768 769 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 3); 770 if (ret < 0) 771 return ret; 772 773 /* Get voltage reference value for rail 1. */ 774 ret = i2c_smbus_read_word_data(client, MP2975_MFR_READ_VREF_R1); 775 if (ret < 0) 776 return ret; 777 778 data->vref[0] = ret * data->vid_step[0]; 779 780 /* Get voltage reference value for rail 2, if connected. */ 781 if (data->info.pages == MP2975_PAGE_NUM) { 782 ret = i2c_smbus_read_word_data(client, MP2975_MFR_READ_VREF_R2); 783 if (ret < 0) 784 return ret; 785 786 data->vref[1] = ret * data->vid_step[1]; 787 } 788 return 0; 789 } 790 791 static int 792 mp2975_vref_offset_get(struct i2c_client *client, struct mp2975_data *data, 793 int page) 794 { 795 int ret; 796 797 ret = i2c_smbus_read_word_data(client, MP2975_MFR_OVP_TH_SET); 798 if (ret < 0) 799 return ret; 800 801 switch ((ret & GENMASK(5, 3)) >> 3) { 802 case 1: 803 data->vref_off[page] = 140; 804 break; 805 case 2: 806 data->vref_off[page] = 220; 807 break; 808 case 4: 809 data->vref_off[page] = 400; 810 break; 811 default: 812 return -EINVAL; 813 } 814 return 0; 815 } 816 817 static int 818 mp2975_vout_max_get(struct i2c_client *client, struct mp2975_data *data, 819 struct pmbus_driver_info *info, int page) 820 { 821 int ret; 822 823 /* Get maximum reference voltage of VID-DAC in VID format. */ 824 ret = i2c_smbus_read_word_data(client, PMBUS_VOUT_MAX); 825 if (ret < 0) 826 return ret; 827 828 data->vout_max[page] = mp2975_vid2direct(info->vrm_version[page], ret & 829 GENMASK(8, 0)); 830 return 0; 831 } 832 833 static int 834 mp2975_set_vout_format(struct i2c_client *client, 835 struct mp2975_data *data, int page) 836 { 837 int ret, i; 838 839 /* Enable DIRECT VOUT format 1mV/LSB */ 840 if (data->chip_id == mp2975) { 841 ret = i2c_smbus_read_word_data(client, MP2975_MFR_DC_LOOP_CTRL); 842 if (ret < 0) 843 return ret; 844 if (ret & MP2975_VOUT_FORMAT) { 845 ret &= ~MP2975_VOUT_FORMAT; 846 ret = i2c_smbus_write_word_data(client, MP2975_MFR_DC_LOOP_CTRL, ret); 847 } 848 } else { 849 ret = i2c_smbus_read_word_data(client, MP2973_MFR_RESO_SET); 850 if (ret < 0) 851 return ret; 852 i = ret; 853 854 if (page == 0) { 855 i &= ~MP2973_VOUT_FORMAT_R1; 856 i |= MP2973_VOUT_FORMAT_DIRECT_R1; 857 } else { 858 i &= ~MP2973_VOUT_FORMAT_R2; 859 i |= MP2973_VOUT_FORMAT_DIRECT_R2; 860 } 861 if (i != ret) 862 ret = i2c_smbus_write_word_data(client, MP2973_MFR_RESO_SET, i); 863 } 864 return ret; 865 } 866 867 static int 868 mp2975_vout_ov_scale_get(struct i2c_client *client, struct mp2975_data *data, 869 struct pmbus_driver_info *info) 870 { 871 int thres_dev, sense_ampl, ret; 872 873 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0); 874 if (ret < 0) 875 return ret; 876 877 /* 878 * Get divider for over- and under-voltage protection thresholds 879 * configuration from the Advanced Options of Auto Phase Shedding and 880 * decay register. 881 */ 882 ret = i2c_smbus_read_word_data(client, MP2975_MFR_APS_DECAY_ADV); 883 if (ret < 0) 884 return ret; 885 thres_dev = ret & MP2975_PRT_THRES_DIV_OV_EN ? MP2975_PROT_DEV_OV_ON : 886 MP2975_PROT_DEV_OV_OFF; 887 888 /* Select the gain of remote sense amplifier. */ 889 ret = i2c_smbus_read_word_data(client, PMBUS_VOUT_SCALE_LOOP); 890 if (ret < 0) 891 return ret; 892 sense_ampl = ret & MP2975_SENSE_AMPL ? MP2975_SENSE_AMPL_HALF : 893 MP2975_SENSE_AMPL_UNIT; 894 895 data->vout_scale = sense_ampl * thres_dev; 896 897 return 0; 898 } 899 900 static int 901 mp2975_vout_per_rail_config_get(struct i2c_client *client, 902 struct mp2975_data *data, 903 struct pmbus_driver_info *info) 904 { 905 int i, ret; 906 907 for (i = 0; i < data->info.pages; i++) { 908 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i); 909 if (ret < 0) 910 continue; 911 912 /* Set VOUT format for READ_VOUT command : direct. */ 913 ret = mp2975_set_vout_format(client, data, i); 914 if (ret < 0) 915 return ret; 916 917 /* Obtain maximum voltage values. */ 918 ret = mp2975_vout_max_get(client, data, info, i); 919 if (ret < 0) 920 return ret; 921 922 /* Skip if reading Vref is unsupported */ 923 if (data->chip_id != mp2975) 924 continue; 925 926 /* Obtain voltage reference offsets. */ 927 ret = mp2975_vref_offset_get(client, data, i); 928 if (ret < 0) 929 return ret; 930 931 /* 932 * Set over-voltage fixed value. Thresholds are provided as 933 * fixed value, and tracking value. The minimum of them are 934 * exposed as over-voltage critical threshold. 935 */ 936 data->vout_ov_fixed[i] = data->vref[i] + 937 DIV_ROUND_CLOSEST(data->vref_off[i] * 938 data->vout_scale, 939 10); 940 } 941 942 return 0; 943 } 944 945 static const struct pmbus_driver_info mp2975_info = { 946 .pages = 1, 947 .format[PSC_VOLTAGE_IN] = linear, 948 .format[PSC_VOLTAGE_OUT] = direct, 949 .format[PSC_TEMPERATURE] = direct, 950 .format[PSC_CURRENT_IN] = linear, 951 .format[PSC_CURRENT_OUT] = direct, 952 .format[PSC_POWER] = direct, 953 .m[PSC_TEMPERATURE] = 1, 954 .m[PSC_VOLTAGE_OUT] = 1, 955 .R[PSC_VOLTAGE_OUT] = 3, 956 .m[PSC_CURRENT_OUT] = 1, 957 .m[PSC_POWER] = 1, 958 .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | 959 PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | 960 PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT | 961 PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT | PMBUS_PHASE_VIRTUAL, 962 .read_byte_data = mp2975_read_byte_data, 963 .read_word_data = mp2975_read_word_data, 964 #if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR) 965 .num_regulators = 1, 966 .reg_desc = mp2975_reg_desc, 967 #endif 968 }; 969 970 static const struct pmbus_driver_info mp2973_info = { 971 .pages = 1, 972 .format[PSC_VOLTAGE_IN] = linear, 973 .format[PSC_VOLTAGE_OUT] = direct, 974 .format[PSC_TEMPERATURE] = linear, 975 .format[PSC_CURRENT_IN] = linear, 976 .format[PSC_CURRENT_OUT] = linear, 977 .format[PSC_POWER] = linear, 978 .m[PSC_VOLTAGE_OUT] = 1, 979 .R[PSC_VOLTAGE_OUT] = 3, 980 .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | 981 PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | 982 PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT | 983 PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, 984 .read_word_data = mp2973_read_word_data, 985 .write_word_data = mp2973_write_word_data, 986 #if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR) 987 .num_regulators = 1, 988 .reg_desc = mp2975_reg_desc, 989 #endif 990 }; 991 992 static int mp2975_probe(struct i2c_client *client) 993 { 994 struct pmbus_driver_info *info; 995 struct mp2975_data *data; 996 int ret; 997 998 data = devm_kzalloc(&client->dev, sizeof(struct mp2975_data), 999 GFP_KERNEL); 1000 if (!data) 1001 return -ENOMEM; 1002 1003 if (client->dev.of_node) 1004 data->chip_id = (enum chips)(unsigned long)of_device_get_match_data(&client->dev); 1005 else 1006 data->chip_id = i2c_match_id(mp2975_id, client)->driver_data; 1007 1008 memcpy(data->max_phases, mp2975_max_phases[data->chip_id], 1009 sizeof(data->max_phases)); 1010 1011 if (data->chip_id == mp2975) 1012 memcpy(&data->info, &mp2975_info, sizeof(*info)); 1013 else 1014 memcpy(&data->info, &mp2973_info, sizeof(*info)); 1015 1016 info = &data->info; 1017 1018 /* Identify multiphase configuration for rail 2. */ 1019 ret = mp2975_identify_multiphase_rail2(client, data); 1020 if (ret < 0) 1021 return ret; 1022 1023 if (ret) { 1024 /* Two rails are connected. */ 1025 data->info.pages = MP2975_PAGE_NUM; 1026 data->info.phases[1] = ret; 1027 data->info.func[1] = MP2975_RAIL2_FUNC; 1028 if (IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR)) 1029 data->info.num_regulators = MP2975_PAGE_NUM; 1030 } 1031 1032 /* Identify multiphase configuration. */ 1033 ret = mp2975_identify_multiphase(client, data, info); 1034 if (ret) 1035 return ret; 1036 1037 if (data->chip_id == mp2975) { 1038 /* Identify VID setting per rail. */ 1039 ret = mp2975_identify_rails_vid(client, data, info); 1040 if (ret < 0) 1041 return ret; 1042 1043 /* Obtain current sense gain of power stage. */ 1044 ret = mp2975_current_sense_gain_get(client, data); 1045 if (ret) 1046 return ret; 1047 1048 /* Obtain voltage reference values. */ 1049 ret = mp2975_vref_get(client, data, info); 1050 if (ret) 1051 return ret; 1052 1053 /* Obtain vout over-voltage scales. */ 1054 ret = mp2975_vout_ov_scale_get(client, data, info); 1055 if (ret < 0) 1056 return ret; 1057 } else { 1058 /* Identify VID setting per rail. */ 1059 ret = mp2973_identify_rails_vid(client, data, info); 1060 if (ret < 0) 1061 return ret; 1062 } 1063 1064 /* Obtain offsets, maximum and format for vout. */ 1065 ret = mp2975_vout_per_rail_config_get(client, data, info); 1066 if (ret) 1067 return ret; 1068 1069 return pmbus_do_probe(client, info); 1070 } 1071 1072 static const struct of_device_id __maybe_unused mp2975_of_match[] = { 1073 {.compatible = "mps,mp2971", .data = (void *)mp2971}, 1074 {.compatible = "mps,mp2973", .data = (void *)mp2973}, 1075 {.compatible = "mps,mp2975", .data = (void *)mp2975}, 1076 {} 1077 }; 1078 MODULE_DEVICE_TABLE(of, mp2975_of_match); 1079 1080 static struct i2c_driver mp2975_driver = { 1081 .driver = { 1082 .name = "mp2975", 1083 .of_match_table = of_match_ptr(mp2975_of_match), 1084 }, 1085 .probe = mp2975_probe, 1086 .id_table = mp2975_id, 1087 }; 1088 1089 module_i2c_driver(mp2975_driver); 1090 1091 MODULE_AUTHOR("Vadim Pasternak <vadimp@nvidia.com>"); 1092 MODULE_DESCRIPTION("PMBus driver for MPS MP2975 device"); 1093 MODULE_LICENSE("GPL"); 1094 MODULE_IMPORT_NS(PMBUS); 1095