1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Hardware monitoring driver for MPS Multi-phase Digital VR Controllers 4 * 5 * Copyright (C) 2020 Nvidia Technologies Ltd. 6 */ 7 8 #include <linux/bitops.h> 9 #include <linux/err.h> 10 #include <linux/i2c.h> 11 #include <linux/init.h> 12 #include <linux/kernel.h> 13 #include <linux/mod_devicetable.h> 14 #include <linux/module.h> 15 16 #include "pmbus.h" 17 18 /* Vendor specific registers. */ 19 #define MP2975_MFR_APS_HYS_R2 0x0d 20 #define MP2975_MFR_SLOPE_TRIM3 0x1d 21 #define MP2975_MFR_VR_MULTI_CONFIG_R1 0x0d 22 #define MP2975_MFR_VR_MULTI_CONFIG_R2 0x1d 23 #define MP2975_MFR_APS_DECAY_ADV 0x56 24 #define MP2975_MFR_DC_LOOP_CTRL 0x59 25 #define MP2975_MFR_OCP_UCP_PHASE_SET 0x65 26 #define MP2975_MFR_VR_CONFIG1 0x68 27 #define MP2975_MFR_READ_CS1_2 0x82 28 #define MP2975_MFR_READ_CS3_4 0x83 29 #define MP2975_MFR_READ_CS5_6 0x84 30 #define MP2975_MFR_READ_CS7_8 0x85 31 #define MP2975_MFR_READ_CS9_10 0x86 32 #define MP2975_MFR_READ_CS11_12 0x87 33 #define MP2975_MFR_READ_IOUT_PK 0x90 34 #define MP2975_MFR_READ_POUT_PK 0x91 35 #define MP2975_MFR_READ_VREF_R1 0xa1 36 #define MP2975_MFR_READ_VREF_R2 0xa3 37 #define MP2975_MFR_OVP_TH_SET 0xe5 38 #define MP2975_MFR_UVP_SET 0xe6 39 40 #define MP2973_MFR_RESO_SET 0xc7 41 42 #define MP2975_VOUT_FORMAT BIT(15) 43 #define MP2975_VID_STEP_SEL_R1 BIT(4) 44 #define MP2975_IMVP9_EN_R1 BIT(13) 45 #define MP2975_VID_STEP_SEL_R2 BIT(3) 46 #define MP2975_IMVP9_EN_R2 BIT(12) 47 #define MP2975_PRT_THRES_DIV_OV_EN BIT(14) 48 #define MP2975_DRMOS_KCS GENMASK(13, 12) 49 #define MP2975_PROT_DEV_OV_OFF 10 50 #define MP2975_PROT_DEV_OV_ON 5 51 #define MP2975_SENSE_AMPL BIT(11) 52 #define MP2975_SENSE_AMPL_UNIT 1 53 #define MP2975_SENSE_AMPL_HALF 2 54 #define MP2975_VIN_UV_LIMIT_UNIT 8 55 56 #define MP2973_VOUT_FORMAT_R1 GENMASK(7, 6) 57 #define MP2973_VOUT_FORMAT_R2 GENMASK(4, 3) 58 #define MP2973_VOUT_FORMAT_DIRECT_R1 BIT(7) 59 #define MP2973_VOUT_FORMAT_LINEAR_R1 BIT(6) 60 #define MP2973_VOUT_FORMAT_DIRECT_R2 BIT(4) 61 #define MP2973_VOUT_FORMAT_LINEAR_R2 BIT(3) 62 63 #define MP2973_MFR_VR_MULTI_CONFIG_R1 0x0d 64 #define MP2973_MFR_VR_MULTI_CONFIG_R2 0x1d 65 #define MP2973_VID_STEP_SEL_R1 BIT(4) 66 #define MP2973_IMVP9_EN_R1 BIT(14) 67 #define MP2973_VID_STEP_SEL_R2 BIT(3) 68 #define MP2973_IMVP9_EN_R2 BIT(13) 69 70 #define MP2973_MFR_OCP_TOTAL_SET 0x5f 71 #define MP2973_OCP_TOTAL_CUR_MASK GENMASK(6, 0) 72 #define MP2973_MFR_OCP_LEVEL_RES BIT(15) 73 74 #define MP2973_MFR_READ_IOUT_PK 0x90 75 #define MP2973_MFR_READ_POUT_PK 0x91 76 77 #define MP2975_MAX_PHASE_RAIL1 8 78 #define MP2975_MAX_PHASE_RAIL2 4 79 80 #define MP2973_MAX_PHASE_RAIL1 14 81 #define MP2973_MAX_PHASE_RAIL2 6 82 83 #define MP2971_MAX_PHASE_RAIL1 8 84 #define MP2971_MAX_PHASE_RAIL2 3 85 86 #define MP2975_PAGE_NUM 2 87 88 #define MP2975_RAIL2_FUNC (PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | \ 89 PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | \ 90 PMBUS_HAVE_POUT | PMBUS_PHASE_VIRTUAL) 91 92 enum chips { 93 mp2971, mp2973, mp2975 94 }; 95 96 static const int mp2975_max_phases[][MP2975_PAGE_NUM] = { 97 [mp2975] = { MP2975_MAX_PHASE_RAIL1, MP2975_MAX_PHASE_RAIL2 }, 98 [mp2973] = { MP2973_MAX_PHASE_RAIL1, MP2973_MAX_PHASE_RAIL2 }, 99 [mp2971] = { MP2971_MAX_PHASE_RAIL1, MP2971_MAX_PHASE_RAIL2 }, 100 }; 101 102 struct mp2975_driver_info { 103 const struct pmbus_driver_info *info; 104 enum chips chip_id; 105 }; 106 107 struct mp2975_data { 108 struct pmbus_driver_info info; 109 enum chips chip_id; 110 int vout_scale; 111 int max_phases[MP2975_PAGE_NUM]; 112 int vid_step[MP2975_PAGE_NUM]; 113 int vref[MP2975_PAGE_NUM]; 114 int vref_off[MP2975_PAGE_NUM]; 115 int vout_max[MP2975_PAGE_NUM]; 116 int vout_ov_fixed[MP2975_PAGE_NUM]; 117 int curr_sense_gain[MP2975_PAGE_NUM]; 118 }; 119 120 static const struct regulator_desc __maybe_unused mp2975_reg_desc[] = { 121 PMBUS_REGULATOR("vout", 0), 122 PMBUS_REGULATOR("vout", 1), 123 }; 124 125 #define to_mp2975_data(x) container_of(x, struct mp2975_data, info) 126 127 static int mp2975_read_byte_data(struct i2c_client *client, int page, int reg) 128 { 129 switch (reg) { 130 case PMBUS_VOUT_MODE: 131 /* 132 * Report direct format as configured by MFR_DC_LOOP_CTRL. 133 * Unlike on MP2971/MP2973 the reported VOUT_MODE isn't automatically 134 * internally updated, but always reads as PB_VOUT_MODE_VID. 135 */ 136 return PB_VOUT_MODE_DIRECT; 137 default: 138 return -ENODATA; 139 } 140 } 141 142 static int 143 mp2975_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg, 144 u16 mask) 145 { 146 int ret = pmbus_read_word_data(client, page, phase, reg); 147 148 return (ret > 0) ? ret & mask : ret; 149 } 150 151 static int 152 mp2975_vid2direct(int vrf, int val) 153 { 154 switch (vrf) { 155 case vr12: 156 if (val >= 0x01) 157 return 250 + (val - 1) * 5; 158 break; 159 case vr13: 160 if (val >= 0x01) 161 return 500 + (val - 1) * 10; 162 break; 163 case imvp9: 164 if (val >= 0x01) 165 return 200 + (val - 1) * 10; 166 break; 167 default: 168 return -EINVAL; 169 } 170 return 0; 171 } 172 173 #define MAX_LIN_MANTISSA (1023 * 1000) 174 #define MIN_LIN_MANTISSA (511 * 1000) 175 176 /* Converts a milli-unit DIRECT value to LINEAR11 format */ 177 static u16 mp2975_data2reg_linear11(s64 val) 178 { 179 s16 exponent = 0, mantissa; 180 bool negative = false; 181 182 /* simple case */ 183 if (val == 0) 184 return 0; 185 186 /* Reduce large mantissa until it fits into 10 bit */ 187 while (val >= MAX_LIN_MANTISSA && exponent < 15) { 188 exponent++; 189 val >>= 1; 190 } 191 /* Increase small mantissa to improve precision */ 192 while (val < MIN_LIN_MANTISSA && exponent > -15) { 193 exponent--; 194 val <<= 1; 195 } 196 197 /* Convert mantissa from milli-units to units */ 198 mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff); 199 200 /* restore sign */ 201 if (negative) 202 mantissa = -mantissa; 203 204 /* Convert to 5 bit exponent, 11 bit mantissa */ 205 return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800); 206 } 207 208 static int 209 mp2975_read_phase(struct i2c_client *client, struct mp2975_data *data, 210 int page, int phase, u8 reg) 211 { 212 int ph_curr, ret; 213 214 ret = pmbus_read_word_data(client, page, phase, reg); 215 if (ret < 0) 216 return ret; 217 218 if (!((phase + 1) % MP2975_PAGE_NUM)) 219 ret >>= 8; 220 ret &= 0xff; 221 222 /* 223 * Output value is calculated as: (READ_CSx / 80 – 1.23) / (Kcs * Rcs) 224 * where: 225 * - Kcs is the DrMOS current sense gain of power stage, which is 226 * obtained from the register MP2975_MFR_VR_CONFIG1, bits 13-12 with 227 * the following selection of DrMOS (data->curr_sense_gain[page]): 228 * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. 229 * - Rcs is the internal phase current sense resistor which is constant 230 * value 1kΩ. 231 */ 232 ph_curr = ret * 100 - 9800; 233 234 /* 235 * Current phase sensing, providing by the device is not accurate 236 * for the light load. This because sampling of current occurrence of 237 * bit weight has a big deviation for light load. For handling such 238 * case phase current is represented as the maximum between the value 239 * calculated above and total rail current divided by number phases. 240 */ 241 ret = pmbus_read_word_data(client, page, phase, PMBUS_READ_IOUT); 242 if (ret < 0) 243 return ret; 244 245 return max_t(int, DIV_ROUND_CLOSEST(ret, data->info.phases[page]), 246 DIV_ROUND_CLOSEST(ph_curr, data->curr_sense_gain[page])); 247 } 248 249 static int 250 mp2975_read_phases(struct i2c_client *client, struct mp2975_data *data, 251 int page, int phase) 252 { 253 int ret; 254 255 if (page) { 256 switch (phase) { 257 case 0 ... 1: 258 ret = mp2975_read_phase(client, data, page, phase, 259 MP2975_MFR_READ_CS7_8); 260 break; 261 case 2 ... 3: 262 ret = mp2975_read_phase(client, data, page, phase, 263 MP2975_MFR_READ_CS9_10); 264 break; 265 case 4 ... 5: 266 ret = mp2975_read_phase(client, data, page, phase, 267 MP2975_MFR_READ_CS11_12); 268 break; 269 default: 270 return -ENODATA; 271 } 272 } else { 273 switch (phase) { 274 case 0 ... 1: 275 ret = mp2975_read_phase(client, data, page, phase, 276 MP2975_MFR_READ_CS1_2); 277 break; 278 case 2 ... 3: 279 ret = mp2975_read_phase(client, data, page, phase, 280 MP2975_MFR_READ_CS3_4); 281 break; 282 case 4 ... 5: 283 ret = mp2975_read_phase(client, data, page, phase, 284 MP2975_MFR_READ_CS5_6); 285 break; 286 case 6 ... 7: 287 ret = mp2975_read_phase(client, data, page, phase, 288 MP2975_MFR_READ_CS7_8); 289 break; 290 case 8 ... 9: 291 ret = mp2975_read_phase(client, data, page, phase, 292 MP2975_MFR_READ_CS9_10); 293 break; 294 case 10 ... 11: 295 ret = mp2975_read_phase(client, data, page, phase, 296 MP2975_MFR_READ_CS11_12); 297 break; 298 default: 299 return -ENODATA; 300 } 301 } 302 return ret; 303 } 304 305 static int mp2973_read_word_data(struct i2c_client *client, int page, 306 int phase, int reg) 307 { 308 const struct pmbus_driver_info *info = pmbus_get_driver_info(client); 309 struct mp2975_data *data = to_mp2975_data(info); 310 int ret; 311 312 switch (reg) { 313 case PMBUS_STATUS_WORD: 314 /* MP2973 & MP2971 return PGOOD instead of PB_STATUS_POWER_GOOD_N. */ 315 ret = pmbus_read_word_data(client, page, phase, reg); 316 if (ret < 0) 317 return ret; 318 ret ^= PB_STATUS_POWER_GOOD_N; 319 break; 320 case PMBUS_OT_FAULT_LIMIT: 321 ret = mp2975_read_word_helper(client, page, phase, reg, 322 GENMASK(7, 0)); 323 break; 324 case PMBUS_VIN_OV_FAULT_LIMIT: 325 ret = mp2975_read_word_helper(client, page, phase, reg, 326 GENMASK(7, 0)); 327 if (ret < 0) 328 return ret; 329 330 ret = DIV_ROUND_CLOSEST(ret, MP2975_VIN_UV_LIMIT_UNIT); 331 break; 332 case PMBUS_VOUT_OV_FAULT_LIMIT: 333 /* 334 * MP2971 and mp2973 only supports tracking (ovp1) mode. 335 */ 336 ret = mp2975_read_word_helper(client, page, phase, 337 MP2975_MFR_OVP_TH_SET, 338 GENMASK(2, 0)); 339 if (ret < 0) 340 return ret; 341 342 ret = data->vout_max[page] + 50 * (ret + 1); 343 break; 344 case PMBUS_VOUT_UV_FAULT_LIMIT: 345 ret = mp2975_read_word_helper(client, page, phase, reg, 346 GENMASK(8, 0)); 347 if (ret < 0) 348 return ret; 349 ret = mp2975_vid2direct(info->vrm_version[page], ret); 350 break; 351 case PMBUS_VIRT_READ_POUT_MAX: 352 ret = pmbus_read_word_data(client, page, phase, 353 MP2973_MFR_READ_POUT_PK); 354 break; 355 case PMBUS_VIRT_READ_IOUT_MAX: 356 ret = pmbus_read_word_data(client, page, phase, 357 MP2973_MFR_READ_IOUT_PK); 358 break; 359 case PMBUS_IOUT_OC_FAULT_LIMIT: 360 ret = mp2975_read_word_helper(client, page, phase, 361 MP2973_MFR_OCP_TOTAL_SET, 362 GENMASK(15, 0)); 363 if (ret < 0) 364 return ret; 365 366 if (ret & MP2973_MFR_OCP_LEVEL_RES) 367 ret = 2 * (ret & MP2973_OCP_TOTAL_CUR_MASK); 368 else 369 ret = ret & MP2973_OCP_TOTAL_CUR_MASK; 370 371 ret = mp2975_data2reg_linear11(ret * info->phases[page] * 1000); 372 break; 373 case PMBUS_UT_WARN_LIMIT: 374 case PMBUS_UT_FAULT_LIMIT: 375 case PMBUS_VIN_UV_WARN_LIMIT: 376 case PMBUS_VIN_UV_FAULT_LIMIT: 377 case PMBUS_VOUT_UV_WARN_LIMIT: 378 case PMBUS_VOUT_OV_WARN_LIMIT: 379 case PMBUS_VIN_OV_WARN_LIMIT: 380 case PMBUS_IIN_OC_FAULT_LIMIT: 381 case PMBUS_IOUT_OC_LV_FAULT_LIMIT: 382 case PMBUS_IOUT_OC_WARN_LIMIT: 383 case PMBUS_IOUT_UC_FAULT_LIMIT: 384 case PMBUS_POUT_OP_FAULT_LIMIT: 385 case PMBUS_POUT_OP_WARN_LIMIT: 386 case PMBUS_PIN_OP_WARN_LIMIT: 387 return -ENXIO; 388 default: 389 return -ENODATA; 390 } 391 392 return ret; 393 } 394 395 static int mp2973_write_word_data(struct i2c_client *client, int page, 396 int reg, u16 word) 397 { 398 u8 target, mask; 399 long ret; 400 401 if (reg != PMBUS_SMBALERT_MASK) 402 return -ENODATA; 403 404 /* 405 * Vendor-specific SMBALERT_MASK register with 16 maskable bits. 406 */ 407 ret = pmbus_read_word_data(client, 0, 0, PMBUS_SMBALERT_MASK); 408 if (ret < 0) 409 return ret; 410 411 target = word & 0xff; 412 mask = word >> 8; 413 414 /* 415 * Set/Clear 'bit' in 'ret' based on condition followed by define for each bit in SMBALERT_MASK. 416 * Also bit 2 & 15 are reserved. 417 */ 418 419 #define MP2973_TEMP_OT 0 420 #define MP2973_VIN_UVLO 1 421 #define MP2973_VIN_OVP 3 422 #define MP2973_MTP_FAULT 4 423 #define MP2973_OTHER_COMM 5 424 #define MP2973_MTP_BLK_TRIG 6 425 #define MP2973_PACKET_ERROR 7 426 #define MP2973_INVALID_DATA 8 427 #define MP2973_INVALID_COMMAND 9 428 #define MP2973_IOUT_OC_LV 10 429 #define MP2973_IOUT_OC 11 430 #define MP2973_VOUT_MAX_MIN_WARNING 12 431 #define MP2973_VOLTAGE_UV 13 432 #define MP2973_VOLTAGE_OV 14 433 434 switch (target) { 435 case PMBUS_STATUS_CML: 436 __assign_bit(MP2973_INVALID_DATA, &ret, !(mask & PB_CML_FAULT_INVALID_DATA)); 437 __assign_bit(MP2973_INVALID_COMMAND, &ret, !(mask & PB_CML_FAULT_INVALID_COMMAND)); 438 __assign_bit(MP2973_OTHER_COMM, &ret, !(mask & PB_CML_FAULT_OTHER_COMM)); 439 __assign_bit(MP2973_PACKET_ERROR, &ret, !(mask & PB_CML_FAULT_PACKET_ERROR)); 440 break; 441 case PMBUS_STATUS_VOUT: 442 __assign_bit(MP2973_VOLTAGE_UV, &ret, !(mask & PB_VOLTAGE_UV_FAULT)); 443 __assign_bit(MP2973_VOLTAGE_OV, &ret, !(mask & PB_VOLTAGE_OV_FAULT)); 444 break; 445 case PMBUS_STATUS_IOUT: 446 __assign_bit(MP2973_IOUT_OC, &ret, !(mask & PB_IOUT_OC_FAULT)); 447 __assign_bit(MP2973_IOUT_OC_LV, &ret, !(mask & PB_IOUT_OC_LV_FAULT)); 448 break; 449 case PMBUS_STATUS_TEMPERATURE: 450 __assign_bit(MP2973_TEMP_OT, &ret, !(mask & PB_TEMP_OT_FAULT)); 451 break; 452 /* 453 * Map remaining bits to MFR specific to let the PMBUS core mask 454 * those bits by default. 455 */ 456 case PMBUS_STATUS_MFR_SPECIFIC: 457 __assign_bit(MP2973_VIN_UVLO, &ret, !(mask & BIT(1))); 458 __assign_bit(MP2973_VIN_OVP, &ret, !(mask & BIT(3))); 459 __assign_bit(MP2973_MTP_FAULT, &ret, !(mask & BIT(4))); 460 __assign_bit(MP2973_MTP_BLK_TRIG, &ret, !(mask & BIT(6))); 461 break; 462 default: 463 return 0; 464 } 465 466 return pmbus_write_word_data(client, 0, PMBUS_SMBALERT_MASK, ret); 467 } 468 469 static int mp2975_read_word_data(struct i2c_client *client, int page, 470 int phase, int reg) 471 { 472 const struct pmbus_driver_info *info = pmbus_get_driver_info(client); 473 struct mp2975_data *data = to_mp2975_data(info); 474 int ret; 475 476 switch (reg) { 477 case PMBUS_OT_FAULT_LIMIT: 478 ret = mp2975_read_word_helper(client, page, phase, reg, 479 GENMASK(7, 0)); 480 break; 481 case PMBUS_VIN_OV_FAULT_LIMIT: 482 ret = mp2975_read_word_helper(client, page, phase, reg, 483 GENMASK(7, 0)); 484 if (ret < 0) 485 return ret; 486 487 ret = DIV_ROUND_CLOSEST(ret, MP2975_VIN_UV_LIMIT_UNIT); 488 break; 489 case PMBUS_VOUT_OV_FAULT_LIMIT: 490 /* 491 * Register provides two values for over-voltage protection 492 * threshold for fixed (ovp2) and tracking (ovp1) modes. The 493 * minimum of these two values is provided as over-voltage 494 * fault alarm. 495 */ 496 ret = mp2975_read_word_helper(client, page, phase, 497 MP2975_MFR_OVP_TH_SET, 498 GENMASK(2, 0)); 499 if (ret < 0) 500 return ret; 501 502 ret = min_t(int, data->vout_max[page] + 50 * (ret + 1), 503 data->vout_ov_fixed[page]); 504 break; 505 case PMBUS_VOUT_UV_FAULT_LIMIT: 506 ret = mp2975_read_word_helper(client, page, phase, 507 MP2975_MFR_UVP_SET, 508 GENMASK(2, 0)); 509 if (ret < 0) 510 return ret; 511 512 ret = DIV_ROUND_CLOSEST(data->vref[page] * 10 - 50 * 513 (ret + 1) * data->vout_scale, 10); 514 break; 515 case PMBUS_VIRT_READ_POUT_MAX: 516 ret = mp2975_read_word_helper(client, page, phase, 517 MP2975_MFR_READ_POUT_PK, 518 GENMASK(12, 0)); 519 if (ret < 0) 520 return ret; 521 522 ret = DIV_ROUND_CLOSEST(ret, 4); 523 break; 524 case PMBUS_VIRT_READ_IOUT_MAX: 525 ret = mp2975_read_word_helper(client, page, phase, 526 MP2975_MFR_READ_IOUT_PK, 527 GENMASK(12, 0)); 528 if (ret < 0) 529 return ret; 530 531 ret = DIV_ROUND_CLOSEST(ret, 4); 532 break; 533 case PMBUS_READ_IOUT: 534 ret = mp2975_read_phases(client, data, page, phase); 535 if (ret < 0) 536 return ret; 537 538 break; 539 case PMBUS_UT_WARN_LIMIT: 540 case PMBUS_UT_FAULT_LIMIT: 541 case PMBUS_VIN_UV_WARN_LIMIT: 542 case PMBUS_VIN_UV_FAULT_LIMIT: 543 case PMBUS_VOUT_UV_WARN_LIMIT: 544 case PMBUS_VOUT_OV_WARN_LIMIT: 545 case PMBUS_VIN_OV_WARN_LIMIT: 546 case PMBUS_IIN_OC_FAULT_LIMIT: 547 case PMBUS_IOUT_OC_LV_FAULT_LIMIT: 548 case PMBUS_IIN_OC_WARN_LIMIT: 549 case PMBUS_IOUT_OC_WARN_LIMIT: 550 case PMBUS_IOUT_OC_FAULT_LIMIT: 551 case PMBUS_IOUT_UC_FAULT_LIMIT: 552 case PMBUS_POUT_OP_FAULT_LIMIT: 553 case PMBUS_POUT_OP_WARN_LIMIT: 554 case PMBUS_PIN_OP_WARN_LIMIT: 555 return -ENXIO; 556 default: 557 return -ENODATA; 558 } 559 560 return ret; 561 } 562 563 static int mp2975_identify_multiphase_rail2(struct i2c_client *client, 564 struct mp2975_data *data) 565 { 566 int ret; 567 568 /* 569 * Identify multiphase for rail 2 - could be from 0 to data->max_phases[1]. 570 * In case phase number is zero – only page zero is supported 571 */ 572 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 573 if (ret < 0) 574 return ret; 575 576 ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R2); 577 if (ret < 0) 578 return ret; 579 580 ret &= GENMASK(2, 0); 581 return (ret >= data->max_phases[1]) ? data->max_phases[1] : ret; 582 } 583 584 static void mp2975_set_phase_rail1(struct pmbus_driver_info *info) 585 { 586 int i; 587 588 for (i = 0 ; i < info->phases[0]; i++) 589 info->pfunc[i] = PMBUS_HAVE_IOUT; 590 } 591 592 static void 593 mp2975_set_phase_rail2(struct pmbus_driver_info *info, int num_phases) 594 { 595 int i; 596 597 /* Set phases for rail 2 from upper to lower. */ 598 for (i = 1; i <= num_phases; i++) 599 info->pfunc[MP2975_MAX_PHASE_RAIL1 - i] = PMBUS_HAVE_IOUT; 600 } 601 602 static int 603 mp2975_identify_multiphase(struct i2c_client *client, struct mp2975_data *data, 604 struct pmbus_driver_info *info) 605 { 606 int num_phases2, ret; 607 608 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 609 if (ret < 0) 610 return ret; 611 612 /* Identify multiphase for rail 1 - could be from 1 to data->max_phases[0]. */ 613 ret = i2c_smbus_read_word_data(client, MP2975_MFR_VR_MULTI_CONFIG_R1); 614 if (ret <= 0) 615 return ret; 616 617 info->phases[0] = ret & GENMASK(3, 0); 618 619 /* 620 * The device provides a total of $n PWM pins, and can be configured 621 * to different phase count applications for rail 1 and rail 2. 622 * Rail 1 can be set to $n phases, while rail 2 can be set to less than 623 * that. When rail 1’s phase count is configured as 0, rail 624 * 1 operates with 1-phase DCM. When rail 2 phase count is configured 625 * as 0, rail 2 is disabled. 626 */ 627 if (info->phases[0] > data->max_phases[0]) 628 return -EINVAL; 629 630 if (data->chip_id == mp2975) { 631 mp2975_set_phase_rail1(info); 632 num_phases2 = min(data->max_phases[0] - info->phases[0], 633 data->max_phases[1]); 634 if (info->phases[1] && info->phases[1] <= num_phases2) 635 mp2975_set_phase_rail2(info, num_phases2); 636 } 637 638 return 0; 639 } 640 641 static int 642 mp2975_identify_vid(struct i2c_client *client, struct mp2975_data *data, 643 struct pmbus_driver_info *info, u32 reg, int page, 644 u32 imvp_bit, u32 vr_bit) 645 { 646 int ret; 647 648 /* Identify VID mode and step selection. */ 649 ret = i2c_smbus_read_word_data(client, reg); 650 if (ret < 0) 651 return ret; 652 653 if (ret & imvp_bit) { 654 info->vrm_version[page] = imvp9; 655 data->vid_step[page] = MP2975_PROT_DEV_OV_OFF; 656 } else if (ret & vr_bit) { 657 info->vrm_version[page] = vr12; 658 data->vid_step[page] = MP2975_PROT_DEV_OV_ON; 659 } else { 660 info->vrm_version[page] = vr13; 661 data->vid_step[page] = MP2975_PROT_DEV_OV_OFF; 662 } 663 664 return 0; 665 } 666 667 static int 668 mp2975_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data, 669 struct pmbus_driver_info *info) 670 { 671 int ret; 672 673 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 674 if (ret < 0) 675 return ret; 676 677 /* Identify VID mode for rail 1. */ 678 ret = mp2975_identify_vid(client, data, info, 679 MP2975_MFR_VR_MULTI_CONFIG_R1, 0, 680 MP2975_IMVP9_EN_R1, MP2975_VID_STEP_SEL_R1); 681 if (ret < 0) 682 return ret; 683 684 /* Identify VID mode for rail 2, if connected. */ 685 if (info->phases[1]) 686 ret = mp2975_identify_vid(client, data, info, 687 MP2975_MFR_VR_MULTI_CONFIG_R2, 1, 688 MP2975_IMVP9_EN_R2, 689 MP2975_VID_STEP_SEL_R2); 690 691 return ret; 692 } 693 694 static int 695 mp2973_identify_rails_vid(struct i2c_client *client, struct mp2975_data *data, 696 struct pmbus_driver_info *info) 697 { 698 int ret; 699 700 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 2); 701 if (ret < 0) 702 return ret; 703 704 /* Identify VID mode for rail 1. */ 705 ret = mp2975_identify_vid(client, data, info, 706 MP2973_MFR_VR_MULTI_CONFIG_R1, 0, 707 MP2973_IMVP9_EN_R1, MP2973_VID_STEP_SEL_R1); 708 709 if (ret < 0) 710 return ret; 711 712 /* Identify VID mode for rail 2, if connected. */ 713 if (info->phases[1]) 714 ret = mp2975_identify_vid(client, data, info, 715 MP2973_MFR_VR_MULTI_CONFIG_R2, 1, 716 MP2973_IMVP9_EN_R2, 717 MP2973_VID_STEP_SEL_R2); 718 719 return ret; 720 } 721 722 static int 723 mp2975_current_sense_gain_get(struct i2c_client *client, 724 struct mp2975_data *data) 725 { 726 int i, ret; 727 728 /* 729 * Obtain DrMOS current sense gain of power stage from the register 730 * MP2975_MFR_VR_CONFIG1, bits 13-12. The value is selected as below: 731 * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. Other 732 * values are invalid. 733 */ 734 for (i = 0 ; i < data->info.pages; i++) { 735 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i); 736 if (ret < 0) 737 return ret; 738 ret = i2c_smbus_read_word_data(client, 739 MP2975_MFR_VR_CONFIG1); 740 if (ret < 0) 741 return ret; 742 743 switch ((ret & MP2975_DRMOS_KCS) >> 12) { 744 case 0: 745 data->curr_sense_gain[i] = 50; 746 break; 747 case 1: 748 data->curr_sense_gain[i] = 85; 749 break; 750 case 2: 751 data->curr_sense_gain[i] = 97; 752 break; 753 default: 754 data->curr_sense_gain[i] = 100; 755 break; 756 } 757 } 758 759 return 0; 760 } 761 762 static int 763 mp2975_vref_get(struct i2c_client *client, struct mp2975_data *data, 764 struct pmbus_driver_info *info) 765 { 766 int ret; 767 768 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 3); 769 if (ret < 0) 770 return ret; 771 772 /* Get voltage reference value for rail 1. */ 773 ret = i2c_smbus_read_word_data(client, MP2975_MFR_READ_VREF_R1); 774 if (ret < 0) 775 return ret; 776 777 data->vref[0] = ret * data->vid_step[0]; 778 779 /* Get voltage reference value for rail 2, if connected. */ 780 if (data->info.pages == MP2975_PAGE_NUM) { 781 ret = i2c_smbus_read_word_data(client, MP2975_MFR_READ_VREF_R2); 782 if (ret < 0) 783 return ret; 784 785 data->vref[1] = ret * data->vid_step[1]; 786 } 787 return 0; 788 } 789 790 static int 791 mp2975_vref_offset_get(struct i2c_client *client, struct mp2975_data *data, 792 int page) 793 { 794 int ret; 795 796 ret = i2c_smbus_read_word_data(client, MP2975_MFR_OVP_TH_SET); 797 if (ret < 0) 798 return ret; 799 800 switch ((ret & GENMASK(5, 3)) >> 3) { 801 case 1: 802 data->vref_off[page] = 140; 803 break; 804 case 2: 805 data->vref_off[page] = 220; 806 break; 807 case 4: 808 data->vref_off[page] = 400; 809 break; 810 default: 811 return -EINVAL; 812 } 813 return 0; 814 } 815 816 static int 817 mp2975_vout_max_get(struct i2c_client *client, struct mp2975_data *data, 818 struct pmbus_driver_info *info, int page) 819 { 820 int ret; 821 822 /* Get maximum reference voltage of VID-DAC in VID format. */ 823 ret = i2c_smbus_read_word_data(client, PMBUS_VOUT_MAX); 824 if (ret < 0) 825 return ret; 826 827 data->vout_max[page] = mp2975_vid2direct(info->vrm_version[page], ret & 828 GENMASK(8, 0)); 829 return 0; 830 } 831 832 static int 833 mp2975_set_vout_format(struct i2c_client *client, 834 struct mp2975_data *data, int page) 835 { 836 int ret, i; 837 838 /* Enable DIRECT VOUT format 1mV/LSB */ 839 if (data->chip_id == mp2975) { 840 ret = i2c_smbus_read_word_data(client, MP2975_MFR_DC_LOOP_CTRL); 841 if (ret < 0) 842 return ret; 843 if (ret & MP2975_VOUT_FORMAT) { 844 ret &= ~MP2975_VOUT_FORMAT; 845 ret = i2c_smbus_write_word_data(client, MP2975_MFR_DC_LOOP_CTRL, ret); 846 } 847 } else { 848 ret = i2c_smbus_read_word_data(client, MP2973_MFR_RESO_SET); 849 if (ret < 0) 850 return ret; 851 i = ret; 852 853 if (page == 0) { 854 i &= ~MP2973_VOUT_FORMAT_R1; 855 i |= MP2973_VOUT_FORMAT_DIRECT_R1; 856 } else { 857 i &= ~MP2973_VOUT_FORMAT_R2; 858 i |= MP2973_VOUT_FORMAT_DIRECT_R2; 859 } 860 if (i != ret) 861 ret = i2c_smbus_write_word_data(client, MP2973_MFR_RESO_SET, i); 862 } 863 return ret; 864 } 865 866 static int 867 mp2975_vout_ov_scale_get(struct i2c_client *client, struct mp2975_data *data, 868 struct pmbus_driver_info *info) 869 { 870 int thres_dev, sense_ampl, ret; 871 872 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0); 873 if (ret < 0) 874 return ret; 875 876 /* 877 * Get divider for over- and under-voltage protection thresholds 878 * configuration from the Advanced Options of Auto Phase Shedding and 879 * decay register. 880 */ 881 ret = i2c_smbus_read_word_data(client, MP2975_MFR_APS_DECAY_ADV); 882 if (ret < 0) 883 return ret; 884 thres_dev = ret & MP2975_PRT_THRES_DIV_OV_EN ? MP2975_PROT_DEV_OV_ON : 885 MP2975_PROT_DEV_OV_OFF; 886 887 /* Select the gain of remote sense amplifier. */ 888 ret = i2c_smbus_read_word_data(client, PMBUS_VOUT_SCALE_LOOP); 889 if (ret < 0) 890 return ret; 891 sense_ampl = ret & MP2975_SENSE_AMPL ? MP2975_SENSE_AMPL_HALF : 892 MP2975_SENSE_AMPL_UNIT; 893 894 data->vout_scale = sense_ampl * thres_dev; 895 896 return 0; 897 } 898 899 static int 900 mp2975_vout_per_rail_config_get(struct i2c_client *client, 901 struct mp2975_data *data, 902 struct pmbus_driver_info *info) 903 { 904 int i, ret; 905 906 for (i = 0; i < data->info.pages; i++) { 907 ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, i); 908 if (ret < 0) 909 continue; 910 911 /* Set VOUT format for READ_VOUT command : direct. */ 912 ret = mp2975_set_vout_format(client, data, i); 913 if (ret < 0) 914 return ret; 915 916 /* Obtain maximum voltage values. */ 917 ret = mp2975_vout_max_get(client, data, info, i); 918 if (ret < 0) 919 return ret; 920 921 /* Skip if reading Vref is unsupported */ 922 if (data->chip_id != mp2975) 923 continue; 924 925 /* Obtain voltage reference offsets. */ 926 ret = mp2975_vref_offset_get(client, data, i); 927 if (ret < 0) 928 return ret; 929 930 /* 931 * Set over-voltage fixed value. Thresholds are provided as 932 * fixed value, and tracking value. The minimum of them are 933 * exposed as over-voltage critical threshold. 934 */ 935 data->vout_ov_fixed[i] = data->vref[i] + 936 DIV_ROUND_CLOSEST(data->vref_off[i] * 937 data->vout_scale, 938 10); 939 } 940 941 return 0; 942 } 943 944 static const struct pmbus_driver_info mp2975_info = { 945 .pages = 1, 946 .format[PSC_VOLTAGE_IN] = linear, 947 .format[PSC_VOLTAGE_OUT] = direct, 948 .format[PSC_TEMPERATURE] = direct, 949 .format[PSC_CURRENT_IN] = linear, 950 .format[PSC_CURRENT_OUT] = direct, 951 .format[PSC_POWER] = direct, 952 .m[PSC_TEMPERATURE] = 1, 953 .m[PSC_VOLTAGE_OUT] = 1, 954 .R[PSC_VOLTAGE_OUT] = 3, 955 .m[PSC_CURRENT_OUT] = 1, 956 .m[PSC_POWER] = 1, 957 .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | 958 PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | 959 PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT | 960 PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT | PMBUS_PHASE_VIRTUAL, 961 .read_byte_data = mp2975_read_byte_data, 962 .read_word_data = mp2975_read_word_data, 963 #if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR) 964 .num_regulators = 1, 965 .reg_desc = mp2975_reg_desc, 966 #endif 967 }; 968 969 static const struct pmbus_driver_info mp2973_info = { 970 .pages = 1, 971 .format[PSC_VOLTAGE_IN] = linear, 972 .format[PSC_VOLTAGE_OUT] = direct, 973 .format[PSC_TEMPERATURE] = linear, 974 .format[PSC_CURRENT_IN] = linear, 975 .format[PSC_CURRENT_OUT] = linear, 976 .format[PSC_POWER] = linear, 977 .m[PSC_VOLTAGE_OUT] = 1, 978 .R[PSC_VOLTAGE_OUT] = 3, 979 .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | 980 PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | 981 PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_POUT | 982 PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, 983 .read_word_data = mp2973_read_word_data, 984 .write_word_data = mp2973_write_word_data, 985 #if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR) 986 .num_regulators = 1, 987 .reg_desc = mp2975_reg_desc, 988 #endif 989 }; 990 991 static const struct mp2975_driver_info mp2975_ddinfo[] = { 992 [mp2975] = { .info = &mp2975_info, .chip_id = mp2975 }, 993 [mp2973] = { .info = &mp2973_info, .chip_id = mp2973 }, 994 [mp2971] = { .info = &mp2973_info, .chip_id = mp2971 }, 995 }; 996 997 static int mp2975_probe(struct i2c_client *client) 998 { 999 const struct mp2975_driver_info *ddinfo; 1000 struct pmbus_driver_info *info; 1001 struct mp2975_data *data; 1002 int ret; 1003 1004 ddinfo = i2c_get_match_data(client); 1005 if (!ddinfo) 1006 return -ENODEV; 1007 1008 data = devm_kzalloc(&client->dev, sizeof(struct mp2975_data), 1009 GFP_KERNEL); 1010 if (!data) 1011 return -ENOMEM; 1012 1013 data->chip_id = ddinfo->chip_id; 1014 1015 memcpy(data->max_phases, mp2975_max_phases[data->chip_id], 1016 sizeof(data->max_phases)); 1017 1018 memcpy(&data->info, ddinfo->info, sizeof(data->info)); 1019 1020 info = &data->info; 1021 1022 /* Identify multiphase configuration for rail 2. */ 1023 ret = mp2975_identify_multiphase_rail2(client, data); 1024 if (ret < 0) 1025 return ret; 1026 1027 if (ret) { 1028 /* Two rails are connected. */ 1029 data->info.pages = MP2975_PAGE_NUM; 1030 data->info.phases[1] = ret; 1031 data->info.func[1] = MP2975_RAIL2_FUNC; 1032 if (IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR)) 1033 data->info.num_regulators = MP2975_PAGE_NUM; 1034 } 1035 1036 /* Identify multiphase configuration. */ 1037 ret = mp2975_identify_multiphase(client, data, info); 1038 if (ret) 1039 return ret; 1040 1041 if (data->chip_id == mp2975) { 1042 /* Identify VID setting per rail. */ 1043 ret = mp2975_identify_rails_vid(client, data, info); 1044 if (ret < 0) 1045 return ret; 1046 1047 /* Obtain current sense gain of power stage. */ 1048 ret = mp2975_current_sense_gain_get(client, data); 1049 if (ret) 1050 return ret; 1051 1052 /* Obtain voltage reference values. */ 1053 ret = mp2975_vref_get(client, data, info); 1054 if (ret) 1055 return ret; 1056 1057 /* Obtain vout over-voltage scales. */ 1058 ret = mp2975_vout_ov_scale_get(client, data, info); 1059 if (ret < 0) 1060 return ret; 1061 } else { 1062 /* Identify VID setting per rail. */ 1063 ret = mp2973_identify_rails_vid(client, data, info); 1064 if (ret < 0) 1065 return ret; 1066 } 1067 1068 /* Obtain offsets, maximum and format for vout. */ 1069 ret = mp2975_vout_per_rail_config_get(client, data, info); 1070 if (ret) 1071 return ret; 1072 1073 return pmbus_do_probe(client, info); 1074 } 1075 1076 static const struct of_device_id mp2975_of_match[] = { 1077 {.compatible = "mps,mp2971", .data = &mp2975_ddinfo[mp2971]}, 1078 {.compatible = "mps,mp2973", .data = &mp2975_ddinfo[mp2973]}, 1079 {.compatible = "mps,mp2975", .data = &mp2975_ddinfo[mp2975]}, 1080 {} 1081 }; 1082 MODULE_DEVICE_TABLE(of, mp2975_of_match); 1083 1084 static const struct i2c_device_id mp2975_id[] = { 1085 {"mp2971", (kernel_ulong_t)&mp2975_ddinfo[mp2971]}, 1086 {"mp2973", (kernel_ulong_t)&mp2975_ddinfo[mp2973]}, 1087 {"mp2975", (kernel_ulong_t)&mp2975_ddinfo[mp2975]}, 1088 {} 1089 }; 1090 MODULE_DEVICE_TABLE(i2c, mp2975_id); 1091 1092 static struct i2c_driver mp2975_driver = { 1093 .driver = { 1094 .name = "mp2975", 1095 .of_match_table = mp2975_of_match, 1096 }, 1097 .probe = mp2975_probe, 1098 .id_table = mp2975_id, 1099 }; 1100 1101 module_i2c_driver(mp2975_driver); 1102 1103 MODULE_AUTHOR("Vadim Pasternak <vadimp@nvidia.com>"); 1104 MODULE_DESCRIPTION("PMBus driver for MPS MP2975 device"); 1105 MODULE_LICENSE("GPL"); 1106 MODULE_IMPORT_NS("PMBUS"); 1107