1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * nct6775 - Driver for the hardware monitoring functionality of 4 * Nuvoton NCT677x Super-I/O chips 5 * 6 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net> 7 * 8 * Derived from w83627ehf driver 9 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de> 10 * Copyright (C) 2006 Yuan Mu (Winbond), 11 * Rudolf Marek <r.marek@assembler.cz> 12 * David Hubbard <david.c.hubbard@gmail.com> 13 * Daniel J Blueman <daniel.blueman@gmail.com> 14 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00) 15 * 16 * Shamelessly ripped from the w83627hf driver 17 * Copyright (C) 2003 Mark Studebaker 18 * 19 * Supports the following chips: 20 * 21 * Chip #vin #fan #pwm #temp chip IDs man ID 22 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3 23 * nct6116d 9 5 5 3+3 0xd280 0xc1 0x5ca3 24 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3 25 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3 26 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3 27 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3 28 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3 29 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3 30 * nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3 31 * nct6796d 14 7 7 2+6 0xd420 0xc1 0x5ca3 32 * nct6797d 14 7 7 2+6 0xd450 0xc1 0x5ca3 33 * (0xd451) 34 * nct6798d 14 7 7 2+6 0xd428 0xc1 0x5ca3 35 * (0xd429) 36 * nct6796d-s 18 7 7 6+2 0xd801 0xc1 0x5ca3 37 * nct6799d-r 18 7 7 6+2 0xd802 0xc1 0x5ca3 38 * 39 * #temp lists the number of monitored temperature sources (first value) plus 40 * the number of directly connectable temperature sensors (second value). 41 */ 42 43 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 44 45 #include <linux/module.h> 46 #include <linux/init.h> 47 #include <linux/slab.h> 48 #include <linux/jiffies.h> 49 #include <linux/hwmon.h> 50 #include <linux/hwmon-sysfs.h> 51 #include <linux/err.h> 52 #include <linux/mutex.h> 53 #include <linux/bitops.h> 54 #include <linux/nospec.h> 55 #include <linux/regmap.h> 56 #include "lm75.h" 57 #include "nct6775.h" 58 59 #undef DEFAULT_SYMBOL_NAMESPACE 60 #define DEFAULT_SYMBOL_NAMESPACE HWMON_NCT6775 61 62 #define USE_ALTERNATE 63 64 /* used to set data->name = nct6775_device_names[data->sio_kind] */ 65 static const char * const nct6775_device_names[] = { 66 "nct6106", 67 "nct6116", 68 "nct6775", 69 "nct6776", 70 "nct6779", 71 "nct6791", 72 "nct6792", 73 "nct6793", 74 "nct6795", 75 "nct6796", 76 "nct6797", 77 "nct6798", 78 "nct6799", 79 }; 80 81 /* Common and NCT6775 specific data */ 82 83 /* 84 * Voltage min/max registers for nr=7..14 are in bank 5 85 * min/max: 15-17 for NCT6799 only 86 */ 87 88 static const u16 NCT6775_REG_IN_MAX[] = { 89 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a, 90 0x55c, 0x55e, 0x560, 0x562, 0x564, 0x570, 0x572 }; 91 static const u16 NCT6775_REG_IN_MIN[] = { 92 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b, 93 0x55d, 0x55f, 0x561, 0x563, 0x565, 0x571, 0x573 }; 94 static const u16 NCT6775_REG_IN[] = { 95 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552 96 }; 97 98 #define NCT6775_REG_VBAT 0x5D 99 #define NCT6775_REG_DIODE 0x5E 100 #define NCT6775_DIODE_MASK 0x02 101 102 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B }; 103 104 static const s8 NCT6775_ALARM_BITS[NUM_ALARM_BITS] = { 105 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */ 106 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 107 6, 7, 11, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 108 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 109 12, -1, /* intr0-intr1 */ 110 }; 111 112 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e }; 113 114 static const s8 NCT6775_BEEP_BITS[NUM_BEEP_BITS] = { 115 0, 1, 2, 3, 8, 9, 10, 16, 17, -1, -1, -1, /* in0-in11 */ 116 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 117 6, 7, 11, 28, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 118 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 119 12, -1, 21 /* intr0-intr1, beep_en */ 120 }; 121 122 /* DC or PWM output fan configuration */ 123 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 }; 124 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 }; 125 126 /* Advanced Fan control, some values are common for all fans */ 127 128 static const u16 NCT6775_REG_TARGET[] = { 129 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 }; 130 static const u16 NCT6775_REG_FAN_MODE[] = { 131 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 }; 132 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = { 133 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 }; 134 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = { 135 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 }; 136 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 137 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 }; 138 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 139 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 }; 140 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a }; 141 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b }; 142 143 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 144 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 }; 145 static const u16 NCT6775_REG_PWM[] = { 146 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 }; 147 static const u16 NCT6775_REG_PWM_READ[] = { 148 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 }; 149 150 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 }; 151 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d }; 152 static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = { 153 0x641, 0x642, 0x643, 0x644 }; 154 static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { }; 155 156 static const u16 NCT6775_REG_TEMP[] = { 157 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d }; 158 159 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 }; 160 161 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 162 0, 0x152, 0x252, 0x628, 0x629, 0x62A }; 163 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 164 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D }; 165 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 166 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C }; 167 168 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 169 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 }; 170 171 static const u16 NCT6775_REG_TEMP_SEL[] = { 172 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 }; 173 174 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = { 175 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 }; 176 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = { 177 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a }; 178 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = { 179 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b }; 180 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = { 181 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c }; 182 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = { 183 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d }; 184 185 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 }; 186 187 static const u16 NCT6775_REG_AUTO_TEMP[] = { 188 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 }; 189 static const u16 NCT6775_REG_AUTO_PWM[] = { 190 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 }; 191 192 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p)) 193 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p)) 194 195 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 }; 196 197 static const u16 NCT6775_REG_CRITICAL_TEMP[] = { 198 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 }; 199 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = { 200 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 }; 201 202 static const char *const nct6775_temp_label[] = { 203 "", 204 "SYSTIN", 205 "CPUTIN", 206 "AUXTIN", 207 "AMD SB-TSI", 208 "PECI Agent 0", 209 "PECI Agent 1", 210 "PECI Agent 2", 211 "PECI Agent 3", 212 "PECI Agent 4", 213 "PECI Agent 5", 214 "PECI Agent 6", 215 "PECI Agent 7", 216 "PCH_CHIP_CPU_MAX_TEMP", 217 "PCH_CHIP_TEMP", 218 "PCH_CPU_TEMP", 219 "PCH_MCH_TEMP", 220 "PCH_DIM0_TEMP", 221 "PCH_DIM1_TEMP", 222 "PCH_DIM2_TEMP", 223 "PCH_DIM3_TEMP" 224 }; 225 226 #define NCT6775_TEMP_MASK 0x001ffffe 227 #define NCT6775_VIRT_TEMP_MASK 0x00000000 228 229 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = { 230 [13] = 0x661, 231 [14] = 0x662, 232 [15] = 0x664, 233 }; 234 235 static const u16 NCT6775_REG_TEMP_CRIT[32] = { 236 [4] = 0xa00, 237 [5] = 0xa01, 238 [6] = 0xa02, 239 [7] = 0xa03, 240 [8] = 0xa04, 241 [9] = 0xa05, 242 [10] = 0xa06, 243 [11] = 0xa07 244 }; 245 246 static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 }; 247 248 /* NCT6776 specific data */ 249 250 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */ 251 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME 252 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME 253 254 static const s8 NCT6776_ALARM_BITS[NUM_ALARM_BITS] = { 255 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */ 256 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 257 6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 258 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 259 12, 9, /* intr0-intr1 */ 260 }; 261 262 /* 0xbf: nct6799 only */ 263 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5, 0xbf }; 264 265 static const s8 NCT6776_BEEP_BITS[NUM_BEEP_BITS] = { 266 0, 1, 2, 3, 4, 5, 6, 7, 8, -1, -1, -1, /* in0-in11 */ 267 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 268 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 269 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 270 30, 31, 24 /* intr0-intr1, beep_en */ 271 }; 272 273 static const u16 NCT6776_REG_TOLERANCE_H[] = { 274 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c }; 275 276 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 }; 277 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 }; 278 279 static const u16 NCT6776_REG_FAN_MIN[] = { 280 0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c }; 281 static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = { 282 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 }; 283 284 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = { 285 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e }; 286 287 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 288 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A }; 289 290 static const char *const nct6776_temp_label[] = { 291 "", 292 "SYSTIN", 293 "CPUTIN", 294 "AUXTIN", 295 "SMBUSMASTER 0", 296 "SMBUSMASTER 1", 297 "SMBUSMASTER 2", 298 "SMBUSMASTER 3", 299 "SMBUSMASTER 4", 300 "SMBUSMASTER 5", 301 "SMBUSMASTER 6", 302 "SMBUSMASTER 7", 303 "PECI Agent 0", 304 "PECI Agent 1", 305 "PCH_CHIP_CPU_MAX_TEMP", 306 "PCH_CHIP_TEMP", 307 "PCH_CPU_TEMP", 308 "PCH_MCH_TEMP", 309 "PCH_DIM0_TEMP", 310 "PCH_DIM1_TEMP", 311 "PCH_DIM2_TEMP", 312 "PCH_DIM3_TEMP", 313 "BYTE_TEMP" 314 }; 315 316 #define NCT6776_TEMP_MASK 0x007ffffe 317 #define NCT6776_VIRT_TEMP_MASK 0x00000000 318 319 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = { 320 [14] = 0x401, 321 [15] = 0x402, 322 [16] = 0x404, 323 }; 324 325 static const u16 NCT6776_REG_TEMP_CRIT[32] = { 326 [11] = 0x709, 327 [12] = 0x70a, 328 }; 329 330 static const u16 NCT6776_REG_TSI_TEMP[] = { 331 0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 }; 332 333 /* NCT6779 specific data */ 334 335 /* 336 * 15-17 for NCT6799 only, register labels are: 337 * CPUVC, VIN1, AVSB, 3VCC, VIN0, VIN8, VIN4, 3VSB 338 * VBAT, VTT, VIN5, VIN6, VIN2, VIN3, VIN7, VIN9 339 * VHIF, VIN10 340 */ 341 static const u16 NCT6779_REG_IN[] = { 342 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487, 343 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e, 0x48f, 344 0x470, 0x471}; 345 346 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = { 347 0x459, 0x45A, 0x45B, 0x568 }; 348 349 static const s8 NCT6779_ALARM_BITS[NUM_ALARM_BITS] = { 350 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */ 351 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 352 6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 353 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 354 12, 9, /* intr0-intr1 */ 355 }; 356 357 static const s8 NCT6779_BEEP_BITS[NUM_BEEP_BITS] = { 358 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */ 359 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 360 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 361 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 362 30, 31, 24 /* intr0-intr1, beep_en */ 363 }; 364 365 static const u16 NCT6779_REG_FAN[] = { 366 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce }; 367 static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = { 368 0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f }; 369 370 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = { 371 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 }; 372 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01 373 static const u16 NCT6779_REG_CRITICAL_PWM[] = { 374 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 }; 375 376 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 }; 377 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b }; 378 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 379 0x18, 0x152 }; 380 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 381 0x3a, 0x153 }; 382 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 383 0x39, 0x155 }; 384 385 static const u16 NCT6779_REG_TEMP_OFFSET[] = { 386 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c, 0x44d, 0x449 }; 387 388 static const char *const nct6779_temp_label[] = { 389 "", 390 "SYSTIN", 391 "CPUTIN", 392 "AUXTIN0", 393 "AUXTIN1", 394 "AUXTIN2", 395 "AUXTIN3", 396 "", 397 "SMBUSMASTER 0", 398 "SMBUSMASTER 1", 399 "SMBUSMASTER 2", 400 "SMBUSMASTER 3", 401 "SMBUSMASTER 4", 402 "SMBUSMASTER 5", 403 "SMBUSMASTER 6", 404 "SMBUSMASTER 7", 405 "PECI Agent 0", 406 "PECI Agent 1", 407 "PCH_CHIP_CPU_MAX_TEMP", 408 "PCH_CHIP_TEMP", 409 "PCH_CPU_TEMP", 410 "PCH_MCH_TEMP", 411 "PCH_DIM0_TEMP", 412 "PCH_DIM1_TEMP", 413 "PCH_DIM2_TEMP", 414 "PCH_DIM3_TEMP", 415 "BYTE_TEMP", 416 "", 417 "", 418 "", 419 "", 420 "Virtual_TEMP" 421 }; 422 423 #define NCT6779_TEMP_MASK 0x07ffff7e 424 #define NCT6779_VIRT_TEMP_MASK 0x00000000 425 #define NCT6791_TEMP_MASK 0x87ffff7e 426 #define NCT6791_VIRT_TEMP_MASK 0x80000000 427 428 static const u16 NCT6779_REG_TEMP_ALTERNATE[32] 429 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0, 430 0, 0, 0, 0, 0, 0, 0, 0, 431 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407, 432 0x408, 0 }; 433 434 static const u16 NCT6779_REG_TEMP_CRIT[32] = { 435 [15] = 0x709, 436 [16] = 0x70a, 437 }; 438 439 /* NCT6791 specific data */ 440 441 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 }; 442 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a }; 443 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b }; 444 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c }; 445 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d }; 446 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e }; 447 448 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = { 449 0x459, 0x45A, 0x45B, 0x568, 0x45D }; 450 451 static const s8 NCT6791_ALARM_BITS[NUM_ALARM_BITS] = { 452 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */ 453 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 454 6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 455 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 456 12, 9, /* intr0-intr1 */ 457 }; 458 459 /* NCT6792/NCT6793 specific data */ 460 461 static const u16 NCT6792_REG_TEMP_MON[] = { 462 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d }; 463 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = { 464 0xb2, 0xb3, 0xb4, 0xb5, 0xbf }; 465 466 static const char *const nct6792_temp_label[] = { 467 "", 468 "SYSTIN", 469 "CPUTIN", 470 "AUXTIN0", 471 "AUXTIN1", 472 "AUXTIN2", 473 "AUXTIN3", 474 "", 475 "SMBUSMASTER 0", 476 "SMBUSMASTER 1", 477 "SMBUSMASTER 2", 478 "SMBUSMASTER 3", 479 "SMBUSMASTER 4", 480 "SMBUSMASTER 5", 481 "SMBUSMASTER 6", 482 "SMBUSMASTER 7", 483 "PECI Agent 0", 484 "PECI Agent 1", 485 "PCH_CHIP_CPU_MAX_TEMP", 486 "PCH_CHIP_TEMP", 487 "PCH_CPU_TEMP", 488 "PCH_MCH_TEMP", 489 "PCH_DIM0_TEMP", 490 "PCH_DIM1_TEMP", 491 "PCH_DIM2_TEMP", 492 "PCH_DIM3_TEMP", 493 "BYTE_TEMP", 494 "PECI Agent 0 Calibration", 495 "PECI Agent 1 Calibration", 496 "", 497 "", 498 "Virtual_TEMP" 499 }; 500 501 #define NCT6792_TEMP_MASK 0x9fffff7e 502 #define NCT6792_VIRT_TEMP_MASK 0x80000000 503 504 static const char *const nct6793_temp_label[] = { 505 "", 506 "SYSTIN", 507 "CPUTIN", 508 "AUXTIN0", 509 "AUXTIN1", 510 "AUXTIN2", 511 "AUXTIN3", 512 "", 513 "SMBUSMASTER 0", 514 "SMBUSMASTER 1", 515 "", 516 "", 517 "", 518 "", 519 "", 520 "", 521 "PECI Agent 0", 522 "PECI Agent 1", 523 "PCH_CHIP_CPU_MAX_TEMP", 524 "PCH_CHIP_TEMP", 525 "PCH_CPU_TEMP", 526 "PCH_MCH_TEMP", 527 "Agent0 Dimm0 ", 528 "Agent0 Dimm1", 529 "Agent1 Dimm0", 530 "Agent1 Dimm1", 531 "BYTE_TEMP0", 532 "BYTE_TEMP1", 533 "PECI Agent 0 Calibration", 534 "PECI Agent 1 Calibration", 535 "", 536 "Virtual_TEMP" 537 }; 538 539 #define NCT6793_TEMP_MASK 0xbfff037e 540 #define NCT6793_VIRT_TEMP_MASK 0x80000000 541 542 static const char *const nct6795_temp_label[] = { 543 "", 544 "SYSTIN", 545 "CPUTIN", 546 "AUXTIN0", 547 "AUXTIN1", 548 "AUXTIN2", 549 "AUXTIN3", 550 "", 551 "SMBUSMASTER 0", 552 "SMBUSMASTER 1", 553 "SMBUSMASTER 2", 554 "SMBUSMASTER 3", 555 "SMBUSMASTER 4", 556 "SMBUSMASTER 5", 557 "SMBUSMASTER 6", 558 "SMBUSMASTER 7", 559 "PECI Agent 0", 560 "PECI Agent 1", 561 "PCH_CHIP_CPU_MAX_TEMP", 562 "PCH_CHIP_TEMP", 563 "PCH_CPU_TEMP", 564 "PCH_MCH_TEMP", 565 "Agent0 Dimm0", 566 "Agent0 Dimm1", 567 "Agent1 Dimm0", 568 "Agent1 Dimm1", 569 "BYTE_TEMP0", 570 "BYTE_TEMP1", 571 "PECI Agent 0 Calibration", 572 "PECI Agent 1 Calibration", 573 "", 574 "Virtual_TEMP" 575 }; 576 577 #define NCT6795_TEMP_MASK 0xbfffff7e 578 #define NCT6795_VIRT_TEMP_MASK 0x80000000 579 580 static const char *const nct6796_temp_label[] = { 581 "", 582 "SYSTIN", 583 "CPUTIN", 584 "AUXTIN0", 585 "AUXTIN1", 586 "AUXTIN2", 587 "AUXTIN3", 588 "AUXTIN4", 589 "SMBUSMASTER 0", 590 "SMBUSMASTER 1", 591 "Virtual_TEMP", 592 "Virtual_TEMP", 593 "", 594 "", 595 "", 596 "", 597 "PECI Agent 0", 598 "PECI Agent 1", 599 "PCH_CHIP_CPU_MAX_TEMP", 600 "PCH_CHIP_TEMP", 601 "PCH_CPU_TEMP", 602 "PCH_MCH_TEMP", 603 "Agent0 Dimm0", 604 "Agent0 Dimm1", 605 "Agent1 Dimm0", 606 "Agent1 Dimm1", 607 "BYTE_TEMP0", 608 "BYTE_TEMP1", 609 "PECI Agent 0 Calibration", 610 "PECI Agent 1 Calibration", 611 "", 612 "Virtual_TEMP" 613 }; 614 615 #define NCT6796_TEMP_MASK 0xbfff0ffe 616 #define NCT6796_VIRT_TEMP_MASK 0x80000c00 617 618 static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b }; 619 620 static const u16 NCT6798_REG_TEMP[] = { 621 0x27, 0x150, 0x670, 0x672, 0x674, 0x676, 0x678, 0x67a}; 622 623 static const u16 NCT6798_REG_TEMP_SOURCE[] = { 624 0x621, 0x622, 0xc26, 0xc27, 0xc28, 0xc29, 0xc2a, 0xc2b }; 625 626 static const u16 NCT6798_REG_TEMP_MON[] = { 627 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d, 0x4a0 }; 628 static const u16 NCT6798_REG_TEMP_OVER[] = { 629 0x39, 0x155, 0xc1a, 0xc1b, 0xc1c, 0xc1d, 0xc1e, 0xc1f }; 630 static const u16 NCT6798_REG_TEMP_HYST[] = { 631 0x3a, 0x153, 0xc20, 0xc21, 0xc22, 0xc23, 0xc24, 0xc25 }; 632 633 static const u16 NCT6798_REG_TEMP_CRIT[32] = { 634 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35, 0 }; 635 636 static const u16 NCT6798_REG_TEMP_ALTERNATE[32] = { 637 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0x496, 0, 638 0, 0, 0, 0, 0x4a2, 0, 0, 0, 639 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407, 640 0x408, 0x419, 0x41a, 0x4f4, 0x4f5 }; 641 642 static const char *const nct6798_temp_label[] = { 643 "", 644 "SYSTIN", 645 "CPUTIN", 646 "AUXTIN0", 647 "AUXTIN1", 648 "AUXTIN2", 649 "AUXTIN3", 650 "AUXTIN4", 651 "SMBUSMASTER 0", 652 "SMBUSMASTER 1", 653 "Virtual_TEMP", 654 "Virtual_TEMP", 655 "", 656 "", 657 "", 658 "", 659 "PECI Agent 0", 660 "PECI Agent 1", 661 "PCH_CHIP_CPU_MAX_TEMP", 662 "PCH_CHIP_TEMP", 663 "PCH_CPU_TEMP", 664 "PCH_MCH_TEMP", 665 "Agent0 Dimm0", 666 "Agent0 Dimm1", 667 "Agent1 Dimm0", 668 "Agent1 Dimm1", 669 "BYTE_TEMP0", 670 "BYTE_TEMP1", 671 "PECI Agent 0 Calibration", /* undocumented */ 672 "PECI Agent 1 Calibration", /* undocumented */ 673 "", 674 "Virtual_TEMP" 675 }; 676 677 #define NCT6798_TEMP_MASK 0xbfff0ffe 678 #define NCT6798_VIRT_TEMP_MASK 0x80000c00 679 680 static const u16 NCT6799_REG_ALARM[NUM_REG_ALARM] = { 681 0x459, 0x45A, 0x45B, 0x568, 0x45D, 0xc01 }; 682 683 static const s8 NCT6799_ALARM_BITS[NUM_ALARM_BITS] = { 684 0, 1, 2, 3, 8, -1, 20, 16, 17, 24, 25, 26, /* in0-in11 */ 685 27, 28, 29, 30, 31, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 686 6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 687 4, 5, 40, 41, 42, 43, 44, -1, -1, -1, -1, -1, /* temp1-temp12 */ 688 12, 9, /* intr0-intr1 */ 689 }; 690 691 static const s8 NCT6799_BEEP_BITS[NUM_BEEP_BITS] = { 692 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */ 693 12, 13, 14, 15, 34, 35, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 694 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 695 16, 17, 18, 19, 20, 21, 22, 23, -1, -1, -1, -1, /* temp1-temp12 */ 696 30, 31, 24 /* intr0-intr1, beep_en */ 697 }; 698 699 /* PECI Calibration only for NCT6799D, not NCT6796D-S */ 700 static const char *const nct6799_temp_label[] = { 701 "", 702 "SYSTIN", 703 "CPUTIN", 704 "AUXTIN0", 705 "AUXTIN1", 706 "AUXTIN2", 707 "AUXTIN3", 708 "AUXTIN4", 709 "SMBUSMASTER 0", 710 "SMBUSMASTER 1", 711 "Virtual_TEMP", 712 "Virtual_TEMP", 713 "", 714 "AUXTIN5", 715 "", 716 "", 717 "PECI Agent 0", 718 "PECI Agent 1", 719 "PCH_CHIP_CPU_MAX_TEMP", 720 "PCH_CHIP_TEMP", 721 "PCH_CPU_TEMP", 722 "PCH_MCH_TEMP", 723 "Agent0 Dimm0", 724 "Agent0 Dimm1", 725 "Agent1 Dimm0", 726 "Agent1 Dimm1", 727 "BYTE_TEMP0", 728 "BYTE_TEMP1", 729 "PECI/TSI Agent 0 Calibration", 730 "PECI/TSI Agent 1 Calibration", 731 "", 732 "Virtual_TEMP" 733 }; 734 735 #define NCT6799_TEMP_MASK 0xbfff2ffe 736 #define NCT6799_VIRT_TEMP_MASK 0x80000c00 737 738 /* NCT6102D/NCT6106D specific data */ 739 740 #define NCT6106_REG_VBAT 0x318 741 #define NCT6106_REG_DIODE 0x319 742 #define NCT6106_DIODE_MASK 0x01 743 744 static const u16 NCT6106_REG_IN_MAX[] = { 745 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 }; 746 static const u16 NCT6106_REG_IN_MIN[] = { 747 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 }; 748 static const u16 NCT6106_REG_IN[] = { 749 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 }; 750 751 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 }; 752 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a }; 753 static const u16 NCT6106_REG_TEMP_HYST[] = { 754 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 }; 755 static const u16 NCT6106_REG_TEMP_OVER[] = { 756 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 }; 757 static const u16 NCT6106_REG_TEMP_CRIT_L[] = { 758 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 }; 759 static const u16 NCT6106_REG_TEMP_CRIT_H[] = { 760 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 }; 761 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 }; 762 static const u16 NCT6106_REG_TEMP_CONFIG[] = { 763 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc }; 764 765 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 }; 766 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 }; 767 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 }; 768 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 }; 769 770 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 }; 771 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 }; 772 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c }; 773 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 }; 774 static const u16 NCT6106_REG_TEMP_SOURCE[] = { 775 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 }; 776 777 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a }; 778 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = { 779 0x11b, 0x12b, 0x13b }; 780 781 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c }; 782 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10 783 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d }; 784 785 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 }; 786 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 }; 787 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 }; 788 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 }; 789 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 }; 790 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 }; 791 792 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 }; 793 794 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 }; 795 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 }; 796 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a }; 797 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b }; 798 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c }; 799 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d }; 800 801 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 }; 802 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 }; 803 804 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = { 805 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d }; 806 807 static const s8 NCT6106_ALARM_BITS[NUM_ALARM_BITS] = { 808 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */ 809 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 810 32, 33, 34, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 811 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 812 48, -1, /* intr0-intr1 */ 813 }; 814 815 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = { 816 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 }; 817 818 static const s8 NCT6106_BEEP_BITS[NUM_BEEP_BITS] = { 819 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */ 820 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 821 24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 822 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 823 34, -1, 32 /* intr0-intr1, beep_en */ 824 }; 825 826 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = { 827 [14] = 0x51, 828 [15] = 0x52, 829 [16] = 0x54, 830 }; 831 832 static const u16 NCT6106_REG_TEMP_CRIT[32] = { 833 [11] = 0x204, 834 [12] = 0x205, 835 }; 836 837 static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 }; 838 839 /* NCT6112D/NCT6114D/NCT6116D specific data */ 840 841 static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 }; 842 static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 }; 843 static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 }; 844 static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 }; 845 846 static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 }; 847 static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 }; 848 static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 }; 849 static const u16 NCT6116_REG_TEMP_SOURCE[] = { 850 0xb0, 0xb1, 0xb2 }; 851 852 static const u16 NCT6116_REG_CRITICAL_TEMP[] = { 853 0x11a, 0x12a, 0x13a, 0x19a, 0x1aa }; 854 static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = { 855 0x11b, 0x12b, 0x13b, 0x19b, 0x1ab }; 856 857 static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = { 858 0x11c, 0x12c, 0x13c, 0x19c, 0x1ac }; 859 static const u16 NCT6116_REG_CRITICAL_PWM[] = { 860 0x11d, 0x12d, 0x13d, 0x19d, 0x1ad }; 861 862 static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = { 863 0x114, 0x124, 0x134, 0x194, 0x1a4 }; 864 static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = { 865 0x115, 0x125, 0x135, 0x195, 0x1a5 }; 866 static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = { 867 0x116, 0x126, 0x136, 0x196, 0x1a6 }; 868 static const u16 NCT6116_REG_FAN_START_OUTPUT[] = { 869 0x117, 0x127, 0x137, 0x197, 0x1a7 }; 870 static const u16 NCT6116_REG_FAN_STOP_TIME[] = { 871 0x118, 0x128, 0x138, 0x198, 0x1a8 }; 872 static const u16 NCT6116_REG_TOLERANCE_H[] = { 873 0x112, 0x122, 0x132, 0x192, 0x1a2 }; 874 875 static const u16 NCT6116_REG_TARGET[] = { 876 0x111, 0x121, 0x131, 0x191, 0x1a1 }; 877 878 static const u16 NCT6116_REG_AUTO_TEMP[] = { 879 0x160, 0x170, 0x180, 0x1d0, 0x1e0 }; 880 static const u16 NCT6116_REG_AUTO_PWM[] = { 881 0x164, 0x174, 0x184, 0x1d4, 0x1e4 }; 882 883 static const s8 NCT6116_ALARM_BITS[NUM_ALARM_BITS] = { 884 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */ 885 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 886 32, 33, 34, 35, 36, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 887 16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 888 48, -1, /* intr0-intr1 */ 889 }; 890 891 static const s8 NCT6116_BEEP_BITS[NUM_BEEP_BITS] = { 892 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */ 893 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 894 24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 895 16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 896 34, -1, 32 /* intr0-intr1, beep_en */ 897 }; 898 899 static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b }; 900 901 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode) 902 { 903 if (mode == 0 && pwm == 255) 904 return off; 905 return mode + 1; 906 } 907 908 static int pwm_enable_to_reg(enum pwm_enable mode) 909 { 910 if (mode == off) 911 return 0; 912 return mode - 1; 913 } 914 915 /* 916 * Conversions 917 */ 918 919 /* 1 is DC mode, output in ms */ 920 static unsigned int step_time_from_reg(u8 reg, u8 mode) 921 { 922 return mode ? 400 * reg : 100 * reg; 923 } 924 925 static u8 step_time_to_reg(unsigned int msec, u8 mode) 926 { 927 return clamp_val((mode ? (msec + 200) / 400 : 928 (msec + 50) / 100), 1, 255); 929 } 930 931 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg) 932 { 933 if (reg == 0 || reg == 255) 934 return 0; 935 return 1350000U / (reg << divreg); 936 } 937 938 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg) 939 { 940 if ((reg & 0xff1f) == 0xff1f) 941 return 0; 942 943 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3); 944 945 if (reg == 0) 946 return 0; 947 948 return 1350000U / reg; 949 } 950 951 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg) 952 { 953 if (reg == 0 || reg == 0xffff) 954 return 0; 955 956 /* 957 * Even though the registers are 16 bit wide, the fan divisor 958 * still applies. 959 */ 960 return 1350000U / (reg << divreg); 961 } 962 963 static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg) 964 { 965 return reg; 966 } 967 968 static u16 fan_to_reg(u32 fan, unsigned int divreg) 969 { 970 if (!fan) 971 return 0; 972 973 return (1350000U / fan) >> divreg; 974 } 975 976 static inline unsigned int 977 div_from_reg(u8 reg) 978 { 979 return BIT(reg); 980 } 981 982 /* 983 * Some of the voltage inputs have internal scaling, the tables below 984 * contain 8 (the ADC LSB in mV) * scaling factor * 100 985 */ 986 static const u16 scale_in[15] = { 987 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800, 988 800, 800 989 }; 990 991 /* 992 * NCT6798 scaling: 993 * CPUVC, IN1, AVSB, 3VCC, IN0, IN8, IN4, 3VSB, VBAT, VTT, IN5, IN6, IN2, 994 * IN3, IN7, IN9, VHIF, IN10 995 * 15-17 for NCT6799 only 996 */ 997 static const u16 scale_in_6798[NUM_IN] = { 998 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 1600, 1600, 1600, 800, 999 800, 800, 800, 1600, 800 1000 }; 1001 1002 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scales) 1003 { 1004 return DIV_ROUND_CLOSEST(reg * scales[nr], 100); 1005 } 1006 1007 static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scales) 1008 { 1009 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scales[nr]), 0, 255); 1010 } 1011 1012 /* TSI temperatures are in 8.3 format */ 1013 static inline unsigned int tsi_temp_from_reg(unsigned int reg) 1014 { 1015 return (reg >> 5) * 125; 1016 } 1017 1018 /* 1019 * Data structures and manipulation thereof 1020 */ 1021 1022 struct sensor_device_template { 1023 struct device_attribute dev_attr; 1024 union { 1025 struct { 1026 u8 nr; 1027 u8 index; 1028 } s; 1029 int index; 1030 } u; 1031 bool s2; /* true if both index and nr are used */ 1032 }; 1033 1034 struct sensor_device_attr_u { 1035 union { 1036 struct sensor_device_attribute a1; 1037 struct sensor_device_attribute_2 a2; 1038 } u; 1039 char name[32]; 1040 }; 1041 1042 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \ 1043 .attr = {.name = _template, .mode = _mode }, \ 1044 .show = _show, \ 1045 .store = _store, \ 1046 } 1047 1048 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \ 1049 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \ 1050 .u.index = _index, \ 1051 .s2 = false } 1052 1053 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \ 1054 _nr, _index) \ 1055 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \ 1056 .u.s.index = _index, \ 1057 .u.s.nr = _nr, \ 1058 .s2 = true } 1059 1060 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \ 1061 static struct sensor_device_template sensor_dev_template_##_name \ 1062 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \ 1063 _index) 1064 1065 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \ 1066 _nr, _index) \ 1067 static struct sensor_device_template sensor_dev_template_##_name \ 1068 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \ 1069 _nr, _index) 1070 1071 struct sensor_template_group { 1072 struct sensor_device_template **templates; 1073 umode_t (*is_visible)(struct kobject *, struct attribute *, int); 1074 int base; 1075 }; 1076 1077 static int nct6775_add_template_attr_group(struct device *dev, struct nct6775_data *data, 1078 const struct sensor_template_group *tg, int repeat) 1079 { 1080 struct attribute_group *group; 1081 struct sensor_device_attr_u *su; 1082 struct sensor_device_attribute *a; 1083 struct sensor_device_attribute_2 *a2; 1084 struct attribute **attrs; 1085 struct sensor_device_template **t; 1086 int i, count; 1087 1088 if (repeat <= 0) 1089 return -EINVAL; 1090 1091 t = tg->templates; 1092 for (count = 0; *t; t++, count++) 1093 ; 1094 1095 if (count == 0) 1096 return -EINVAL; 1097 1098 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL); 1099 if (group == NULL) 1100 return -ENOMEM; 1101 1102 attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs), 1103 GFP_KERNEL); 1104 if (attrs == NULL) 1105 return -ENOMEM; 1106 1107 su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)), 1108 GFP_KERNEL); 1109 if (su == NULL) 1110 return -ENOMEM; 1111 1112 group->attrs = attrs; 1113 group->is_visible = tg->is_visible; 1114 1115 for (i = 0; i < repeat; i++) { 1116 t = tg->templates; 1117 while (*t != NULL) { 1118 snprintf(su->name, sizeof(su->name), 1119 (*t)->dev_attr.attr.name, tg->base + i); 1120 if ((*t)->s2) { 1121 a2 = &su->u.a2; 1122 sysfs_attr_init(&a2->dev_attr.attr); 1123 a2->dev_attr.attr.name = su->name; 1124 a2->nr = (*t)->u.s.nr + i; 1125 a2->index = (*t)->u.s.index; 1126 a2->dev_attr.attr.mode = 1127 (*t)->dev_attr.attr.mode; 1128 a2->dev_attr.show = (*t)->dev_attr.show; 1129 a2->dev_attr.store = (*t)->dev_attr.store; 1130 *attrs = &a2->dev_attr.attr; 1131 } else { 1132 a = &su->u.a1; 1133 sysfs_attr_init(&a->dev_attr.attr); 1134 a->dev_attr.attr.name = su->name; 1135 a->index = (*t)->u.index + i; 1136 a->dev_attr.attr.mode = 1137 (*t)->dev_attr.attr.mode; 1138 a->dev_attr.show = (*t)->dev_attr.show; 1139 a->dev_attr.store = (*t)->dev_attr.store; 1140 *attrs = &a->dev_attr.attr; 1141 } 1142 attrs++; 1143 su++; 1144 t++; 1145 } 1146 } 1147 1148 return nct6775_add_attr_group(data, group); 1149 } 1150 1151 bool nct6775_reg_is_word_sized(struct nct6775_data *data, u16 reg) 1152 { 1153 switch (data->kind) { 1154 case nct6106: 1155 return reg == 0x20 || reg == 0x22 || reg == 0x24 || 1156 (reg >= 0x59 && reg < 0x69 && (reg & 1)) || 1157 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || 1158 reg == 0x111 || reg == 0x121 || reg == 0x131; 1159 case nct6116: 1160 return reg == 0x20 || reg == 0x22 || reg == 0x24 || 1161 reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b || 1162 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 || 1163 reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 || 1164 reg == 0x191 || reg == 0x1a1; 1165 case nct6775: 1166 return (((reg & 0xff00) == 0x100 || 1167 (reg & 0xff00) == 0x200) && 1168 ((reg & 0x00ff) == 0x50 || 1169 (reg & 0x00ff) == 0x53 || 1170 (reg & 0x00ff) == 0x55)) || 1171 (reg & 0xfff0) == 0x630 || 1172 reg == 0x640 || reg == 0x642 || 1173 reg == 0x662 || reg == 0x669 || 1174 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || 1175 reg == 0x73 || reg == 0x75 || reg == 0x77; 1176 case nct6776: 1177 return (((reg & 0xff00) == 0x100 || 1178 (reg & 0xff00) == 0x200) && 1179 ((reg & 0x00ff) == 0x50 || 1180 (reg & 0x00ff) == 0x53 || 1181 (reg & 0x00ff) == 0x55)) || 1182 (reg & 0xfff0) == 0x630 || 1183 reg == 0x402 || 1184 (reg >= 0x409 && reg < 0x419 && (reg & 1)) || 1185 reg == 0x640 || reg == 0x642 || 1186 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || 1187 reg == 0x73 || reg == 0x75 || reg == 0x77; 1188 case nct6779: 1189 case nct6791: 1190 case nct6792: 1191 case nct6793: 1192 case nct6795: 1193 case nct6796: 1194 case nct6797: 1195 case nct6798: 1196 case nct6799: 1197 return reg == 0x150 || reg == 0x153 || reg == 0x155 || 1198 (reg & 0xfff0) == 0x4c0 || 1199 reg == 0x402 || 1200 (reg >= 0x409 && reg < 0x419 && (reg & 1)) || 1201 reg == 0x63a || reg == 0x63c || reg == 0x63e || 1202 reg == 0x640 || reg == 0x642 || reg == 0x64a || 1203 reg == 0x64c || 1204 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 || 1205 reg == 0x7b || reg == 0x7d; 1206 } 1207 return false; 1208 } 1209 EXPORT_SYMBOL_GPL(nct6775_reg_is_word_sized); 1210 1211 /* We left-align 8-bit temperature values to make the code simpler */ 1212 static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val) 1213 { 1214 int err; 1215 1216 err = nct6775_read_value(data, reg, val); 1217 if (err) 1218 return err; 1219 1220 if (!nct6775_reg_is_word_sized(data, reg)) 1221 *val <<= 8; 1222 1223 return 0; 1224 } 1225 1226 /* This function assumes that the caller holds data->update_lock */ 1227 static int nct6775_write_fan_div(struct nct6775_data *data, int nr) 1228 { 1229 u16 reg; 1230 int err; 1231 u16 fandiv_reg = nr < 2 ? NCT6775_REG_FANDIV1 : NCT6775_REG_FANDIV2; 1232 unsigned int oddshift = (nr & 1) * 4; /* masks shift by four if nr is odd */ 1233 1234 err = nct6775_read_value(data, fandiv_reg, ®); 1235 if (err) 1236 return err; 1237 reg &= 0x70 >> oddshift; 1238 reg |= (data->fan_div[nr] & 0x7) << oddshift; 1239 return nct6775_write_value(data, fandiv_reg, reg); 1240 } 1241 1242 static int nct6775_write_fan_div_common(struct nct6775_data *data, int nr) 1243 { 1244 if (data->kind == nct6775) 1245 return nct6775_write_fan_div(data, nr); 1246 return 0; 1247 } 1248 1249 static int nct6775_update_fan_div(struct nct6775_data *data) 1250 { 1251 int err; 1252 u16 i; 1253 1254 err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &i); 1255 if (err) 1256 return err; 1257 data->fan_div[0] = i & 0x7; 1258 data->fan_div[1] = (i & 0x70) >> 4; 1259 err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &i); 1260 if (err) 1261 return err; 1262 data->fan_div[2] = i & 0x7; 1263 if (data->has_fan & BIT(3)) 1264 data->fan_div[3] = (i & 0x70) >> 4; 1265 1266 return 0; 1267 } 1268 1269 static int nct6775_update_fan_div_common(struct nct6775_data *data) 1270 { 1271 if (data->kind == nct6775) 1272 return nct6775_update_fan_div(data); 1273 return 0; 1274 } 1275 1276 static int nct6775_init_fan_div(struct nct6775_data *data) 1277 { 1278 int i, err; 1279 1280 err = nct6775_update_fan_div_common(data); 1281 if (err) 1282 return err; 1283 1284 /* 1285 * For all fans, start with highest divider value if the divider 1286 * register is not initialized. This ensures that we get a 1287 * reading from the fan count register, even if it is not optimal. 1288 * We'll compute a better divider later on. 1289 */ 1290 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) { 1291 if (!(data->has_fan & BIT(i))) 1292 continue; 1293 if (data->fan_div[i] == 0) { 1294 data->fan_div[i] = 7; 1295 err = nct6775_write_fan_div_common(data, i); 1296 if (err) 1297 return err; 1298 } 1299 } 1300 1301 return 0; 1302 } 1303 1304 static int nct6775_init_fan_common(struct device *dev, 1305 struct nct6775_data *data) 1306 { 1307 int i, err; 1308 u16 reg; 1309 1310 if (data->has_fan_div) { 1311 err = nct6775_init_fan_div(data); 1312 if (err) 1313 return err; 1314 } 1315 1316 /* 1317 * If fan_min is not set (0), set it to 0xff to disable it. This 1318 * prevents the unnecessary warning when fanX_min is reported as 0. 1319 */ 1320 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) { 1321 if (data->has_fan_min & BIT(i)) { 1322 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®); 1323 if (err) 1324 return err; 1325 if (!reg) { 1326 err = nct6775_write_value(data, data->REG_FAN_MIN[i], 1327 data->has_fan_div ? 0xff : 0xff1f); 1328 if (err) 1329 return err; 1330 } 1331 } 1332 } 1333 1334 return 0; 1335 } 1336 1337 static int nct6775_select_fan_div(struct device *dev, 1338 struct nct6775_data *data, int nr, u16 reg) 1339 { 1340 int err; 1341 u8 fan_div = data->fan_div[nr]; 1342 u16 fan_min; 1343 1344 if (!data->has_fan_div) 1345 return 0; 1346 1347 /* 1348 * If we failed to measure the fan speed, or the reported value is not 1349 * in the optimal range, and the clock divider can be modified, 1350 * let's try that for next time. 1351 */ 1352 if (reg == 0x00 && fan_div < 0x07) 1353 fan_div++; 1354 else if (reg != 0x00 && reg < 0x30 && fan_div > 0) 1355 fan_div--; 1356 1357 if (fan_div != data->fan_div[nr]) { 1358 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n", 1359 nr + 1, div_from_reg(data->fan_div[nr]), 1360 div_from_reg(fan_div)); 1361 1362 /* Preserve min limit if possible */ 1363 if (data->has_fan_min & BIT(nr)) { 1364 fan_min = data->fan_min[nr]; 1365 if (fan_div > data->fan_div[nr]) { 1366 if (fan_min != 255 && fan_min > 1) 1367 fan_min >>= 1; 1368 } else { 1369 if (fan_min != 255) { 1370 fan_min <<= 1; 1371 if (fan_min > 254) 1372 fan_min = 254; 1373 } 1374 } 1375 if (fan_min != data->fan_min[nr]) { 1376 data->fan_min[nr] = fan_min; 1377 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], fan_min); 1378 if (err) 1379 return err; 1380 } 1381 } 1382 data->fan_div[nr] = fan_div; 1383 err = nct6775_write_fan_div_common(data, nr); 1384 if (err) 1385 return err; 1386 } 1387 1388 return 0; 1389 } 1390 1391 static int nct6775_update_pwm(struct device *dev) 1392 { 1393 struct nct6775_data *data = dev_get_drvdata(dev); 1394 int i, j, err; 1395 u16 fanmodecfg, reg; 1396 bool duty_is_dc; 1397 1398 for (i = 0; i < data->pwm_num; i++) { 1399 if (!(data->has_pwm & BIT(i))) 1400 continue; 1401 1402 err = nct6775_read_value(data, data->REG_PWM_MODE[i], ®); 1403 if (err) 1404 return err; 1405 duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]); 1406 data->pwm_mode[i] = !duty_is_dc; 1407 1408 err = nct6775_read_value(data, data->REG_FAN_MODE[i], &fanmodecfg); 1409 if (err) 1410 return err; 1411 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) { 1412 if (data->REG_PWM[j] && data->REG_PWM[j][i]) { 1413 err = nct6775_read_value(data, data->REG_PWM[j][i], ®); 1414 if (err) 1415 return err; 1416 data->pwm[j][i] = reg; 1417 } 1418 } 1419 1420 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i], 1421 (fanmodecfg >> 4) & 7); 1422 1423 if (!data->temp_tolerance[0][i] || 1424 data->pwm_enable[i] != speed_cruise) 1425 data->temp_tolerance[0][i] = fanmodecfg & 0x0f; 1426 if (!data->target_speed_tolerance[i] || 1427 data->pwm_enable[i] == speed_cruise) { 1428 u8 t = fanmodecfg & 0x0f; 1429 1430 if (data->REG_TOLERANCE_H) { 1431 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®); 1432 if (err) 1433 return err; 1434 t |= (reg & 0x70) >> 1; 1435 } 1436 data->target_speed_tolerance[i] = t; 1437 } 1438 1439 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], ®); 1440 if (err) 1441 return err; 1442 data->temp_tolerance[1][i] = reg; 1443 1444 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], ®); 1445 if (err) 1446 return err; 1447 data->pwm_temp_sel[i] = reg & 0x1f; 1448 /* If fan can stop, report floor as 0 */ 1449 if (reg & 0x80) 1450 data->pwm[2][i] = 0; 1451 1452 if (!data->REG_WEIGHT_TEMP_SEL[i]) 1453 continue; 1454 1455 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], ®); 1456 if (err) 1457 return err; 1458 data->pwm_weight_temp_sel[i] = reg & 0x1f; 1459 /* If weight is disabled, report weight source as 0 */ 1460 if (!(reg & 0x80)) 1461 data->pwm_weight_temp_sel[i] = 0; 1462 1463 /* Weight temp data */ 1464 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) { 1465 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], ®); 1466 if (err) 1467 return err; 1468 data->weight_temp[j][i] = reg; 1469 } 1470 } 1471 1472 return 0; 1473 } 1474 1475 static int nct6775_update_pwm_limits(struct device *dev) 1476 { 1477 struct nct6775_data *data = dev_get_drvdata(dev); 1478 int i, j, err; 1479 u16 reg, reg_t; 1480 1481 for (i = 0; i < data->pwm_num; i++) { 1482 if (!(data->has_pwm & BIT(i))) 1483 continue; 1484 1485 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) { 1486 err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], ®); 1487 if (err) 1488 return err; 1489 data->fan_time[j][i] = reg; 1490 } 1491 1492 err = nct6775_read_value(data, data->REG_TARGET[i], ®_t); 1493 if (err) 1494 return err; 1495 1496 /* Update only in matching mode or if never updated */ 1497 if (!data->target_temp[i] || 1498 data->pwm_enable[i] == thermal_cruise) 1499 data->target_temp[i] = reg_t & data->target_temp_mask; 1500 if (!data->target_speed[i] || 1501 data->pwm_enable[i] == speed_cruise) { 1502 if (data->REG_TOLERANCE_H) { 1503 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®); 1504 if (err) 1505 return err; 1506 reg_t |= (reg & 0x0f) << 8; 1507 } 1508 data->target_speed[i] = reg_t; 1509 } 1510 1511 for (j = 0; j < data->auto_pwm_num; j++) { 1512 err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), ®); 1513 if (err) 1514 return err; 1515 data->auto_pwm[i][j] = reg; 1516 1517 err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), ®); 1518 if (err) 1519 return err; 1520 data->auto_temp[i][j] = reg; 1521 } 1522 1523 /* critical auto_pwm temperature data */ 1524 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], ®); 1525 if (err) 1526 return err; 1527 data->auto_temp[i][data->auto_pwm_num] = reg; 1528 1529 switch (data->kind) { 1530 case nct6775: 1531 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], ®); 1532 if (err) 1533 return err; 1534 data->auto_pwm[i][data->auto_pwm_num] = 1535 (reg & 0x02) ? 0xff : 0x00; 1536 break; 1537 case nct6776: 1538 data->auto_pwm[i][data->auto_pwm_num] = 0xff; 1539 break; 1540 case nct6106: 1541 case nct6116: 1542 case nct6779: 1543 case nct6791: 1544 case nct6792: 1545 case nct6793: 1546 case nct6795: 1547 case nct6796: 1548 case nct6797: 1549 case nct6798: 1550 case nct6799: 1551 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], ®); 1552 if (err) 1553 return err; 1554 if (reg & data->CRITICAL_PWM_ENABLE_MASK) { 1555 err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], ®); 1556 if (err) 1557 return err; 1558 } else { 1559 reg = 0xff; 1560 } 1561 data->auto_pwm[i][data->auto_pwm_num] = reg; 1562 break; 1563 } 1564 } 1565 1566 return 0; 1567 } 1568 1569 struct nct6775_data *nct6775_update_device(struct device *dev) 1570 { 1571 struct nct6775_data *data = dev_get_drvdata(dev); 1572 int i, j, err = 0; 1573 u16 reg; 1574 1575 mutex_lock(&data->update_lock); 1576 1577 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1578 || !data->valid) { 1579 /* Fan clock dividers */ 1580 err = nct6775_update_fan_div_common(data); 1581 if (err) 1582 goto out; 1583 1584 /* Measured voltages and limits */ 1585 for (i = 0; i < data->in_num; i++) { 1586 if (!(data->have_in & BIT(i))) 1587 continue; 1588 1589 err = nct6775_read_value(data, data->REG_VIN[i], ®); 1590 if (err) 1591 goto out; 1592 data->in[i][0] = reg; 1593 1594 err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], ®); 1595 if (err) 1596 goto out; 1597 data->in[i][1] = reg; 1598 1599 err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], ®); 1600 if (err) 1601 goto out; 1602 data->in[i][2] = reg; 1603 } 1604 1605 /* Measured fan speeds and limits */ 1606 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) { 1607 if (!(data->has_fan & BIT(i))) 1608 continue; 1609 1610 err = nct6775_read_value(data, data->REG_FAN[i], ®); 1611 if (err) 1612 goto out; 1613 data->rpm[i] = data->fan_from_reg(reg, 1614 data->fan_div[i]); 1615 1616 if (data->has_fan_min & BIT(i)) { 1617 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®); 1618 if (err) 1619 goto out; 1620 data->fan_min[i] = reg; 1621 } 1622 1623 if (data->REG_FAN_PULSES[i]) { 1624 err = nct6775_read_value(data, data->REG_FAN_PULSES[i], ®); 1625 if (err) 1626 goto out; 1627 data->fan_pulses[i] = (reg >> data->FAN_PULSE_SHIFT[i]) & 0x03; 1628 } 1629 1630 err = nct6775_select_fan_div(dev, data, i, reg); 1631 if (err) 1632 goto out; 1633 } 1634 1635 err = nct6775_update_pwm(dev); 1636 if (err) 1637 goto out; 1638 1639 err = nct6775_update_pwm_limits(dev); 1640 if (err) 1641 goto out; 1642 1643 /* Measured temperatures and limits */ 1644 for (i = 0; i < NUM_TEMP; i++) { 1645 if (!(data->have_temp & BIT(i))) 1646 continue; 1647 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) { 1648 if (data->reg_temp[j][i]) { 1649 err = nct6775_read_temp(data, data->reg_temp[j][i], ®); 1650 if (err) 1651 goto out; 1652 data->temp[j][i] = reg; 1653 } 1654 } 1655 if (i >= NUM_TEMP_FIXED || 1656 !(data->have_temp_fixed & BIT(i))) 1657 continue; 1658 err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], ®); 1659 if (err) 1660 goto out; 1661 data->temp_offset[i] = reg; 1662 } 1663 1664 for (i = 0; i < NUM_TSI_TEMP; i++) { 1665 if (!(data->have_tsi_temp & BIT(i))) 1666 continue; 1667 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], ®); 1668 if (err) 1669 goto out; 1670 data->tsi_temp[i] = reg; 1671 } 1672 1673 data->alarms = 0; 1674 for (i = 0; i < NUM_REG_ALARM; i++) { 1675 u16 alarm; 1676 1677 if (!data->REG_ALARM[i]) 1678 continue; 1679 err = nct6775_read_value(data, data->REG_ALARM[i], &alarm); 1680 if (err) 1681 goto out; 1682 data->alarms |= ((u64)alarm) << (i << 3); 1683 } 1684 1685 data->beeps = 0; 1686 for (i = 0; i < NUM_REG_BEEP; i++) { 1687 u16 beep; 1688 1689 if (!data->REG_BEEP[i]) 1690 continue; 1691 err = nct6775_read_value(data, data->REG_BEEP[i], &beep); 1692 if (err) 1693 goto out; 1694 data->beeps |= ((u64)beep) << (i << 3); 1695 } 1696 1697 data->last_updated = jiffies; 1698 data->valid = true; 1699 } 1700 out: 1701 mutex_unlock(&data->update_lock); 1702 return err ? ERR_PTR(err) : data; 1703 } 1704 EXPORT_SYMBOL_GPL(nct6775_update_device); 1705 1706 /* 1707 * Sysfs callback functions 1708 */ 1709 static ssize_t 1710 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf) 1711 { 1712 struct nct6775_data *data = nct6775_update_device(dev); 1713 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1714 int index = sattr->index; 1715 int nr = sattr->nr; 1716 1717 if (IS_ERR(data)) 1718 return PTR_ERR(data); 1719 1720 return sprintf(buf, "%ld\n", 1721 in_from_reg(data->in[nr][index], nr, data->scale_in)); 1722 } 1723 1724 static ssize_t 1725 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf, 1726 size_t count) 1727 { 1728 struct nct6775_data *data = dev_get_drvdata(dev); 1729 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1730 int index = sattr->index; 1731 int nr = sattr->nr; 1732 unsigned long val; 1733 int err; 1734 1735 err = kstrtoul(buf, 10, &val); 1736 if (err < 0) 1737 return err; 1738 mutex_lock(&data->update_lock); 1739 data->in[nr][index] = in_to_reg(val, nr, data->scale_in); 1740 err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]); 1741 mutex_unlock(&data->update_lock); 1742 return err ? : count; 1743 } 1744 1745 ssize_t 1746 nct6775_show_alarm(struct device *dev, struct device_attribute *attr, char *buf) 1747 { 1748 struct nct6775_data *data = nct6775_update_device(dev); 1749 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1750 int nr; 1751 1752 if (IS_ERR(data)) 1753 return PTR_ERR(data); 1754 1755 nr = data->ALARM_BITS[sattr->index]; 1756 return sprintf(buf, "%u\n", 1757 (unsigned int)((data->alarms >> nr) & 0x01)); 1758 } 1759 EXPORT_SYMBOL_GPL(nct6775_show_alarm); 1760 1761 static int find_temp_source(struct nct6775_data *data, int index, int count) 1762 { 1763 int source = data->temp_src[index]; 1764 int nr, err; 1765 1766 for (nr = 0; nr < count; nr++) { 1767 u16 src; 1768 1769 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr], &src); 1770 if (err) 1771 return err; 1772 if ((src & 0x1f) == source) 1773 return nr; 1774 } 1775 return -ENODEV; 1776 } 1777 1778 static ssize_t 1779 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf) 1780 { 1781 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1782 struct nct6775_data *data = nct6775_update_device(dev); 1783 unsigned int alarm = 0; 1784 int nr; 1785 1786 if (IS_ERR(data)) 1787 return PTR_ERR(data); 1788 1789 /* 1790 * For temperatures, there is no fixed mapping from registers to alarm 1791 * bits. Alarm bits are determined by the temperature source mapping. 1792 */ 1793 nr = find_temp_source(data, sattr->index, data->num_temp_alarms); 1794 if (nr >= 0) { 1795 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE]; 1796 1797 alarm = (data->alarms >> bit) & 0x01; 1798 } 1799 return sprintf(buf, "%u\n", alarm); 1800 } 1801 1802 ssize_t 1803 nct6775_show_beep(struct device *dev, struct device_attribute *attr, char *buf) 1804 { 1805 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1806 struct nct6775_data *data = nct6775_update_device(dev); 1807 int nr; 1808 1809 if (IS_ERR(data)) 1810 return PTR_ERR(data); 1811 1812 nr = data->BEEP_BITS[sattr->index]; 1813 1814 return sprintf(buf, "%u\n", 1815 (unsigned int)((data->beeps >> nr) & 0x01)); 1816 } 1817 EXPORT_SYMBOL_GPL(nct6775_show_beep); 1818 1819 ssize_t 1820 nct6775_store_beep(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 1821 { 1822 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1823 struct nct6775_data *data = dev_get_drvdata(dev); 1824 int nr = data->BEEP_BITS[sattr->index]; 1825 int regindex = nr >> 3; 1826 unsigned long val; 1827 int err; 1828 1829 err = kstrtoul(buf, 10, &val); 1830 if (err < 0) 1831 return err; 1832 if (val > 1) 1833 return -EINVAL; 1834 1835 mutex_lock(&data->update_lock); 1836 if (val) 1837 data->beeps |= (1ULL << nr); 1838 else 1839 data->beeps &= ~(1ULL << nr); 1840 err = nct6775_write_value(data, data->REG_BEEP[regindex], 1841 (data->beeps >> (regindex << 3)) & 0xff); 1842 mutex_unlock(&data->update_lock); 1843 return err ? : count; 1844 } 1845 EXPORT_SYMBOL_GPL(nct6775_store_beep); 1846 1847 static ssize_t 1848 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf) 1849 { 1850 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1851 struct nct6775_data *data = nct6775_update_device(dev); 1852 unsigned int beep = 0; 1853 int nr; 1854 1855 if (IS_ERR(data)) 1856 return PTR_ERR(data); 1857 1858 /* 1859 * For temperatures, there is no fixed mapping from registers to beep 1860 * enable bits. Beep enable bits are determined by the temperature 1861 * source mapping. 1862 */ 1863 nr = find_temp_source(data, sattr->index, data->num_temp_beeps); 1864 if (nr >= 0) { 1865 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE]; 1866 1867 beep = (data->beeps >> bit) & 0x01; 1868 } 1869 return sprintf(buf, "%u\n", beep); 1870 } 1871 1872 static ssize_t 1873 store_temp_beep(struct device *dev, struct device_attribute *attr, 1874 const char *buf, size_t count) 1875 { 1876 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1877 struct nct6775_data *data = dev_get_drvdata(dev); 1878 int nr, bit, regindex; 1879 unsigned long val; 1880 int err; 1881 1882 err = kstrtoul(buf, 10, &val); 1883 if (err < 0) 1884 return err; 1885 if (val > 1) 1886 return -EINVAL; 1887 1888 nr = find_temp_source(data, sattr->index, data->num_temp_beeps); 1889 if (nr < 0) 1890 return nr; 1891 1892 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE]; 1893 regindex = bit >> 3; 1894 1895 mutex_lock(&data->update_lock); 1896 if (val) 1897 data->beeps |= (1ULL << bit); 1898 else 1899 data->beeps &= ~(1ULL << bit); 1900 err = nct6775_write_value(data, data->REG_BEEP[regindex], 1901 (data->beeps >> (regindex << 3)) & 0xff); 1902 mutex_unlock(&data->update_lock); 1903 1904 return err ? : count; 1905 } 1906 1907 static umode_t nct6775_in_is_visible(struct kobject *kobj, 1908 struct attribute *attr, int index) 1909 { 1910 struct device *dev = kobj_to_dev(kobj); 1911 struct nct6775_data *data = dev_get_drvdata(dev); 1912 int in = index / 5; /* voltage index */ 1913 int nr = index % 5; /* attribute index */ 1914 1915 if (nr == 1 && data->ALARM_BITS[in] == -1) 1916 return 0; 1917 1918 if (!(data->have_in & BIT(in))) 1919 return 0; 1920 1921 return nct6775_attr_mode(data, attr); 1922 } 1923 1924 SENSOR_TEMPLATE_2(in_input, "in%d_input", 0444, show_in_reg, NULL, 0, 0); 1925 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", 0444, nct6775_show_alarm, NULL, 0); 1926 SENSOR_TEMPLATE(in_beep, "in%d_beep", 0644, nct6775_show_beep, nct6775_store_beep, 0); 1927 SENSOR_TEMPLATE_2(in_min, "in%d_min", 0644, show_in_reg, store_in_reg, 0, 1); 1928 SENSOR_TEMPLATE_2(in_max, "in%d_max", 0644, show_in_reg, store_in_reg, 0, 2); 1929 1930 /* 1931 * nct6775_in_is_visible uses the index into the following array 1932 * to determine if attributes should be created or not. 1933 * Any change in order or content must be matched. 1934 */ 1935 static struct sensor_device_template *nct6775_attributes_in_template[] = { 1936 &sensor_dev_template_in_input, 1937 &sensor_dev_template_in_alarm, 1938 &sensor_dev_template_in_beep, 1939 &sensor_dev_template_in_min, 1940 &sensor_dev_template_in_max, 1941 NULL 1942 }; 1943 1944 static const struct sensor_template_group nct6775_in_template_group = { 1945 .templates = nct6775_attributes_in_template, 1946 .is_visible = nct6775_in_is_visible, 1947 }; 1948 1949 static ssize_t 1950 show_fan(struct device *dev, struct device_attribute *attr, char *buf) 1951 { 1952 struct nct6775_data *data = nct6775_update_device(dev); 1953 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1954 int nr = sattr->index; 1955 1956 if (IS_ERR(data)) 1957 return PTR_ERR(data); 1958 1959 return sprintf(buf, "%d\n", data->rpm[nr]); 1960 } 1961 1962 static ssize_t 1963 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf) 1964 { 1965 struct nct6775_data *data = nct6775_update_device(dev); 1966 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1967 int nr = sattr->index; 1968 1969 if (IS_ERR(data)) 1970 return PTR_ERR(data); 1971 1972 return sprintf(buf, "%d\n", 1973 data->fan_from_reg_min(data->fan_min[nr], 1974 data->fan_div[nr])); 1975 } 1976 1977 static ssize_t 1978 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf) 1979 { 1980 struct nct6775_data *data = nct6775_update_device(dev); 1981 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1982 int nr = sattr->index; 1983 1984 if (IS_ERR(data)) 1985 return PTR_ERR(data); 1986 1987 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr])); 1988 } 1989 1990 static ssize_t 1991 store_fan_min(struct device *dev, struct device_attribute *attr, 1992 const char *buf, size_t count) 1993 { 1994 struct nct6775_data *data = dev_get_drvdata(dev); 1995 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1996 int nr = sattr->index; 1997 unsigned long val; 1998 unsigned int reg; 1999 u8 new_div; 2000 int err; 2001 2002 err = kstrtoul(buf, 10, &val); 2003 if (err < 0) 2004 return err; 2005 2006 mutex_lock(&data->update_lock); 2007 if (!data->has_fan_div) { 2008 /* NCT6776F or NCT6779D; we know this is a 13 bit register */ 2009 if (!val) { 2010 val = 0xff1f; 2011 } else { 2012 if (val > 1350000U) 2013 val = 135000U; 2014 val = 1350000U / val; 2015 val = (val & 0x1f) | ((val << 3) & 0xff00); 2016 } 2017 data->fan_min[nr] = val; 2018 goto write_min; /* Leave fan divider alone */ 2019 } 2020 if (!val) { 2021 /* No min limit, alarm disabled */ 2022 data->fan_min[nr] = 255; 2023 new_div = data->fan_div[nr]; /* No change */ 2024 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1); 2025 goto write_div; 2026 } 2027 reg = 1350000U / val; 2028 if (reg >= 128 * 255) { 2029 /* 2030 * Speed below this value cannot possibly be represented, 2031 * even with the highest divider (128) 2032 */ 2033 data->fan_min[nr] = 254; 2034 new_div = 7; /* 128 == BIT(7) */ 2035 dev_warn(dev, 2036 "fan%u low limit %lu below minimum %u, set to minimum\n", 2037 nr + 1, val, data->fan_from_reg_min(254, 7)); 2038 } else if (!reg) { 2039 /* 2040 * Speed above this value cannot possibly be represented, 2041 * even with the lowest divider (1) 2042 */ 2043 data->fan_min[nr] = 1; 2044 new_div = 0; /* 1 == BIT(0) */ 2045 dev_warn(dev, 2046 "fan%u low limit %lu above maximum %u, set to maximum\n", 2047 nr + 1, val, data->fan_from_reg_min(1, 0)); 2048 } else { 2049 /* 2050 * Automatically pick the best divider, i.e. the one such 2051 * that the min limit will correspond to a register value 2052 * in the 96..192 range 2053 */ 2054 new_div = 0; 2055 while (reg > 192 && new_div < 7) { 2056 reg >>= 1; 2057 new_div++; 2058 } 2059 data->fan_min[nr] = reg; 2060 } 2061 2062 write_div: 2063 /* 2064 * Write both the fan clock divider (if it changed) and the new 2065 * fan min (unconditionally) 2066 */ 2067 if (new_div != data->fan_div[nr]) { 2068 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n", 2069 nr + 1, div_from_reg(data->fan_div[nr]), 2070 div_from_reg(new_div)); 2071 data->fan_div[nr] = new_div; 2072 err = nct6775_write_fan_div_common(data, nr); 2073 if (err) 2074 goto write_min; 2075 /* Give the chip time to sample a new speed value */ 2076 data->last_updated = jiffies; 2077 } 2078 2079 write_min: 2080 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]); 2081 mutex_unlock(&data->update_lock); 2082 2083 return err ? : count; 2084 } 2085 2086 static ssize_t 2087 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf) 2088 { 2089 struct nct6775_data *data = nct6775_update_device(dev); 2090 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2091 int p; 2092 2093 if (IS_ERR(data)) 2094 return PTR_ERR(data); 2095 2096 p = data->fan_pulses[sattr->index]; 2097 return sprintf(buf, "%d\n", p ? : 4); 2098 } 2099 2100 static ssize_t 2101 store_fan_pulses(struct device *dev, struct device_attribute *attr, 2102 const char *buf, size_t count) 2103 { 2104 struct nct6775_data *data = dev_get_drvdata(dev); 2105 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2106 int nr = sattr->index; 2107 unsigned long val; 2108 int err; 2109 u16 reg; 2110 2111 err = kstrtoul(buf, 10, &val); 2112 if (err < 0) 2113 return err; 2114 2115 if (val > 4) 2116 return -EINVAL; 2117 2118 mutex_lock(&data->update_lock); 2119 data->fan_pulses[nr] = val & 3; 2120 err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], ®); 2121 if (err) 2122 goto out; 2123 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]); 2124 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr]; 2125 err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg); 2126 out: 2127 mutex_unlock(&data->update_lock); 2128 2129 return err ? : count; 2130 } 2131 2132 static umode_t nct6775_fan_is_visible(struct kobject *kobj, 2133 struct attribute *attr, int index) 2134 { 2135 struct device *dev = kobj_to_dev(kobj); 2136 struct nct6775_data *data = dev_get_drvdata(dev); 2137 int fan = index / 6; /* fan index */ 2138 int nr = index % 6; /* attribute index */ 2139 2140 if (!(data->has_fan & BIT(fan))) 2141 return 0; 2142 2143 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1) 2144 return 0; 2145 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1) 2146 return 0; 2147 if (nr == 3 && !data->REG_FAN_PULSES[fan]) 2148 return 0; 2149 if (nr == 4 && !(data->has_fan_min & BIT(fan))) 2150 return 0; 2151 if (nr == 5 && data->kind != nct6775) 2152 return 0; 2153 2154 return nct6775_attr_mode(data, attr); 2155 } 2156 2157 SENSOR_TEMPLATE(fan_input, "fan%d_input", 0444, show_fan, NULL, 0); 2158 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", 0444, nct6775_show_alarm, NULL, FAN_ALARM_BASE); 2159 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", 0644, nct6775_show_beep, 2160 nct6775_store_beep, FAN_ALARM_BASE); 2161 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", 0644, show_fan_pulses, store_fan_pulses, 0); 2162 SENSOR_TEMPLATE(fan_min, "fan%d_min", 0644, show_fan_min, store_fan_min, 0); 2163 SENSOR_TEMPLATE(fan_div, "fan%d_div", 0444, show_fan_div, NULL, 0); 2164 2165 /* 2166 * nct6775_fan_is_visible uses the index into the following array 2167 * to determine if attributes should be created or not. 2168 * Any change in order or content must be matched. 2169 */ 2170 static struct sensor_device_template *nct6775_attributes_fan_template[] = { 2171 &sensor_dev_template_fan_input, 2172 &sensor_dev_template_fan_alarm, /* 1 */ 2173 &sensor_dev_template_fan_beep, /* 2 */ 2174 &sensor_dev_template_fan_pulses, 2175 &sensor_dev_template_fan_min, /* 4 */ 2176 &sensor_dev_template_fan_div, /* 5 */ 2177 NULL 2178 }; 2179 2180 static const struct sensor_template_group nct6775_fan_template_group = { 2181 .templates = nct6775_attributes_fan_template, 2182 .is_visible = nct6775_fan_is_visible, 2183 .base = 1, 2184 }; 2185 2186 static ssize_t 2187 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf) 2188 { 2189 struct nct6775_data *data = nct6775_update_device(dev); 2190 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2191 int nr = sattr->index; 2192 2193 if (IS_ERR(data)) 2194 return PTR_ERR(data); 2195 2196 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]); 2197 } 2198 2199 static ssize_t 2200 show_temp(struct device *dev, struct device_attribute *attr, char *buf) 2201 { 2202 struct nct6775_data *data = nct6775_update_device(dev); 2203 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2204 int nr = sattr->nr; 2205 int index = sattr->index; 2206 2207 if (IS_ERR(data)) 2208 return PTR_ERR(data); 2209 2210 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr])); 2211 } 2212 2213 static ssize_t 2214 store_temp(struct device *dev, struct device_attribute *attr, const char *buf, 2215 size_t count) 2216 { 2217 struct nct6775_data *data = dev_get_drvdata(dev); 2218 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2219 int nr = sattr->nr; 2220 int index = sattr->index; 2221 int err; 2222 long val; 2223 2224 err = kstrtol(buf, 10, &val); 2225 if (err < 0) 2226 return err; 2227 2228 mutex_lock(&data->update_lock); 2229 data->temp[index][nr] = LM75_TEMP_TO_REG(val); 2230 err = nct6775_write_temp(data, data->reg_temp[index][nr], data->temp[index][nr]); 2231 mutex_unlock(&data->update_lock); 2232 return err ? : count; 2233 } 2234 2235 static ssize_t 2236 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf) 2237 { 2238 struct nct6775_data *data = nct6775_update_device(dev); 2239 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2240 2241 if (IS_ERR(data)) 2242 return PTR_ERR(data); 2243 2244 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000); 2245 } 2246 2247 static ssize_t 2248 store_temp_offset(struct device *dev, struct device_attribute *attr, 2249 const char *buf, size_t count) 2250 { 2251 struct nct6775_data *data = dev_get_drvdata(dev); 2252 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2253 int nr = sattr->index; 2254 long val; 2255 int err; 2256 2257 err = kstrtol(buf, 10, &val); 2258 if (err < 0) 2259 return err; 2260 2261 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127); 2262 2263 mutex_lock(&data->update_lock); 2264 data->temp_offset[nr] = val; 2265 err = nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val); 2266 mutex_unlock(&data->update_lock); 2267 2268 return err ? : count; 2269 } 2270 2271 static ssize_t 2272 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf) 2273 { 2274 struct nct6775_data *data = nct6775_update_device(dev); 2275 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2276 int nr = sattr->index; 2277 2278 if (IS_ERR(data)) 2279 return PTR_ERR(data); 2280 2281 return sprintf(buf, "%d\n", (int)data->temp_type[nr]); 2282 } 2283 2284 static ssize_t 2285 store_temp_type(struct device *dev, struct device_attribute *attr, 2286 const char *buf, size_t count) 2287 { 2288 struct nct6775_data *data = nct6775_update_device(dev); 2289 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2290 int nr = sattr->index; 2291 unsigned long val; 2292 int err; 2293 u8 vbit, dbit; 2294 u16 vbat, diode; 2295 2296 if (IS_ERR(data)) 2297 return PTR_ERR(data); 2298 2299 err = kstrtoul(buf, 10, &val); 2300 if (err < 0) 2301 return err; 2302 2303 if (val != 1 && val != 3 && val != 4) 2304 return -EINVAL; 2305 2306 mutex_lock(&data->update_lock); 2307 2308 data->temp_type[nr] = val; 2309 vbit = 0x02 << nr; 2310 dbit = data->DIODE_MASK << nr; 2311 2312 err = nct6775_read_value(data, data->REG_VBAT, &vbat); 2313 if (err) 2314 goto out; 2315 vbat &= ~vbit; 2316 2317 err = nct6775_read_value(data, data->REG_DIODE, &diode); 2318 if (err) 2319 goto out; 2320 diode &= ~dbit; 2321 2322 switch (val) { 2323 case 1: /* CPU diode (diode, current mode) */ 2324 vbat |= vbit; 2325 diode |= dbit; 2326 break; 2327 case 3: /* diode, voltage mode */ 2328 vbat |= dbit; 2329 break; 2330 case 4: /* thermistor */ 2331 break; 2332 } 2333 err = nct6775_write_value(data, data->REG_VBAT, vbat); 2334 if (err) 2335 goto out; 2336 err = nct6775_write_value(data, data->REG_DIODE, diode); 2337 out: 2338 mutex_unlock(&data->update_lock); 2339 return err ? : count; 2340 } 2341 2342 static umode_t nct6775_temp_is_visible(struct kobject *kobj, 2343 struct attribute *attr, int index) 2344 { 2345 struct device *dev = kobj_to_dev(kobj); 2346 struct nct6775_data *data = dev_get_drvdata(dev); 2347 int temp = index / 10; /* temp index */ 2348 int nr = index % 10; /* attribute index */ 2349 2350 if (!(data->have_temp & BIT(temp))) 2351 return 0; 2352 2353 if (nr == 1 && !data->temp_label) 2354 return 0; 2355 2356 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0) 2357 return 0; /* alarm */ 2358 2359 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0) 2360 return 0; /* beep */ 2361 2362 if (nr == 4 && !data->reg_temp[1][temp]) /* max */ 2363 return 0; 2364 2365 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */ 2366 return 0; 2367 2368 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */ 2369 return 0; 2370 2371 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */ 2372 return 0; 2373 2374 /* offset and type only apply to fixed sensors */ 2375 if (nr > 7 && !(data->have_temp_fixed & BIT(temp))) 2376 return 0; 2377 2378 return nct6775_attr_mode(data, attr); 2379 } 2380 2381 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", 0444, show_temp, NULL, 0, 0); 2382 SENSOR_TEMPLATE(temp_label, "temp%d_label", 0444, show_temp_label, NULL, 0); 2383 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", 0644, show_temp, store_temp, 0, 1); 2384 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", 0644, show_temp, store_temp, 0, 2); 2385 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", 0644, show_temp, store_temp, 0, 3); 2386 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", 0644, show_temp, store_temp, 0, 4); 2387 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", 0644, show_temp_offset, store_temp_offset, 0); 2388 SENSOR_TEMPLATE(temp_type, "temp%d_type", 0644, show_temp_type, store_temp_type, 0); 2389 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", 0444, show_temp_alarm, NULL, 0); 2390 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", 0644, show_temp_beep, store_temp_beep, 0); 2391 2392 /* 2393 * nct6775_temp_is_visible uses the index into the following array 2394 * to determine if attributes should be created or not. 2395 * Any change in order or content must be matched. 2396 */ 2397 static struct sensor_device_template *nct6775_attributes_temp_template[] = { 2398 &sensor_dev_template_temp_input, 2399 &sensor_dev_template_temp_label, 2400 &sensor_dev_template_temp_alarm, /* 2 */ 2401 &sensor_dev_template_temp_beep, /* 3 */ 2402 &sensor_dev_template_temp_max, /* 4 */ 2403 &sensor_dev_template_temp_max_hyst, /* 5 */ 2404 &sensor_dev_template_temp_crit, /* 6 */ 2405 &sensor_dev_template_temp_lcrit, /* 7 */ 2406 &sensor_dev_template_temp_offset, /* 8 */ 2407 &sensor_dev_template_temp_type, /* 9 */ 2408 NULL 2409 }; 2410 2411 static const struct sensor_template_group nct6775_temp_template_group = { 2412 .templates = nct6775_attributes_temp_template, 2413 .is_visible = nct6775_temp_is_visible, 2414 .base = 1, 2415 }; 2416 2417 static ssize_t show_tsi_temp(struct device *dev, struct device_attribute *attr, char *buf) 2418 { 2419 struct nct6775_data *data = nct6775_update_device(dev); 2420 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2421 2422 if (IS_ERR(data)) 2423 return PTR_ERR(data); 2424 2425 return sysfs_emit(buf, "%u\n", tsi_temp_from_reg(data->tsi_temp[sattr->index])); 2426 } 2427 2428 static ssize_t show_tsi_temp_label(struct device *dev, struct device_attribute *attr, char *buf) 2429 { 2430 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2431 2432 return sysfs_emit(buf, "TSI%d_TEMP\n", sattr->index); 2433 } 2434 2435 SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0); 2436 SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0); 2437 2438 static umode_t nct6775_tsi_temp_is_visible(struct kobject *kobj, struct attribute *attr, 2439 int index) 2440 { 2441 struct device *dev = kobj_to_dev(kobj); 2442 struct nct6775_data *data = dev_get_drvdata(dev); 2443 int temp = index / 2; 2444 2445 return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0; 2446 } 2447 2448 /* 2449 * The index calculation in nct6775_tsi_temp_is_visible() must be kept in 2450 * sync with the size of this array. 2451 */ 2452 static struct sensor_device_template *nct6775_tsi_temp_template[] = { 2453 &sensor_dev_template_tsi_temp_input, 2454 &sensor_dev_template_tsi_temp_label, 2455 NULL 2456 }; 2457 2458 static ssize_t 2459 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf) 2460 { 2461 struct nct6775_data *data = nct6775_update_device(dev); 2462 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2463 2464 if (IS_ERR(data)) 2465 return PTR_ERR(data); 2466 2467 return sprintf(buf, "%d\n", data->pwm_mode[sattr->index]); 2468 } 2469 2470 static ssize_t 2471 store_pwm_mode(struct device *dev, struct device_attribute *attr, 2472 const char *buf, size_t count) 2473 { 2474 struct nct6775_data *data = dev_get_drvdata(dev); 2475 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2476 int nr = sattr->index; 2477 unsigned long val; 2478 int err; 2479 u16 reg; 2480 2481 err = kstrtoul(buf, 10, &val); 2482 if (err < 0) 2483 return err; 2484 2485 if (val > 1) 2486 return -EINVAL; 2487 2488 /* Setting DC mode (0) is not supported for all chips/channels */ 2489 if (data->REG_PWM_MODE[nr] == 0) { 2490 if (!val) 2491 return -EINVAL; 2492 return count; 2493 } 2494 2495 mutex_lock(&data->update_lock); 2496 data->pwm_mode[nr] = val; 2497 err = nct6775_read_value(data, data->REG_PWM_MODE[nr], ®); 2498 if (err) 2499 goto out; 2500 reg &= ~data->PWM_MODE_MASK[nr]; 2501 if (!val) 2502 reg |= data->PWM_MODE_MASK[nr]; 2503 err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg); 2504 out: 2505 mutex_unlock(&data->update_lock); 2506 return err ? : count; 2507 } 2508 2509 static ssize_t 2510 show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 2511 { 2512 struct nct6775_data *data = nct6775_update_device(dev); 2513 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2514 int nr = sattr->nr; 2515 int index = sattr->index; 2516 int err; 2517 u16 pwm; 2518 2519 if (IS_ERR(data)) 2520 return PTR_ERR(data); 2521 2522 /* 2523 * For automatic fan control modes, show current pwm readings. 2524 * Otherwise, show the configured value. 2525 */ 2526 if (index == 0 && data->pwm_enable[nr] > manual) { 2527 err = nct6775_read_value(data, data->REG_PWM_READ[nr], &pwm); 2528 if (err) 2529 return err; 2530 } else { 2531 pwm = data->pwm[index][nr]; 2532 } 2533 2534 return sprintf(buf, "%d\n", pwm); 2535 } 2536 2537 static ssize_t 2538 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf, 2539 size_t count) 2540 { 2541 struct nct6775_data *data = dev_get_drvdata(dev); 2542 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2543 int nr = sattr->nr; 2544 int index = sattr->index; 2545 unsigned long val; 2546 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 }; 2547 int maxval[7] 2548 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 }; 2549 int err; 2550 u16 reg; 2551 2552 err = kstrtoul(buf, 10, &val); 2553 if (err < 0) 2554 return err; 2555 val = clamp_val(val, minval[index], maxval[index]); 2556 2557 mutex_lock(&data->update_lock); 2558 data->pwm[index][nr] = val; 2559 err = nct6775_write_value(data, data->REG_PWM[index][nr], val); 2560 if (err) 2561 goto out; 2562 if (index == 2) { /* floor: disable if val == 0 */ 2563 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®); 2564 if (err) 2565 goto out; 2566 reg &= 0x7f; 2567 if (val) 2568 reg |= 0x80; 2569 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg); 2570 } 2571 out: 2572 mutex_unlock(&data->update_lock); 2573 return err ? : count; 2574 } 2575 2576 /* Returns 0 if OK, -EINVAL otherwise */ 2577 static int check_trip_points(struct nct6775_data *data, int nr) 2578 { 2579 int i; 2580 2581 for (i = 0; i < data->auto_pwm_num - 1; i++) { 2582 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1]) 2583 return -EINVAL; 2584 } 2585 for (i = 0; i < data->auto_pwm_num - 1; i++) { 2586 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1]) 2587 return -EINVAL; 2588 } 2589 /* validate critical temperature and pwm if enabled (pwm > 0) */ 2590 if (data->auto_pwm[nr][data->auto_pwm_num]) { 2591 if (data->auto_temp[nr][data->auto_pwm_num - 1] > 2592 data->auto_temp[nr][data->auto_pwm_num] || 2593 data->auto_pwm[nr][data->auto_pwm_num - 1] > 2594 data->auto_pwm[nr][data->auto_pwm_num]) 2595 return -EINVAL; 2596 } 2597 return 0; 2598 } 2599 2600 static int pwm_update_registers(struct nct6775_data *data, int nr) 2601 { 2602 u16 reg; 2603 int err; 2604 2605 switch (data->pwm_enable[nr]) { 2606 case off: 2607 case manual: 2608 break; 2609 case speed_cruise: 2610 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2611 if (err) 2612 return err; 2613 reg = (reg & ~data->tolerance_mask) | 2614 (data->target_speed_tolerance[nr] & data->tolerance_mask); 2615 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2616 if (err) 2617 return err; 2618 err = nct6775_write_value(data, data->REG_TARGET[nr], 2619 data->target_speed[nr] & 0xff); 2620 if (err) 2621 return err; 2622 if (data->REG_TOLERANCE_H) { 2623 reg = (data->target_speed[nr] >> 8) & 0x0f; 2624 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1; 2625 err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg); 2626 if (err) 2627 return err; 2628 } 2629 break; 2630 case thermal_cruise: 2631 err = nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]); 2632 if (err) 2633 return err; 2634 fallthrough; 2635 default: 2636 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2637 if (err) 2638 return err; 2639 reg = (reg & ~data->tolerance_mask) | 2640 data->temp_tolerance[0][nr]; 2641 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2642 if (err) 2643 return err; 2644 break; 2645 } 2646 2647 return 0; 2648 } 2649 2650 static ssize_t 2651 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 2652 { 2653 struct nct6775_data *data = nct6775_update_device(dev); 2654 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2655 2656 if (IS_ERR(data)) 2657 return PTR_ERR(data); 2658 2659 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]); 2660 } 2661 2662 static ssize_t 2663 store_pwm_enable(struct device *dev, struct device_attribute *attr, 2664 const char *buf, size_t count) 2665 { 2666 struct nct6775_data *data = dev_get_drvdata(dev); 2667 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2668 int nr = sattr->index; 2669 unsigned long val; 2670 int err; 2671 u16 reg; 2672 2673 err = kstrtoul(buf, 10, &val); 2674 if (err < 0) 2675 return err; 2676 2677 if (val > sf4) 2678 return -EINVAL; 2679 2680 if (val == sf3 && data->kind != nct6775) 2681 return -EINVAL; 2682 2683 if (val == sf4 && check_trip_points(data, nr)) { 2684 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n"); 2685 dev_err(dev, "Adjust trip points and try again\n"); 2686 return -EINVAL; 2687 } 2688 2689 mutex_lock(&data->update_lock); 2690 data->pwm_enable[nr] = val; 2691 if (val == off) { 2692 /* 2693 * turn off pwm control: select manual mode, set pwm to maximum 2694 */ 2695 data->pwm[0][nr] = 255; 2696 err = nct6775_write_value(data, data->REG_PWM[0][nr], 255); 2697 if (err) 2698 goto out; 2699 } 2700 err = pwm_update_registers(data, nr); 2701 if (err) 2702 goto out; 2703 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2704 if (err) 2705 goto out; 2706 reg &= 0x0f; 2707 reg |= pwm_enable_to_reg(val) << 4; 2708 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2709 out: 2710 mutex_unlock(&data->update_lock); 2711 return err ? : count; 2712 } 2713 2714 static ssize_t 2715 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src) 2716 { 2717 int i, sel = 0; 2718 2719 for (i = 0; i < NUM_TEMP; i++) { 2720 if (!(data->have_temp & BIT(i))) 2721 continue; 2722 if (src == data->temp_src[i]) { 2723 sel = i + 1; 2724 break; 2725 } 2726 } 2727 2728 return sprintf(buf, "%d\n", sel); 2729 } 2730 2731 static ssize_t 2732 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf) 2733 { 2734 struct nct6775_data *data = nct6775_update_device(dev); 2735 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2736 int index = sattr->index; 2737 2738 if (IS_ERR(data)) 2739 return PTR_ERR(data); 2740 2741 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]); 2742 } 2743 2744 static ssize_t 2745 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr, 2746 const char *buf, size_t count) 2747 { 2748 struct nct6775_data *data = nct6775_update_device(dev); 2749 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2750 int nr = sattr->index; 2751 unsigned long val; 2752 int err, src; 2753 u16 reg; 2754 2755 if (IS_ERR(data)) 2756 return PTR_ERR(data); 2757 2758 err = kstrtoul(buf, 10, &val); 2759 if (err < 0) 2760 return err; 2761 if (val == 0 || val > NUM_TEMP) 2762 return -EINVAL; 2763 if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1]) 2764 return -EINVAL; 2765 2766 mutex_lock(&data->update_lock); 2767 src = data->temp_src[val - 1]; 2768 data->pwm_temp_sel[nr] = src; 2769 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®); 2770 if (err) 2771 goto out; 2772 reg &= 0xe0; 2773 reg |= src; 2774 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg); 2775 out: 2776 mutex_unlock(&data->update_lock); 2777 2778 return err ? : count; 2779 } 2780 2781 static ssize_t 2782 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr, 2783 char *buf) 2784 { 2785 struct nct6775_data *data = nct6775_update_device(dev); 2786 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2787 int index = sattr->index; 2788 2789 if (IS_ERR(data)) 2790 return PTR_ERR(data); 2791 2792 return show_pwm_temp_sel_common(data, buf, 2793 data->pwm_weight_temp_sel[index]); 2794 } 2795 2796 static ssize_t 2797 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr, 2798 const char *buf, size_t count) 2799 { 2800 struct nct6775_data *data = nct6775_update_device(dev); 2801 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2802 int nr = sattr->index; 2803 unsigned long val; 2804 int err, src; 2805 u16 reg; 2806 2807 if (IS_ERR(data)) 2808 return PTR_ERR(data); 2809 2810 err = kstrtoul(buf, 10, &val); 2811 if (err < 0) 2812 return err; 2813 if (val > NUM_TEMP) 2814 return -EINVAL; 2815 val = array_index_nospec(val, NUM_TEMP + 1); 2816 if (val && (!(data->have_temp & BIT(val - 1)) || 2817 !data->temp_src[val - 1])) 2818 return -EINVAL; 2819 2820 mutex_lock(&data->update_lock); 2821 if (val) { 2822 src = data->temp_src[val - 1]; 2823 data->pwm_weight_temp_sel[nr] = src; 2824 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®); 2825 if (err) 2826 goto out; 2827 reg &= 0xe0; 2828 reg |= (src | 0x80); 2829 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg); 2830 } else { 2831 data->pwm_weight_temp_sel[nr] = 0; 2832 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®); 2833 if (err) 2834 goto out; 2835 reg &= 0x7f; 2836 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg); 2837 } 2838 out: 2839 mutex_unlock(&data->update_lock); 2840 2841 return err ? : count; 2842 } 2843 2844 static ssize_t 2845 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf) 2846 { 2847 struct nct6775_data *data = nct6775_update_device(dev); 2848 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2849 2850 if (IS_ERR(data)) 2851 return PTR_ERR(data); 2852 2853 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000); 2854 } 2855 2856 static ssize_t 2857 store_target_temp(struct device *dev, struct device_attribute *attr, 2858 const char *buf, size_t count) 2859 { 2860 struct nct6775_data *data = dev_get_drvdata(dev); 2861 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2862 int nr = sattr->index; 2863 unsigned long val; 2864 int err; 2865 2866 err = kstrtoul(buf, 10, &val); 2867 if (err < 0) 2868 return err; 2869 2870 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 2871 data->target_temp_mask); 2872 2873 mutex_lock(&data->update_lock); 2874 data->target_temp[nr] = val; 2875 err = pwm_update_registers(data, nr); 2876 mutex_unlock(&data->update_lock); 2877 return err ? : count; 2878 } 2879 2880 static ssize_t 2881 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf) 2882 { 2883 struct nct6775_data *data = nct6775_update_device(dev); 2884 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2885 int nr = sattr->index; 2886 2887 if (IS_ERR(data)) 2888 return PTR_ERR(data); 2889 2890 return sprintf(buf, "%d\n", 2891 fan_from_reg16(data->target_speed[nr], 2892 data->fan_div[nr])); 2893 } 2894 2895 static ssize_t 2896 store_target_speed(struct device *dev, struct device_attribute *attr, 2897 const char *buf, size_t count) 2898 { 2899 struct nct6775_data *data = dev_get_drvdata(dev); 2900 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2901 int nr = sattr->index; 2902 unsigned long val; 2903 int err; 2904 u16 speed; 2905 2906 err = kstrtoul(buf, 10, &val); 2907 if (err < 0) 2908 return err; 2909 2910 val = clamp_val(val, 0, 1350000U); 2911 speed = fan_to_reg(val, data->fan_div[nr]); 2912 2913 mutex_lock(&data->update_lock); 2914 data->target_speed[nr] = speed; 2915 err = pwm_update_registers(data, nr); 2916 mutex_unlock(&data->update_lock); 2917 return err ? : count; 2918 } 2919 2920 static ssize_t 2921 show_temp_tolerance(struct device *dev, struct device_attribute *attr, 2922 char *buf) 2923 { 2924 struct nct6775_data *data = nct6775_update_device(dev); 2925 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2926 int nr = sattr->nr; 2927 int index = sattr->index; 2928 2929 if (IS_ERR(data)) 2930 return PTR_ERR(data); 2931 2932 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000); 2933 } 2934 2935 static ssize_t 2936 store_temp_tolerance(struct device *dev, struct device_attribute *attr, 2937 const char *buf, size_t count) 2938 { 2939 struct nct6775_data *data = dev_get_drvdata(dev); 2940 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2941 int nr = sattr->nr; 2942 int index = sattr->index; 2943 unsigned long val; 2944 int err; 2945 2946 err = kstrtoul(buf, 10, &val); 2947 if (err < 0) 2948 return err; 2949 2950 /* Limit tolerance as needed */ 2951 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask); 2952 2953 mutex_lock(&data->update_lock); 2954 data->temp_tolerance[index][nr] = val; 2955 if (index) 2956 err = pwm_update_registers(data, nr); 2957 else 2958 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[nr], val); 2959 mutex_unlock(&data->update_lock); 2960 return err ? : count; 2961 } 2962 2963 /* 2964 * Fan speed tolerance is a tricky beast, since the associated register is 2965 * a tick counter, but the value is reported and configured as rpm. 2966 * Compute resulting low and high rpm values and report the difference. 2967 * A fan speed tolerance only makes sense if a fan target speed has been 2968 * configured, so only display values other than 0 if that is the case. 2969 */ 2970 static ssize_t 2971 show_speed_tolerance(struct device *dev, struct device_attribute *attr, 2972 char *buf) 2973 { 2974 struct nct6775_data *data = nct6775_update_device(dev); 2975 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2976 int nr = sattr->index; 2977 int target, tolerance = 0; 2978 2979 if (IS_ERR(data)) 2980 return PTR_ERR(data); 2981 2982 target = data->target_speed[nr]; 2983 2984 if (target) { 2985 int low = target - data->target_speed_tolerance[nr]; 2986 int high = target + data->target_speed_tolerance[nr]; 2987 2988 if (low <= 0) 2989 low = 1; 2990 if (high > 0xffff) 2991 high = 0xffff; 2992 if (high < low) 2993 high = low; 2994 2995 tolerance = (fan_from_reg16(low, data->fan_div[nr]) 2996 - fan_from_reg16(high, data->fan_div[nr])) / 2; 2997 } 2998 2999 return sprintf(buf, "%d\n", tolerance); 3000 } 3001 3002 static ssize_t 3003 store_speed_tolerance(struct device *dev, struct device_attribute *attr, 3004 const char *buf, size_t count) 3005 { 3006 struct nct6775_data *data = dev_get_drvdata(dev); 3007 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 3008 int nr = sattr->index; 3009 unsigned long val; 3010 int err; 3011 int low, high; 3012 3013 err = kstrtoul(buf, 10, &val); 3014 if (err < 0) 3015 return err; 3016 3017 high = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) + val; 3018 low = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) - val; 3019 if (low <= 0) 3020 low = 1; 3021 if (high < low) 3022 high = low; 3023 3024 val = (fan_to_reg(low, data->fan_div[nr]) - 3025 fan_to_reg(high, data->fan_div[nr])) / 2; 3026 3027 /* Limit tolerance as needed */ 3028 val = clamp_val(val, 0, data->speed_tolerance_limit); 3029 3030 mutex_lock(&data->update_lock); 3031 data->target_speed_tolerance[nr] = val; 3032 err = pwm_update_registers(data, nr); 3033 mutex_unlock(&data->update_lock); 3034 return err ? : count; 3035 } 3036 3037 SENSOR_TEMPLATE_2(pwm, "pwm%d", 0644, show_pwm, store_pwm, 0, 0); 3038 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", 0644, show_pwm_mode, store_pwm_mode, 0); 3039 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", 0644, show_pwm_enable, store_pwm_enable, 0); 3040 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", 0644, show_pwm_temp_sel, store_pwm_temp_sel, 0); 3041 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", 0644, show_target_temp, store_target_temp, 0); 3042 SENSOR_TEMPLATE(fan_target, "fan%d_target", 0644, show_target_speed, store_target_speed, 0); 3043 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", 0644, show_speed_tolerance, 3044 store_speed_tolerance, 0); 3045 3046 /* Smart Fan registers */ 3047 3048 static ssize_t 3049 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf) 3050 { 3051 struct nct6775_data *data = nct6775_update_device(dev); 3052 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3053 int nr = sattr->nr; 3054 int index = sattr->index; 3055 3056 if (IS_ERR(data)) 3057 return PTR_ERR(data); 3058 3059 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000); 3060 } 3061 3062 static ssize_t 3063 store_weight_temp(struct device *dev, struct device_attribute *attr, 3064 const char *buf, size_t count) 3065 { 3066 struct nct6775_data *data = dev_get_drvdata(dev); 3067 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3068 int nr = sattr->nr; 3069 int index = sattr->index; 3070 unsigned long val; 3071 int err; 3072 3073 err = kstrtoul(buf, 10, &val); 3074 if (err < 0) 3075 return err; 3076 3077 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255); 3078 3079 mutex_lock(&data->update_lock); 3080 data->weight_temp[index][nr] = val; 3081 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val); 3082 mutex_unlock(&data->update_lock); 3083 return err ? : count; 3084 } 3085 3086 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", 0644, 3087 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0); 3088 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step", 3089 0644, show_weight_temp, store_weight_temp, 0, 0); 3090 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol", 3091 0644, show_weight_temp, store_weight_temp, 0, 1); 3092 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base", 3093 0644, show_weight_temp, store_weight_temp, 0, 2); 3094 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step", 0644, show_pwm, store_pwm, 0, 5); 3095 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base", 0644, show_pwm, store_pwm, 0, 6); 3096 3097 static ssize_t 3098 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf) 3099 { 3100 struct nct6775_data *data = nct6775_update_device(dev); 3101 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3102 int nr = sattr->nr; 3103 int index = sattr->index; 3104 3105 if (IS_ERR(data)) 3106 return PTR_ERR(data); 3107 3108 return sprintf(buf, "%d\n", 3109 step_time_from_reg(data->fan_time[index][nr], 3110 data->pwm_mode[nr])); 3111 } 3112 3113 static ssize_t 3114 store_fan_time(struct device *dev, struct device_attribute *attr, 3115 const char *buf, size_t count) 3116 { 3117 struct nct6775_data *data = dev_get_drvdata(dev); 3118 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3119 int nr = sattr->nr; 3120 int index = sattr->index; 3121 unsigned long val; 3122 int err; 3123 3124 err = kstrtoul(buf, 10, &val); 3125 if (err < 0) 3126 return err; 3127 3128 val = step_time_to_reg(val, data->pwm_mode[nr]); 3129 mutex_lock(&data->update_lock); 3130 data->fan_time[index][nr] = val; 3131 err = nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val); 3132 mutex_unlock(&data->update_lock); 3133 return err ? : count; 3134 } 3135 3136 static ssize_t 3137 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf) 3138 { 3139 struct nct6775_data *data = nct6775_update_device(dev); 3140 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3141 3142 if (IS_ERR(data)) 3143 return PTR_ERR(data); 3144 3145 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]); 3146 } 3147 3148 static ssize_t 3149 store_auto_pwm(struct device *dev, struct device_attribute *attr, 3150 const char *buf, size_t count) 3151 { 3152 struct nct6775_data *data = dev_get_drvdata(dev); 3153 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3154 int nr = sattr->nr; 3155 int point = sattr->index; 3156 unsigned long val; 3157 int err; 3158 u16 reg; 3159 3160 err = kstrtoul(buf, 10, &val); 3161 if (err < 0) 3162 return err; 3163 if (val > 255) 3164 return -EINVAL; 3165 3166 if (point == data->auto_pwm_num) { 3167 if (data->kind != nct6775 && !val) 3168 return -EINVAL; 3169 if (data->kind != nct6779 && val) 3170 val = 0xff; 3171 } 3172 3173 mutex_lock(&data->update_lock); 3174 data->auto_pwm[nr][point] = val; 3175 if (point < data->auto_pwm_num) { 3176 err = nct6775_write_value(data, NCT6775_AUTO_PWM(data, nr, point), 3177 data->auto_pwm[nr][point]); 3178 } else { 3179 switch (data->kind) { 3180 case nct6775: 3181 /* disable if needed (pwm == 0) */ 3182 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], ®); 3183 if (err) 3184 break; 3185 if (val) 3186 reg |= 0x02; 3187 else 3188 reg &= ~0x02; 3189 err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg); 3190 break; 3191 case nct6776: 3192 break; /* always enabled, nothing to do */ 3193 case nct6106: 3194 case nct6116: 3195 case nct6779: 3196 case nct6791: 3197 case nct6792: 3198 case nct6793: 3199 case nct6795: 3200 case nct6796: 3201 case nct6797: 3202 case nct6798: 3203 case nct6799: 3204 err = nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], val); 3205 if (err) 3206 break; 3207 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], ®); 3208 if (err) 3209 break; 3210 if (val == 255) 3211 reg &= ~data->CRITICAL_PWM_ENABLE_MASK; 3212 else 3213 reg |= data->CRITICAL_PWM_ENABLE_MASK; 3214 err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg); 3215 break; 3216 } 3217 } 3218 mutex_unlock(&data->update_lock); 3219 return err ? : count; 3220 } 3221 3222 static ssize_t 3223 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf) 3224 { 3225 struct nct6775_data *data = nct6775_update_device(dev); 3226 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3227 int nr = sattr->nr; 3228 int point = sattr->index; 3229 3230 if (IS_ERR(data)) 3231 return PTR_ERR(data); 3232 3233 /* 3234 * We don't know for sure if the temperature is signed or unsigned. 3235 * Assume it is unsigned. 3236 */ 3237 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000); 3238 } 3239 3240 static ssize_t 3241 store_auto_temp(struct device *dev, struct device_attribute *attr, 3242 const char *buf, size_t count) 3243 { 3244 struct nct6775_data *data = dev_get_drvdata(dev); 3245 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3246 int nr = sattr->nr; 3247 int point = sattr->index; 3248 unsigned long val; 3249 int err; 3250 3251 err = kstrtoul(buf, 10, &val); 3252 if (err) 3253 return err; 3254 if (val > 255000) 3255 return -EINVAL; 3256 3257 mutex_lock(&data->update_lock); 3258 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000); 3259 if (point < data->auto_pwm_num) { 3260 err = nct6775_write_value(data, NCT6775_AUTO_TEMP(data, nr, point), 3261 data->auto_temp[nr][point]); 3262 } else { 3263 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr], 3264 data->auto_temp[nr][point]); 3265 } 3266 mutex_unlock(&data->update_lock); 3267 return err ? : count; 3268 } 3269 3270 static umode_t nct6775_pwm_is_visible(struct kobject *kobj, 3271 struct attribute *attr, int index) 3272 { 3273 struct device *dev = kobj_to_dev(kobj); 3274 struct nct6775_data *data = dev_get_drvdata(dev); 3275 int pwm = index / 36; /* pwm index */ 3276 int nr = index % 36; /* attribute index */ 3277 3278 if (!(data->has_pwm & BIT(pwm))) 3279 return 0; 3280 3281 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */ 3282 if (!data->REG_WEIGHT_TEMP_SEL[pwm]) 3283 return 0; 3284 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */ 3285 return 0; 3286 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */ 3287 return 0; 3288 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */ 3289 return 0; 3290 3291 if (nr >= 22 && nr <= 35) { /* auto point */ 3292 int api = (nr - 22) / 2; /* auto point index */ 3293 3294 if (api > data->auto_pwm_num) 3295 return 0; 3296 } 3297 return nct6775_attr_mode(data, attr); 3298 } 3299 3300 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", 0644, show_fan_time, store_fan_time, 0, 0); 3301 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", 0644, 3302 show_fan_time, store_fan_time, 0, 1); 3303 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", 0644, 3304 show_fan_time, store_fan_time, 0, 2); 3305 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", 0644, show_pwm, store_pwm, 0, 1); 3306 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", 0644, show_pwm, store_pwm, 0, 2); 3307 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", 0644, 3308 show_temp_tolerance, store_temp_tolerance, 0, 0); 3309 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance", 3310 0644, show_temp_tolerance, store_temp_tolerance, 0, 1); 3311 3312 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", 0644, show_pwm, store_pwm, 0, 3); 3313 3314 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", 0644, show_pwm, store_pwm, 0, 4); 3315 3316 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm", 3317 0644, show_auto_pwm, store_auto_pwm, 0, 0); 3318 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp", 3319 0644, show_auto_temp, store_auto_temp, 0, 0); 3320 3321 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm", 3322 0644, show_auto_pwm, store_auto_pwm, 0, 1); 3323 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp", 3324 0644, show_auto_temp, store_auto_temp, 0, 1); 3325 3326 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm", 3327 0644, show_auto_pwm, store_auto_pwm, 0, 2); 3328 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp", 3329 0644, show_auto_temp, store_auto_temp, 0, 2); 3330 3331 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm", 3332 0644, show_auto_pwm, store_auto_pwm, 0, 3); 3333 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp", 3334 0644, show_auto_temp, store_auto_temp, 0, 3); 3335 3336 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm", 3337 0644, show_auto_pwm, store_auto_pwm, 0, 4); 3338 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp", 3339 0644, show_auto_temp, store_auto_temp, 0, 4); 3340 3341 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm", 3342 0644, show_auto_pwm, store_auto_pwm, 0, 5); 3343 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp", 3344 0644, show_auto_temp, store_auto_temp, 0, 5); 3345 3346 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm", 3347 0644, show_auto_pwm, store_auto_pwm, 0, 6); 3348 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp", 3349 0644, show_auto_temp, store_auto_temp, 0, 6); 3350 3351 /* 3352 * nct6775_pwm_is_visible uses the index into the following array 3353 * to determine if attributes should be created or not. 3354 * Any change in order or content must be matched. 3355 */ 3356 static struct sensor_device_template *nct6775_attributes_pwm_template[] = { 3357 &sensor_dev_template_pwm, 3358 &sensor_dev_template_pwm_mode, 3359 &sensor_dev_template_pwm_enable, 3360 &sensor_dev_template_pwm_temp_sel, 3361 &sensor_dev_template_pwm_temp_tolerance, 3362 &sensor_dev_template_pwm_crit_temp_tolerance, 3363 &sensor_dev_template_pwm_target_temp, 3364 &sensor_dev_template_fan_target, 3365 &sensor_dev_template_fan_tolerance, 3366 &sensor_dev_template_pwm_stop_time, 3367 &sensor_dev_template_pwm_step_up_time, 3368 &sensor_dev_template_pwm_step_down_time, 3369 &sensor_dev_template_pwm_start, 3370 &sensor_dev_template_pwm_floor, 3371 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */ 3372 &sensor_dev_template_pwm_weight_temp_step, 3373 &sensor_dev_template_pwm_weight_temp_step_tol, 3374 &sensor_dev_template_pwm_weight_temp_step_base, 3375 &sensor_dev_template_pwm_weight_duty_step, /* 18 */ 3376 &sensor_dev_template_pwm_max, /* 19 */ 3377 &sensor_dev_template_pwm_step, /* 20 */ 3378 &sensor_dev_template_pwm_weight_duty_base, /* 21 */ 3379 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */ 3380 &sensor_dev_template_pwm_auto_point1_temp, 3381 &sensor_dev_template_pwm_auto_point2_pwm, 3382 &sensor_dev_template_pwm_auto_point2_temp, 3383 &sensor_dev_template_pwm_auto_point3_pwm, 3384 &sensor_dev_template_pwm_auto_point3_temp, 3385 &sensor_dev_template_pwm_auto_point4_pwm, 3386 &sensor_dev_template_pwm_auto_point4_temp, 3387 &sensor_dev_template_pwm_auto_point5_pwm, 3388 &sensor_dev_template_pwm_auto_point5_temp, 3389 &sensor_dev_template_pwm_auto_point6_pwm, 3390 &sensor_dev_template_pwm_auto_point6_temp, 3391 &sensor_dev_template_pwm_auto_point7_pwm, 3392 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */ 3393 3394 NULL 3395 }; 3396 3397 static const struct sensor_template_group nct6775_pwm_template_group = { 3398 .templates = nct6775_attributes_pwm_template, 3399 .is_visible = nct6775_pwm_is_visible, 3400 .base = 1, 3401 }; 3402 3403 static inline int nct6775_init_device(struct nct6775_data *data) 3404 { 3405 int i, err; 3406 u16 tmp, diode; 3407 3408 /* Start monitoring if needed */ 3409 if (data->REG_CONFIG) { 3410 err = nct6775_read_value(data, data->REG_CONFIG, &tmp); 3411 if (err) 3412 return err; 3413 if (!(tmp & 0x01)) { 3414 err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01); 3415 if (err) 3416 return err; 3417 } 3418 } 3419 3420 /* Enable temperature sensors if needed */ 3421 for (i = 0; i < NUM_TEMP; i++) { 3422 if (!(data->have_temp & BIT(i))) 3423 continue; 3424 if (!data->reg_temp_config[i]) 3425 continue; 3426 err = nct6775_read_value(data, data->reg_temp_config[i], &tmp); 3427 if (err) 3428 return err; 3429 if (tmp & 0x01) { 3430 err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe); 3431 if (err) 3432 return err; 3433 } 3434 } 3435 3436 /* Enable VBAT monitoring if needed */ 3437 err = nct6775_read_value(data, data->REG_VBAT, &tmp); 3438 if (err) 3439 return err; 3440 if (!(tmp & 0x01)) { 3441 err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01); 3442 if (err) 3443 return err; 3444 } 3445 3446 err = nct6775_read_value(data, data->REG_DIODE, &diode); 3447 if (err) 3448 return err; 3449 3450 for (i = 0; i < data->temp_fixed_num; i++) { 3451 if (!(data->have_temp_fixed & BIT(i))) 3452 continue; 3453 if ((tmp & (data->DIODE_MASK << i))) /* diode */ 3454 data->temp_type[i] 3455 = 3 - ((diode >> i) & data->DIODE_MASK); 3456 else /* thermistor */ 3457 data->temp_type[i] = 4; 3458 } 3459 3460 return 0; 3461 } 3462 3463 static int add_temp_sensors(struct nct6775_data *data, const u16 *regp, 3464 int *available, int *mask) 3465 { 3466 int i, err; 3467 u16 src; 3468 3469 for (i = 0; i < data->pwm_num && *available; i++) { 3470 int index; 3471 3472 if (!regp[i]) 3473 continue; 3474 err = nct6775_read_value(data, regp[i], &src); 3475 if (err) 3476 return err; 3477 src &= 0x1f; 3478 if (!src || (*mask & BIT(src))) 3479 continue; 3480 if (!(data->temp_mask & BIT(src))) 3481 continue; 3482 3483 index = __ffs(*available); 3484 err = nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src); 3485 if (err) 3486 return err; 3487 *available &= ~BIT(index); 3488 *mask |= BIT(src); 3489 } 3490 3491 return 0; 3492 } 3493 3494 int nct6775_probe(struct device *dev, struct nct6775_data *data, 3495 const struct regmap_config *regmapcfg) 3496 { 3497 int i, s, err = 0; 3498 int mask, available; 3499 u16 src; 3500 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config; 3501 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit; 3502 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL; 3503 int num_reg_temp, num_reg_temp_mon, num_reg_tsi_temp; 3504 struct device *hwmon_dev; 3505 struct sensor_template_group tsi_temp_tg; 3506 3507 data->regmap = devm_regmap_init(dev, NULL, data, regmapcfg); 3508 if (IS_ERR(data->regmap)) 3509 return PTR_ERR(data->regmap); 3510 3511 mutex_init(&data->update_lock); 3512 data->name = nct6775_device_names[data->kind]; 3513 data->bank = 0xff; /* Force initial bank selection */ 3514 data->scale_in = scale_in; 3515 3516 switch (data->kind) { 3517 case nct6106: 3518 data->in_num = 9; 3519 data->pwm_num = 3; 3520 data->auto_pwm_num = 4; 3521 data->temp_fixed_num = 3; 3522 data->num_temp_alarms = 6; 3523 data->num_temp_beeps = 6; 3524 3525 data->fan_from_reg = fan_from_reg13; 3526 data->fan_from_reg_min = fan_from_reg13; 3527 3528 data->temp_label = nct6776_temp_label; 3529 data->temp_mask = NCT6776_TEMP_MASK; 3530 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3531 3532 data->REG_VBAT = NCT6106_REG_VBAT; 3533 data->REG_DIODE = NCT6106_REG_DIODE; 3534 data->DIODE_MASK = NCT6106_DIODE_MASK; 3535 data->REG_VIN = NCT6106_REG_IN; 3536 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; 3537 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX; 3538 data->REG_TARGET = NCT6106_REG_TARGET; 3539 data->REG_FAN = NCT6106_REG_FAN; 3540 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE; 3541 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN; 3542 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES; 3543 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT; 3544 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME; 3545 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME; 3546 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME; 3547 data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H; 3548 data->REG_PWM[0] = NCT6116_REG_PWM; 3549 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT; 3550 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT; 3551 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP; 3552 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE; 3553 data->REG_PWM_READ = NCT6106_REG_PWM_READ; 3554 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE; 3555 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK; 3556 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP; 3557 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM; 3558 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP; 3559 data->REG_CRITICAL_TEMP_TOLERANCE 3560 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE; 3561 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE; 3562 data->CRITICAL_PWM_ENABLE_MASK 3563 = NCT6106_CRITICAL_PWM_ENABLE_MASK; 3564 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM; 3565 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET; 3566 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE; 3567 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL; 3568 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL; 3569 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; 3570 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL; 3571 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE; 3572 data->REG_ALARM = NCT6106_REG_ALARM; 3573 data->ALARM_BITS = NCT6106_ALARM_BITS; 3574 data->REG_BEEP = NCT6106_REG_BEEP; 3575 data->BEEP_BITS = NCT6106_BEEP_BITS; 3576 data->REG_TSI_TEMP = NCT6106_REG_TSI_TEMP; 3577 3578 reg_temp = NCT6106_REG_TEMP; 3579 reg_temp_mon = NCT6106_REG_TEMP_MON; 3580 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP); 3581 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON); 3582 num_reg_tsi_temp = ARRAY_SIZE(NCT6106_REG_TSI_TEMP); 3583 reg_temp_over = NCT6106_REG_TEMP_OVER; 3584 reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3585 reg_temp_config = NCT6106_REG_TEMP_CONFIG; 3586 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE; 3587 reg_temp_crit = NCT6106_REG_TEMP_CRIT; 3588 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L; 3589 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H; 3590 3591 break; 3592 case nct6116: 3593 data->in_num = 9; 3594 data->pwm_num = 3; 3595 data->auto_pwm_num = 4; 3596 data->temp_fixed_num = 3; 3597 data->num_temp_alarms = 3; 3598 data->num_temp_beeps = 3; 3599 3600 data->fan_from_reg = fan_from_reg13; 3601 data->fan_from_reg_min = fan_from_reg13; 3602 3603 data->temp_label = nct6776_temp_label; 3604 data->temp_mask = NCT6776_TEMP_MASK; 3605 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3606 3607 data->REG_VBAT = NCT6106_REG_VBAT; 3608 data->REG_DIODE = NCT6106_REG_DIODE; 3609 data->DIODE_MASK = NCT6106_DIODE_MASK; 3610 data->REG_VIN = NCT6106_REG_IN; 3611 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; 3612 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX; 3613 data->REG_TARGET = NCT6116_REG_TARGET; 3614 data->REG_FAN = NCT6116_REG_FAN; 3615 data->REG_FAN_MODE = NCT6116_REG_FAN_MODE; 3616 data->REG_FAN_MIN = NCT6116_REG_FAN_MIN; 3617 data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES; 3618 data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT; 3619 data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME; 3620 data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME; 3621 data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME; 3622 data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H; 3623 data->REG_PWM[0] = NCT6116_REG_PWM; 3624 data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT; 3625 data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT; 3626 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP; 3627 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE; 3628 data->REG_PWM_READ = NCT6106_REG_PWM_READ; 3629 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE; 3630 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK; 3631 data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP; 3632 data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM; 3633 data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP; 3634 data->REG_CRITICAL_TEMP_TOLERANCE 3635 = NCT6116_REG_CRITICAL_TEMP_TOLERANCE; 3636 data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE; 3637 data->CRITICAL_PWM_ENABLE_MASK 3638 = NCT6106_CRITICAL_PWM_ENABLE_MASK; 3639 data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM; 3640 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET; 3641 data->REG_TEMP_SOURCE = NCT6116_REG_TEMP_SOURCE; 3642 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL; 3643 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL; 3644 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; 3645 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL; 3646 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE; 3647 data->REG_ALARM = NCT6106_REG_ALARM; 3648 data->ALARM_BITS = NCT6116_ALARM_BITS; 3649 data->REG_BEEP = NCT6106_REG_BEEP; 3650 data->BEEP_BITS = NCT6116_BEEP_BITS; 3651 data->REG_TSI_TEMP = NCT6116_REG_TSI_TEMP; 3652 3653 reg_temp = NCT6106_REG_TEMP; 3654 reg_temp_mon = NCT6106_REG_TEMP_MON; 3655 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP); 3656 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON); 3657 num_reg_tsi_temp = ARRAY_SIZE(NCT6116_REG_TSI_TEMP); 3658 reg_temp_over = NCT6106_REG_TEMP_OVER; 3659 reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3660 reg_temp_config = NCT6106_REG_TEMP_CONFIG; 3661 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE; 3662 reg_temp_crit = NCT6106_REG_TEMP_CRIT; 3663 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L; 3664 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H; 3665 3666 break; 3667 case nct6775: 3668 data->in_num = 9; 3669 data->pwm_num = 3; 3670 data->auto_pwm_num = 6; 3671 data->has_fan_div = true; 3672 data->temp_fixed_num = 3; 3673 data->num_temp_alarms = 3; 3674 data->num_temp_beeps = 3; 3675 3676 data->ALARM_BITS = NCT6775_ALARM_BITS; 3677 data->BEEP_BITS = NCT6775_BEEP_BITS; 3678 3679 data->fan_from_reg = fan_from_reg16; 3680 data->fan_from_reg_min = fan_from_reg8; 3681 data->target_temp_mask = 0x7f; 3682 data->tolerance_mask = 0x0f; 3683 data->speed_tolerance_limit = 15; 3684 3685 data->temp_label = nct6775_temp_label; 3686 data->temp_mask = NCT6775_TEMP_MASK; 3687 data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK; 3688 3689 data->REG_CONFIG = NCT6775_REG_CONFIG; 3690 data->REG_VBAT = NCT6775_REG_VBAT; 3691 data->REG_DIODE = NCT6775_REG_DIODE; 3692 data->DIODE_MASK = NCT6775_DIODE_MASK; 3693 data->REG_VIN = NCT6775_REG_IN; 3694 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3695 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3696 data->REG_TARGET = NCT6775_REG_TARGET; 3697 data->REG_FAN = NCT6775_REG_FAN; 3698 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3699 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN; 3700 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES; 3701 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3702 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3703 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME; 3704 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME; 3705 data->REG_PWM[0] = NCT6775_REG_PWM; 3706 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3707 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3708 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT; 3709 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT; 3710 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3711 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3712 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE; 3713 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK; 3714 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3715 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3716 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3717 data->REG_CRITICAL_TEMP_TOLERANCE 3718 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3719 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET; 3720 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3721 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3722 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3723 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3724 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3725 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3726 data->REG_ALARM = NCT6775_REG_ALARM; 3727 data->REG_BEEP = NCT6775_REG_BEEP; 3728 data->REG_TSI_TEMP = NCT6775_REG_TSI_TEMP; 3729 3730 reg_temp = NCT6775_REG_TEMP; 3731 reg_temp_mon = NCT6775_REG_TEMP_MON; 3732 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3733 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3734 num_reg_tsi_temp = ARRAY_SIZE(NCT6775_REG_TSI_TEMP); 3735 reg_temp_over = NCT6775_REG_TEMP_OVER; 3736 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3737 reg_temp_config = NCT6775_REG_TEMP_CONFIG; 3738 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE; 3739 reg_temp_crit = NCT6775_REG_TEMP_CRIT; 3740 3741 break; 3742 case nct6776: 3743 data->in_num = 9; 3744 data->pwm_num = 3; 3745 data->auto_pwm_num = 4; 3746 data->has_fan_div = false; 3747 data->temp_fixed_num = 3; 3748 data->num_temp_alarms = 3; 3749 data->num_temp_beeps = 6; 3750 3751 data->ALARM_BITS = NCT6776_ALARM_BITS; 3752 data->BEEP_BITS = NCT6776_BEEP_BITS; 3753 3754 data->fan_from_reg = fan_from_reg13; 3755 data->fan_from_reg_min = fan_from_reg13; 3756 data->target_temp_mask = 0xff; 3757 data->tolerance_mask = 0x07; 3758 data->speed_tolerance_limit = 63; 3759 3760 data->temp_label = nct6776_temp_label; 3761 data->temp_mask = NCT6776_TEMP_MASK; 3762 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3763 3764 data->REG_CONFIG = NCT6775_REG_CONFIG; 3765 data->REG_VBAT = NCT6775_REG_VBAT; 3766 data->REG_DIODE = NCT6775_REG_DIODE; 3767 data->DIODE_MASK = NCT6775_DIODE_MASK; 3768 data->REG_VIN = NCT6775_REG_IN; 3769 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3770 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3771 data->REG_TARGET = NCT6775_REG_TARGET; 3772 data->REG_FAN = NCT6775_REG_FAN; 3773 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3774 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3775 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES; 3776 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3777 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3778 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3779 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3780 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3781 data->REG_PWM[0] = NCT6775_REG_PWM; 3782 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3783 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3784 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3785 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE; 3786 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3787 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3788 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3789 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3790 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3791 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3792 data->REG_CRITICAL_TEMP_TOLERANCE 3793 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3794 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET; 3795 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3796 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3797 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3798 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3799 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3800 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3801 data->REG_ALARM = NCT6775_REG_ALARM; 3802 data->REG_BEEP = NCT6776_REG_BEEP; 3803 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3804 3805 reg_temp = NCT6775_REG_TEMP; 3806 reg_temp_mon = NCT6775_REG_TEMP_MON; 3807 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3808 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3809 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3810 reg_temp_over = NCT6775_REG_TEMP_OVER; 3811 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3812 reg_temp_config = NCT6776_REG_TEMP_CONFIG; 3813 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE; 3814 reg_temp_crit = NCT6776_REG_TEMP_CRIT; 3815 3816 break; 3817 case nct6779: 3818 data->in_num = 15; 3819 data->pwm_num = 5; 3820 data->auto_pwm_num = 4; 3821 data->has_fan_div = false; 3822 data->temp_fixed_num = 6; 3823 data->num_temp_alarms = 2; 3824 data->num_temp_beeps = 2; 3825 3826 data->ALARM_BITS = NCT6779_ALARM_BITS; 3827 data->BEEP_BITS = NCT6779_BEEP_BITS; 3828 3829 data->fan_from_reg = fan_from_reg_rpm; 3830 data->fan_from_reg_min = fan_from_reg13; 3831 data->target_temp_mask = 0xff; 3832 data->tolerance_mask = 0x07; 3833 data->speed_tolerance_limit = 63; 3834 3835 data->temp_label = nct6779_temp_label; 3836 data->temp_mask = NCT6779_TEMP_MASK; 3837 data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK; 3838 3839 data->REG_CONFIG = NCT6775_REG_CONFIG; 3840 data->REG_VBAT = NCT6775_REG_VBAT; 3841 data->REG_DIODE = NCT6775_REG_DIODE; 3842 data->DIODE_MASK = NCT6775_DIODE_MASK; 3843 data->REG_VIN = NCT6779_REG_IN; 3844 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3845 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3846 data->REG_TARGET = NCT6775_REG_TARGET; 3847 data->REG_FAN = NCT6779_REG_FAN; 3848 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3849 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3850 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3851 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3852 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3853 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3854 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3855 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3856 data->REG_PWM[0] = NCT6775_REG_PWM; 3857 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3858 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3859 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3860 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE; 3861 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3862 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3863 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3864 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3865 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3866 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3867 data->REG_CRITICAL_TEMP_TOLERANCE 3868 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3869 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 3870 data->CRITICAL_PWM_ENABLE_MASK 3871 = NCT6779_CRITICAL_PWM_ENABLE_MASK; 3872 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 3873 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 3874 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3875 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3876 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3877 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3878 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3879 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3880 data->REG_ALARM = NCT6779_REG_ALARM; 3881 data->REG_BEEP = NCT6776_REG_BEEP; 3882 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3883 3884 reg_temp = NCT6779_REG_TEMP; 3885 reg_temp_mon = NCT6779_REG_TEMP_MON; 3886 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 3887 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 3888 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3889 reg_temp_over = NCT6779_REG_TEMP_OVER; 3890 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 3891 reg_temp_config = NCT6779_REG_TEMP_CONFIG; 3892 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE; 3893 reg_temp_crit = NCT6779_REG_TEMP_CRIT; 3894 3895 break; 3896 case nct6791: 3897 case nct6792: 3898 case nct6793: 3899 case nct6795: 3900 case nct6796: 3901 case nct6797: 3902 data->in_num = 15; 3903 data->pwm_num = (data->kind == nct6796 || 3904 data->kind == nct6797) ? 7 : 6; 3905 data->auto_pwm_num = 4; 3906 data->has_fan_div = false; 3907 data->temp_fixed_num = 6; 3908 data->num_temp_alarms = 2; 3909 data->num_temp_beeps = 2; 3910 3911 data->ALARM_BITS = NCT6791_ALARM_BITS; 3912 data->BEEP_BITS = NCT6779_BEEP_BITS; 3913 3914 data->fan_from_reg = fan_from_reg_rpm; 3915 data->fan_from_reg_min = fan_from_reg13; 3916 data->target_temp_mask = 0xff; 3917 data->tolerance_mask = 0x07; 3918 data->speed_tolerance_limit = 63; 3919 3920 switch (data->kind) { 3921 default: 3922 case nct6791: 3923 data->temp_label = nct6779_temp_label; 3924 data->temp_mask = NCT6791_TEMP_MASK; 3925 data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK; 3926 break; 3927 case nct6792: 3928 data->temp_label = nct6792_temp_label; 3929 data->temp_mask = NCT6792_TEMP_MASK; 3930 data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK; 3931 break; 3932 case nct6793: 3933 data->temp_label = nct6793_temp_label; 3934 data->temp_mask = NCT6793_TEMP_MASK; 3935 data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK; 3936 break; 3937 case nct6795: 3938 case nct6797: 3939 data->temp_label = nct6795_temp_label; 3940 data->temp_mask = NCT6795_TEMP_MASK; 3941 data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK; 3942 break; 3943 case nct6796: 3944 data->temp_label = nct6796_temp_label; 3945 data->temp_mask = NCT6796_TEMP_MASK; 3946 data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK; 3947 break; 3948 } 3949 3950 data->REG_CONFIG = NCT6775_REG_CONFIG; 3951 data->REG_VBAT = NCT6775_REG_VBAT; 3952 data->REG_DIODE = NCT6775_REG_DIODE; 3953 data->DIODE_MASK = NCT6775_DIODE_MASK; 3954 data->REG_VIN = NCT6779_REG_IN; 3955 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3956 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3957 data->REG_TARGET = NCT6775_REG_TARGET; 3958 data->REG_FAN = NCT6779_REG_FAN; 3959 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3960 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3961 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3962 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3963 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3964 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3965 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3966 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3967 data->REG_PWM[0] = NCT6775_REG_PWM; 3968 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3969 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3970 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP; 3971 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE; 3972 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3973 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3974 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3975 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3976 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3977 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3978 data->REG_CRITICAL_TEMP_TOLERANCE 3979 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3980 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 3981 data->CRITICAL_PWM_ENABLE_MASK 3982 = NCT6779_CRITICAL_PWM_ENABLE_MASK; 3983 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 3984 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 3985 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3986 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3987 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL; 3988 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP; 3989 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL; 3990 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE; 3991 data->REG_ALARM = NCT6791_REG_ALARM; 3992 if (data->kind == nct6791) 3993 data->REG_BEEP = NCT6776_REG_BEEP; 3994 else 3995 data->REG_BEEP = NCT6792_REG_BEEP; 3996 switch (data->kind) { 3997 case nct6791: 3998 case nct6792: 3999 case nct6793: 4000 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 4001 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 4002 break; 4003 case nct6795: 4004 case nct6796: 4005 case nct6797: 4006 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; 4007 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); 4008 break; 4009 default: 4010 num_reg_tsi_temp = 0; 4011 break; 4012 } 4013 4014 reg_temp = NCT6779_REG_TEMP; 4015 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 4016 if (data->kind == nct6791) { 4017 reg_temp_mon = NCT6779_REG_TEMP_MON; 4018 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 4019 } else { 4020 reg_temp_mon = NCT6792_REG_TEMP_MON; 4021 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON); 4022 } 4023 reg_temp_over = NCT6779_REG_TEMP_OVER; 4024 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 4025 reg_temp_config = NCT6779_REG_TEMP_CONFIG; 4026 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE; 4027 reg_temp_crit = NCT6779_REG_TEMP_CRIT; 4028 4029 break; 4030 case nct6798: 4031 case nct6799: 4032 data->in_num = data->kind == nct6799 ? 18 : 15; 4033 data->scale_in = scale_in_6798; 4034 data->pwm_num = 7; 4035 data->auto_pwm_num = 4; 4036 data->has_fan_div = false; 4037 data->temp_fixed_num = 6; 4038 data->num_temp_alarms = 7; 4039 data->num_temp_beeps = 8; 4040 4041 data->ALARM_BITS = NCT6799_ALARM_BITS; 4042 data->BEEP_BITS = NCT6799_BEEP_BITS; 4043 4044 data->fan_from_reg = fan_from_reg_rpm; 4045 data->fan_from_reg_min = fan_from_reg13; 4046 data->target_temp_mask = 0xff; 4047 data->tolerance_mask = 0x07; 4048 data->speed_tolerance_limit = 63; 4049 4050 switch (data->kind) { 4051 default: 4052 case nct6798: 4053 data->temp_label = nct6798_temp_label; 4054 data->temp_mask = NCT6798_TEMP_MASK; 4055 data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK; 4056 break; 4057 case nct6799: 4058 data->temp_label = nct6799_temp_label; 4059 data->temp_mask = NCT6799_TEMP_MASK; 4060 data->virt_temp_mask = NCT6799_VIRT_TEMP_MASK; 4061 break; 4062 } 4063 4064 data->REG_CONFIG = NCT6775_REG_CONFIG; 4065 data->REG_VBAT = NCT6775_REG_VBAT; 4066 data->REG_DIODE = NCT6775_REG_DIODE; 4067 data->DIODE_MASK = NCT6775_DIODE_MASK; 4068 data->REG_VIN = NCT6779_REG_IN; 4069 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 4070 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 4071 data->REG_TARGET = NCT6775_REG_TARGET; 4072 data->REG_FAN = NCT6779_REG_FAN; 4073 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 4074 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 4075 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 4076 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 4077 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 4078 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 4079 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 4080 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 4081 data->REG_PWM[0] = NCT6775_REG_PWM; 4082 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 4083 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 4084 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP; 4085 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE; 4086 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 4087 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 4088 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 4089 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 4090 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 4091 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 4092 data->REG_CRITICAL_TEMP_TOLERANCE = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 4093 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 4094 data->CRITICAL_PWM_ENABLE_MASK = NCT6779_CRITICAL_PWM_ENABLE_MASK; 4095 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 4096 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 4097 data->REG_TEMP_SOURCE = NCT6798_REG_TEMP_SOURCE; 4098 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 4099 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL; 4100 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP; 4101 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL; 4102 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE; 4103 data->REG_ALARM = NCT6799_REG_ALARM; 4104 data->REG_BEEP = NCT6792_REG_BEEP; 4105 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; 4106 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); 4107 4108 reg_temp = NCT6798_REG_TEMP; 4109 num_reg_temp = ARRAY_SIZE(NCT6798_REG_TEMP); 4110 reg_temp_mon = NCT6798_REG_TEMP_MON; 4111 num_reg_temp_mon = ARRAY_SIZE(NCT6798_REG_TEMP_MON); 4112 reg_temp_over = NCT6798_REG_TEMP_OVER; 4113 reg_temp_hyst = NCT6798_REG_TEMP_HYST; 4114 reg_temp_config = NCT6779_REG_TEMP_CONFIG; 4115 reg_temp_alternate = NCT6798_REG_TEMP_ALTERNATE; 4116 reg_temp_crit = NCT6798_REG_TEMP_CRIT; 4117 4118 break; 4119 default: 4120 return -ENODEV; 4121 } 4122 data->have_in = BIT(data->in_num) - 1; 4123 data->have_temp = 0; 4124 4125 /* 4126 * On some boards, not all available temperature sources are monitored, 4127 * even though some of the monitoring registers are unused. 4128 * Get list of unused monitoring registers, then detect if any fan 4129 * controls are configured to use unmonitored temperature sources. 4130 * If so, assign the unmonitored temperature sources to available 4131 * monitoring registers. 4132 */ 4133 mask = 0; 4134 available = 0; 4135 for (i = 0; i < num_reg_temp; i++) { 4136 if (reg_temp[i] == 0) 4137 continue; 4138 4139 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src); 4140 if (err) 4141 return err; 4142 src &= 0x1f; 4143 if (!src || (mask & BIT(src))) 4144 available |= BIT(i); 4145 4146 mask |= BIT(src); 4147 } 4148 4149 /* 4150 * Now find unmonitored temperature registers and enable monitoring 4151 * if additional monitoring registers are available. 4152 */ 4153 err = add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask); 4154 if (err) 4155 return err; 4156 err = add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask); 4157 if (err) 4158 return err; 4159 4160 mask = 0; 4161 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */ 4162 for (i = 0; i < num_reg_temp; i++) { 4163 if (reg_temp[i] == 0) 4164 continue; 4165 4166 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src); 4167 if (err) 4168 return err; 4169 src &= 0x1f; 4170 if (!src || (mask & BIT(src))) 4171 continue; 4172 4173 if (!(data->temp_mask & BIT(src))) { 4174 dev_info(dev, 4175 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", 4176 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]); 4177 continue; 4178 } 4179 4180 mask |= BIT(src); 4181 4182 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */ 4183 if (src <= data->temp_fixed_num) { 4184 data->have_temp |= BIT(src - 1); 4185 data->have_temp_fixed |= BIT(src - 1); 4186 data->reg_temp[0][src - 1] = reg_temp[i]; 4187 data->reg_temp[1][src - 1] = reg_temp_over[i]; 4188 data->reg_temp[2][src - 1] = reg_temp_hyst[i]; 4189 if (reg_temp_crit_h && reg_temp_crit_h[i]) 4190 data->reg_temp[3][src - 1] = reg_temp_crit_h[i]; 4191 else if (reg_temp_crit[src - 1]) 4192 data->reg_temp[3][src - 1] 4193 = reg_temp_crit[src - 1]; 4194 if (reg_temp_crit_l && reg_temp_crit_l[i]) 4195 data->reg_temp[4][src - 1] = reg_temp_crit_l[i]; 4196 data->reg_temp_config[src - 1] = reg_temp_config[i]; 4197 data->temp_src[src - 1] = src; 4198 continue; 4199 } 4200 4201 if (s >= NUM_TEMP) 4202 continue; 4203 4204 /* Use dynamic index for other sources */ 4205 data->have_temp |= BIT(s); 4206 data->reg_temp[0][s] = reg_temp[i]; 4207 data->reg_temp[1][s] = reg_temp_over[i]; 4208 data->reg_temp[2][s] = reg_temp_hyst[i]; 4209 data->reg_temp_config[s] = reg_temp_config[i]; 4210 if (reg_temp_crit_h && reg_temp_crit_h[i]) 4211 data->reg_temp[3][s] = reg_temp_crit_h[i]; 4212 else if (reg_temp_crit[src - 1]) 4213 data->reg_temp[3][s] = reg_temp_crit[src - 1]; 4214 if (reg_temp_crit_l && reg_temp_crit_l[i]) 4215 data->reg_temp[4][s] = reg_temp_crit_l[i]; 4216 4217 data->temp_src[s] = src; 4218 s++; 4219 } 4220 4221 /* 4222 * Repeat with temperatures used for fan control. 4223 * This set of registers does not support limits. 4224 */ 4225 for (i = 0; i < num_reg_temp_mon; i++) { 4226 if (reg_temp_mon[i] == 0) 4227 continue; 4228 4229 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &src); 4230 if (err) 4231 return err; 4232 src &= 0x1f; 4233 if (!src) 4234 continue; 4235 4236 if (!(data->temp_mask & BIT(src))) { 4237 dev_info(dev, 4238 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", 4239 src, i, data->REG_TEMP_SEL[i], 4240 reg_temp_mon[i]); 4241 continue; 4242 } 4243 4244 /* 4245 * For virtual temperature sources, the 'virtual' temperature 4246 * for each fan reflects a different temperature, and there 4247 * are no duplicates. 4248 */ 4249 if (!(data->virt_temp_mask & BIT(src))) { 4250 if (mask & BIT(src)) 4251 continue; 4252 mask |= BIT(src); 4253 } 4254 4255 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */ 4256 if (src <= data->temp_fixed_num) { 4257 if (data->have_temp & BIT(src - 1)) 4258 continue; 4259 data->have_temp |= BIT(src - 1); 4260 data->have_temp_fixed |= BIT(src - 1); 4261 data->reg_temp[0][src - 1] = reg_temp_mon[i]; 4262 data->temp_src[src - 1] = src; 4263 continue; 4264 } 4265 4266 if (s >= NUM_TEMP) 4267 continue; 4268 4269 /* Use dynamic index for other sources */ 4270 data->have_temp |= BIT(s); 4271 data->reg_temp[0][s] = reg_temp_mon[i]; 4272 data->temp_src[s] = src; 4273 s++; 4274 } 4275 4276 #ifdef USE_ALTERNATE 4277 /* 4278 * Go through the list of alternate temp registers and enable 4279 * if possible. 4280 * The temperature is already monitored if the respective bit in <mask> 4281 * is set. 4282 */ 4283 for (i = 0; i < 31; i++) { 4284 if (!(data->temp_mask & BIT(i + 1))) 4285 continue; 4286 if (!reg_temp_alternate[i]) 4287 continue; 4288 if (mask & BIT(i + 1)) 4289 continue; 4290 if (i < data->temp_fixed_num) { 4291 if (data->have_temp & BIT(i)) 4292 continue; 4293 data->have_temp |= BIT(i); 4294 data->have_temp_fixed |= BIT(i); 4295 data->reg_temp[0][i] = reg_temp_alternate[i]; 4296 if (i < num_reg_temp) { 4297 data->reg_temp[1][i] = reg_temp_over[i]; 4298 data->reg_temp[2][i] = reg_temp_hyst[i]; 4299 } 4300 data->temp_src[i] = i + 1; 4301 continue; 4302 } 4303 4304 if (s >= NUM_TEMP) /* Abort if no more space */ 4305 break; 4306 4307 data->have_temp |= BIT(s); 4308 data->reg_temp[0][s] = reg_temp_alternate[i]; 4309 data->temp_src[s] = i + 1; 4310 s++; 4311 } 4312 #endif /* USE_ALTERNATE */ 4313 4314 /* Check which TSIx_TEMP registers are active */ 4315 for (i = 0; i < num_reg_tsi_temp; i++) { 4316 u16 tmp; 4317 4318 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &tmp); 4319 if (err) 4320 return err; 4321 if (tmp) 4322 data->have_tsi_temp |= BIT(i); 4323 } 4324 4325 /* Initialize the chip */ 4326 err = nct6775_init_device(data); 4327 if (err) 4328 return err; 4329 4330 if (data->driver_init) { 4331 err = data->driver_init(data); 4332 if (err) 4333 return err; 4334 } 4335 4336 /* Read fan clock dividers immediately */ 4337 err = nct6775_init_fan_common(dev, data); 4338 if (err) 4339 return err; 4340 4341 /* Register sysfs hooks */ 4342 err = nct6775_add_template_attr_group(dev, data, &nct6775_pwm_template_group, 4343 data->pwm_num); 4344 if (err) 4345 return err; 4346 4347 err = nct6775_add_template_attr_group(dev, data, &nct6775_in_template_group, 4348 fls(data->have_in)); 4349 if (err) 4350 return err; 4351 4352 err = nct6775_add_template_attr_group(dev, data, &nct6775_fan_template_group, 4353 fls(data->has_fan)); 4354 if (err) 4355 return err; 4356 4357 err = nct6775_add_template_attr_group(dev, data, &nct6775_temp_template_group, 4358 fls(data->have_temp)); 4359 if (err) 4360 return err; 4361 4362 if (data->have_tsi_temp) { 4363 tsi_temp_tg.templates = nct6775_tsi_temp_template; 4364 tsi_temp_tg.is_visible = nct6775_tsi_temp_is_visible; 4365 tsi_temp_tg.base = fls(data->have_temp) + 1; 4366 err = nct6775_add_template_attr_group(dev, data, &tsi_temp_tg, 4367 fls(data->have_tsi_temp)); 4368 if (err) 4369 return err; 4370 } 4371 4372 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name, 4373 data, data->groups); 4374 return PTR_ERR_OR_ZERO(hwmon_dev); 4375 } 4376 EXPORT_SYMBOL_GPL(nct6775_probe); 4377 4378 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>"); 4379 MODULE_DESCRIPTION("Core driver for NCT6775F and compatible chips"); 4380 MODULE_LICENSE("GPL"); 4381