1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * nct6775 - Driver for the hardware monitoring functionality of 4 * Nuvoton NCT677x Super-I/O chips 5 * 6 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net> 7 * 8 * Derived from w83627ehf driver 9 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de> 10 * Copyright (C) 2006 Yuan Mu (Winbond), 11 * Rudolf Marek <r.marek@assembler.cz> 12 * David Hubbard <david.c.hubbard@gmail.com> 13 * Daniel J Blueman <daniel.blueman@gmail.com> 14 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00) 15 * 16 * Shamelessly ripped from the w83627hf driver 17 * Copyright (C) 2003 Mark Studebaker 18 * 19 * Supports the following chips: 20 * 21 * Chip #vin #fan #pwm #temp chip IDs man ID 22 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3 23 * nct6116d 9 5 5 3+3 0xd280 0xc1 0x5ca3 24 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3 25 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3 26 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3 27 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3 28 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3 29 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3 30 * nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3 31 * nct6796d 14 7 7 2+6 0xd420 0xc1 0x5ca3 32 * nct6797d 14 7 7 2+6 0xd450 0xc1 0x5ca3 33 * (0xd451) 34 * nct6798d 14 7 7 2+6 0xd428 0xc1 0x5ca3 35 * (0xd429) 36 * nct6796d-s 18 7 7 6+2 0xd801 0xc1 0x5ca3 37 * nct6799d-r 18 7 7 6+2 0xd802 0xc1 0x5ca3 38 * 39 * #temp lists the number of monitored temperature sources (first value) plus 40 * the number of directly connectable temperature sensors (second value). 41 */ 42 43 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 44 45 #undef DEFAULT_SYMBOL_NAMESPACE 46 #define DEFAULT_SYMBOL_NAMESPACE "HWMON_NCT6775" 47 48 #include <linux/module.h> 49 #include <linux/init.h> 50 #include <linux/slab.h> 51 #include <linux/jiffies.h> 52 #include <linux/hwmon.h> 53 #include <linux/hwmon-sysfs.h> 54 #include <linux/err.h> 55 #include <linux/mutex.h> 56 #include <linux/bitops.h> 57 #include <linux/nospec.h> 58 #include <linux/regmap.h> 59 #include "lm75.h" 60 #include "nct6775.h" 61 62 #define USE_ALTERNATE 63 64 /* used to set data->name = nct6775_device_names[data->sio_kind] */ 65 static const char * const nct6775_device_names[] = { 66 [nct6106] = "nct6106", 67 [nct6116] = "nct6116", 68 [nct6775] = "nct6775", 69 [nct6776] = "nct6776", 70 [nct6779] = "nct6779", 71 [nct6791] = "nct6791", 72 [nct6792] = "nct6792", 73 [nct6793] = "nct6793", 74 [nct6795] = "nct6795", 75 [nct6796] = "nct6796", 76 [nct6797] = "nct6797", 77 [nct6798] = "nct6798", 78 [nct6799] = "nct6799", 79 }; 80 81 /* Common and NCT6775 specific data */ 82 83 /* 84 * Voltage min/max registers for nr=7..14 are in bank 5 85 * min/max: 15-17 for NCT6799 only 86 */ 87 88 static const u16 NCT6775_REG_IN_MAX[] = { 89 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a, 90 0x55c, 0x55e, 0x560, 0x562, 0x564, 0x570, 0x572 }; 91 static const u16 NCT6775_REG_IN_MIN[] = { 92 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b, 93 0x55d, 0x55f, 0x561, 0x563, 0x565, 0x571, 0x573 }; 94 static const u16 NCT6775_REG_IN[] = { 95 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552 96 }; 97 98 #define NCT6775_REG_VBAT 0x5D 99 #define NCT6775_REG_DIODE 0x5E 100 #define NCT6775_DIODE_MASK 0x02 101 102 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B }; 103 104 static const s8 NCT6775_ALARM_BITS[NUM_ALARM_BITS] = { 105 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */ 106 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 107 6, 7, 11, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 108 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 109 12, -1, /* intr0-intr1 */ 110 }; 111 112 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e }; 113 114 static const s8 NCT6775_BEEP_BITS[NUM_BEEP_BITS] = { 115 0, 1, 2, 3, 8, 9, 10, 16, 17, -1, -1, -1, /* in0-in11 */ 116 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 117 6, 7, 11, 28, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 118 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 119 12, -1, 21 /* intr0-intr1, beep_en */ 120 }; 121 122 /* DC or PWM output fan configuration */ 123 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 }; 124 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 }; 125 126 /* Advanced Fan control, some values are common for all fans */ 127 128 static const u16 NCT6775_REG_TARGET[] = { 129 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 }; 130 static const u16 NCT6775_REG_FAN_MODE[] = { 131 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 }; 132 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = { 133 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 }; 134 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = { 135 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 }; 136 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 137 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 }; 138 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 139 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 }; 140 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a }; 141 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b }; 142 143 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 144 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 }; 145 static const u16 NCT6775_REG_PWM[] = { 146 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 }; 147 static const u16 NCT6775_REG_PWM_READ[] = { 148 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 }; 149 150 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 }; 151 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d }; 152 static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = { 153 0x641, 0x642, 0x643, 0x644 }; 154 static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { }; 155 156 static const u16 NCT6775_REG_TEMP[] = { 157 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d }; 158 159 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 }; 160 161 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 162 0, 0x152, 0x252, 0x628, 0x629, 0x62A }; 163 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 164 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D }; 165 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 166 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C }; 167 168 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 169 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 }; 170 171 static const u16 NCT6775_REG_TEMP_SEL[] = { 172 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 }; 173 174 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = { 175 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 }; 176 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = { 177 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a }; 178 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = { 179 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b }; 180 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = { 181 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c }; 182 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = { 183 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d }; 184 185 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 }; 186 187 static const u16 NCT6775_REG_AUTO_TEMP[] = { 188 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 }; 189 static const u16 NCT6775_REG_AUTO_PWM[] = { 190 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 }; 191 192 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p)) 193 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p)) 194 195 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 }; 196 197 static const u16 NCT6775_REG_CRITICAL_TEMP[] = { 198 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 }; 199 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = { 200 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 }; 201 202 static const char *const nct6775_temp_label[] = { 203 "", 204 "SYSTIN", 205 "CPUTIN", 206 "AUXTIN", 207 "AMD SB-TSI", 208 "PECI Agent 0", 209 "PECI Agent 1", 210 "PECI Agent 2", 211 "PECI Agent 3", 212 "PECI Agent 4", 213 "PECI Agent 5", 214 "PECI Agent 6", 215 "PECI Agent 7", 216 "PCH_CHIP_CPU_MAX_TEMP", 217 "PCH_CHIP_TEMP", 218 "PCH_CPU_TEMP", 219 "PCH_MCH_TEMP", 220 "PCH_DIM0_TEMP", 221 "PCH_DIM1_TEMP", 222 "PCH_DIM2_TEMP", 223 "PCH_DIM3_TEMP" 224 }; 225 226 #define NCT6775_TEMP_MASK 0x001ffffe 227 #define NCT6775_VIRT_TEMP_MASK 0x00000000 228 229 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = { 230 [13] = 0x661, 231 [14] = 0x662, 232 [15] = 0x664, 233 }; 234 235 static const u16 NCT6775_REG_TEMP_CRIT[32] = { 236 [4] = 0xa00, 237 [5] = 0xa01, 238 [6] = 0xa02, 239 [7] = 0xa03, 240 [8] = 0xa04, 241 [9] = 0xa05, 242 [10] = 0xa06, 243 [11] = 0xa07 244 }; 245 246 static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 }; 247 248 /* NCT6776 specific data */ 249 250 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */ 251 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME 252 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME 253 254 static const s8 NCT6776_ALARM_BITS[NUM_ALARM_BITS] = { 255 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */ 256 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 257 6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 258 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 259 12, 9, /* intr0-intr1 */ 260 }; 261 262 /* 0xbf: nct6799 only */ 263 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5, 0xbf }; 264 265 static const s8 NCT6776_BEEP_BITS[NUM_BEEP_BITS] = { 266 0, 1, 2, 3, 4, 5, 6, 7, 8, -1, -1, -1, /* in0-in11 */ 267 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 268 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 269 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 270 30, 31, 24 /* intr0-intr1, beep_en */ 271 }; 272 273 static const u16 NCT6776_REG_TOLERANCE_H[] = { 274 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c }; 275 276 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0, 0 }; 277 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0, 0 }; 278 279 static const u16 NCT6776_REG_FAN_MIN[] = { 280 0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c }; 281 static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = { 282 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 }; 283 284 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = { 285 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e }; 286 287 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 288 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A }; 289 290 static const char *const nct6776_temp_label[] = { 291 "", 292 "SYSTIN", 293 "CPUTIN", 294 "AUXTIN", 295 "SMBUSMASTER 0", 296 "SMBUSMASTER 1", 297 "SMBUSMASTER 2", 298 "SMBUSMASTER 3", 299 "SMBUSMASTER 4", 300 "SMBUSMASTER 5", 301 "SMBUSMASTER 6", 302 "SMBUSMASTER 7", 303 "PECI Agent 0", 304 "PECI Agent 1", 305 "PCH_CHIP_CPU_MAX_TEMP", 306 "PCH_CHIP_TEMP", 307 "PCH_CPU_TEMP", 308 "PCH_MCH_TEMP", 309 "PCH_DIM0_TEMP", 310 "PCH_DIM1_TEMP", 311 "PCH_DIM2_TEMP", 312 "PCH_DIM3_TEMP", 313 "BYTE_TEMP" 314 }; 315 316 #define NCT6776_TEMP_MASK 0x007ffffe 317 #define NCT6776_VIRT_TEMP_MASK 0x00000000 318 319 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = { 320 [14] = 0x401, 321 [15] = 0x402, 322 [16] = 0x404, 323 }; 324 325 static const u16 NCT6776_REG_TEMP_CRIT[32] = { 326 [11] = 0x709, 327 [12] = 0x70a, 328 }; 329 330 static const u16 NCT6776_REG_TSI_TEMP[] = { 331 0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 }; 332 333 /* NCT6779 specific data */ 334 335 /* 336 * 15-17 for NCT6799 only, register labels are: 337 * CPUVC, VIN1, AVSB, 3VCC, VIN0, VIN8, VIN4, 3VSB 338 * VBAT, VTT, VIN5, VIN6, VIN2, VIN3, VIN7, VIN9 339 * VHIF, VIN10 340 */ 341 static const u16 NCT6779_REG_IN[] = { 342 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487, 343 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e, 0x48f, 344 0x470, 0x471}; 345 346 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = { 347 0x459, 0x45A, 0x45B, 0x568 }; 348 349 static const s8 NCT6779_ALARM_BITS[NUM_ALARM_BITS] = { 350 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */ 351 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 352 6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 353 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 354 12, 9, /* intr0-intr1 */ 355 }; 356 357 static const s8 NCT6779_BEEP_BITS[NUM_BEEP_BITS] = { 358 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */ 359 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 360 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 361 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 362 30, 31, 24 /* intr0-intr1, beep_en */ 363 }; 364 365 static const u16 NCT6779_REG_FAN[] = { 366 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce }; 367 static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = { 368 0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f }; 369 370 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = { 371 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 }; 372 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01 373 static const u16 NCT6779_REG_CRITICAL_PWM[] = { 374 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 }; 375 376 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 }; 377 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b }; 378 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 379 0x18, 0x152 }; 380 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 381 0x3a, 0x153 }; 382 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 383 0x39, 0x155 }; 384 385 static const u16 NCT6779_REG_TEMP_OFFSET[] = { 386 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c, 0x44d, 0x449 }; 387 388 static const char *const nct6779_temp_label[] = { 389 "", 390 "SYSTIN", 391 "CPUTIN", 392 "AUXTIN0", 393 "AUXTIN1", 394 "AUXTIN2", 395 "AUXTIN3", 396 "", 397 "SMBUSMASTER 0", 398 "SMBUSMASTER 1", 399 "SMBUSMASTER 2", 400 "SMBUSMASTER 3", 401 "SMBUSMASTER 4", 402 "SMBUSMASTER 5", 403 "SMBUSMASTER 6", 404 "SMBUSMASTER 7", 405 "PECI Agent 0", 406 "PECI Agent 1", 407 "PCH_CHIP_CPU_MAX_TEMP", 408 "PCH_CHIP_TEMP", 409 "PCH_CPU_TEMP", 410 "PCH_MCH_TEMP", 411 "PCH_DIM0_TEMP", 412 "PCH_DIM1_TEMP", 413 "PCH_DIM2_TEMP", 414 "PCH_DIM3_TEMP", 415 "BYTE_TEMP", 416 "", 417 "", 418 "", 419 "", 420 "Virtual_TEMP" 421 }; 422 423 #define NCT6779_TEMP_MASK 0x07ffff7e 424 #define NCT6779_VIRT_TEMP_MASK 0x00000000 425 #define NCT6791_TEMP_MASK 0x87ffff7e 426 #define NCT6791_VIRT_TEMP_MASK 0x80000000 427 428 static const u16 NCT6779_REG_TEMP_ALTERNATE[32] 429 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0, 430 0, 0, 0, 0, 0, 0, 0, 0, 431 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407, 432 0x408, 0 }; 433 434 static const u16 NCT6779_REG_TEMP_CRIT[32] = { 435 [15] = 0x709, 436 [16] = 0x70a, 437 }; 438 439 /* NCT6791 specific data */ 440 441 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 }; 442 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a }; 443 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b }; 444 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c }; 445 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d }; 446 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e }; 447 448 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = { 449 0x459, 0x45A, 0x45B, 0x568, 0x45D }; 450 451 static const s8 NCT6791_ALARM_BITS[NUM_ALARM_BITS] = { 452 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */ 453 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 454 6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 455 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 456 12, 9, /* intr0-intr1 */ 457 }; 458 459 /* NCT6792/NCT6793 specific data */ 460 461 static const u16 NCT6792_REG_TEMP_MON[] = { 462 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d }; 463 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = { 464 0xb2, 0xb3, 0xb4, 0xb5, 0xbf }; 465 466 static const char *const nct6792_temp_label[] = { 467 "", 468 "SYSTIN", 469 "CPUTIN", 470 "AUXTIN0", 471 "AUXTIN1", 472 "AUXTIN2", 473 "AUXTIN3", 474 "", 475 "SMBUSMASTER 0", 476 "SMBUSMASTER 1", 477 "SMBUSMASTER 2", 478 "SMBUSMASTER 3", 479 "SMBUSMASTER 4", 480 "SMBUSMASTER 5", 481 "SMBUSMASTER 6", 482 "SMBUSMASTER 7", 483 "PECI Agent 0", 484 "PECI Agent 1", 485 "PCH_CHIP_CPU_MAX_TEMP", 486 "PCH_CHIP_TEMP", 487 "PCH_CPU_TEMP", 488 "PCH_MCH_TEMP", 489 "PCH_DIM0_TEMP", 490 "PCH_DIM1_TEMP", 491 "PCH_DIM2_TEMP", 492 "PCH_DIM3_TEMP", 493 "BYTE_TEMP", 494 "PECI Agent 0 Calibration", 495 "PECI Agent 1 Calibration", 496 "", 497 "", 498 "Virtual_TEMP" 499 }; 500 501 #define NCT6792_TEMP_MASK 0x9fffff7e 502 #define NCT6792_VIRT_TEMP_MASK 0x80000000 503 504 static const char *const nct6793_temp_label[] = { 505 "", 506 "SYSTIN", 507 "CPUTIN", 508 "AUXTIN0", 509 "AUXTIN1", 510 "AUXTIN2", 511 "AUXTIN3", 512 "", 513 "SMBUSMASTER 0", 514 "SMBUSMASTER 1", 515 "", 516 "", 517 "", 518 "", 519 "", 520 "", 521 "PECI Agent 0", 522 "PECI Agent 1", 523 "PCH_CHIP_CPU_MAX_TEMP", 524 "PCH_CHIP_TEMP", 525 "PCH_CPU_TEMP", 526 "PCH_MCH_TEMP", 527 "Agent0 Dimm0 ", 528 "Agent0 Dimm1", 529 "Agent1 Dimm0", 530 "Agent1 Dimm1", 531 "BYTE_TEMP0", 532 "BYTE_TEMP1", 533 "PECI Agent 0 Calibration", 534 "PECI Agent 1 Calibration", 535 "", 536 "Virtual_TEMP" 537 }; 538 539 #define NCT6793_TEMP_MASK 0xbfff037e 540 #define NCT6793_VIRT_TEMP_MASK 0x80000000 541 542 static const char *const nct6795_temp_label[] = { 543 "", 544 "SYSTIN", 545 "CPUTIN", 546 "AUXTIN0", 547 "AUXTIN1", 548 "AUXTIN2", 549 "AUXTIN3", 550 "", 551 "SMBUSMASTER 0", 552 "SMBUSMASTER 1", 553 "SMBUSMASTER 2", 554 "SMBUSMASTER 3", 555 "SMBUSMASTER 4", 556 "SMBUSMASTER 5", 557 "SMBUSMASTER 6", 558 "SMBUSMASTER 7", 559 "PECI Agent 0", 560 "PECI Agent 1", 561 "PCH_CHIP_CPU_MAX_TEMP", 562 "PCH_CHIP_TEMP", 563 "PCH_CPU_TEMP", 564 "PCH_MCH_TEMP", 565 "Agent0 Dimm0", 566 "Agent0 Dimm1", 567 "Agent1 Dimm0", 568 "Agent1 Dimm1", 569 "BYTE_TEMP0", 570 "BYTE_TEMP1", 571 "PECI Agent 0 Calibration", 572 "PECI Agent 1 Calibration", 573 "", 574 "Virtual_TEMP" 575 }; 576 577 #define NCT6795_TEMP_MASK 0xbfffff7e 578 #define NCT6795_VIRT_TEMP_MASK 0x80000000 579 580 static const char *const nct6796_temp_label[] = { 581 "", 582 "SYSTIN", 583 "CPUTIN", 584 "AUXTIN0", 585 "AUXTIN1", 586 "AUXTIN2", 587 "AUXTIN3", 588 "AUXTIN4", 589 "SMBUSMASTER 0", 590 "SMBUSMASTER 1", 591 "Virtual_TEMP", 592 "Virtual_TEMP", 593 "", 594 "", 595 "", 596 "", 597 "PECI Agent 0", 598 "PECI Agent 1", 599 "PCH_CHIP_CPU_MAX_TEMP", 600 "PCH_CHIP_TEMP", 601 "PCH_CPU_TEMP", 602 "PCH_MCH_TEMP", 603 "Agent0 Dimm0", 604 "Agent0 Dimm1", 605 "Agent1 Dimm0", 606 "Agent1 Dimm1", 607 "BYTE_TEMP0", 608 "BYTE_TEMP1", 609 "PECI Agent 0 Calibration", 610 "PECI Agent 1 Calibration", 611 "", 612 "Virtual_TEMP" 613 }; 614 615 #define NCT6796_TEMP_MASK 0xbfff0ffe 616 #define NCT6796_VIRT_TEMP_MASK 0x80000c00 617 618 static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b }; 619 620 static const u16 NCT6798_REG_TEMP[] = { 621 0x27, 0x150, 0x670, 0x672, 0x674, 0x676, 0x678, 0x67a}; 622 623 static const u16 NCT6798_REG_TEMP_SOURCE[] = { 624 0x621, 0x622, 0xc26, 0xc27, 0xc28, 0xc29, 0xc2a, 0xc2b }; 625 626 static const u16 NCT6798_REG_TEMP_MON[] = { 627 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d, 0x4a0 }; 628 static const u16 NCT6798_REG_TEMP_OVER[] = { 629 0x39, 0x155, 0xc1a, 0xc1b, 0xc1c, 0xc1d, 0xc1e, 0xc1f }; 630 static const u16 NCT6798_REG_TEMP_HYST[] = { 631 0x3a, 0x153, 0xc20, 0xc21, 0xc22, 0xc23, 0xc24, 0xc25 }; 632 633 static const u16 NCT6798_REG_TEMP_CRIT[32] = { 634 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35, 0 }; 635 636 static const u16 NCT6798_REG_TEMP_ALTERNATE[32] = { 637 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0x496, 0, 638 0, 0, 0, 0, 0x4a2, 0, 0, 0, 639 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407, 640 0x408, 0x419, 0x41a, 0x4f4, 0x4f5 }; 641 642 static const char *const nct6798_temp_label[] = { 643 "", 644 "SYSTIN", 645 "CPUTIN", 646 "AUXTIN0", 647 "AUXTIN1", 648 "AUXTIN2", 649 "AUXTIN3", 650 "AUXTIN4", 651 "SMBUSMASTER 0", 652 "SMBUSMASTER 1", 653 "Virtual_TEMP", 654 "Virtual_TEMP", 655 "", 656 "", 657 "", 658 "", 659 "PECI Agent 0", 660 "PECI Agent 1", 661 "PCH_CHIP_CPU_MAX_TEMP", 662 "PCH_CHIP_TEMP", 663 "PCH_CPU_TEMP", 664 "PCH_MCH_TEMP", 665 "Agent0 Dimm0", 666 "Agent0 Dimm1", 667 "Agent1 Dimm0", 668 "Agent1 Dimm1", 669 "BYTE_TEMP0", 670 "BYTE_TEMP1", 671 "PECI Agent 0 Calibration", /* undocumented */ 672 "PECI Agent 1 Calibration", /* undocumented */ 673 "", 674 "Virtual_TEMP" 675 }; 676 677 #define NCT6798_TEMP_MASK 0xbfff0ffe 678 #define NCT6798_VIRT_TEMP_MASK 0x80000c00 679 680 static const u16 NCT6799_REG_ALARM[NUM_REG_ALARM] = { 681 0x459, 0x45A, 0x45B, 0x568, 0x45D, 0xc01 }; 682 683 static const s8 NCT6799_ALARM_BITS[NUM_ALARM_BITS] = { 684 0, 1, 2, 3, 8, -1, 20, 16, 17, 24, 25, 26, /* in0-in11 */ 685 27, 28, 29, 30, 31, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 686 6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 687 4, 5, 40, 41, 42, 43, 44, -1, -1, -1, -1, -1, /* temp1-temp12 */ 688 12, 9, /* intr0-intr1 */ 689 }; 690 691 static const s8 NCT6799_BEEP_BITS[NUM_BEEP_BITS] = { 692 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */ 693 12, 13, 14, 15, 34, 35, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 694 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 695 16, 17, 18, 19, 20, 21, 22, 23, -1, -1, -1, -1, /* temp1-temp12 */ 696 30, 31, 24 /* intr0-intr1, beep_en */ 697 }; 698 699 /* PECI Calibration only for NCT6799D, not NCT6796D-S */ 700 static const char *const nct6799_temp_label[] = { 701 "", 702 "SYSTIN", 703 "CPUTIN", 704 "AUXTIN0", 705 "AUXTIN1", 706 "AUXTIN2", 707 "AUXTIN3", 708 "AUXTIN4", 709 "SMBUSMASTER 0", 710 "SMBUSMASTER 1", 711 "Virtual_TEMP", 712 "Virtual_TEMP", 713 "", 714 "AUXTIN5", 715 "", 716 "", 717 "PECI Agent 0", 718 "PECI Agent 1", 719 "PCH_CHIP_CPU_MAX_TEMP", 720 "PCH_CHIP_TEMP", 721 "PCH_CPU_TEMP", 722 "PCH_MCH_TEMP", 723 "Agent0 Dimm0", 724 "Agent0 Dimm1", 725 "Agent1 Dimm0", 726 "Agent1 Dimm1", 727 "BYTE_TEMP0", 728 "BYTE_TEMP1", 729 "PECI/TSI Agent 0 Calibration", 730 "PECI/TSI Agent 1 Calibration", 731 "", 732 "Virtual_TEMP" 733 }; 734 735 #define NCT6799_TEMP_MASK 0xbfff2ffe 736 #define NCT6799_VIRT_TEMP_MASK 0x80000c00 737 738 /* NCT6102D/NCT6106D specific data */ 739 740 #define NCT6106_REG_VBAT 0x318 741 #define NCT6106_REG_DIODE 0x319 742 #define NCT6106_DIODE_MASK 0x01 743 744 static const u16 NCT6106_REG_IN_MAX[] = { 745 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 }; 746 static const u16 NCT6106_REG_IN_MIN[] = { 747 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 }; 748 static const u16 NCT6106_REG_IN[] = { 749 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 }; 750 751 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 }; 752 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a }; 753 static const u16 NCT6106_REG_TEMP_HYST[] = { 754 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 }; 755 static const u16 NCT6106_REG_TEMP_OVER[] = { 756 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 }; 757 static const u16 NCT6106_REG_TEMP_CRIT_L[] = { 758 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 }; 759 static const u16 NCT6106_REG_TEMP_CRIT_H[] = { 760 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 }; 761 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 }; 762 static const u16 NCT6106_REG_TEMP_CONFIG[] = { 763 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc }; 764 765 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 }; 766 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 }; 767 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 }; 768 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 }; 769 770 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3, 0, 0 }; 771 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04, 0, 0 }; 772 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c, 0xd8, 0xd9 }; 773 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 }; 774 static const u16 NCT6106_REG_TEMP_SOURCE[] = { 775 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 }; 776 777 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a }; 778 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = { 779 0x11b, 0x12b, 0x13b }; 780 781 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c }; 782 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10 783 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d }; 784 785 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 }; 786 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 }; 787 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 }; 788 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 }; 789 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 }; 790 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 }; 791 792 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 }; 793 794 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188, 0, 0 }; 795 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189, 0, 0 }; 796 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a, 0, 0 }; 797 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b, 0, 0 }; 798 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c, 0, 0 }; 799 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d, 0, 0 }; 800 801 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 }; 802 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 }; 803 804 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = { 805 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d }; 806 807 static const s8 NCT6106_ALARM_BITS[NUM_ALARM_BITS] = { 808 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */ 809 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 810 32, 33, 34, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 811 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 812 48, -1, /* intr0-intr1 */ 813 }; 814 815 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = { 816 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 }; 817 818 static const s8 NCT6106_BEEP_BITS[NUM_BEEP_BITS] = { 819 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */ 820 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 821 24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 822 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 823 34, -1, 32 /* intr0-intr1, beep_en */ 824 }; 825 826 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = { 827 [14] = 0x51, 828 [15] = 0x52, 829 [16] = 0x54, 830 }; 831 832 static const u16 NCT6106_REG_TEMP_CRIT[32] = { 833 [11] = 0x204, 834 [12] = 0x205, 835 }; 836 837 static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 }; 838 839 /* NCT6112D/NCT6114D/NCT6116D specific data */ 840 841 static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 }; 842 static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 }; 843 static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 }; 844 static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 }; 845 846 static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 }; 847 static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 }; 848 static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 }; 849 850 static const u16 NCT6116_REG_CRITICAL_TEMP[] = { 851 0x11a, 0x12a, 0x13a, 0x19a, 0x1aa }; 852 static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = { 853 0x11b, 0x12b, 0x13b, 0x19b, 0x1ab }; 854 855 static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = { 856 0x11c, 0x12c, 0x13c, 0x19c, 0x1ac }; 857 static const u16 NCT6116_REG_CRITICAL_PWM[] = { 858 0x11d, 0x12d, 0x13d, 0x19d, 0x1ad }; 859 860 static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = { 861 0x114, 0x124, 0x134, 0x194, 0x1a4 }; 862 static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = { 863 0x115, 0x125, 0x135, 0x195, 0x1a5 }; 864 static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = { 865 0x116, 0x126, 0x136, 0x196, 0x1a6 }; 866 static const u16 NCT6116_REG_FAN_START_OUTPUT[] = { 867 0x117, 0x127, 0x137, 0x197, 0x1a7 }; 868 static const u16 NCT6116_REG_FAN_STOP_TIME[] = { 869 0x118, 0x128, 0x138, 0x198, 0x1a8 }; 870 static const u16 NCT6116_REG_TOLERANCE_H[] = { 871 0x112, 0x122, 0x132, 0x192, 0x1a2 }; 872 873 static const u16 NCT6116_REG_TARGET[] = { 874 0x111, 0x121, 0x131, 0x191, 0x1a1 }; 875 876 static const u16 NCT6116_REG_AUTO_TEMP[] = { 877 0x160, 0x170, 0x180, 0x1d0, 0x1e0 }; 878 static const u16 NCT6116_REG_AUTO_PWM[] = { 879 0x164, 0x174, 0x184, 0x1d4, 0x1e4 }; 880 881 static const s8 NCT6116_ALARM_BITS[NUM_ALARM_BITS] = { 882 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */ 883 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 884 32, 33, 34, 35, 36, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 885 16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 886 48, -1, /* intr0-intr1 */ 887 }; 888 889 static const s8 NCT6116_BEEP_BITS[NUM_BEEP_BITS] = { 890 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */ 891 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 892 24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 893 16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 894 34, -1, 32 /* intr0-intr1, beep_en */ 895 }; 896 897 static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b }; 898 899 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode) 900 { 901 if (mode == 0 && pwm == 255) 902 return off; 903 return mode + 1; 904 } 905 906 static int pwm_enable_to_reg(enum pwm_enable mode) 907 { 908 if (mode == off) 909 return 0; 910 return mode - 1; 911 } 912 913 /* 914 * Conversions 915 */ 916 917 /* 1 is DC mode, output in ms */ 918 static unsigned int step_time_from_reg(u8 reg, u8 mode) 919 { 920 return mode ? 400 * reg : 100 * reg; 921 } 922 923 static u8 step_time_to_reg(unsigned int msec, u8 mode) 924 { 925 return clamp_val((mode ? (msec + 200) / 400 : 926 (msec + 50) / 100), 1, 255); 927 } 928 929 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg) 930 { 931 if (reg == 0 || reg == 255) 932 return 0; 933 return 1350000U / (reg << divreg); 934 } 935 936 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg) 937 { 938 if ((reg & 0xff1f) == 0xff1f) 939 return 0; 940 941 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3); 942 943 if (reg == 0) 944 return 0; 945 946 return 1350000U / reg; 947 } 948 949 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg) 950 { 951 if (reg == 0 || reg == 0xffff) 952 return 0; 953 954 /* 955 * Even though the registers are 16 bit wide, the fan divisor 956 * still applies. 957 */ 958 return 1350000U / (reg << divreg); 959 } 960 961 static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg) 962 { 963 return reg; 964 } 965 966 static u16 fan_to_reg(u32 fan, unsigned int divreg) 967 { 968 if (!fan) 969 return 0; 970 971 return (1350000U / fan) >> divreg; 972 } 973 974 static inline unsigned int 975 div_from_reg(u8 reg) 976 { 977 return BIT(reg); 978 } 979 980 /* 981 * Some of the voltage inputs have internal scaling, the tables below 982 * contain 8 (the ADC LSB in mV) * scaling factor * 100 983 */ 984 static const u16 scale_in[15] = { 985 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800, 986 800, 800 987 }; 988 989 /* 990 * NCT6798 scaling: 991 * CPUVC, IN1, AVSB, 3VCC, IN0, IN8, IN4, 3VSB, VBAT, VTT, IN5, IN6, IN2, 992 * IN3, IN7, IN9, VHIF, IN10 993 * 15-17 for NCT6799 only 994 */ 995 static const u16 scale_in_6798[NUM_IN] = { 996 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 1600, 1600, 1600, 800, 997 800, 800, 800, 1600, 800 998 }; 999 1000 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scales) 1001 { 1002 return DIV_ROUND_CLOSEST(reg * scales[nr], 100); 1003 } 1004 1005 static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scales) 1006 { 1007 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scales[nr]), 0, 255); 1008 } 1009 1010 /* TSI temperatures are in 8.3 format */ 1011 static inline unsigned int tsi_temp_from_reg(unsigned int reg) 1012 { 1013 return (reg >> 5) * 125; 1014 } 1015 1016 /* 1017 * Data structures and manipulation thereof 1018 */ 1019 1020 struct sensor_device_template { 1021 struct device_attribute dev_attr; 1022 union { 1023 struct { 1024 u8 nr; 1025 u8 index; 1026 } s; 1027 int index; 1028 } u; 1029 bool s2; /* true if both index and nr are used */ 1030 }; 1031 1032 struct sensor_device_attr_u { 1033 union { 1034 struct sensor_device_attribute a1; 1035 struct sensor_device_attribute_2 a2; 1036 } u; 1037 char name[32]; 1038 }; 1039 1040 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \ 1041 .attr = {.name = _template, .mode = _mode }, \ 1042 .show = _show, \ 1043 .store = _store, \ 1044 } 1045 1046 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \ 1047 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \ 1048 .u.index = _index, \ 1049 .s2 = false } 1050 1051 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \ 1052 _nr, _index) \ 1053 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \ 1054 .u.s.index = _index, \ 1055 .u.s.nr = _nr, \ 1056 .s2 = true } 1057 1058 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \ 1059 static struct sensor_device_template sensor_dev_template_##_name \ 1060 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \ 1061 _index) 1062 1063 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \ 1064 _nr, _index) \ 1065 static struct sensor_device_template sensor_dev_template_##_name \ 1066 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \ 1067 _nr, _index) 1068 1069 struct sensor_template_group { 1070 struct sensor_device_template **templates; 1071 umode_t (*is_visible)(struct kobject *, struct attribute *, int); 1072 int base; 1073 }; 1074 1075 static int nct6775_add_template_attr_group(struct device *dev, struct nct6775_data *data, 1076 const struct sensor_template_group *tg, int repeat) 1077 { 1078 struct attribute_group *group; 1079 struct sensor_device_attr_u *su; 1080 struct sensor_device_attribute *a; 1081 struct sensor_device_attribute_2 *a2; 1082 struct attribute **attrs; 1083 struct sensor_device_template **t; 1084 int i, count; 1085 1086 if (repeat <= 0) 1087 return -EINVAL; 1088 1089 t = tg->templates; 1090 for (count = 0; *t; t++, count++) 1091 ; 1092 1093 if (count == 0) 1094 return -EINVAL; 1095 1096 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL); 1097 if (group == NULL) 1098 return -ENOMEM; 1099 1100 attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs), 1101 GFP_KERNEL); 1102 if (attrs == NULL) 1103 return -ENOMEM; 1104 1105 su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)), 1106 GFP_KERNEL); 1107 if (su == NULL) 1108 return -ENOMEM; 1109 1110 group->attrs = attrs; 1111 group->is_visible = tg->is_visible; 1112 1113 for (i = 0; i < repeat; i++) { 1114 t = tg->templates; 1115 while (*t != NULL) { 1116 snprintf(su->name, sizeof(su->name), 1117 (*t)->dev_attr.attr.name, tg->base + i); 1118 if ((*t)->s2) { 1119 a2 = &su->u.a2; 1120 sysfs_attr_init(&a2->dev_attr.attr); 1121 a2->dev_attr.attr.name = su->name; 1122 a2->nr = (*t)->u.s.nr + i; 1123 a2->index = (*t)->u.s.index; 1124 a2->dev_attr.attr.mode = 1125 (*t)->dev_attr.attr.mode; 1126 a2->dev_attr.show = (*t)->dev_attr.show; 1127 a2->dev_attr.store = (*t)->dev_attr.store; 1128 *attrs = &a2->dev_attr.attr; 1129 } else { 1130 a = &su->u.a1; 1131 sysfs_attr_init(&a->dev_attr.attr); 1132 a->dev_attr.attr.name = su->name; 1133 a->index = (*t)->u.index + i; 1134 a->dev_attr.attr.mode = 1135 (*t)->dev_attr.attr.mode; 1136 a->dev_attr.show = (*t)->dev_attr.show; 1137 a->dev_attr.store = (*t)->dev_attr.store; 1138 *attrs = &a->dev_attr.attr; 1139 } 1140 attrs++; 1141 su++; 1142 t++; 1143 } 1144 } 1145 1146 return nct6775_add_attr_group(data, group); 1147 } 1148 1149 bool nct6775_reg_is_word_sized(struct nct6775_data *data, u16 reg) 1150 { 1151 switch (data->kind) { 1152 case nct6106: 1153 return reg == 0x20 || reg == 0x22 || reg == 0x24 || 1154 (reg >= 0x59 && reg < 0x69 && (reg & 1)) || 1155 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || 1156 reg == 0x111 || reg == 0x121 || reg == 0x131; 1157 case nct6116: 1158 return reg == 0x20 || reg == 0x22 || reg == 0x24 || 1159 reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b || 1160 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 || 1161 reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 || 1162 reg == 0x191 || reg == 0x1a1; 1163 case nct6775: 1164 return (((reg & 0xff00) == 0x100 || 1165 (reg & 0xff00) == 0x200) && 1166 ((reg & 0x00ff) == 0x50 || 1167 (reg & 0x00ff) == 0x53 || 1168 (reg & 0x00ff) == 0x55)) || 1169 (reg & 0xfff0) == 0x630 || 1170 reg == 0x640 || reg == 0x642 || 1171 reg == 0x662 || reg == 0x669 || 1172 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || 1173 reg == 0x73 || reg == 0x75 || reg == 0x77; 1174 case nct6776: 1175 return (((reg & 0xff00) == 0x100 || 1176 (reg & 0xff00) == 0x200) && 1177 ((reg & 0x00ff) == 0x50 || 1178 (reg & 0x00ff) == 0x53 || 1179 (reg & 0x00ff) == 0x55)) || 1180 (reg & 0xfff0) == 0x630 || 1181 reg == 0x402 || 1182 (reg >= 0x409 && reg < 0x419 && (reg & 1)) || 1183 reg == 0x640 || reg == 0x642 || 1184 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || 1185 reg == 0x73 || reg == 0x75 || reg == 0x77; 1186 case nct6779: 1187 case nct6791: 1188 case nct6792: 1189 case nct6793: 1190 case nct6795: 1191 case nct6796: 1192 case nct6797: 1193 case nct6798: 1194 case nct6799: 1195 return reg == 0x150 || reg == 0x153 || reg == 0x155 || 1196 (reg & 0xfff0) == 0x4c0 || 1197 reg == 0x402 || 1198 (reg >= 0x409 && reg < 0x419 && (reg & 1)) || 1199 reg == 0x63a || reg == 0x63c || reg == 0x63e || 1200 reg == 0x640 || reg == 0x642 || reg == 0x64a || 1201 reg == 0x64c || 1202 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 || 1203 reg == 0x7b || reg == 0x7d; 1204 } 1205 return false; 1206 } 1207 EXPORT_SYMBOL_GPL(nct6775_reg_is_word_sized); 1208 1209 /* We left-align 8-bit temperature values to make the code simpler */ 1210 static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val) 1211 { 1212 int err; 1213 1214 err = nct6775_read_value(data, reg, val); 1215 if (err) 1216 return err; 1217 1218 if (!nct6775_reg_is_word_sized(data, reg)) 1219 *val <<= 8; 1220 1221 return 0; 1222 } 1223 1224 /* This function assumes that the caller holds data->update_lock */ 1225 static int nct6775_write_fan_div(struct nct6775_data *data, int nr) 1226 { 1227 u16 reg; 1228 int err; 1229 u16 fandiv_reg = nr < 2 ? NCT6775_REG_FANDIV1 : NCT6775_REG_FANDIV2; 1230 unsigned int oddshift = (nr & 1) * 4; /* masks shift by four if nr is odd */ 1231 1232 err = nct6775_read_value(data, fandiv_reg, ®); 1233 if (err) 1234 return err; 1235 reg &= 0x70 >> oddshift; 1236 reg |= (data->fan_div[nr] & 0x7) << oddshift; 1237 return nct6775_write_value(data, fandiv_reg, reg); 1238 } 1239 1240 static int nct6775_write_fan_div_common(struct nct6775_data *data, int nr) 1241 { 1242 if (data->kind == nct6775) 1243 return nct6775_write_fan_div(data, nr); 1244 return 0; 1245 } 1246 1247 static int nct6775_update_fan_div(struct nct6775_data *data) 1248 { 1249 int err; 1250 u16 i; 1251 1252 err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &i); 1253 if (err) 1254 return err; 1255 data->fan_div[0] = i & 0x7; 1256 data->fan_div[1] = (i & 0x70) >> 4; 1257 err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &i); 1258 if (err) 1259 return err; 1260 data->fan_div[2] = i & 0x7; 1261 if (data->has_fan & BIT(3)) 1262 data->fan_div[3] = (i & 0x70) >> 4; 1263 1264 return 0; 1265 } 1266 1267 static int nct6775_update_fan_div_common(struct nct6775_data *data) 1268 { 1269 if (data->kind == nct6775) 1270 return nct6775_update_fan_div(data); 1271 return 0; 1272 } 1273 1274 static int nct6775_init_fan_div(struct nct6775_data *data) 1275 { 1276 int i, err; 1277 1278 err = nct6775_update_fan_div_common(data); 1279 if (err) 1280 return err; 1281 1282 /* 1283 * For all fans, start with highest divider value if the divider 1284 * register is not initialized. This ensures that we get a 1285 * reading from the fan count register, even if it is not optimal. 1286 * We'll compute a better divider later on. 1287 */ 1288 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) { 1289 if (!(data->has_fan & BIT(i))) 1290 continue; 1291 if (data->fan_div[i] == 0) { 1292 data->fan_div[i] = 7; 1293 err = nct6775_write_fan_div_common(data, i); 1294 if (err) 1295 return err; 1296 } 1297 } 1298 1299 return 0; 1300 } 1301 1302 static int nct6775_init_fan_common(struct device *dev, 1303 struct nct6775_data *data) 1304 { 1305 int i, err; 1306 u16 reg; 1307 1308 if (data->has_fan_div) { 1309 err = nct6775_init_fan_div(data); 1310 if (err) 1311 return err; 1312 } 1313 1314 /* 1315 * If fan_min is not set (0), set it to 0xff to disable it. This 1316 * prevents the unnecessary warning when fanX_min is reported as 0. 1317 */ 1318 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) { 1319 if (data->has_fan_min & BIT(i)) { 1320 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®); 1321 if (err) 1322 return err; 1323 if (!reg) { 1324 err = nct6775_write_value(data, data->REG_FAN_MIN[i], 1325 data->has_fan_div ? 0xff : 0xff1f); 1326 if (err) 1327 return err; 1328 } 1329 } 1330 } 1331 1332 return 0; 1333 } 1334 1335 static int nct6775_select_fan_div(struct device *dev, 1336 struct nct6775_data *data, int nr, u16 reg) 1337 { 1338 int err; 1339 u8 fan_div = data->fan_div[nr]; 1340 u16 fan_min; 1341 1342 if (!data->has_fan_div) 1343 return 0; 1344 1345 /* 1346 * If we failed to measure the fan speed, or the reported value is not 1347 * in the optimal range, and the clock divider can be modified, 1348 * let's try that for next time. 1349 */ 1350 if (reg == 0x00 && fan_div < 0x07) 1351 fan_div++; 1352 else if (reg != 0x00 && reg < 0x30 && fan_div > 0) 1353 fan_div--; 1354 1355 if (fan_div != data->fan_div[nr]) { 1356 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n", 1357 nr + 1, div_from_reg(data->fan_div[nr]), 1358 div_from_reg(fan_div)); 1359 1360 /* Preserve min limit if possible */ 1361 if (data->has_fan_min & BIT(nr)) { 1362 fan_min = data->fan_min[nr]; 1363 if (fan_div > data->fan_div[nr]) { 1364 if (fan_min != 255 && fan_min > 1) 1365 fan_min >>= 1; 1366 } else { 1367 if (fan_min != 255) { 1368 fan_min <<= 1; 1369 if (fan_min > 254) 1370 fan_min = 254; 1371 } 1372 } 1373 if (fan_min != data->fan_min[nr]) { 1374 data->fan_min[nr] = fan_min; 1375 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], fan_min); 1376 if (err) 1377 return err; 1378 } 1379 } 1380 data->fan_div[nr] = fan_div; 1381 err = nct6775_write_fan_div_common(data, nr); 1382 if (err) 1383 return err; 1384 } 1385 1386 return 0; 1387 } 1388 1389 static int nct6775_update_pwm(struct device *dev) 1390 { 1391 struct nct6775_data *data = dev_get_drvdata(dev); 1392 int i, j, err; 1393 u16 fanmodecfg, reg; 1394 bool duty_is_dc; 1395 1396 for (i = 0; i < data->pwm_num; i++) { 1397 if (!(data->has_pwm & BIT(i))) 1398 continue; 1399 1400 err = nct6775_read_value(data, data->REG_PWM_MODE[i], ®); 1401 if (err) 1402 return err; 1403 duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]); 1404 data->pwm_mode[i] = !duty_is_dc; 1405 1406 err = nct6775_read_value(data, data->REG_FAN_MODE[i], &fanmodecfg); 1407 if (err) 1408 return err; 1409 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) { 1410 if (data->REG_PWM[j] && data->REG_PWM[j][i]) { 1411 err = nct6775_read_value(data, data->REG_PWM[j][i], ®); 1412 if (err) 1413 return err; 1414 data->pwm[j][i] = reg; 1415 } 1416 } 1417 1418 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i], 1419 (fanmodecfg >> 4) & 7); 1420 1421 if (!data->temp_tolerance[0][i] || 1422 data->pwm_enable[i] != speed_cruise) 1423 data->temp_tolerance[0][i] = fanmodecfg & 0x0f; 1424 if (!data->target_speed_tolerance[i] || 1425 data->pwm_enable[i] == speed_cruise) { 1426 u8 t = fanmodecfg & 0x0f; 1427 1428 if (data->REG_TOLERANCE_H) { 1429 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®); 1430 if (err) 1431 return err; 1432 t |= (reg & 0x70) >> 1; 1433 } 1434 data->target_speed_tolerance[i] = t; 1435 } 1436 1437 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], ®); 1438 if (err) 1439 return err; 1440 data->temp_tolerance[1][i] = reg; 1441 1442 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], ®); 1443 if (err) 1444 return err; 1445 data->pwm_temp_sel[i] = reg & 0x1f; 1446 /* If fan can stop, report floor as 0 */ 1447 if (reg & 0x80) 1448 data->pwm[2][i] = 0; 1449 1450 if (!data->REG_WEIGHT_TEMP_SEL[i]) 1451 continue; 1452 1453 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], ®); 1454 if (err) 1455 return err; 1456 data->pwm_weight_temp_sel[i] = reg & 0x1f; 1457 /* If weight is disabled, report weight source as 0 */ 1458 if (!(reg & 0x80)) 1459 data->pwm_weight_temp_sel[i] = 0; 1460 1461 /* Weight temp data */ 1462 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) { 1463 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], ®); 1464 if (err) 1465 return err; 1466 data->weight_temp[j][i] = reg; 1467 } 1468 } 1469 1470 return 0; 1471 } 1472 1473 static int nct6775_update_pwm_limits(struct device *dev) 1474 { 1475 struct nct6775_data *data = dev_get_drvdata(dev); 1476 int i, j, err; 1477 u16 reg, reg_t; 1478 1479 for (i = 0; i < data->pwm_num; i++) { 1480 if (!(data->has_pwm & BIT(i))) 1481 continue; 1482 1483 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) { 1484 err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], ®); 1485 if (err) 1486 return err; 1487 data->fan_time[j][i] = reg; 1488 } 1489 1490 err = nct6775_read_value(data, data->REG_TARGET[i], ®_t); 1491 if (err) 1492 return err; 1493 1494 /* Update only in matching mode or if never updated */ 1495 if (!data->target_temp[i] || 1496 data->pwm_enable[i] == thermal_cruise) 1497 data->target_temp[i] = reg_t & data->target_temp_mask; 1498 if (!data->target_speed[i] || 1499 data->pwm_enable[i] == speed_cruise) { 1500 if (data->REG_TOLERANCE_H) { 1501 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®); 1502 if (err) 1503 return err; 1504 reg_t |= (reg & 0x0f) << 8; 1505 } 1506 data->target_speed[i] = reg_t; 1507 } 1508 1509 for (j = 0; j < data->auto_pwm_num; j++) { 1510 err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), ®); 1511 if (err) 1512 return err; 1513 data->auto_pwm[i][j] = reg; 1514 1515 err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), ®); 1516 if (err) 1517 return err; 1518 data->auto_temp[i][j] = reg; 1519 } 1520 1521 /* critical auto_pwm temperature data */ 1522 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], ®); 1523 if (err) 1524 return err; 1525 data->auto_temp[i][data->auto_pwm_num] = reg; 1526 1527 switch (data->kind) { 1528 case nct6775: 1529 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], ®); 1530 if (err) 1531 return err; 1532 data->auto_pwm[i][data->auto_pwm_num] = 1533 (reg & 0x02) ? 0xff : 0x00; 1534 break; 1535 case nct6776: 1536 data->auto_pwm[i][data->auto_pwm_num] = 0xff; 1537 break; 1538 case nct6106: 1539 case nct6116: 1540 case nct6779: 1541 case nct6791: 1542 case nct6792: 1543 case nct6793: 1544 case nct6795: 1545 case nct6796: 1546 case nct6797: 1547 case nct6798: 1548 case nct6799: 1549 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], ®); 1550 if (err) 1551 return err; 1552 if (reg & data->CRITICAL_PWM_ENABLE_MASK) { 1553 err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], ®); 1554 if (err) 1555 return err; 1556 } else { 1557 reg = 0xff; 1558 } 1559 data->auto_pwm[i][data->auto_pwm_num] = reg; 1560 break; 1561 } 1562 } 1563 1564 return 0; 1565 } 1566 1567 struct nct6775_data *nct6775_update_device(struct device *dev) 1568 { 1569 struct nct6775_data *data = dev_get_drvdata(dev); 1570 int i, j, err = 0; 1571 u16 reg; 1572 1573 mutex_lock(&data->update_lock); 1574 1575 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1576 || !data->valid) { 1577 /* Fan clock dividers */ 1578 err = nct6775_update_fan_div_common(data); 1579 if (err) 1580 goto out; 1581 1582 /* Measured voltages and limits */ 1583 for (i = 0; i < data->in_num; i++) { 1584 if (!(data->have_in & BIT(i))) 1585 continue; 1586 1587 err = nct6775_read_value(data, data->REG_VIN[i], ®); 1588 if (err) 1589 goto out; 1590 data->in[i][0] = reg; 1591 1592 err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], ®); 1593 if (err) 1594 goto out; 1595 data->in[i][1] = reg; 1596 1597 err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], ®); 1598 if (err) 1599 goto out; 1600 data->in[i][2] = reg; 1601 } 1602 1603 /* Measured fan speeds and limits */ 1604 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) { 1605 if (!(data->has_fan & BIT(i))) 1606 continue; 1607 1608 err = nct6775_read_value(data, data->REG_FAN[i], ®); 1609 if (err) 1610 goto out; 1611 data->rpm[i] = data->fan_from_reg(reg, 1612 data->fan_div[i]); 1613 1614 if (data->has_fan_min & BIT(i)) { 1615 u16 tmp; 1616 1617 err = nct6775_read_value(data, data->REG_FAN_MIN[i], &tmp); 1618 if (err) 1619 goto out; 1620 data->fan_min[i] = tmp; 1621 } 1622 1623 if (data->REG_FAN_PULSES[i]) { 1624 u16 tmp; 1625 1626 err = nct6775_read_value(data, data->REG_FAN_PULSES[i], &tmp); 1627 if (err) 1628 goto out; 1629 data->fan_pulses[i] = (tmp >> data->FAN_PULSE_SHIFT[i]) & 0x03; 1630 } 1631 1632 err = nct6775_select_fan_div(dev, data, i, reg); 1633 if (err) 1634 goto out; 1635 } 1636 1637 err = nct6775_update_pwm(dev); 1638 if (err) 1639 goto out; 1640 1641 err = nct6775_update_pwm_limits(dev); 1642 if (err) 1643 goto out; 1644 1645 /* Measured temperatures and limits */ 1646 for (i = 0; i < NUM_TEMP; i++) { 1647 if (!(data->have_temp & BIT(i))) 1648 continue; 1649 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) { 1650 if (data->reg_temp[j][i]) { 1651 err = nct6775_read_temp(data, data->reg_temp[j][i], ®); 1652 if (err) 1653 goto out; 1654 data->temp[j][i] = reg; 1655 } 1656 } 1657 if (i >= NUM_TEMP_FIXED || 1658 !(data->have_temp_fixed & BIT(i))) 1659 continue; 1660 err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], ®); 1661 if (err) 1662 goto out; 1663 data->temp_offset[i] = reg; 1664 } 1665 1666 for (i = 0; i < NUM_TSI_TEMP; i++) { 1667 if (!(data->have_tsi_temp & BIT(i))) 1668 continue; 1669 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], ®); 1670 if (err) 1671 goto out; 1672 data->tsi_temp[i] = reg; 1673 } 1674 1675 data->alarms = 0; 1676 for (i = 0; i < NUM_REG_ALARM; i++) { 1677 u16 alarm; 1678 1679 if (!data->REG_ALARM[i]) 1680 continue; 1681 err = nct6775_read_value(data, data->REG_ALARM[i], &alarm); 1682 if (err) 1683 goto out; 1684 data->alarms |= ((u64)alarm) << (i << 3); 1685 } 1686 1687 data->beeps = 0; 1688 for (i = 0; i < NUM_REG_BEEP; i++) { 1689 u16 beep; 1690 1691 if (!data->REG_BEEP[i]) 1692 continue; 1693 err = nct6775_read_value(data, data->REG_BEEP[i], &beep); 1694 if (err) 1695 goto out; 1696 data->beeps |= ((u64)beep) << (i << 3); 1697 } 1698 1699 data->last_updated = jiffies; 1700 data->valid = true; 1701 } 1702 out: 1703 mutex_unlock(&data->update_lock); 1704 return err ? ERR_PTR(err) : data; 1705 } 1706 EXPORT_SYMBOL_GPL(nct6775_update_device); 1707 1708 /* 1709 * Sysfs callback functions 1710 */ 1711 static ssize_t 1712 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf) 1713 { 1714 struct nct6775_data *data = nct6775_update_device(dev); 1715 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1716 int index = sattr->index; 1717 int nr = sattr->nr; 1718 1719 if (IS_ERR(data)) 1720 return PTR_ERR(data); 1721 1722 return sysfs_emit(buf, "%ld\n", 1723 in_from_reg(data->in[nr][index], nr, data->scale_in)); 1724 } 1725 1726 static ssize_t 1727 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf, 1728 size_t count) 1729 { 1730 struct nct6775_data *data = dev_get_drvdata(dev); 1731 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1732 int index = sattr->index; 1733 int nr = sattr->nr; 1734 unsigned long val; 1735 int err; 1736 1737 err = kstrtoul(buf, 10, &val); 1738 if (err < 0) 1739 return err; 1740 mutex_lock(&data->update_lock); 1741 data->in[nr][index] = in_to_reg(val, nr, data->scale_in); 1742 err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]); 1743 mutex_unlock(&data->update_lock); 1744 return err ? : count; 1745 } 1746 1747 ssize_t 1748 nct6775_show_alarm(struct device *dev, struct device_attribute *attr, char *buf) 1749 { 1750 struct nct6775_data *data = nct6775_update_device(dev); 1751 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1752 int nr; 1753 1754 if (IS_ERR(data)) 1755 return PTR_ERR(data); 1756 1757 nr = data->ALARM_BITS[sattr->index]; 1758 return sysfs_emit(buf, "%u\n", 1759 (unsigned int)((data->alarms >> nr) & 0x01)); 1760 } 1761 EXPORT_SYMBOL_GPL(nct6775_show_alarm); 1762 1763 static int find_temp_source(struct nct6775_data *data, int index, int count) 1764 { 1765 int source = data->temp_src[index]; 1766 int nr, err; 1767 1768 for (nr = 0; nr < count; nr++) { 1769 u16 src; 1770 1771 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr], &src); 1772 if (err) 1773 return err; 1774 if ((src & 0x1f) == source) 1775 return nr; 1776 } 1777 return -ENODEV; 1778 } 1779 1780 static ssize_t 1781 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf) 1782 { 1783 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1784 struct nct6775_data *data = nct6775_update_device(dev); 1785 unsigned int alarm = 0; 1786 int nr; 1787 1788 if (IS_ERR(data)) 1789 return PTR_ERR(data); 1790 1791 /* 1792 * For temperatures, there is no fixed mapping from registers to alarm 1793 * bits. Alarm bits are determined by the temperature source mapping. 1794 */ 1795 nr = find_temp_source(data, sattr->index, data->num_temp_alarms); 1796 if (nr >= 0) { 1797 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE]; 1798 1799 alarm = (data->alarms >> bit) & 0x01; 1800 } 1801 return sysfs_emit(buf, "%u\n", alarm); 1802 } 1803 1804 ssize_t 1805 nct6775_show_beep(struct device *dev, struct device_attribute *attr, char *buf) 1806 { 1807 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1808 struct nct6775_data *data = nct6775_update_device(dev); 1809 int nr; 1810 1811 if (IS_ERR(data)) 1812 return PTR_ERR(data); 1813 1814 nr = data->BEEP_BITS[sattr->index]; 1815 1816 return sysfs_emit(buf, "%u\n", 1817 (unsigned int)((data->beeps >> nr) & 0x01)); 1818 } 1819 EXPORT_SYMBOL_GPL(nct6775_show_beep); 1820 1821 ssize_t 1822 nct6775_store_beep(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 1823 { 1824 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1825 struct nct6775_data *data = dev_get_drvdata(dev); 1826 int nr = data->BEEP_BITS[sattr->index]; 1827 int regindex = nr >> 3; 1828 unsigned long val; 1829 int err; 1830 1831 err = kstrtoul(buf, 10, &val); 1832 if (err < 0) 1833 return err; 1834 if (val > 1) 1835 return -EINVAL; 1836 1837 mutex_lock(&data->update_lock); 1838 if (val) 1839 data->beeps |= (1ULL << nr); 1840 else 1841 data->beeps &= ~(1ULL << nr); 1842 err = nct6775_write_value(data, data->REG_BEEP[regindex], 1843 (data->beeps >> (regindex << 3)) & 0xff); 1844 mutex_unlock(&data->update_lock); 1845 return err ? : count; 1846 } 1847 EXPORT_SYMBOL_GPL(nct6775_store_beep); 1848 1849 static ssize_t 1850 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf) 1851 { 1852 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1853 struct nct6775_data *data = nct6775_update_device(dev); 1854 unsigned int beep = 0; 1855 int nr; 1856 1857 if (IS_ERR(data)) 1858 return PTR_ERR(data); 1859 1860 /* 1861 * For temperatures, there is no fixed mapping from registers to beep 1862 * enable bits. Beep enable bits are determined by the temperature 1863 * source mapping. 1864 */ 1865 nr = find_temp_source(data, sattr->index, data->num_temp_beeps); 1866 if (nr >= 0) { 1867 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE]; 1868 1869 beep = (data->beeps >> bit) & 0x01; 1870 } 1871 return sysfs_emit(buf, "%u\n", beep); 1872 } 1873 1874 static ssize_t 1875 store_temp_beep(struct device *dev, struct device_attribute *attr, 1876 const char *buf, size_t count) 1877 { 1878 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1879 struct nct6775_data *data = dev_get_drvdata(dev); 1880 int nr, bit, regindex; 1881 unsigned long val; 1882 int err; 1883 1884 err = kstrtoul(buf, 10, &val); 1885 if (err < 0) 1886 return err; 1887 if (val > 1) 1888 return -EINVAL; 1889 1890 nr = find_temp_source(data, sattr->index, data->num_temp_beeps); 1891 if (nr < 0) 1892 return nr; 1893 1894 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE]; 1895 regindex = bit >> 3; 1896 1897 mutex_lock(&data->update_lock); 1898 if (val) 1899 data->beeps |= (1ULL << bit); 1900 else 1901 data->beeps &= ~(1ULL << bit); 1902 err = nct6775_write_value(data, data->REG_BEEP[regindex], 1903 (data->beeps >> (regindex << 3)) & 0xff); 1904 mutex_unlock(&data->update_lock); 1905 1906 return err ? : count; 1907 } 1908 1909 static umode_t nct6775_in_is_visible(struct kobject *kobj, 1910 struct attribute *attr, int index) 1911 { 1912 struct device *dev = kobj_to_dev(kobj); 1913 struct nct6775_data *data = dev_get_drvdata(dev); 1914 int in = index / 5; /* voltage index */ 1915 int nr = index % 5; /* attribute index */ 1916 1917 if (nr == 1 && data->ALARM_BITS[in] == -1) 1918 return 0; 1919 1920 if (!(data->have_in & BIT(in))) 1921 return 0; 1922 1923 return nct6775_attr_mode(data, attr); 1924 } 1925 1926 SENSOR_TEMPLATE_2(in_input, "in%d_input", 0444, show_in_reg, NULL, 0, 0); 1927 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", 0444, nct6775_show_alarm, NULL, 0); 1928 SENSOR_TEMPLATE(in_beep, "in%d_beep", 0644, nct6775_show_beep, nct6775_store_beep, 0); 1929 SENSOR_TEMPLATE_2(in_min, "in%d_min", 0644, show_in_reg, store_in_reg, 0, 1); 1930 SENSOR_TEMPLATE_2(in_max, "in%d_max", 0644, show_in_reg, store_in_reg, 0, 2); 1931 1932 /* 1933 * nct6775_in_is_visible uses the index into the following array 1934 * to determine if attributes should be created or not. 1935 * Any change in order or content must be matched. 1936 */ 1937 static struct sensor_device_template *nct6775_attributes_in_template[] = { 1938 &sensor_dev_template_in_input, 1939 &sensor_dev_template_in_alarm, 1940 &sensor_dev_template_in_beep, 1941 &sensor_dev_template_in_min, 1942 &sensor_dev_template_in_max, 1943 NULL 1944 }; 1945 1946 static const struct sensor_template_group nct6775_in_template_group = { 1947 .templates = nct6775_attributes_in_template, 1948 .is_visible = nct6775_in_is_visible, 1949 }; 1950 1951 static ssize_t 1952 show_fan(struct device *dev, struct device_attribute *attr, char *buf) 1953 { 1954 struct nct6775_data *data = nct6775_update_device(dev); 1955 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1956 int nr = sattr->index; 1957 1958 if (IS_ERR(data)) 1959 return PTR_ERR(data); 1960 1961 return sysfs_emit(buf, "%d\n", data->rpm[nr]); 1962 } 1963 1964 static ssize_t 1965 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf) 1966 { 1967 struct nct6775_data *data = nct6775_update_device(dev); 1968 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1969 int nr = sattr->index; 1970 1971 if (IS_ERR(data)) 1972 return PTR_ERR(data); 1973 1974 return sysfs_emit(buf, "%d\n", 1975 data->fan_from_reg_min(data->fan_min[nr], 1976 data->fan_div[nr])); 1977 } 1978 1979 static ssize_t 1980 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf) 1981 { 1982 struct nct6775_data *data = nct6775_update_device(dev); 1983 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1984 int nr = sattr->index; 1985 1986 if (IS_ERR(data)) 1987 return PTR_ERR(data); 1988 1989 return sysfs_emit(buf, "%u\n", div_from_reg(data->fan_div[nr])); 1990 } 1991 1992 static ssize_t 1993 store_fan_min(struct device *dev, struct device_attribute *attr, 1994 const char *buf, size_t count) 1995 { 1996 struct nct6775_data *data = dev_get_drvdata(dev); 1997 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1998 int nr = sattr->index; 1999 unsigned long val; 2000 unsigned int reg; 2001 u8 new_div; 2002 int err; 2003 2004 err = kstrtoul(buf, 10, &val); 2005 if (err < 0) 2006 return err; 2007 2008 mutex_lock(&data->update_lock); 2009 if (!data->has_fan_div) { 2010 /* NCT6776F or NCT6779D; we know this is a 13 bit register */ 2011 if (!val) { 2012 val = 0xff1f; 2013 } else { 2014 if (val > 1350000U) 2015 val = 135000U; 2016 val = 1350000U / val; 2017 val = (val & 0x1f) | ((val << 3) & 0xff00); 2018 } 2019 data->fan_min[nr] = val; 2020 goto write_min; /* Leave fan divider alone */ 2021 } 2022 if (!val) { 2023 /* No min limit, alarm disabled */ 2024 data->fan_min[nr] = 255; 2025 new_div = data->fan_div[nr]; /* No change */ 2026 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1); 2027 goto write_div; 2028 } 2029 reg = 1350000U / val; 2030 if (reg >= 128 * 255) { 2031 /* 2032 * Speed below this value cannot possibly be represented, 2033 * even with the highest divider (128) 2034 */ 2035 data->fan_min[nr] = 254; 2036 new_div = 7; /* 128 == BIT(7) */ 2037 dev_warn(dev, 2038 "fan%u low limit %lu below minimum %u, set to minimum\n", 2039 nr + 1, val, data->fan_from_reg_min(254, 7)); 2040 } else if (!reg) { 2041 /* 2042 * Speed above this value cannot possibly be represented, 2043 * even with the lowest divider (1) 2044 */ 2045 data->fan_min[nr] = 1; 2046 new_div = 0; /* 1 == BIT(0) */ 2047 dev_warn(dev, 2048 "fan%u low limit %lu above maximum %u, set to maximum\n", 2049 nr + 1, val, data->fan_from_reg_min(1, 0)); 2050 } else { 2051 /* 2052 * Automatically pick the best divider, i.e. the one such 2053 * that the min limit will correspond to a register value 2054 * in the 96..192 range 2055 */ 2056 new_div = 0; 2057 while (reg > 192 && new_div < 7) { 2058 reg >>= 1; 2059 new_div++; 2060 } 2061 data->fan_min[nr] = reg; 2062 } 2063 2064 write_div: 2065 /* 2066 * Write both the fan clock divider (if it changed) and the new 2067 * fan min (unconditionally) 2068 */ 2069 if (new_div != data->fan_div[nr]) { 2070 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n", 2071 nr + 1, div_from_reg(data->fan_div[nr]), 2072 div_from_reg(new_div)); 2073 data->fan_div[nr] = new_div; 2074 err = nct6775_write_fan_div_common(data, nr); 2075 if (err) 2076 goto write_min; 2077 /* Give the chip time to sample a new speed value */ 2078 data->last_updated = jiffies; 2079 } 2080 2081 write_min: 2082 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]); 2083 mutex_unlock(&data->update_lock); 2084 2085 return err ? : count; 2086 } 2087 2088 static ssize_t 2089 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf) 2090 { 2091 struct nct6775_data *data = nct6775_update_device(dev); 2092 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2093 int p; 2094 2095 if (IS_ERR(data)) 2096 return PTR_ERR(data); 2097 2098 p = data->fan_pulses[sattr->index]; 2099 return sysfs_emit(buf, "%d\n", p ? : 4); 2100 } 2101 2102 static ssize_t 2103 store_fan_pulses(struct device *dev, struct device_attribute *attr, 2104 const char *buf, size_t count) 2105 { 2106 struct nct6775_data *data = dev_get_drvdata(dev); 2107 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2108 int nr = sattr->index; 2109 unsigned long val; 2110 int err; 2111 u16 reg; 2112 2113 err = kstrtoul(buf, 10, &val); 2114 if (err < 0) 2115 return err; 2116 2117 if (val > 4) 2118 return -EINVAL; 2119 2120 mutex_lock(&data->update_lock); 2121 data->fan_pulses[nr] = val & 3; 2122 err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], ®); 2123 if (err) 2124 goto out; 2125 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]); 2126 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr]; 2127 err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg); 2128 out: 2129 mutex_unlock(&data->update_lock); 2130 2131 return err ? : count; 2132 } 2133 2134 static umode_t nct6775_fan_is_visible(struct kobject *kobj, 2135 struct attribute *attr, int index) 2136 { 2137 struct device *dev = kobj_to_dev(kobj); 2138 struct nct6775_data *data = dev_get_drvdata(dev); 2139 int fan = index / 6; /* fan index */ 2140 int nr = index % 6; /* attribute index */ 2141 2142 if (!(data->has_fan & BIT(fan))) 2143 return 0; 2144 2145 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1) 2146 return 0; 2147 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1) 2148 return 0; 2149 if (nr == 3 && !data->REG_FAN_PULSES[fan]) 2150 return 0; 2151 if (nr == 4 && !(data->has_fan_min & BIT(fan))) 2152 return 0; 2153 if (nr == 5 && data->kind != nct6775) 2154 return 0; 2155 2156 return nct6775_attr_mode(data, attr); 2157 } 2158 2159 SENSOR_TEMPLATE(fan_input, "fan%d_input", 0444, show_fan, NULL, 0); 2160 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", 0444, nct6775_show_alarm, NULL, FAN_ALARM_BASE); 2161 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", 0644, nct6775_show_beep, 2162 nct6775_store_beep, FAN_ALARM_BASE); 2163 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", 0644, show_fan_pulses, store_fan_pulses, 0); 2164 SENSOR_TEMPLATE(fan_min, "fan%d_min", 0644, show_fan_min, store_fan_min, 0); 2165 SENSOR_TEMPLATE(fan_div, "fan%d_div", 0444, show_fan_div, NULL, 0); 2166 2167 /* 2168 * nct6775_fan_is_visible uses the index into the following array 2169 * to determine if attributes should be created or not. 2170 * Any change in order or content must be matched. 2171 */ 2172 static struct sensor_device_template *nct6775_attributes_fan_template[] = { 2173 &sensor_dev_template_fan_input, 2174 &sensor_dev_template_fan_alarm, /* 1 */ 2175 &sensor_dev_template_fan_beep, /* 2 */ 2176 &sensor_dev_template_fan_pulses, 2177 &sensor_dev_template_fan_min, /* 4 */ 2178 &sensor_dev_template_fan_div, /* 5 */ 2179 NULL 2180 }; 2181 2182 static const struct sensor_template_group nct6775_fan_template_group = { 2183 .templates = nct6775_attributes_fan_template, 2184 .is_visible = nct6775_fan_is_visible, 2185 .base = 1, 2186 }; 2187 2188 static ssize_t 2189 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf) 2190 { 2191 struct nct6775_data *data = nct6775_update_device(dev); 2192 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2193 int nr = sattr->index; 2194 2195 if (IS_ERR(data)) 2196 return PTR_ERR(data); 2197 2198 return sysfs_emit(buf, "%s\n", data->temp_label[data->temp_src[nr]]); 2199 } 2200 2201 static ssize_t 2202 show_temp(struct device *dev, struct device_attribute *attr, char *buf) 2203 { 2204 struct nct6775_data *data = nct6775_update_device(dev); 2205 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2206 int nr = sattr->nr; 2207 int index = sattr->index; 2208 2209 if (IS_ERR(data)) 2210 return PTR_ERR(data); 2211 2212 return sysfs_emit(buf, "%d\n", 2213 LM75_TEMP_FROM_REG(data->temp[index][nr])); 2214 } 2215 2216 static ssize_t 2217 store_temp(struct device *dev, struct device_attribute *attr, const char *buf, 2218 size_t count) 2219 { 2220 struct nct6775_data *data = dev_get_drvdata(dev); 2221 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2222 int nr = sattr->nr; 2223 int index = sattr->index; 2224 int err; 2225 long val; 2226 2227 err = kstrtol(buf, 10, &val); 2228 if (err < 0) 2229 return err; 2230 2231 mutex_lock(&data->update_lock); 2232 data->temp[index][nr] = LM75_TEMP_TO_REG(val); 2233 err = nct6775_write_temp(data, data->reg_temp[index][nr], data->temp[index][nr]); 2234 mutex_unlock(&data->update_lock); 2235 return err ? : count; 2236 } 2237 2238 static ssize_t 2239 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf) 2240 { 2241 struct nct6775_data *data = nct6775_update_device(dev); 2242 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2243 2244 if (IS_ERR(data)) 2245 return PTR_ERR(data); 2246 2247 return sysfs_emit(buf, "%d\n", data->temp_offset[sattr->index] * 1000); 2248 } 2249 2250 static ssize_t 2251 store_temp_offset(struct device *dev, struct device_attribute *attr, 2252 const char *buf, size_t count) 2253 { 2254 struct nct6775_data *data = dev_get_drvdata(dev); 2255 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2256 int nr = sattr->index; 2257 long val; 2258 int err; 2259 2260 err = kstrtol(buf, 10, &val); 2261 if (err < 0) 2262 return err; 2263 2264 val = DIV_ROUND_CLOSEST(clamp_val(val, -128000, 127000), 1000); 2265 2266 mutex_lock(&data->update_lock); 2267 data->temp_offset[nr] = val; 2268 err = nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val); 2269 mutex_unlock(&data->update_lock); 2270 2271 return err ? : count; 2272 } 2273 2274 static ssize_t 2275 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf) 2276 { 2277 struct nct6775_data *data = nct6775_update_device(dev); 2278 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2279 int nr = sattr->index; 2280 2281 if (IS_ERR(data)) 2282 return PTR_ERR(data); 2283 2284 return sysfs_emit(buf, "%d\n", (int)data->temp_type[nr]); 2285 } 2286 2287 static ssize_t 2288 store_temp_type(struct device *dev, struct device_attribute *attr, 2289 const char *buf, size_t count) 2290 { 2291 struct nct6775_data *data = nct6775_update_device(dev); 2292 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2293 int nr = sattr->index; 2294 unsigned long val; 2295 int err; 2296 u8 vbit, dbit; 2297 u16 vbat, diode; 2298 2299 if (IS_ERR(data)) 2300 return PTR_ERR(data); 2301 2302 err = kstrtoul(buf, 10, &val); 2303 if (err < 0) 2304 return err; 2305 2306 if (val != 1 && val != 3 && val != 4) 2307 return -EINVAL; 2308 2309 mutex_lock(&data->update_lock); 2310 2311 data->temp_type[nr] = val; 2312 vbit = 0x02 << nr; 2313 dbit = data->DIODE_MASK << nr; 2314 2315 err = nct6775_read_value(data, data->REG_VBAT, &vbat); 2316 if (err) 2317 goto out; 2318 vbat &= ~vbit; 2319 2320 err = nct6775_read_value(data, data->REG_DIODE, &diode); 2321 if (err) 2322 goto out; 2323 diode &= ~dbit; 2324 2325 switch (val) { 2326 case 1: /* CPU diode (diode, current mode) */ 2327 vbat |= vbit; 2328 diode |= dbit; 2329 break; 2330 case 3: /* diode, voltage mode */ 2331 vbat |= dbit; 2332 break; 2333 case 4: /* thermistor */ 2334 break; 2335 } 2336 err = nct6775_write_value(data, data->REG_VBAT, vbat); 2337 if (err) 2338 goto out; 2339 err = nct6775_write_value(data, data->REG_DIODE, diode); 2340 out: 2341 mutex_unlock(&data->update_lock); 2342 return err ? : count; 2343 } 2344 2345 static umode_t nct6775_temp_is_visible(struct kobject *kobj, 2346 struct attribute *attr, int index) 2347 { 2348 struct device *dev = kobj_to_dev(kobj); 2349 struct nct6775_data *data = dev_get_drvdata(dev); 2350 int temp = index / 10; /* temp index */ 2351 int nr = index % 10; /* attribute index */ 2352 2353 if (!(data->have_temp & BIT(temp))) 2354 return 0; 2355 2356 if (nr == 1 && !data->temp_label) 2357 return 0; 2358 2359 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0) 2360 return 0; /* alarm */ 2361 2362 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0) 2363 return 0; /* beep */ 2364 2365 if (nr == 4 && !data->reg_temp[1][temp]) /* max */ 2366 return 0; 2367 2368 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */ 2369 return 0; 2370 2371 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */ 2372 return 0; 2373 2374 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */ 2375 return 0; 2376 2377 /* offset and type only apply to fixed sensors */ 2378 if (nr > 7 && !(data->have_temp_fixed & BIT(temp))) 2379 return 0; 2380 2381 return nct6775_attr_mode(data, attr); 2382 } 2383 2384 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", 0444, show_temp, NULL, 0, 0); 2385 SENSOR_TEMPLATE(temp_label, "temp%d_label", 0444, show_temp_label, NULL, 0); 2386 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", 0644, show_temp, store_temp, 0, 1); 2387 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", 0644, show_temp, store_temp, 0, 2); 2388 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", 0644, show_temp, store_temp, 0, 3); 2389 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", 0644, show_temp, store_temp, 0, 4); 2390 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", 0644, show_temp_offset, store_temp_offset, 0); 2391 SENSOR_TEMPLATE(temp_type, "temp%d_type", 0644, show_temp_type, store_temp_type, 0); 2392 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", 0444, show_temp_alarm, NULL, 0); 2393 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", 0644, show_temp_beep, store_temp_beep, 0); 2394 2395 /* 2396 * nct6775_temp_is_visible uses the index into the following array 2397 * to determine if attributes should be created or not. 2398 * Any change in order or content must be matched. 2399 */ 2400 static struct sensor_device_template *nct6775_attributes_temp_template[] = { 2401 &sensor_dev_template_temp_input, 2402 &sensor_dev_template_temp_label, 2403 &sensor_dev_template_temp_alarm, /* 2 */ 2404 &sensor_dev_template_temp_beep, /* 3 */ 2405 &sensor_dev_template_temp_max, /* 4 */ 2406 &sensor_dev_template_temp_max_hyst, /* 5 */ 2407 &sensor_dev_template_temp_crit, /* 6 */ 2408 &sensor_dev_template_temp_lcrit, /* 7 */ 2409 &sensor_dev_template_temp_offset, /* 8 */ 2410 &sensor_dev_template_temp_type, /* 9 */ 2411 NULL 2412 }; 2413 2414 static const struct sensor_template_group nct6775_temp_template_group = { 2415 .templates = nct6775_attributes_temp_template, 2416 .is_visible = nct6775_temp_is_visible, 2417 .base = 1, 2418 }; 2419 2420 static ssize_t show_tsi_temp(struct device *dev, struct device_attribute *attr, char *buf) 2421 { 2422 struct nct6775_data *data = nct6775_update_device(dev); 2423 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2424 2425 if (IS_ERR(data)) 2426 return PTR_ERR(data); 2427 2428 return sysfs_emit(buf, "%u\n", tsi_temp_from_reg(data->tsi_temp[sattr->index])); 2429 } 2430 2431 static ssize_t show_tsi_temp_label(struct device *dev, struct device_attribute *attr, char *buf) 2432 { 2433 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2434 2435 return sysfs_emit(buf, "TSI%d_TEMP\n", sattr->index); 2436 } 2437 2438 SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0); 2439 SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0); 2440 2441 static umode_t nct6775_tsi_temp_is_visible(struct kobject *kobj, struct attribute *attr, 2442 int index) 2443 { 2444 struct device *dev = kobj_to_dev(kobj); 2445 struct nct6775_data *data = dev_get_drvdata(dev); 2446 int temp = index / 2; 2447 2448 return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0; 2449 } 2450 2451 /* 2452 * The index calculation in nct6775_tsi_temp_is_visible() must be kept in 2453 * sync with the size of this array. 2454 */ 2455 static struct sensor_device_template *nct6775_tsi_temp_template[] = { 2456 &sensor_dev_template_tsi_temp_input, 2457 &sensor_dev_template_tsi_temp_label, 2458 NULL 2459 }; 2460 2461 static ssize_t 2462 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf) 2463 { 2464 struct nct6775_data *data = nct6775_update_device(dev); 2465 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2466 2467 if (IS_ERR(data)) 2468 return PTR_ERR(data); 2469 2470 return sysfs_emit(buf, "%d\n", data->pwm_mode[sattr->index]); 2471 } 2472 2473 static ssize_t 2474 store_pwm_mode(struct device *dev, struct device_attribute *attr, 2475 const char *buf, size_t count) 2476 { 2477 struct nct6775_data *data = dev_get_drvdata(dev); 2478 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2479 int nr = sattr->index; 2480 unsigned long val; 2481 int err; 2482 u16 reg; 2483 2484 err = kstrtoul(buf, 10, &val); 2485 if (err < 0) 2486 return err; 2487 2488 if (val > 1) 2489 return -EINVAL; 2490 2491 /* Setting DC mode (0) is not supported for all chips/channels */ 2492 if (data->REG_PWM_MODE[nr] == 0) { 2493 if (!val) 2494 return -EINVAL; 2495 return count; 2496 } 2497 2498 mutex_lock(&data->update_lock); 2499 data->pwm_mode[nr] = val; 2500 err = nct6775_read_value(data, data->REG_PWM_MODE[nr], ®); 2501 if (err) 2502 goto out; 2503 reg &= ~data->PWM_MODE_MASK[nr]; 2504 if (!val) 2505 reg |= data->PWM_MODE_MASK[nr]; 2506 err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg); 2507 out: 2508 mutex_unlock(&data->update_lock); 2509 return err ? : count; 2510 } 2511 2512 static ssize_t 2513 show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 2514 { 2515 struct nct6775_data *data = nct6775_update_device(dev); 2516 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2517 int nr = sattr->nr; 2518 int index = sattr->index; 2519 int err; 2520 u16 pwm; 2521 2522 if (IS_ERR(data)) 2523 return PTR_ERR(data); 2524 2525 /* 2526 * For automatic fan control modes, show current pwm readings. 2527 * Otherwise, show the configured value. 2528 */ 2529 if (index == 0 && data->pwm_enable[nr] > manual) { 2530 err = nct6775_read_value(data, data->REG_PWM_READ[nr], &pwm); 2531 if (err) 2532 return err; 2533 } else { 2534 pwm = data->pwm[index][nr]; 2535 } 2536 2537 return sysfs_emit(buf, "%d\n", pwm); 2538 } 2539 2540 static ssize_t 2541 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf, 2542 size_t count) 2543 { 2544 struct nct6775_data *data = dev_get_drvdata(dev); 2545 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2546 int nr = sattr->nr; 2547 int index = sattr->index; 2548 unsigned long val; 2549 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 }; 2550 int maxval[7] 2551 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 }; 2552 int err; 2553 u16 reg; 2554 2555 /* 2556 * The fan control mode should be set to manual if the user wants to adjust 2557 * the fan speed. Otherwise, it will fail to set. 2558 */ 2559 if (index == 0 && data->pwm_enable[nr] > manual) 2560 return -EBUSY; 2561 2562 err = kstrtoul(buf, 10, &val); 2563 if (err < 0) 2564 return err; 2565 val = clamp_val(val, minval[index], maxval[index]); 2566 2567 mutex_lock(&data->update_lock); 2568 data->pwm[index][nr] = val; 2569 err = nct6775_write_value(data, data->REG_PWM[index][nr], val); 2570 if (err) 2571 goto out; 2572 if (index == 2) { /* floor: disable if val == 0 */ 2573 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®); 2574 if (err) 2575 goto out; 2576 reg &= 0x7f; 2577 if (val) 2578 reg |= 0x80; 2579 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg); 2580 } 2581 out: 2582 mutex_unlock(&data->update_lock); 2583 return err ? : count; 2584 } 2585 2586 /* Returns 0 if OK, -EINVAL otherwise */ 2587 static int check_trip_points(struct nct6775_data *data, int nr) 2588 { 2589 int i; 2590 2591 for (i = 0; i < data->auto_pwm_num - 1; i++) { 2592 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1]) 2593 return -EINVAL; 2594 } 2595 for (i = 0; i < data->auto_pwm_num - 1; i++) { 2596 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1]) 2597 return -EINVAL; 2598 } 2599 /* validate critical temperature and pwm if enabled (pwm > 0) */ 2600 if (data->auto_pwm[nr][data->auto_pwm_num]) { 2601 if (data->auto_temp[nr][data->auto_pwm_num - 1] > 2602 data->auto_temp[nr][data->auto_pwm_num] || 2603 data->auto_pwm[nr][data->auto_pwm_num - 1] > 2604 data->auto_pwm[nr][data->auto_pwm_num]) 2605 return -EINVAL; 2606 } 2607 return 0; 2608 } 2609 2610 static int pwm_update_registers(struct nct6775_data *data, int nr) 2611 { 2612 u16 reg; 2613 int err; 2614 2615 switch (data->pwm_enable[nr]) { 2616 case off: 2617 case manual: 2618 break; 2619 case speed_cruise: 2620 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2621 if (err) 2622 return err; 2623 reg = (reg & ~data->tolerance_mask) | 2624 (data->target_speed_tolerance[nr] & data->tolerance_mask); 2625 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2626 if (err) 2627 return err; 2628 err = nct6775_write_value(data, data->REG_TARGET[nr], 2629 data->target_speed[nr] & 0xff); 2630 if (err) 2631 return err; 2632 if (data->REG_TOLERANCE_H) { 2633 reg = (data->target_speed[nr] >> 8) & 0x0f; 2634 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1; 2635 err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg); 2636 if (err) 2637 return err; 2638 } 2639 break; 2640 case thermal_cruise: 2641 err = nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]); 2642 if (err) 2643 return err; 2644 fallthrough; 2645 default: 2646 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2647 if (err) 2648 return err; 2649 reg = (reg & ~data->tolerance_mask) | 2650 data->temp_tolerance[0][nr]; 2651 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2652 if (err) 2653 return err; 2654 break; 2655 } 2656 2657 return 0; 2658 } 2659 2660 static ssize_t 2661 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 2662 { 2663 struct nct6775_data *data = nct6775_update_device(dev); 2664 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2665 2666 if (IS_ERR(data)) 2667 return PTR_ERR(data); 2668 2669 return sysfs_emit(buf, "%d\n", data->pwm_enable[sattr->index]); 2670 } 2671 2672 static ssize_t 2673 store_pwm_enable(struct device *dev, struct device_attribute *attr, 2674 const char *buf, size_t count) 2675 { 2676 struct nct6775_data *data = dev_get_drvdata(dev); 2677 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2678 int nr = sattr->index; 2679 unsigned long val; 2680 int err; 2681 u16 reg; 2682 2683 err = kstrtoul(buf, 10, &val); 2684 if (err < 0) 2685 return err; 2686 2687 if (val > sf4) 2688 return -EINVAL; 2689 2690 if (val == sf3 && data->kind != nct6775) 2691 return -EINVAL; 2692 2693 if (val == sf4 && check_trip_points(data, nr)) { 2694 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n"); 2695 dev_err(dev, "Adjust trip points and try again\n"); 2696 return -EINVAL; 2697 } 2698 2699 mutex_lock(&data->update_lock); 2700 data->pwm_enable[nr] = val; 2701 if (val == off) { 2702 /* 2703 * turn off pwm control: select manual mode, set pwm to maximum 2704 */ 2705 data->pwm[0][nr] = 255; 2706 err = nct6775_write_value(data, data->REG_PWM[0][nr], 255); 2707 if (err) 2708 goto out; 2709 } 2710 err = pwm_update_registers(data, nr); 2711 if (err) 2712 goto out; 2713 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2714 if (err) 2715 goto out; 2716 reg &= 0x0f; 2717 reg |= pwm_enable_to_reg(val) << 4; 2718 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2719 out: 2720 mutex_unlock(&data->update_lock); 2721 return err ? : count; 2722 } 2723 2724 static ssize_t 2725 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src) 2726 { 2727 int i, sel = 0; 2728 2729 for (i = 0; i < NUM_TEMP; i++) { 2730 if (!(data->have_temp & BIT(i))) 2731 continue; 2732 if (src == data->temp_src[i]) { 2733 sel = i + 1; 2734 break; 2735 } 2736 } 2737 2738 return sysfs_emit(buf, "%d\n", sel); 2739 } 2740 2741 static ssize_t 2742 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf) 2743 { 2744 struct nct6775_data *data = nct6775_update_device(dev); 2745 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2746 int index = sattr->index; 2747 2748 if (IS_ERR(data)) 2749 return PTR_ERR(data); 2750 2751 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]); 2752 } 2753 2754 static ssize_t 2755 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr, 2756 const char *buf, size_t count) 2757 { 2758 struct nct6775_data *data = nct6775_update_device(dev); 2759 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2760 int nr = sattr->index; 2761 unsigned long val; 2762 int err, src; 2763 u16 reg; 2764 2765 if (IS_ERR(data)) 2766 return PTR_ERR(data); 2767 2768 err = kstrtoul(buf, 10, &val); 2769 if (err < 0) 2770 return err; 2771 if (val == 0 || val > NUM_TEMP) 2772 return -EINVAL; 2773 if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1]) 2774 return -EINVAL; 2775 2776 mutex_lock(&data->update_lock); 2777 src = data->temp_src[val - 1]; 2778 data->pwm_temp_sel[nr] = src; 2779 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®); 2780 if (err) 2781 goto out; 2782 reg &= 0xe0; 2783 reg |= src; 2784 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg); 2785 out: 2786 mutex_unlock(&data->update_lock); 2787 2788 return err ? : count; 2789 } 2790 2791 static ssize_t 2792 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr, 2793 char *buf) 2794 { 2795 struct nct6775_data *data = nct6775_update_device(dev); 2796 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2797 int index = sattr->index; 2798 2799 if (IS_ERR(data)) 2800 return PTR_ERR(data); 2801 2802 return show_pwm_temp_sel_common(data, buf, 2803 data->pwm_weight_temp_sel[index]); 2804 } 2805 2806 static ssize_t 2807 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr, 2808 const char *buf, size_t count) 2809 { 2810 struct nct6775_data *data = nct6775_update_device(dev); 2811 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2812 int nr = sattr->index; 2813 unsigned long val; 2814 int err, src; 2815 u16 reg; 2816 2817 if (IS_ERR(data)) 2818 return PTR_ERR(data); 2819 2820 err = kstrtoul(buf, 10, &val); 2821 if (err < 0) 2822 return err; 2823 if (val > NUM_TEMP) 2824 return -EINVAL; 2825 val = array_index_nospec(val, NUM_TEMP + 1); 2826 if (val && (!(data->have_temp & BIT(val - 1)) || 2827 !data->temp_src[val - 1])) 2828 return -EINVAL; 2829 2830 mutex_lock(&data->update_lock); 2831 if (val) { 2832 src = data->temp_src[val - 1]; 2833 data->pwm_weight_temp_sel[nr] = src; 2834 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®); 2835 if (err) 2836 goto out; 2837 reg &= 0xe0; 2838 reg |= (src | 0x80); 2839 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg); 2840 } else { 2841 data->pwm_weight_temp_sel[nr] = 0; 2842 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®); 2843 if (err) 2844 goto out; 2845 reg &= 0x7f; 2846 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg); 2847 } 2848 out: 2849 mutex_unlock(&data->update_lock); 2850 2851 return err ? : count; 2852 } 2853 2854 static ssize_t 2855 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf) 2856 { 2857 struct nct6775_data *data = nct6775_update_device(dev); 2858 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2859 2860 if (IS_ERR(data)) 2861 return PTR_ERR(data); 2862 2863 return sysfs_emit(buf, "%d\n", data->target_temp[sattr->index] * 1000); 2864 } 2865 2866 static ssize_t 2867 store_target_temp(struct device *dev, struct device_attribute *attr, 2868 const char *buf, size_t count) 2869 { 2870 struct nct6775_data *data = dev_get_drvdata(dev); 2871 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2872 int nr = sattr->index; 2873 unsigned long val; 2874 int err; 2875 2876 err = kstrtoul(buf, 10, &val); 2877 if (err < 0) 2878 return err; 2879 2880 val = DIV_ROUND_CLOSEST(clamp_val(val, 0, data->target_temp_mask * 1000), 1000); 2881 2882 mutex_lock(&data->update_lock); 2883 data->target_temp[nr] = val; 2884 err = pwm_update_registers(data, nr); 2885 mutex_unlock(&data->update_lock); 2886 return err ? : count; 2887 } 2888 2889 static ssize_t 2890 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf) 2891 { 2892 struct nct6775_data *data = nct6775_update_device(dev); 2893 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2894 int nr = sattr->index; 2895 2896 if (IS_ERR(data)) 2897 return PTR_ERR(data); 2898 2899 return sysfs_emit(buf, "%d\n", 2900 fan_from_reg16(data->target_speed[nr], 2901 data->fan_div[nr])); 2902 } 2903 2904 static ssize_t 2905 store_target_speed(struct device *dev, struct device_attribute *attr, 2906 const char *buf, size_t count) 2907 { 2908 struct nct6775_data *data = dev_get_drvdata(dev); 2909 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2910 int nr = sattr->index; 2911 unsigned long val; 2912 int err; 2913 u16 speed; 2914 2915 err = kstrtoul(buf, 10, &val); 2916 if (err < 0) 2917 return err; 2918 2919 val = clamp_val(val, 0, 1350000U); 2920 speed = fan_to_reg(val, data->fan_div[nr]); 2921 2922 mutex_lock(&data->update_lock); 2923 data->target_speed[nr] = speed; 2924 err = pwm_update_registers(data, nr); 2925 mutex_unlock(&data->update_lock); 2926 return err ? : count; 2927 } 2928 2929 static ssize_t 2930 show_temp_tolerance(struct device *dev, struct device_attribute *attr, 2931 char *buf) 2932 { 2933 struct nct6775_data *data = nct6775_update_device(dev); 2934 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2935 int nr = sattr->nr; 2936 int index = sattr->index; 2937 2938 if (IS_ERR(data)) 2939 return PTR_ERR(data); 2940 2941 return sysfs_emit(buf, "%d\n", data->temp_tolerance[index][nr] * 1000); 2942 } 2943 2944 static ssize_t 2945 store_temp_tolerance(struct device *dev, struct device_attribute *attr, 2946 const char *buf, size_t count) 2947 { 2948 struct nct6775_data *data = dev_get_drvdata(dev); 2949 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2950 int nr = sattr->nr; 2951 int index = sattr->index; 2952 unsigned long val; 2953 int err; 2954 2955 err = kstrtoul(buf, 10, &val); 2956 if (err < 0) 2957 return err; 2958 2959 /* Limit tolerance as needed */ 2960 val = DIV_ROUND_CLOSEST(clamp_val(val, 0, data->tolerance_mask * 1000), 1000); 2961 2962 mutex_lock(&data->update_lock); 2963 data->temp_tolerance[index][nr] = val; 2964 if (index) 2965 err = pwm_update_registers(data, nr); 2966 else 2967 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[nr], val); 2968 mutex_unlock(&data->update_lock); 2969 return err ? : count; 2970 } 2971 2972 /* 2973 * Fan speed tolerance is a tricky beast, since the associated register is 2974 * a tick counter, but the value is reported and configured as rpm. 2975 * Compute resulting low and high rpm values and report the difference. 2976 * A fan speed tolerance only makes sense if a fan target speed has been 2977 * configured, so only display values other than 0 if that is the case. 2978 */ 2979 static ssize_t 2980 show_speed_tolerance(struct device *dev, struct device_attribute *attr, 2981 char *buf) 2982 { 2983 struct nct6775_data *data = nct6775_update_device(dev); 2984 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2985 int nr = sattr->index; 2986 int target, tolerance = 0; 2987 2988 if (IS_ERR(data)) 2989 return PTR_ERR(data); 2990 2991 target = data->target_speed[nr]; 2992 2993 if (target) { 2994 int low = target - data->target_speed_tolerance[nr]; 2995 int high = target + data->target_speed_tolerance[nr]; 2996 2997 if (low <= 0) 2998 low = 1; 2999 if (high > 0xffff) 3000 high = 0xffff; 3001 if (high < low) 3002 high = low; 3003 3004 tolerance = (fan_from_reg16(low, data->fan_div[nr]) 3005 - fan_from_reg16(high, data->fan_div[nr])) / 2; 3006 } 3007 3008 return sysfs_emit(buf, "%d\n", tolerance); 3009 } 3010 3011 static ssize_t 3012 store_speed_tolerance(struct device *dev, struct device_attribute *attr, 3013 const char *buf, size_t count) 3014 { 3015 struct nct6775_data *data = dev_get_drvdata(dev); 3016 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 3017 int nr = sattr->index; 3018 unsigned long val; 3019 int err; 3020 int low, high; 3021 3022 err = kstrtoul(buf, 10, &val); 3023 if (err < 0) 3024 return err; 3025 3026 high = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) + val; 3027 low = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) - val; 3028 if (low <= 0) 3029 low = 1; 3030 if (high < low) 3031 high = low; 3032 3033 val = (fan_to_reg(low, data->fan_div[nr]) - 3034 fan_to_reg(high, data->fan_div[nr])) / 2; 3035 3036 /* Limit tolerance as needed */ 3037 val = clamp_val(val, 0, data->speed_tolerance_limit); 3038 3039 mutex_lock(&data->update_lock); 3040 data->target_speed_tolerance[nr] = val; 3041 err = pwm_update_registers(data, nr); 3042 mutex_unlock(&data->update_lock); 3043 return err ? : count; 3044 } 3045 3046 SENSOR_TEMPLATE_2(pwm, "pwm%d", 0644, show_pwm, store_pwm, 0, 0); 3047 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", 0644, show_pwm_mode, store_pwm_mode, 0); 3048 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", 0644, show_pwm_enable, store_pwm_enable, 0); 3049 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", 0644, show_pwm_temp_sel, store_pwm_temp_sel, 0); 3050 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", 0644, show_target_temp, store_target_temp, 0); 3051 SENSOR_TEMPLATE(fan_target, "fan%d_target", 0644, show_target_speed, store_target_speed, 0); 3052 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", 0644, show_speed_tolerance, 3053 store_speed_tolerance, 0); 3054 3055 /* Smart Fan registers */ 3056 3057 static ssize_t 3058 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf) 3059 { 3060 struct nct6775_data *data = nct6775_update_device(dev); 3061 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3062 int nr = sattr->nr; 3063 int index = sattr->index; 3064 3065 if (IS_ERR(data)) 3066 return PTR_ERR(data); 3067 3068 return sysfs_emit(buf, "%d\n", data->weight_temp[index][nr] * 1000); 3069 } 3070 3071 static ssize_t 3072 store_weight_temp(struct device *dev, struct device_attribute *attr, 3073 const char *buf, size_t count) 3074 { 3075 struct nct6775_data *data = dev_get_drvdata(dev); 3076 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3077 int nr = sattr->nr; 3078 int index = sattr->index; 3079 unsigned long val; 3080 int err; 3081 3082 err = kstrtoul(buf, 10, &val); 3083 if (err < 0) 3084 return err; 3085 3086 val = DIV_ROUND_CLOSEST(clamp_val(val, 0, 255000), 1000); 3087 3088 mutex_lock(&data->update_lock); 3089 data->weight_temp[index][nr] = val; 3090 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val); 3091 mutex_unlock(&data->update_lock); 3092 return err ? : count; 3093 } 3094 3095 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", 0644, 3096 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0); 3097 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step", 3098 0644, show_weight_temp, store_weight_temp, 0, 0); 3099 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol", 3100 0644, show_weight_temp, store_weight_temp, 0, 1); 3101 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base", 3102 0644, show_weight_temp, store_weight_temp, 0, 2); 3103 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step", 0644, show_pwm, store_pwm, 0, 5); 3104 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base", 0644, show_pwm, store_pwm, 0, 6); 3105 3106 static ssize_t 3107 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf) 3108 { 3109 struct nct6775_data *data = nct6775_update_device(dev); 3110 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3111 int nr = sattr->nr; 3112 int index = sattr->index; 3113 3114 if (IS_ERR(data)) 3115 return PTR_ERR(data); 3116 3117 return sysfs_emit(buf, "%d\n", 3118 step_time_from_reg(data->fan_time[index][nr], 3119 data->pwm_mode[nr])); 3120 } 3121 3122 static ssize_t 3123 store_fan_time(struct device *dev, struct device_attribute *attr, 3124 const char *buf, size_t count) 3125 { 3126 struct nct6775_data *data = dev_get_drvdata(dev); 3127 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3128 int nr = sattr->nr; 3129 int index = sattr->index; 3130 unsigned long val; 3131 int err; 3132 3133 err = kstrtoul(buf, 10, &val); 3134 if (err < 0) 3135 return err; 3136 3137 val = step_time_to_reg(val, data->pwm_mode[nr]); 3138 mutex_lock(&data->update_lock); 3139 data->fan_time[index][nr] = val; 3140 err = nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val); 3141 mutex_unlock(&data->update_lock); 3142 return err ? : count; 3143 } 3144 3145 static ssize_t 3146 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf) 3147 { 3148 struct nct6775_data *data = nct6775_update_device(dev); 3149 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3150 3151 if (IS_ERR(data)) 3152 return PTR_ERR(data); 3153 3154 return sysfs_emit(buf, "%d\n", 3155 data->auto_pwm[sattr->nr][sattr->index]); 3156 } 3157 3158 static ssize_t 3159 store_auto_pwm(struct device *dev, struct device_attribute *attr, 3160 const char *buf, size_t count) 3161 { 3162 struct nct6775_data *data = dev_get_drvdata(dev); 3163 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3164 int nr = sattr->nr; 3165 int point = sattr->index; 3166 unsigned long val; 3167 int err; 3168 u16 reg; 3169 3170 err = kstrtoul(buf, 10, &val); 3171 if (err < 0) 3172 return err; 3173 if (val > 255) 3174 return -EINVAL; 3175 3176 if (point == data->auto_pwm_num) { 3177 if (data->kind != nct6775 && !val) 3178 return -EINVAL; 3179 if (data->kind != nct6779 && val) 3180 val = 0xff; 3181 } 3182 3183 mutex_lock(&data->update_lock); 3184 data->auto_pwm[nr][point] = val; 3185 if (point < data->auto_pwm_num) { 3186 err = nct6775_write_value(data, NCT6775_AUTO_PWM(data, nr, point), 3187 data->auto_pwm[nr][point]); 3188 } else { 3189 switch (data->kind) { 3190 case nct6775: 3191 /* disable if needed (pwm == 0) */ 3192 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], ®); 3193 if (err) 3194 break; 3195 if (val) 3196 reg |= 0x02; 3197 else 3198 reg &= ~0x02; 3199 err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg); 3200 break; 3201 case nct6776: 3202 break; /* always enabled, nothing to do */ 3203 case nct6106: 3204 case nct6116: 3205 case nct6779: 3206 case nct6791: 3207 case nct6792: 3208 case nct6793: 3209 case nct6795: 3210 case nct6796: 3211 case nct6797: 3212 case nct6798: 3213 case nct6799: 3214 err = nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], val); 3215 if (err) 3216 break; 3217 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], ®); 3218 if (err) 3219 break; 3220 if (val == 255) 3221 reg &= ~data->CRITICAL_PWM_ENABLE_MASK; 3222 else 3223 reg |= data->CRITICAL_PWM_ENABLE_MASK; 3224 err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg); 3225 break; 3226 } 3227 } 3228 mutex_unlock(&data->update_lock); 3229 return err ? : count; 3230 } 3231 3232 static ssize_t 3233 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf) 3234 { 3235 struct nct6775_data *data = nct6775_update_device(dev); 3236 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3237 int nr = sattr->nr; 3238 int point = sattr->index; 3239 3240 if (IS_ERR(data)) 3241 return PTR_ERR(data); 3242 3243 /* 3244 * We don't know for sure if the temperature is signed or unsigned. 3245 * Assume it is unsigned. 3246 */ 3247 return sysfs_emit(buf, "%d\n", data->auto_temp[nr][point] * 1000); 3248 } 3249 3250 static ssize_t 3251 store_auto_temp(struct device *dev, struct device_attribute *attr, 3252 const char *buf, size_t count) 3253 { 3254 struct nct6775_data *data = dev_get_drvdata(dev); 3255 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3256 int nr = sattr->nr; 3257 int point = sattr->index; 3258 unsigned long val; 3259 int err; 3260 3261 err = kstrtoul(buf, 10, &val); 3262 if (err) 3263 return err; 3264 if (val > 255000) 3265 return -EINVAL; 3266 3267 mutex_lock(&data->update_lock); 3268 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000); 3269 if (point < data->auto_pwm_num) { 3270 err = nct6775_write_value(data, NCT6775_AUTO_TEMP(data, nr, point), 3271 data->auto_temp[nr][point]); 3272 } else { 3273 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr], 3274 data->auto_temp[nr][point]); 3275 } 3276 mutex_unlock(&data->update_lock); 3277 return err ? : count; 3278 } 3279 3280 static umode_t nct6775_pwm_is_visible(struct kobject *kobj, 3281 struct attribute *attr, int index) 3282 { 3283 struct device *dev = kobj_to_dev(kobj); 3284 struct nct6775_data *data = dev_get_drvdata(dev); 3285 int pwm = index / 36; /* pwm index */ 3286 int nr = index % 36; /* attribute index */ 3287 3288 if (!(data->has_pwm & BIT(pwm))) 3289 return 0; 3290 3291 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */ 3292 if (!data->REG_WEIGHT_TEMP_SEL[pwm]) 3293 return 0; 3294 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */ 3295 return 0; 3296 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */ 3297 return 0; 3298 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */ 3299 return 0; 3300 3301 if (nr >= 22 && nr <= 35) { /* auto point */ 3302 int api = (nr - 22) / 2; /* auto point index */ 3303 3304 if (api > data->auto_pwm_num) 3305 return 0; 3306 } 3307 return nct6775_attr_mode(data, attr); 3308 } 3309 3310 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", 0644, show_fan_time, store_fan_time, 0, 0); 3311 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", 0644, 3312 show_fan_time, store_fan_time, 0, 1); 3313 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", 0644, 3314 show_fan_time, store_fan_time, 0, 2); 3315 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", 0644, show_pwm, store_pwm, 0, 1); 3316 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", 0644, show_pwm, store_pwm, 0, 2); 3317 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", 0644, 3318 show_temp_tolerance, store_temp_tolerance, 0, 0); 3319 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance", 3320 0644, show_temp_tolerance, store_temp_tolerance, 0, 1); 3321 3322 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", 0644, show_pwm, store_pwm, 0, 3); 3323 3324 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", 0644, show_pwm, store_pwm, 0, 4); 3325 3326 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm", 3327 0644, show_auto_pwm, store_auto_pwm, 0, 0); 3328 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp", 3329 0644, show_auto_temp, store_auto_temp, 0, 0); 3330 3331 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm", 3332 0644, show_auto_pwm, store_auto_pwm, 0, 1); 3333 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp", 3334 0644, show_auto_temp, store_auto_temp, 0, 1); 3335 3336 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm", 3337 0644, show_auto_pwm, store_auto_pwm, 0, 2); 3338 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp", 3339 0644, show_auto_temp, store_auto_temp, 0, 2); 3340 3341 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm", 3342 0644, show_auto_pwm, store_auto_pwm, 0, 3); 3343 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp", 3344 0644, show_auto_temp, store_auto_temp, 0, 3); 3345 3346 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm", 3347 0644, show_auto_pwm, store_auto_pwm, 0, 4); 3348 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp", 3349 0644, show_auto_temp, store_auto_temp, 0, 4); 3350 3351 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm", 3352 0644, show_auto_pwm, store_auto_pwm, 0, 5); 3353 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp", 3354 0644, show_auto_temp, store_auto_temp, 0, 5); 3355 3356 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm", 3357 0644, show_auto_pwm, store_auto_pwm, 0, 6); 3358 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp", 3359 0644, show_auto_temp, store_auto_temp, 0, 6); 3360 3361 /* 3362 * nct6775_pwm_is_visible uses the index into the following array 3363 * to determine if attributes should be created or not. 3364 * Any change in order or content must be matched. 3365 */ 3366 static struct sensor_device_template *nct6775_attributes_pwm_template[] = { 3367 &sensor_dev_template_pwm, 3368 &sensor_dev_template_pwm_mode, 3369 &sensor_dev_template_pwm_enable, 3370 &sensor_dev_template_pwm_temp_sel, 3371 &sensor_dev_template_pwm_temp_tolerance, 3372 &sensor_dev_template_pwm_crit_temp_tolerance, 3373 &sensor_dev_template_pwm_target_temp, 3374 &sensor_dev_template_fan_target, 3375 &sensor_dev_template_fan_tolerance, 3376 &sensor_dev_template_pwm_stop_time, 3377 &sensor_dev_template_pwm_step_up_time, 3378 &sensor_dev_template_pwm_step_down_time, 3379 &sensor_dev_template_pwm_start, 3380 &sensor_dev_template_pwm_floor, 3381 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */ 3382 &sensor_dev_template_pwm_weight_temp_step, 3383 &sensor_dev_template_pwm_weight_temp_step_tol, 3384 &sensor_dev_template_pwm_weight_temp_step_base, 3385 &sensor_dev_template_pwm_weight_duty_step, /* 18 */ 3386 &sensor_dev_template_pwm_max, /* 19 */ 3387 &sensor_dev_template_pwm_step, /* 20 */ 3388 &sensor_dev_template_pwm_weight_duty_base, /* 21 */ 3389 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */ 3390 &sensor_dev_template_pwm_auto_point1_temp, 3391 &sensor_dev_template_pwm_auto_point2_pwm, 3392 &sensor_dev_template_pwm_auto_point2_temp, 3393 &sensor_dev_template_pwm_auto_point3_pwm, 3394 &sensor_dev_template_pwm_auto_point3_temp, 3395 &sensor_dev_template_pwm_auto_point4_pwm, 3396 &sensor_dev_template_pwm_auto_point4_temp, 3397 &sensor_dev_template_pwm_auto_point5_pwm, 3398 &sensor_dev_template_pwm_auto_point5_temp, 3399 &sensor_dev_template_pwm_auto_point6_pwm, 3400 &sensor_dev_template_pwm_auto_point6_temp, 3401 &sensor_dev_template_pwm_auto_point7_pwm, 3402 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */ 3403 3404 NULL 3405 }; 3406 3407 static const struct sensor_template_group nct6775_pwm_template_group = { 3408 .templates = nct6775_attributes_pwm_template, 3409 .is_visible = nct6775_pwm_is_visible, 3410 .base = 1, 3411 }; 3412 3413 static inline int nct6775_init_device(struct nct6775_data *data) 3414 { 3415 int i, err; 3416 u16 tmp, diode; 3417 3418 /* Start monitoring if needed */ 3419 if (data->REG_CONFIG) { 3420 err = nct6775_read_value(data, data->REG_CONFIG, &tmp); 3421 if (err) 3422 return err; 3423 if (!(tmp & 0x01)) { 3424 err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01); 3425 if (err) 3426 return err; 3427 } 3428 } 3429 3430 /* Enable temperature sensors if needed */ 3431 for (i = 0; i < NUM_TEMP; i++) { 3432 if (!(data->have_temp & BIT(i))) 3433 continue; 3434 if (!data->reg_temp_config[i]) 3435 continue; 3436 err = nct6775_read_value(data, data->reg_temp_config[i], &tmp); 3437 if (err) 3438 return err; 3439 if (tmp & 0x01) { 3440 err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe); 3441 if (err) 3442 return err; 3443 } 3444 } 3445 3446 /* Enable VBAT monitoring if needed */ 3447 err = nct6775_read_value(data, data->REG_VBAT, &tmp); 3448 if (err) 3449 return err; 3450 if (!(tmp & 0x01)) { 3451 err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01); 3452 if (err) 3453 return err; 3454 } 3455 3456 err = nct6775_read_value(data, data->REG_DIODE, &diode); 3457 if (err) 3458 return err; 3459 3460 for (i = 0; i < data->temp_fixed_num; i++) { 3461 if (!(data->have_temp_fixed & BIT(i))) 3462 continue; 3463 if ((tmp & (data->DIODE_MASK << i))) /* diode */ 3464 data->temp_type[i] 3465 = 3 - ((diode >> i) & data->DIODE_MASK); 3466 else /* thermistor */ 3467 data->temp_type[i] = 4; 3468 } 3469 3470 return 0; 3471 } 3472 3473 static int add_temp_sensors(struct nct6775_data *data, const u16 *regp, 3474 int *available, int *mask) 3475 { 3476 int i, err; 3477 u16 src; 3478 3479 for (i = 0; i < data->pwm_num && *available; i++) { 3480 int index; 3481 3482 if (!regp[i]) 3483 continue; 3484 err = nct6775_read_value(data, regp[i], &src); 3485 if (err) 3486 return err; 3487 src &= 0x1f; 3488 if (!src || (*mask & BIT(src))) 3489 continue; 3490 if (!(data->temp_mask & BIT(src))) 3491 continue; 3492 3493 index = __ffs(*available); 3494 err = nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src); 3495 if (err) 3496 return err; 3497 *available &= ~BIT(index); 3498 *mask |= BIT(src); 3499 } 3500 3501 return 0; 3502 } 3503 3504 int nct6775_probe(struct device *dev, struct nct6775_data *data, 3505 const struct regmap_config *regmapcfg) 3506 { 3507 int i, s, err = 0; 3508 int mask, available; 3509 u16 src; 3510 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config; 3511 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit; 3512 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL; 3513 int num_reg_temp, num_reg_temp_mon, num_reg_tsi_temp; 3514 int num_reg_temp_config; 3515 struct device *hwmon_dev; 3516 struct sensor_template_group tsi_temp_tg; 3517 3518 data->regmap = devm_regmap_init(dev, NULL, data, regmapcfg); 3519 if (IS_ERR(data->regmap)) 3520 return PTR_ERR(data->regmap); 3521 3522 mutex_init(&data->update_lock); 3523 data->name = nct6775_device_names[data->kind]; 3524 data->bank = 0xff; /* Force initial bank selection */ 3525 data->scale_in = scale_in; 3526 3527 switch (data->kind) { 3528 case nct6106: 3529 data->in_num = 9; 3530 data->pwm_num = 3; 3531 data->auto_pwm_num = 4; 3532 data->temp_fixed_num = 3; 3533 data->num_temp_alarms = 6; 3534 data->num_temp_beeps = 6; 3535 3536 data->fan_from_reg = fan_from_reg13; 3537 data->fan_from_reg_min = fan_from_reg13; 3538 3539 data->temp_label = nct6776_temp_label; 3540 data->temp_mask = NCT6776_TEMP_MASK; 3541 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3542 3543 data->REG_VBAT = NCT6106_REG_VBAT; 3544 data->REG_DIODE = NCT6106_REG_DIODE; 3545 data->DIODE_MASK = NCT6106_DIODE_MASK; 3546 data->REG_VIN = NCT6106_REG_IN; 3547 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; 3548 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX; 3549 data->REG_TARGET = NCT6106_REG_TARGET; 3550 data->REG_FAN = NCT6106_REG_FAN; 3551 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE; 3552 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN; 3553 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES; 3554 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT; 3555 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME; 3556 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME; 3557 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME; 3558 data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H; 3559 data->REG_PWM[0] = NCT6116_REG_PWM; 3560 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT; 3561 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT; 3562 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP; 3563 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE; 3564 data->REG_PWM_READ = NCT6106_REG_PWM_READ; 3565 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE; 3566 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK; 3567 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP; 3568 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM; 3569 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP; 3570 data->REG_CRITICAL_TEMP_TOLERANCE 3571 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE; 3572 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE; 3573 data->CRITICAL_PWM_ENABLE_MASK 3574 = NCT6106_CRITICAL_PWM_ENABLE_MASK; 3575 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM; 3576 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET; 3577 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE; 3578 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL; 3579 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL; 3580 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; 3581 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL; 3582 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE; 3583 data->REG_ALARM = NCT6106_REG_ALARM; 3584 data->ALARM_BITS = NCT6106_ALARM_BITS; 3585 data->REG_BEEP = NCT6106_REG_BEEP; 3586 data->BEEP_BITS = NCT6106_BEEP_BITS; 3587 data->REG_TSI_TEMP = NCT6106_REG_TSI_TEMP; 3588 3589 reg_temp = NCT6106_REG_TEMP; 3590 reg_temp_mon = NCT6106_REG_TEMP_MON; 3591 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP); 3592 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON); 3593 num_reg_tsi_temp = ARRAY_SIZE(NCT6106_REG_TSI_TEMP); 3594 reg_temp_over = NCT6106_REG_TEMP_OVER; 3595 reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3596 reg_temp_config = NCT6106_REG_TEMP_CONFIG; 3597 num_reg_temp_config = ARRAY_SIZE(NCT6106_REG_TEMP_CONFIG); 3598 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE; 3599 reg_temp_crit = NCT6106_REG_TEMP_CRIT; 3600 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L; 3601 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H; 3602 3603 break; 3604 case nct6116: 3605 data->in_num = 9; 3606 data->pwm_num = 5; 3607 data->auto_pwm_num = 4; 3608 data->temp_fixed_num = 3; 3609 data->num_temp_alarms = 3; 3610 data->num_temp_beeps = 3; 3611 3612 data->fan_from_reg = fan_from_reg13; 3613 data->fan_from_reg_min = fan_from_reg13; 3614 3615 data->temp_label = nct6776_temp_label; 3616 data->temp_mask = NCT6776_TEMP_MASK; 3617 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3618 3619 data->REG_VBAT = NCT6106_REG_VBAT; 3620 data->REG_DIODE = NCT6106_REG_DIODE; 3621 data->DIODE_MASK = NCT6106_DIODE_MASK; 3622 data->REG_VIN = NCT6106_REG_IN; 3623 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; 3624 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX; 3625 data->REG_TARGET = NCT6116_REG_TARGET; 3626 data->REG_FAN = NCT6116_REG_FAN; 3627 data->REG_FAN_MODE = NCT6116_REG_FAN_MODE; 3628 data->REG_FAN_MIN = NCT6116_REG_FAN_MIN; 3629 data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES; 3630 data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT; 3631 data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME; 3632 data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME; 3633 data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME; 3634 data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H; 3635 data->REG_PWM[0] = NCT6116_REG_PWM; 3636 data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT; 3637 data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT; 3638 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP; 3639 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE; 3640 data->REG_PWM_READ = NCT6106_REG_PWM_READ; 3641 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE; 3642 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK; 3643 data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP; 3644 data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM; 3645 data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP; 3646 data->REG_CRITICAL_TEMP_TOLERANCE 3647 = NCT6116_REG_CRITICAL_TEMP_TOLERANCE; 3648 data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE; 3649 data->CRITICAL_PWM_ENABLE_MASK 3650 = NCT6106_CRITICAL_PWM_ENABLE_MASK; 3651 data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM; 3652 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET; 3653 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE; 3654 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL; 3655 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL; 3656 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; 3657 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL; 3658 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE; 3659 data->REG_ALARM = NCT6106_REG_ALARM; 3660 data->ALARM_BITS = NCT6116_ALARM_BITS; 3661 data->REG_BEEP = NCT6106_REG_BEEP; 3662 data->BEEP_BITS = NCT6116_BEEP_BITS; 3663 data->REG_TSI_TEMP = NCT6116_REG_TSI_TEMP; 3664 3665 reg_temp = NCT6106_REG_TEMP; 3666 reg_temp_mon = NCT6106_REG_TEMP_MON; 3667 num_reg_temp = 3; 3668 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON); 3669 num_reg_tsi_temp = ARRAY_SIZE(NCT6116_REG_TSI_TEMP); 3670 reg_temp_over = NCT6106_REG_TEMP_OVER; 3671 reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3672 reg_temp_config = NCT6106_REG_TEMP_CONFIG; 3673 num_reg_temp_config = 3; 3674 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE; 3675 reg_temp_crit = NCT6106_REG_TEMP_CRIT; 3676 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L; 3677 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H; 3678 3679 break; 3680 case nct6775: 3681 data->in_num = 9; 3682 data->pwm_num = 3; 3683 data->auto_pwm_num = 6; 3684 data->has_fan_div = true; 3685 data->temp_fixed_num = 3; 3686 data->num_temp_alarms = 3; 3687 data->num_temp_beeps = 3; 3688 3689 data->ALARM_BITS = NCT6775_ALARM_BITS; 3690 data->BEEP_BITS = NCT6775_BEEP_BITS; 3691 3692 data->fan_from_reg = fan_from_reg16; 3693 data->fan_from_reg_min = fan_from_reg8; 3694 data->target_temp_mask = 0x7f; 3695 data->tolerance_mask = 0x0f; 3696 data->speed_tolerance_limit = 15; 3697 3698 data->temp_label = nct6775_temp_label; 3699 data->temp_mask = NCT6775_TEMP_MASK; 3700 data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK; 3701 3702 data->REG_CONFIG = NCT6775_REG_CONFIG; 3703 data->REG_VBAT = NCT6775_REG_VBAT; 3704 data->REG_DIODE = NCT6775_REG_DIODE; 3705 data->DIODE_MASK = NCT6775_DIODE_MASK; 3706 data->REG_VIN = NCT6775_REG_IN; 3707 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3708 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3709 data->REG_TARGET = NCT6775_REG_TARGET; 3710 data->REG_FAN = NCT6775_REG_FAN; 3711 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3712 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN; 3713 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES; 3714 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3715 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3716 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME; 3717 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME; 3718 data->REG_PWM[0] = NCT6775_REG_PWM; 3719 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3720 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3721 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT; 3722 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT; 3723 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3724 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3725 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE; 3726 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK; 3727 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3728 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3729 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3730 data->REG_CRITICAL_TEMP_TOLERANCE 3731 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3732 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET; 3733 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3734 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3735 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3736 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3737 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3738 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3739 data->REG_ALARM = NCT6775_REG_ALARM; 3740 data->REG_BEEP = NCT6775_REG_BEEP; 3741 data->REG_TSI_TEMP = NCT6775_REG_TSI_TEMP; 3742 3743 reg_temp = NCT6775_REG_TEMP; 3744 reg_temp_mon = NCT6775_REG_TEMP_MON; 3745 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3746 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3747 num_reg_tsi_temp = ARRAY_SIZE(NCT6775_REG_TSI_TEMP); 3748 reg_temp_over = NCT6775_REG_TEMP_OVER; 3749 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3750 reg_temp_config = NCT6775_REG_TEMP_CONFIG; 3751 num_reg_temp_config = ARRAY_SIZE(NCT6775_REG_TEMP_CONFIG); 3752 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE; 3753 reg_temp_crit = NCT6775_REG_TEMP_CRIT; 3754 3755 break; 3756 case nct6776: 3757 data->in_num = 9; 3758 data->pwm_num = 3; 3759 data->auto_pwm_num = 4; 3760 data->has_fan_div = false; 3761 data->temp_fixed_num = 3; 3762 data->num_temp_alarms = 3; 3763 data->num_temp_beeps = 6; 3764 3765 data->ALARM_BITS = NCT6776_ALARM_BITS; 3766 data->BEEP_BITS = NCT6776_BEEP_BITS; 3767 3768 data->fan_from_reg = fan_from_reg13; 3769 data->fan_from_reg_min = fan_from_reg13; 3770 data->target_temp_mask = 0xff; 3771 data->tolerance_mask = 0x07; 3772 data->speed_tolerance_limit = 63; 3773 3774 data->temp_label = nct6776_temp_label; 3775 data->temp_mask = NCT6776_TEMP_MASK; 3776 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3777 3778 data->REG_CONFIG = NCT6775_REG_CONFIG; 3779 data->REG_VBAT = NCT6775_REG_VBAT; 3780 data->REG_DIODE = NCT6775_REG_DIODE; 3781 data->DIODE_MASK = NCT6775_DIODE_MASK; 3782 data->REG_VIN = NCT6775_REG_IN; 3783 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3784 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3785 data->REG_TARGET = NCT6775_REG_TARGET; 3786 data->REG_FAN = NCT6775_REG_FAN; 3787 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3788 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3789 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES; 3790 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3791 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3792 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3793 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3794 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3795 data->REG_PWM[0] = NCT6775_REG_PWM; 3796 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3797 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3798 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3799 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE; 3800 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3801 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3802 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3803 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3804 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3805 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3806 data->REG_CRITICAL_TEMP_TOLERANCE 3807 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3808 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET; 3809 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3810 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3811 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3812 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3813 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3814 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3815 data->REG_ALARM = NCT6775_REG_ALARM; 3816 data->REG_BEEP = NCT6776_REG_BEEP; 3817 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3818 3819 reg_temp = NCT6775_REG_TEMP; 3820 reg_temp_mon = NCT6775_REG_TEMP_MON; 3821 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3822 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3823 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3824 reg_temp_over = NCT6775_REG_TEMP_OVER; 3825 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3826 reg_temp_config = NCT6776_REG_TEMP_CONFIG; 3827 num_reg_temp_config = ARRAY_SIZE(NCT6776_REG_TEMP_CONFIG); 3828 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE; 3829 reg_temp_crit = NCT6776_REG_TEMP_CRIT; 3830 3831 break; 3832 case nct6779: 3833 data->in_num = 15; 3834 data->pwm_num = 5; 3835 data->auto_pwm_num = 4; 3836 data->has_fan_div = false; 3837 data->temp_fixed_num = 6; 3838 data->num_temp_alarms = 2; 3839 data->num_temp_beeps = 2; 3840 3841 data->ALARM_BITS = NCT6779_ALARM_BITS; 3842 data->BEEP_BITS = NCT6779_BEEP_BITS; 3843 3844 data->fan_from_reg = fan_from_reg_rpm; 3845 data->fan_from_reg_min = fan_from_reg13; 3846 data->target_temp_mask = 0xff; 3847 data->tolerance_mask = 0x07; 3848 data->speed_tolerance_limit = 63; 3849 3850 data->temp_label = nct6779_temp_label; 3851 data->temp_mask = NCT6779_TEMP_MASK; 3852 data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK; 3853 3854 data->REG_CONFIG = NCT6775_REG_CONFIG; 3855 data->REG_VBAT = NCT6775_REG_VBAT; 3856 data->REG_DIODE = NCT6775_REG_DIODE; 3857 data->DIODE_MASK = NCT6775_DIODE_MASK; 3858 data->REG_VIN = NCT6779_REG_IN; 3859 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3860 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3861 data->REG_TARGET = NCT6775_REG_TARGET; 3862 data->REG_FAN = NCT6779_REG_FAN; 3863 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3864 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3865 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3866 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3867 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3868 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3869 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3870 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3871 data->REG_PWM[0] = NCT6775_REG_PWM; 3872 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3873 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3874 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3875 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE; 3876 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3877 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3878 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3879 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3880 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3881 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3882 data->REG_CRITICAL_TEMP_TOLERANCE 3883 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3884 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 3885 data->CRITICAL_PWM_ENABLE_MASK 3886 = NCT6779_CRITICAL_PWM_ENABLE_MASK; 3887 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 3888 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 3889 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3890 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3891 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3892 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3893 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3894 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3895 data->REG_ALARM = NCT6779_REG_ALARM; 3896 data->REG_BEEP = NCT6776_REG_BEEP; 3897 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3898 3899 reg_temp = NCT6779_REG_TEMP; 3900 reg_temp_mon = NCT6779_REG_TEMP_MON; 3901 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 3902 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 3903 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3904 reg_temp_over = NCT6779_REG_TEMP_OVER; 3905 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 3906 reg_temp_config = NCT6779_REG_TEMP_CONFIG; 3907 num_reg_temp_config = ARRAY_SIZE(NCT6779_REG_TEMP_CONFIG); 3908 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE; 3909 reg_temp_crit = NCT6779_REG_TEMP_CRIT; 3910 3911 break; 3912 case nct6791: 3913 case nct6792: 3914 case nct6793: 3915 case nct6795: 3916 case nct6796: 3917 case nct6797: 3918 data->in_num = 15; 3919 data->pwm_num = (data->kind == nct6796 || 3920 data->kind == nct6797) ? 7 : 6; 3921 data->auto_pwm_num = 4; 3922 data->has_fan_div = false; 3923 data->temp_fixed_num = 6; 3924 data->num_temp_alarms = 2; 3925 data->num_temp_beeps = 2; 3926 3927 data->ALARM_BITS = NCT6791_ALARM_BITS; 3928 data->BEEP_BITS = NCT6779_BEEP_BITS; 3929 3930 data->fan_from_reg = fan_from_reg_rpm; 3931 data->fan_from_reg_min = fan_from_reg13; 3932 data->target_temp_mask = 0xff; 3933 data->tolerance_mask = 0x07; 3934 data->speed_tolerance_limit = 63; 3935 3936 switch (data->kind) { 3937 default: 3938 case nct6791: 3939 data->temp_label = nct6779_temp_label; 3940 data->temp_mask = NCT6791_TEMP_MASK; 3941 data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK; 3942 break; 3943 case nct6792: 3944 data->temp_label = nct6792_temp_label; 3945 data->temp_mask = NCT6792_TEMP_MASK; 3946 data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK; 3947 break; 3948 case nct6793: 3949 data->temp_label = nct6793_temp_label; 3950 data->temp_mask = NCT6793_TEMP_MASK; 3951 data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK; 3952 break; 3953 case nct6795: 3954 case nct6797: 3955 data->temp_label = nct6795_temp_label; 3956 data->temp_mask = NCT6795_TEMP_MASK; 3957 data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK; 3958 break; 3959 case nct6796: 3960 data->temp_label = nct6796_temp_label; 3961 data->temp_mask = NCT6796_TEMP_MASK; 3962 data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK; 3963 break; 3964 } 3965 3966 data->REG_CONFIG = NCT6775_REG_CONFIG; 3967 data->REG_VBAT = NCT6775_REG_VBAT; 3968 data->REG_DIODE = NCT6775_REG_DIODE; 3969 data->DIODE_MASK = NCT6775_DIODE_MASK; 3970 data->REG_VIN = NCT6779_REG_IN; 3971 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3972 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3973 data->REG_TARGET = NCT6775_REG_TARGET; 3974 data->REG_FAN = NCT6779_REG_FAN; 3975 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3976 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3977 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3978 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3979 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3980 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3981 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3982 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3983 data->REG_PWM[0] = NCT6775_REG_PWM; 3984 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3985 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3986 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP; 3987 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE; 3988 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3989 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3990 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3991 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3992 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3993 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3994 data->REG_CRITICAL_TEMP_TOLERANCE 3995 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3996 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 3997 data->CRITICAL_PWM_ENABLE_MASK 3998 = NCT6779_CRITICAL_PWM_ENABLE_MASK; 3999 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 4000 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 4001 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 4002 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 4003 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL; 4004 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP; 4005 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL; 4006 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE; 4007 data->REG_ALARM = NCT6791_REG_ALARM; 4008 if (data->kind == nct6791) 4009 data->REG_BEEP = NCT6776_REG_BEEP; 4010 else 4011 data->REG_BEEP = NCT6792_REG_BEEP; 4012 switch (data->kind) { 4013 case nct6791: 4014 case nct6792: 4015 case nct6793: 4016 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 4017 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 4018 break; 4019 case nct6795: 4020 case nct6796: 4021 case nct6797: 4022 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; 4023 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); 4024 break; 4025 default: 4026 num_reg_tsi_temp = 0; 4027 break; 4028 } 4029 4030 reg_temp = NCT6779_REG_TEMP; 4031 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 4032 if (data->kind == nct6791) { 4033 reg_temp_mon = NCT6779_REG_TEMP_MON; 4034 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 4035 } else { 4036 reg_temp_mon = NCT6792_REG_TEMP_MON; 4037 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON); 4038 } 4039 reg_temp_over = NCT6779_REG_TEMP_OVER; 4040 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 4041 reg_temp_config = NCT6779_REG_TEMP_CONFIG; 4042 num_reg_temp_config = ARRAY_SIZE(NCT6779_REG_TEMP_CONFIG); 4043 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE; 4044 reg_temp_crit = NCT6779_REG_TEMP_CRIT; 4045 4046 break; 4047 case nct6798: 4048 case nct6799: 4049 data->in_num = data->kind == nct6799 ? 18 : 15; 4050 data->scale_in = scale_in_6798; 4051 data->pwm_num = 7; 4052 data->auto_pwm_num = 4; 4053 data->has_fan_div = false; 4054 data->temp_fixed_num = 6; 4055 data->num_temp_alarms = 7; 4056 data->num_temp_beeps = 8; 4057 4058 data->ALARM_BITS = NCT6799_ALARM_BITS; 4059 data->BEEP_BITS = NCT6799_BEEP_BITS; 4060 4061 data->fan_from_reg = fan_from_reg_rpm; 4062 data->fan_from_reg_min = fan_from_reg13; 4063 data->target_temp_mask = 0xff; 4064 data->tolerance_mask = 0x07; 4065 data->speed_tolerance_limit = 63; 4066 4067 switch (data->kind) { 4068 default: 4069 case nct6798: 4070 data->temp_label = nct6798_temp_label; 4071 data->temp_mask = NCT6798_TEMP_MASK; 4072 data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK; 4073 break; 4074 case nct6799: 4075 data->temp_label = nct6799_temp_label; 4076 data->temp_mask = NCT6799_TEMP_MASK; 4077 data->virt_temp_mask = NCT6799_VIRT_TEMP_MASK; 4078 break; 4079 } 4080 4081 data->REG_CONFIG = NCT6775_REG_CONFIG; 4082 data->REG_VBAT = NCT6775_REG_VBAT; 4083 data->REG_DIODE = NCT6775_REG_DIODE; 4084 data->DIODE_MASK = NCT6775_DIODE_MASK; 4085 data->REG_VIN = NCT6779_REG_IN; 4086 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 4087 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 4088 data->REG_TARGET = NCT6775_REG_TARGET; 4089 data->REG_FAN = NCT6779_REG_FAN; 4090 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 4091 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 4092 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 4093 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 4094 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 4095 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 4096 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 4097 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 4098 data->REG_PWM[0] = NCT6775_REG_PWM; 4099 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 4100 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 4101 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP; 4102 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE; 4103 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 4104 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 4105 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 4106 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 4107 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 4108 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 4109 data->REG_CRITICAL_TEMP_TOLERANCE = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 4110 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 4111 data->CRITICAL_PWM_ENABLE_MASK = NCT6779_CRITICAL_PWM_ENABLE_MASK; 4112 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 4113 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 4114 data->REG_TEMP_SOURCE = NCT6798_REG_TEMP_SOURCE; 4115 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 4116 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL; 4117 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP; 4118 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL; 4119 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE; 4120 data->REG_ALARM = NCT6799_REG_ALARM; 4121 data->REG_BEEP = NCT6792_REG_BEEP; 4122 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; 4123 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); 4124 4125 reg_temp = NCT6798_REG_TEMP; 4126 num_reg_temp = ARRAY_SIZE(NCT6798_REG_TEMP); 4127 reg_temp_mon = NCT6798_REG_TEMP_MON; 4128 num_reg_temp_mon = ARRAY_SIZE(NCT6798_REG_TEMP_MON); 4129 reg_temp_over = NCT6798_REG_TEMP_OVER; 4130 reg_temp_hyst = NCT6798_REG_TEMP_HYST; 4131 reg_temp_config = NCT6779_REG_TEMP_CONFIG; 4132 num_reg_temp_config = ARRAY_SIZE(NCT6779_REG_TEMP_CONFIG); 4133 reg_temp_alternate = NCT6798_REG_TEMP_ALTERNATE; 4134 reg_temp_crit = NCT6798_REG_TEMP_CRIT; 4135 4136 break; 4137 default: 4138 return -ENODEV; 4139 } 4140 data->have_in = BIT(data->in_num) - 1; 4141 data->have_temp = 0; 4142 4143 /* 4144 * On some boards, not all available temperature sources are monitored, 4145 * even though some of the monitoring registers are unused. 4146 * Get list of unused monitoring registers, then detect if any fan 4147 * controls are configured to use unmonitored temperature sources. 4148 * If so, assign the unmonitored temperature sources to available 4149 * monitoring registers. 4150 */ 4151 mask = 0; 4152 available = 0; 4153 for (i = 0; i < num_reg_temp; i++) { 4154 if (reg_temp[i] == 0) 4155 continue; 4156 4157 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src); 4158 if (err) 4159 return err; 4160 src &= 0x1f; 4161 if (!src || (mask & BIT(src))) 4162 available |= BIT(i); 4163 4164 mask |= BIT(src); 4165 } 4166 4167 /* 4168 * Now find unmonitored temperature registers and enable monitoring 4169 * if additional monitoring registers are available. 4170 */ 4171 err = add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask); 4172 if (err) 4173 return err; 4174 err = add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask); 4175 if (err) 4176 return err; 4177 4178 mask = 0; 4179 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */ 4180 for (i = 0; i < num_reg_temp; i++) { 4181 if (reg_temp[i] == 0) 4182 continue; 4183 4184 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src); 4185 if (err) 4186 return err; 4187 src &= 0x1f; 4188 if (!src || (mask & BIT(src))) 4189 continue; 4190 4191 if (!(data->temp_mask & BIT(src))) { 4192 dev_info(dev, 4193 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", 4194 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]); 4195 continue; 4196 } 4197 4198 mask |= BIT(src); 4199 4200 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */ 4201 if (src <= data->temp_fixed_num) { 4202 data->have_temp |= BIT(src - 1); 4203 data->have_temp_fixed |= BIT(src - 1); 4204 data->reg_temp[0][src - 1] = reg_temp[i]; 4205 data->reg_temp[1][src - 1] = reg_temp_over[i]; 4206 data->reg_temp[2][src - 1] = reg_temp_hyst[i]; 4207 if (reg_temp_crit_h && reg_temp_crit_h[i]) 4208 data->reg_temp[3][src - 1] = reg_temp_crit_h[i]; 4209 else if (reg_temp_crit[src - 1]) 4210 data->reg_temp[3][src - 1] 4211 = reg_temp_crit[src - 1]; 4212 if (reg_temp_crit_l && reg_temp_crit_l[i]) 4213 data->reg_temp[4][src - 1] = reg_temp_crit_l[i]; 4214 if (i < num_reg_temp_config) 4215 data->reg_temp_config[src - 1] = reg_temp_config[i]; 4216 data->temp_src[src - 1] = src; 4217 continue; 4218 } 4219 4220 if (s >= NUM_TEMP) 4221 continue; 4222 4223 /* Use dynamic index for other sources */ 4224 data->have_temp |= BIT(s); 4225 data->reg_temp[0][s] = reg_temp[i]; 4226 data->reg_temp[1][s] = reg_temp_over[i]; 4227 data->reg_temp[2][s] = reg_temp_hyst[i]; 4228 if (i < num_reg_temp_config) 4229 data->reg_temp_config[s] = reg_temp_config[i]; 4230 if (reg_temp_crit_h && reg_temp_crit_h[i]) 4231 data->reg_temp[3][s] = reg_temp_crit_h[i]; 4232 else if (reg_temp_crit[src - 1]) 4233 data->reg_temp[3][s] = reg_temp_crit[src - 1]; 4234 if (reg_temp_crit_l && reg_temp_crit_l[i]) 4235 data->reg_temp[4][s] = reg_temp_crit_l[i]; 4236 4237 data->temp_src[s] = src; 4238 s++; 4239 } 4240 4241 /* 4242 * Repeat with temperatures used for fan control. 4243 * This set of registers does not support limits. 4244 */ 4245 for (i = 0; i < num_reg_temp_mon; i++) { 4246 if (reg_temp_mon[i] == 0) 4247 continue; 4248 4249 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &src); 4250 if (err) 4251 return err; 4252 src &= 0x1f; 4253 if (!src) 4254 continue; 4255 4256 if (!(data->temp_mask & BIT(src))) { 4257 dev_info(dev, 4258 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", 4259 src, i, data->REG_TEMP_SEL[i], 4260 reg_temp_mon[i]); 4261 continue; 4262 } 4263 4264 /* 4265 * For virtual temperature sources, the 'virtual' temperature 4266 * for each fan reflects a different temperature, and there 4267 * are no duplicates. 4268 */ 4269 if (!(data->virt_temp_mask & BIT(src))) { 4270 if (mask & BIT(src)) 4271 continue; 4272 mask |= BIT(src); 4273 } 4274 4275 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */ 4276 if (src <= data->temp_fixed_num) { 4277 if (data->have_temp & BIT(src - 1)) 4278 continue; 4279 data->have_temp |= BIT(src - 1); 4280 data->have_temp_fixed |= BIT(src - 1); 4281 data->reg_temp[0][src - 1] = reg_temp_mon[i]; 4282 data->temp_src[src - 1] = src; 4283 continue; 4284 } 4285 4286 if (s >= NUM_TEMP) 4287 continue; 4288 4289 /* Use dynamic index for other sources */ 4290 data->have_temp |= BIT(s); 4291 data->reg_temp[0][s] = reg_temp_mon[i]; 4292 data->temp_src[s] = src; 4293 s++; 4294 } 4295 4296 #ifdef USE_ALTERNATE 4297 /* 4298 * Go through the list of alternate temp registers and enable 4299 * if possible. 4300 * The temperature is already monitored if the respective bit in <mask> 4301 * is set. 4302 */ 4303 for (i = 0; i < 31; i++) { 4304 if (!(data->temp_mask & BIT(i + 1))) 4305 continue; 4306 if (!reg_temp_alternate[i]) 4307 continue; 4308 if (mask & BIT(i + 1)) 4309 continue; 4310 if (i < data->temp_fixed_num) { 4311 if (data->have_temp & BIT(i)) 4312 continue; 4313 data->have_temp |= BIT(i); 4314 data->have_temp_fixed |= BIT(i); 4315 data->reg_temp[0][i] = reg_temp_alternate[i]; 4316 if (i < num_reg_temp) { 4317 data->reg_temp[1][i] = reg_temp_over[i]; 4318 data->reg_temp[2][i] = reg_temp_hyst[i]; 4319 } 4320 data->temp_src[i] = i + 1; 4321 continue; 4322 } 4323 4324 if (s >= NUM_TEMP) /* Abort if no more space */ 4325 break; 4326 4327 data->have_temp |= BIT(s); 4328 data->reg_temp[0][s] = reg_temp_alternate[i]; 4329 data->temp_src[s] = i + 1; 4330 s++; 4331 } 4332 #endif /* USE_ALTERNATE */ 4333 4334 /* Check which TSIx_TEMP registers are active */ 4335 for (i = 0; i < num_reg_tsi_temp; i++) { 4336 u16 tmp; 4337 4338 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &tmp); 4339 if (err) 4340 return err; 4341 if (tmp) 4342 data->have_tsi_temp |= BIT(i); 4343 } 4344 4345 /* Initialize the chip */ 4346 err = nct6775_init_device(data); 4347 if (err) 4348 return err; 4349 4350 if (data->driver_init) { 4351 err = data->driver_init(data); 4352 if (err) 4353 return err; 4354 } 4355 4356 /* Read fan clock dividers immediately */ 4357 err = nct6775_init_fan_common(dev, data); 4358 if (err) 4359 return err; 4360 4361 /* Register sysfs hooks */ 4362 err = nct6775_add_template_attr_group(dev, data, &nct6775_pwm_template_group, 4363 data->pwm_num); 4364 if (err) 4365 return err; 4366 4367 err = nct6775_add_template_attr_group(dev, data, &nct6775_in_template_group, 4368 fls(data->have_in)); 4369 if (err) 4370 return err; 4371 4372 err = nct6775_add_template_attr_group(dev, data, &nct6775_fan_template_group, 4373 fls(data->has_fan)); 4374 if (err) 4375 return err; 4376 4377 err = nct6775_add_template_attr_group(dev, data, &nct6775_temp_template_group, 4378 fls(data->have_temp)); 4379 if (err) 4380 return err; 4381 4382 if (data->have_tsi_temp) { 4383 tsi_temp_tg.templates = nct6775_tsi_temp_template; 4384 tsi_temp_tg.is_visible = nct6775_tsi_temp_is_visible; 4385 tsi_temp_tg.base = fls(data->have_temp) + 1; 4386 err = nct6775_add_template_attr_group(dev, data, &tsi_temp_tg, 4387 fls(data->have_tsi_temp)); 4388 if (err) 4389 return err; 4390 } 4391 4392 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name, 4393 data, data->groups); 4394 return PTR_ERR_OR_ZERO(hwmon_dev); 4395 } 4396 EXPORT_SYMBOL_GPL(nct6775_probe); 4397 4398 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>"); 4399 MODULE_DESCRIPTION("Core driver for NCT6775F and compatible chips"); 4400 MODULE_LICENSE("GPL"); 4401