1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * nct6775 - Driver for the hardware monitoring functionality of 4 * Nuvoton NCT677x Super-I/O chips 5 * 6 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net> 7 * 8 * Derived from w83627ehf driver 9 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de> 10 * Copyright (C) 2006 Yuan Mu (Winbond), 11 * Rudolf Marek <r.marek@assembler.cz> 12 * David Hubbard <david.c.hubbard@gmail.com> 13 * Daniel J Blueman <daniel.blueman@gmail.com> 14 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00) 15 * 16 * Shamelessly ripped from the w83627hf driver 17 * Copyright (C) 2003 Mark Studebaker 18 * 19 * Supports the following chips: 20 * 21 * Chip #vin #fan #pwm #temp chip IDs man ID 22 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3 23 * nct6116d 9 5 5 3+3 0xd280 0xc1 0x5ca3 24 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3 25 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3 26 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3 27 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3 28 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3 29 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3 30 * nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3 31 * nct6796d 14 7 7 2+6 0xd420 0xc1 0x5ca3 32 * nct6797d 14 7 7 2+6 0xd450 0xc1 0x5ca3 33 * (0xd451) 34 * nct6798d 14 7 7 2+6 0xd428 0xc1 0x5ca3 35 * (0xd429) 36 * nct6796d-s 18 7 7 6+2 0xd801 0xc1 0x5ca3 37 * nct6799d-r 18 7 7 6+2 0xd802 0xc1 0x5ca3 38 * 39 * #temp lists the number of monitored temperature sources (first value) plus 40 * the number of directly connectable temperature sensors (second value). 41 */ 42 43 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 44 45 #include <linux/module.h> 46 #include <linux/init.h> 47 #include <linux/slab.h> 48 #include <linux/jiffies.h> 49 #include <linux/hwmon.h> 50 #include <linux/hwmon-sysfs.h> 51 #include <linux/err.h> 52 #include <linux/mutex.h> 53 #include <linux/bitops.h> 54 #include <linux/nospec.h> 55 #include <linux/regmap.h> 56 #include "lm75.h" 57 #include "nct6775.h" 58 59 #undef DEFAULT_SYMBOL_NAMESPACE 60 #define DEFAULT_SYMBOL_NAMESPACE HWMON_NCT6775 61 62 #define USE_ALTERNATE 63 64 /* used to set data->name = nct6775_device_names[data->sio_kind] */ 65 static const char * const nct6775_device_names[] = { 66 "nct6106", 67 "nct6116", 68 "nct6775", 69 "nct6776", 70 "nct6779", 71 "nct6791", 72 "nct6792", 73 "nct6793", 74 "nct6795", 75 "nct6796", 76 "nct6797", 77 "nct6798", 78 "nct6799", 79 }; 80 81 /* Common and NCT6775 specific data */ 82 83 /* 84 * Voltage min/max registers for nr=7..14 are in bank 5 85 * min/max: 15-17 for NCT6799 only 86 */ 87 88 static const u16 NCT6775_REG_IN_MAX[] = { 89 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a, 90 0x55c, 0x55e, 0x560, 0x562, 0x564, 0x570, 0x572 }; 91 static const u16 NCT6775_REG_IN_MIN[] = { 92 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b, 93 0x55d, 0x55f, 0x561, 0x563, 0x565, 0x571, 0x573 }; 94 static const u16 NCT6775_REG_IN[] = { 95 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552 96 }; 97 98 #define NCT6775_REG_VBAT 0x5D 99 #define NCT6775_REG_DIODE 0x5E 100 #define NCT6775_DIODE_MASK 0x02 101 102 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B }; 103 104 static const s8 NCT6775_ALARM_BITS[NUM_ALARM_BITS] = { 105 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */ 106 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 107 6, 7, 11, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 108 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 109 12, -1, /* intr0-intr1 */ 110 }; 111 112 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e }; 113 114 static const s8 NCT6775_BEEP_BITS[NUM_BEEP_BITS] = { 115 0, 1, 2, 3, 8, 9, 10, 16, 17, -1, -1, -1, /* in0-in11 */ 116 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 117 6, 7, 11, 28, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 118 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 119 12, -1, 21 /* intr0-intr1, beep_en */ 120 }; 121 122 /* DC or PWM output fan configuration */ 123 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 }; 124 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 }; 125 126 /* Advanced Fan control, some values are common for all fans */ 127 128 static const u16 NCT6775_REG_TARGET[] = { 129 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 }; 130 static const u16 NCT6775_REG_FAN_MODE[] = { 131 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 }; 132 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = { 133 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 }; 134 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = { 135 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 }; 136 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 137 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 }; 138 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 139 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 }; 140 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a }; 141 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b }; 142 143 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 144 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 }; 145 static const u16 NCT6775_REG_PWM[] = { 146 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 }; 147 static const u16 NCT6775_REG_PWM_READ[] = { 148 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 }; 149 150 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 }; 151 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d }; 152 static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = { 153 0x641, 0x642, 0x643, 0x644 }; 154 static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { }; 155 156 static const u16 NCT6775_REG_TEMP[] = { 157 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d }; 158 159 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 }; 160 161 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 162 0, 0x152, 0x252, 0x628, 0x629, 0x62A }; 163 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 164 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D }; 165 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 166 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C }; 167 168 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 169 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 }; 170 171 static const u16 NCT6775_REG_TEMP_SEL[] = { 172 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 }; 173 174 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = { 175 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 }; 176 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = { 177 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a }; 178 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = { 179 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b }; 180 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = { 181 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c }; 182 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = { 183 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d }; 184 185 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 }; 186 187 static const u16 NCT6775_REG_AUTO_TEMP[] = { 188 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 }; 189 static const u16 NCT6775_REG_AUTO_PWM[] = { 190 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 }; 191 192 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p)) 193 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p)) 194 195 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 }; 196 197 static const u16 NCT6775_REG_CRITICAL_TEMP[] = { 198 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 }; 199 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = { 200 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 }; 201 202 static const char *const nct6775_temp_label[] = { 203 "", 204 "SYSTIN", 205 "CPUTIN", 206 "AUXTIN", 207 "AMD SB-TSI", 208 "PECI Agent 0", 209 "PECI Agent 1", 210 "PECI Agent 2", 211 "PECI Agent 3", 212 "PECI Agent 4", 213 "PECI Agent 5", 214 "PECI Agent 6", 215 "PECI Agent 7", 216 "PCH_CHIP_CPU_MAX_TEMP", 217 "PCH_CHIP_TEMP", 218 "PCH_CPU_TEMP", 219 "PCH_MCH_TEMP", 220 "PCH_DIM0_TEMP", 221 "PCH_DIM1_TEMP", 222 "PCH_DIM2_TEMP", 223 "PCH_DIM3_TEMP" 224 }; 225 226 #define NCT6775_TEMP_MASK 0x001ffffe 227 #define NCT6775_VIRT_TEMP_MASK 0x00000000 228 229 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = { 230 [13] = 0x661, 231 [14] = 0x662, 232 [15] = 0x664, 233 }; 234 235 static const u16 NCT6775_REG_TEMP_CRIT[32] = { 236 [4] = 0xa00, 237 [5] = 0xa01, 238 [6] = 0xa02, 239 [7] = 0xa03, 240 [8] = 0xa04, 241 [9] = 0xa05, 242 [10] = 0xa06, 243 [11] = 0xa07 244 }; 245 246 static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 }; 247 248 /* NCT6776 specific data */ 249 250 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */ 251 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME 252 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME 253 254 static const s8 NCT6776_ALARM_BITS[NUM_ALARM_BITS] = { 255 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */ 256 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 257 6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 258 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 259 12, 9, /* intr0-intr1 */ 260 }; 261 262 /* 0xbf: nct6799 only */ 263 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5, 0xbf }; 264 265 static const s8 NCT6776_BEEP_BITS[NUM_BEEP_BITS] = { 266 0, 1, 2, 3, 4, 5, 6, 7, 8, -1, -1, -1, /* in0-in11 */ 267 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 268 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 269 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 270 30, 31, 24 /* intr0-intr1, beep_en */ 271 }; 272 273 static const u16 NCT6776_REG_TOLERANCE_H[] = { 274 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c }; 275 276 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 }; 277 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 }; 278 279 static const u16 NCT6776_REG_FAN_MIN[] = { 280 0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c }; 281 static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = { 282 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 }; 283 284 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = { 285 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e }; 286 287 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = { 288 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A }; 289 290 static const char *const nct6776_temp_label[] = { 291 "", 292 "SYSTIN", 293 "CPUTIN", 294 "AUXTIN", 295 "SMBUSMASTER 0", 296 "SMBUSMASTER 1", 297 "SMBUSMASTER 2", 298 "SMBUSMASTER 3", 299 "SMBUSMASTER 4", 300 "SMBUSMASTER 5", 301 "SMBUSMASTER 6", 302 "SMBUSMASTER 7", 303 "PECI Agent 0", 304 "PECI Agent 1", 305 "PCH_CHIP_CPU_MAX_TEMP", 306 "PCH_CHIP_TEMP", 307 "PCH_CPU_TEMP", 308 "PCH_MCH_TEMP", 309 "PCH_DIM0_TEMP", 310 "PCH_DIM1_TEMP", 311 "PCH_DIM2_TEMP", 312 "PCH_DIM3_TEMP", 313 "BYTE_TEMP" 314 }; 315 316 #define NCT6776_TEMP_MASK 0x007ffffe 317 #define NCT6776_VIRT_TEMP_MASK 0x00000000 318 319 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = { 320 [14] = 0x401, 321 [15] = 0x402, 322 [16] = 0x404, 323 }; 324 325 static const u16 NCT6776_REG_TEMP_CRIT[32] = { 326 [11] = 0x709, 327 [12] = 0x70a, 328 }; 329 330 static const u16 NCT6776_REG_TSI_TEMP[] = { 331 0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 }; 332 333 /* NCT6779 specific data */ 334 335 /* 336 * 15-17 for NCT6799 only, register labels are: 337 * CPUVC, VIN1, AVSB, 3VCC, VIN0, VIN8, VIN4, 3VSB 338 * VBAT, VTT, VIN5, VIN6, VIN2, VIN3, VIN7, VIN9 339 * VHIF, VIN10 340 */ 341 static const u16 NCT6779_REG_IN[] = { 342 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487, 343 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e, 0x48f, 344 0x470, 0x471}; 345 346 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = { 347 0x459, 0x45A, 0x45B, 0x568 }; 348 349 static const s8 NCT6779_ALARM_BITS[NUM_ALARM_BITS] = { 350 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */ 351 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 352 6, 7, 11, 10, 23, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 353 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 354 12, 9, /* intr0-intr1 */ 355 }; 356 357 static const s8 NCT6779_BEEP_BITS[NUM_BEEP_BITS] = { 358 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */ 359 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 360 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 361 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 362 30, 31, 24 /* intr0-intr1, beep_en */ 363 }; 364 365 static const u16 NCT6779_REG_FAN[] = { 366 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce }; 367 static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = { 368 0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f }; 369 370 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = { 371 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 }; 372 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01 373 static const u16 NCT6779_REG_CRITICAL_PWM[] = { 374 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 }; 375 376 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 }; 377 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b }; 378 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 379 0x18, 0x152 }; 380 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 381 0x3a, 0x153 }; 382 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = { 383 0x39, 0x155 }; 384 385 static const u16 NCT6779_REG_TEMP_OFFSET[] = { 386 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c, 0x44d, 0x449 }; 387 388 static const char *const nct6779_temp_label[] = { 389 "", 390 "SYSTIN", 391 "CPUTIN", 392 "AUXTIN0", 393 "AUXTIN1", 394 "AUXTIN2", 395 "AUXTIN3", 396 "", 397 "SMBUSMASTER 0", 398 "SMBUSMASTER 1", 399 "SMBUSMASTER 2", 400 "SMBUSMASTER 3", 401 "SMBUSMASTER 4", 402 "SMBUSMASTER 5", 403 "SMBUSMASTER 6", 404 "SMBUSMASTER 7", 405 "PECI Agent 0", 406 "PECI Agent 1", 407 "PCH_CHIP_CPU_MAX_TEMP", 408 "PCH_CHIP_TEMP", 409 "PCH_CPU_TEMP", 410 "PCH_MCH_TEMP", 411 "PCH_DIM0_TEMP", 412 "PCH_DIM1_TEMP", 413 "PCH_DIM2_TEMP", 414 "PCH_DIM3_TEMP", 415 "BYTE_TEMP", 416 "", 417 "", 418 "", 419 "", 420 "Virtual_TEMP" 421 }; 422 423 #define NCT6779_TEMP_MASK 0x07ffff7e 424 #define NCT6779_VIRT_TEMP_MASK 0x00000000 425 #define NCT6791_TEMP_MASK 0x87ffff7e 426 #define NCT6791_VIRT_TEMP_MASK 0x80000000 427 428 static const u16 NCT6779_REG_TEMP_ALTERNATE[32] 429 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0, 430 0, 0, 0, 0, 0, 0, 0, 0, 431 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407, 432 0x408, 0 }; 433 434 static const u16 NCT6779_REG_TEMP_CRIT[32] = { 435 [15] = 0x709, 436 [16] = 0x70a, 437 }; 438 439 /* NCT6791 specific data */ 440 441 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 }; 442 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a }; 443 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b }; 444 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c }; 445 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d }; 446 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e }; 447 448 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = { 449 0x459, 0x45A, 0x45B, 0x568, 0x45D }; 450 451 static const s8 NCT6791_ALARM_BITS[NUM_ALARM_BITS] = { 452 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */ 453 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 454 6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 455 4, 5, 13, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 456 12, 9, /* intr0-intr1 */ 457 }; 458 459 /* NCT6792/NCT6793 specific data */ 460 461 static const u16 NCT6792_REG_TEMP_MON[] = { 462 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d }; 463 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = { 464 0xb2, 0xb3, 0xb4, 0xb5, 0xbf }; 465 466 static const char *const nct6792_temp_label[] = { 467 "", 468 "SYSTIN", 469 "CPUTIN", 470 "AUXTIN0", 471 "AUXTIN1", 472 "AUXTIN2", 473 "AUXTIN3", 474 "", 475 "SMBUSMASTER 0", 476 "SMBUSMASTER 1", 477 "SMBUSMASTER 2", 478 "SMBUSMASTER 3", 479 "SMBUSMASTER 4", 480 "SMBUSMASTER 5", 481 "SMBUSMASTER 6", 482 "SMBUSMASTER 7", 483 "PECI Agent 0", 484 "PECI Agent 1", 485 "PCH_CHIP_CPU_MAX_TEMP", 486 "PCH_CHIP_TEMP", 487 "PCH_CPU_TEMP", 488 "PCH_MCH_TEMP", 489 "PCH_DIM0_TEMP", 490 "PCH_DIM1_TEMP", 491 "PCH_DIM2_TEMP", 492 "PCH_DIM3_TEMP", 493 "BYTE_TEMP", 494 "PECI Agent 0 Calibration", 495 "PECI Agent 1 Calibration", 496 "", 497 "", 498 "Virtual_TEMP" 499 }; 500 501 #define NCT6792_TEMP_MASK 0x9fffff7e 502 #define NCT6792_VIRT_TEMP_MASK 0x80000000 503 504 static const char *const nct6793_temp_label[] = { 505 "", 506 "SYSTIN", 507 "CPUTIN", 508 "AUXTIN0", 509 "AUXTIN1", 510 "AUXTIN2", 511 "AUXTIN3", 512 "", 513 "SMBUSMASTER 0", 514 "SMBUSMASTER 1", 515 "", 516 "", 517 "", 518 "", 519 "", 520 "", 521 "PECI Agent 0", 522 "PECI Agent 1", 523 "PCH_CHIP_CPU_MAX_TEMP", 524 "PCH_CHIP_TEMP", 525 "PCH_CPU_TEMP", 526 "PCH_MCH_TEMP", 527 "Agent0 Dimm0 ", 528 "Agent0 Dimm1", 529 "Agent1 Dimm0", 530 "Agent1 Dimm1", 531 "BYTE_TEMP0", 532 "BYTE_TEMP1", 533 "PECI Agent 0 Calibration", 534 "PECI Agent 1 Calibration", 535 "", 536 "Virtual_TEMP" 537 }; 538 539 #define NCT6793_TEMP_MASK 0xbfff037e 540 #define NCT6793_VIRT_TEMP_MASK 0x80000000 541 542 static const char *const nct6795_temp_label[] = { 543 "", 544 "SYSTIN", 545 "CPUTIN", 546 "AUXTIN0", 547 "AUXTIN1", 548 "AUXTIN2", 549 "AUXTIN3", 550 "", 551 "SMBUSMASTER 0", 552 "SMBUSMASTER 1", 553 "SMBUSMASTER 2", 554 "SMBUSMASTER 3", 555 "SMBUSMASTER 4", 556 "SMBUSMASTER 5", 557 "SMBUSMASTER 6", 558 "SMBUSMASTER 7", 559 "PECI Agent 0", 560 "PECI Agent 1", 561 "PCH_CHIP_CPU_MAX_TEMP", 562 "PCH_CHIP_TEMP", 563 "PCH_CPU_TEMP", 564 "PCH_MCH_TEMP", 565 "Agent0 Dimm0", 566 "Agent0 Dimm1", 567 "Agent1 Dimm0", 568 "Agent1 Dimm1", 569 "BYTE_TEMP0", 570 "BYTE_TEMP1", 571 "PECI Agent 0 Calibration", 572 "PECI Agent 1 Calibration", 573 "", 574 "Virtual_TEMP" 575 }; 576 577 #define NCT6795_TEMP_MASK 0xbfffff7e 578 #define NCT6795_VIRT_TEMP_MASK 0x80000000 579 580 static const char *const nct6796_temp_label[] = { 581 "", 582 "SYSTIN", 583 "CPUTIN", 584 "AUXTIN0", 585 "AUXTIN1", 586 "AUXTIN2", 587 "AUXTIN3", 588 "AUXTIN4", 589 "SMBUSMASTER 0", 590 "SMBUSMASTER 1", 591 "Virtual_TEMP", 592 "Virtual_TEMP", 593 "", 594 "", 595 "", 596 "", 597 "PECI Agent 0", 598 "PECI Agent 1", 599 "PCH_CHIP_CPU_MAX_TEMP", 600 "PCH_CHIP_TEMP", 601 "PCH_CPU_TEMP", 602 "PCH_MCH_TEMP", 603 "Agent0 Dimm0", 604 "Agent0 Dimm1", 605 "Agent1 Dimm0", 606 "Agent1 Dimm1", 607 "BYTE_TEMP0", 608 "BYTE_TEMP1", 609 "PECI Agent 0 Calibration", 610 "PECI Agent 1 Calibration", 611 "", 612 "Virtual_TEMP" 613 }; 614 615 #define NCT6796_TEMP_MASK 0xbfff0ffe 616 #define NCT6796_VIRT_TEMP_MASK 0x80000c00 617 618 static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b }; 619 620 static const u16 NCT6798_REG_TEMP[] = { 621 0x27, 0x150, 0x670, 0x672, 0x674, 0x676, 0x678, 0x67a}; 622 623 static const u16 NCT6798_REG_TEMP_SOURCE[] = { 624 0x621, 0x622, 0xc26, 0xc27, 0xc28, 0xc29, 0xc2a, 0xc2b }; 625 626 static const u16 NCT6798_REG_TEMP_MON[] = { 627 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d, 0x4a0 }; 628 static const u16 NCT6798_REG_TEMP_OVER[] = { 629 0x39, 0x155, 0xc1a, 0xc1b, 0xc1c, 0xc1d, 0xc1e, 0xc1f }; 630 static const u16 NCT6798_REG_TEMP_HYST[] = { 631 0x3a, 0x153, 0xc20, 0xc21, 0xc22, 0xc23, 0xc24, 0xc25 }; 632 633 static const u16 NCT6798_REG_TEMP_CRIT[32] = { 634 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35, 0 }; 635 636 static const u16 NCT6798_REG_TEMP_ALTERNATE[32] = { 637 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0x496, 0, 638 0, 0, 0, 0, 0x4a2, 0, 0, 0, 639 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407, 640 0x408, 0x419, 0x41a, 0x4f4, 0x4f5 }; 641 642 static const char *const nct6798_temp_label[] = { 643 "", 644 "SYSTIN", 645 "CPUTIN", 646 "AUXTIN0", 647 "AUXTIN1", 648 "AUXTIN2", 649 "AUXTIN3", 650 "AUXTIN4", 651 "SMBUSMASTER 0", 652 "SMBUSMASTER 1", 653 "Virtual_TEMP", 654 "Virtual_TEMP", 655 "", 656 "", 657 "", 658 "", 659 "PECI Agent 0", 660 "PECI Agent 1", 661 "PCH_CHIP_CPU_MAX_TEMP", 662 "PCH_CHIP_TEMP", 663 "PCH_CPU_TEMP", 664 "PCH_MCH_TEMP", 665 "Agent0 Dimm0", 666 "Agent0 Dimm1", 667 "Agent1 Dimm0", 668 "Agent1 Dimm1", 669 "BYTE_TEMP0", 670 "BYTE_TEMP1", 671 "PECI Agent 0 Calibration", /* undocumented */ 672 "PECI Agent 1 Calibration", /* undocumented */ 673 "", 674 "Virtual_TEMP" 675 }; 676 677 #define NCT6798_TEMP_MASK 0xbfff0ffe 678 #define NCT6798_VIRT_TEMP_MASK 0x80000c00 679 680 static const u16 NCT6799_REG_ALARM[NUM_REG_ALARM] = { 681 0x459, 0x45A, 0x45B, 0x568, 0x45D, 0xc01 }; 682 683 static const s8 NCT6799_ALARM_BITS[NUM_ALARM_BITS] = { 684 0, 1, 2, 3, 8, -1, 20, 16, 17, 24, 25, 26, /* in0-in11 */ 685 27, 28, 29, 30, 31, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 686 6, 7, 11, 10, 23, 33, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 687 4, 5, 40, 41, 42, 43, 44, -1, -1, -1, -1, -1, /* temp1-temp12 */ 688 12, 9, /* intr0-intr1 */ 689 }; 690 691 static const s8 NCT6799_BEEP_BITS[NUM_BEEP_BITS] = { 692 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */ 693 12, 13, 14, 15, 34, 35, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 694 25, 26, 27, 28, 29, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 695 16, 17, 18, 19, 20, 21, 22, 23, -1, -1, -1, -1, /* temp1-temp12 */ 696 30, 31, 24 /* intr0-intr1, beep_en */ 697 }; 698 699 /* PECI Calibration only for NCT6799D, not NCT6796D-S */ 700 static const char *const nct6799_temp_label[] = { 701 "", 702 "SYSTIN", 703 "CPUTIN", 704 "AUXTIN0", 705 "AUXTIN1", 706 "AUXTIN2", 707 "AUXTIN3", 708 "AUXTIN4", 709 "SMBUSMASTER 0", 710 "SMBUSMASTER 1", 711 "Virtual_TEMP", 712 "Virtual_TEMP", 713 "", 714 "AUXTIN5", 715 "", 716 "", 717 "PECI Agent 0", 718 "PECI Agent 1", 719 "PCH_CHIP_CPU_MAX_TEMP", 720 "PCH_CHIP_TEMP", 721 "PCH_CPU_TEMP", 722 "PCH_MCH_TEMP", 723 "Agent0 Dimm0", 724 "Agent0 Dimm1", 725 "Agent1 Dimm0", 726 "Agent1 Dimm1", 727 "BYTE_TEMP0", 728 "BYTE_TEMP1", 729 "PECI/TSI Agent 0 Calibration", 730 "PECI/TSI Agent 1 Calibration", 731 "", 732 "Virtual_TEMP" 733 }; 734 735 #define NCT6799_TEMP_MASK 0xbfff2ffe 736 #define NCT6799_VIRT_TEMP_MASK 0x80000c00 737 738 /* NCT6102D/NCT6106D specific data */ 739 740 #define NCT6106_REG_VBAT 0x318 741 #define NCT6106_REG_DIODE 0x319 742 #define NCT6106_DIODE_MASK 0x01 743 744 static const u16 NCT6106_REG_IN_MAX[] = { 745 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 }; 746 static const u16 NCT6106_REG_IN_MIN[] = { 747 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 }; 748 static const u16 NCT6106_REG_IN[] = { 749 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 }; 750 751 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 }; 752 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a }; 753 static const u16 NCT6106_REG_TEMP_HYST[] = { 754 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 }; 755 static const u16 NCT6106_REG_TEMP_OVER[] = { 756 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 }; 757 static const u16 NCT6106_REG_TEMP_CRIT_L[] = { 758 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 }; 759 static const u16 NCT6106_REG_TEMP_CRIT_H[] = { 760 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 }; 761 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 }; 762 static const u16 NCT6106_REG_TEMP_CONFIG[] = { 763 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc }; 764 765 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 }; 766 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 }; 767 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 }; 768 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 }; 769 770 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 }; 771 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 }; 772 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c }; 773 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 }; 774 static const u16 NCT6106_REG_TEMP_SOURCE[] = { 775 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 }; 776 777 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a }; 778 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = { 779 0x11b, 0x12b, 0x13b }; 780 781 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c }; 782 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10 783 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d }; 784 785 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 }; 786 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 }; 787 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 }; 788 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 }; 789 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 }; 790 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 }; 791 792 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 }; 793 794 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 }; 795 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 }; 796 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a }; 797 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b }; 798 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c }; 799 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d }; 800 801 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 }; 802 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 }; 803 804 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = { 805 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d }; 806 807 static const s8 NCT6106_ALARM_BITS[NUM_ALARM_BITS] = { 808 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */ 809 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 810 32, 33, 34, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 811 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 812 48, -1, /* intr0-intr1 */ 813 }; 814 815 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = { 816 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 }; 817 818 static const s8 NCT6106_BEEP_BITS[NUM_BEEP_BITS] = { 819 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */ 820 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 821 24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 822 16, 17, 18, 19, 20, 21, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 823 34, -1, 32 /* intr0-intr1, beep_en */ 824 }; 825 826 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = { 827 [14] = 0x51, 828 [15] = 0x52, 829 [16] = 0x54, 830 }; 831 832 static const u16 NCT6106_REG_TEMP_CRIT[32] = { 833 [11] = 0x204, 834 [12] = 0x205, 835 }; 836 837 static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 }; 838 839 /* NCT6112D/NCT6114D/NCT6116D specific data */ 840 841 static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 }; 842 static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 }; 843 static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 }; 844 static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 }; 845 846 static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 }; 847 static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 }; 848 static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 }; 849 static const u16 NCT6116_REG_TEMP_SOURCE[] = { 850 0xb0, 0xb1, 0xb2 }; 851 852 static const u16 NCT6116_REG_CRITICAL_TEMP[] = { 853 0x11a, 0x12a, 0x13a, 0x19a, 0x1aa }; 854 static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = { 855 0x11b, 0x12b, 0x13b, 0x19b, 0x1ab }; 856 857 static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = { 858 0x11c, 0x12c, 0x13c, 0x19c, 0x1ac }; 859 static const u16 NCT6116_REG_CRITICAL_PWM[] = { 860 0x11d, 0x12d, 0x13d, 0x19d, 0x1ad }; 861 862 static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = { 863 0x114, 0x124, 0x134, 0x194, 0x1a4 }; 864 static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = { 865 0x115, 0x125, 0x135, 0x195, 0x1a5 }; 866 static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = { 867 0x116, 0x126, 0x136, 0x196, 0x1a6 }; 868 static const u16 NCT6116_REG_FAN_START_OUTPUT[] = { 869 0x117, 0x127, 0x137, 0x197, 0x1a7 }; 870 static const u16 NCT6116_REG_FAN_STOP_TIME[] = { 871 0x118, 0x128, 0x138, 0x198, 0x1a8 }; 872 static const u16 NCT6116_REG_TOLERANCE_H[] = { 873 0x112, 0x122, 0x132, 0x192, 0x1a2 }; 874 875 static const u16 NCT6116_REG_TARGET[] = { 876 0x111, 0x121, 0x131, 0x191, 0x1a1 }; 877 878 static const u16 NCT6116_REG_AUTO_TEMP[] = { 879 0x160, 0x170, 0x180, 0x1d0, 0x1e0 }; 880 static const u16 NCT6116_REG_AUTO_PWM[] = { 881 0x164, 0x174, 0x184, 0x1d4, 0x1e4 }; 882 883 static const s8 NCT6116_ALARM_BITS[NUM_ALARM_BITS] = { 884 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */ 885 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 886 32, 33, 34, 35, 36, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 887 16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 888 48, -1, /* intr0-intr1 */ 889 }; 890 891 static const s8 NCT6116_BEEP_BITS[NUM_BEEP_BITS] = { 892 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */ 893 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* in12-in23 */ 894 24, 25, 26, 27, 28, -1, -1, -1, -1, -1, -1, -1, /* fan1-fan12 */ 895 16, 17, 18, -1, -1, -1, -1, -1, -1, -1, -1, -1, /* temp1-temp12 */ 896 34, -1, 32 /* intr0-intr1, beep_en */ 897 }; 898 899 static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b }; 900 901 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode) 902 { 903 if (mode == 0 && pwm == 255) 904 return off; 905 return mode + 1; 906 } 907 908 static int pwm_enable_to_reg(enum pwm_enable mode) 909 { 910 if (mode == off) 911 return 0; 912 return mode - 1; 913 } 914 915 /* 916 * Conversions 917 */ 918 919 /* 1 is DC mode, output in ms */ 920 static unsigned int step_time_from_reg(u8 reg, u8 mode) 921 { 922 return mode ? 400 * reg : 100 * reg; 923 } 924 925 static u8 step_time_to_reg(unsigned int msec, u8 mode) 926 { 927 return clamp_val((mode ? (msec + 200) / 400 : 928 (msec + 50) / 100), 1, 255); 929 } 930 931 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg) 932 { 933 if (reg == 0 || reg == 255) 934 return 0; 935 return 1350000U / (reg << divreg); 936 } 937 938 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg) 939 { 940 if ((reg & 0xff1f) == 0xff1f) 941 return 0; 942 943 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3); 944 945 if (reg == 0) 946 return 0; 947 948 return 1350000U / reg; 949 } 950 951 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg) 952 { 953 if (reg == 0 || reg == 0xffff) 954 return 0; 955 956 /* 957 * Even though the registers are 16 bit wide, the fan divisor 958 * still applies. 959 */ 960 return 1350000U / (reg << divreg); 961 } 962 963 static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg) 964 { 965 return reg; 966 } 967 968 static u16 fan_to_reg(u32 fan, unsigned int divreg) 969 { 970 if (!fan) 971 return 0; 972 973 return (1350000U / fan) >> divreg; 974 } 975 976 static inline unsigned int 977 div_from_reg(u8 reg) 978 { 979 return BIT(reg); 980 } 981 982 /* 983 * Some of the voltage inputs have internal scaling, the tables below 984 * contain 8 (the ADC LSB in mV) * scaling factor * 100 985 */ 986 static const u16 scale_in[15] = { 987 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800, 988 800, 800 989 }; 990 991 /* 992 * NCT6798 scaling: 993 * CPUVC, IN1, AVSB, 3VCC, IN0, IN8, IN4, 3VSB, VBAT, VTT, IN5, IN6, IN2, 994 * IN3, IN7, IN9, VHIF, IN10 995 * 15-17 for NCT6799 only 996 */ 997 static const u16 scale_in_6798[NUM_IN] = { 998 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 1600, 1600, 1600, 800, 999 800, 800, 800, 1600, 800 1000 }; 1001 1002 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scales) 1003 { 1004 return DIV_ROUND_CLOSEST(reg * scales[nr], 100); 1005 } 1006 1007 static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scales) 1008 { 1009 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scales[nr]), 0, 255); 1010 } 1011 1012 /* TSI temperatures are in 8.3 format */ 1013 static inline unsigned int tsi_temp_from_reg(unsigned int reg) 1014 { 1015 return (reg >> 5) * 125; 1016 } 1017 1018 /* 1019 * Data structures and manipulation thereof 1020 */ 1021 1022 struct sensor_device_template { 1023 struct device_attribute dev_attr; 1024 union { 1025 struct { 1026 u8 nr; 1027 u8 index; 1028 } s; 1029 int index; 1030 } u; 1031 bool s2; /* true if both index and nr are used */ 1032 }; 1033 1034 struct sensor_device_attr_u { 1035 union { 1036 struct sensor_device_attribute a1; 1037 struct sensor_device_attribute_2 a2; 1038 } u; 1039 char name[32]; 1040 }; 1041 1042 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \ 1043 .attr = {.name = _template, .mode = _mode }, \ 1044 .show = _show, \ 1045 .store = _store, \ 1046 } 1047 1048 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \ 1049 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \ 1050 .u.index = _index, \ 1051 .s2 = false } 1052 1053 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \ 1054 _nr, _index) \ 1055 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \ 1056 .u.s.index = _index, \ 1057 .u.s.nr = _nr, \ 1058 .s2 = true } 1059 1060 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \ 1061 static struct sensor_device_template sensor_dev_template_##_name \ 1062 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \ 1063 _index) 1064 1065 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \ 1066 _nr, _index) \ 1067 static struct sensor_device_template sensor_dev_template_##_name \ 1068 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \ 1069 _nr, _index) 1070 1071 struct sensor_template_group { 1072 struct sensor_device_template **templates; 1073 umode_t (*is_visible)(struct kobject *, struct attribute *, int); 1074 int base; 1075 }; 1076 1077 static int nct6775_add_template_attr_group(struct device *dev, struct nct6775_data *data, 1078 const struct sensor_template_group *tg, int repeat) 1079 { 1080 struct attribute_group *group; 1081 struct sensor_device_attr_u *su; 1082 struct sensor_device_attribute *a; 1083 struct sensor_device_attribute_2 *a2; 1084 struct attribute **attrs; 1085 struct sensor_device_template **t; 1086 int i, count; 1087 1088 if (repeat <= 0) 1089 return -EINVAL; 1090 1091 t = tg->templates; 1092 for (count = 0; *t; t++, count++) 1093 ; 1094 1095 if (count == 0) 1096 return -EINVAL; 1097 1098 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL); 1099 if (group == NULL) 1100 return -ENOMEM; 1101 1102 attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs), 1103 GFP_KERNEL); 1104 if (attrs == NULL) 1105 return -ENOMEM; 1106 1107 su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)), 1108 GFP_KERNEL); 1109 if (su == NULL) 1110 return -ENOMEM; 1111 1112 group->attrs = attrs; 1113 group->is_visible = tg->is_visible; 1114 1115 for (i = 0; i < repeat; i++) { 1116 t = tg->templates; 1117 while (*t != NULL) { 1118 snprintf(su->name, sizeof(su->name), 1119 (*t)->dev_attr.attr.name, tg->base + i); 1120 if ((*t)->s2) { 1121 a2 = &su->u.a2; 1122 sysfs_attr_init(&a2->dev_attr.attr); 1123 a2->dev_attr.attr.name = su->name; 1124 a2->nr = (*t)->u.s.nr + i; 1125 a2->index = (*t)->u.s.index; 1126 a2->dev_attr.attr.mode = 1127 (*t)->dev_attr.attr.mode; 1128 a2->dev_attr.show = (*t)->dev_attr.show; 1129 a2->dev_attr.store = (*t)->dev_attr.store; 1130 *attrs = &a2->dev_attr.attr; 1131 } else { 1132 a = &su->u.a1; 1133 sysfs_attr_init(&a->dev_attr.attr); 1134 a->dev_attr.attr.name = su->name; 1135 a->index = (*t)->u.index + i; 1136 a->dev_attr.attr.mode = 1137 (*t)->dev_attr.attr.mode; 1138 a->dev_attr.show = (*t)->dev_attr.show; 1139 a->dev_attr.store = (*t)->dev_attr.store; 1140 *attrs = &a->dev_attr.attr; 1141 } 1142 attrs++; 1143 su++; 1144 t++; 1145 } 1146 } 1147 1148 return nct6775_add_attr_group(data, group); 1149 } 1150 1151 bool nct6775_reg_is_word_sized(struct nct6775_data *data, u16 reg) 1152 { 1153 switch (data->kind) { 1154 case nct6106: 1155 return reg == 0x20 || reg == 0x22 || reg == 0x24 || 1156 (reg >= 0x59 && reg < 0x69 && (reg & 1)) || 1157 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || 1158 reg == 0x111 || reg == 0x121 || reg == 0x131; 1159 case nct6116: 1160 return reg == 0x20 || reg == 0x22 || reg == 0x24 || 1161 reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b || 1162 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 || 1163 reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 || 1164 reg == 0x191 || reg == 0x1a1; 1165 case nct6775: 1166 return (((reg & 0xff00) == 0x100 || 1167 (reg & 0xff00) == 0x200) && 1168 ((reg & 0x00ff) == 0x50 || 1169 (reg & 0x00ff) == 0x53 || 1170 (reg & 0x00ff) == 0x55)) || 1171 (reg & 0xfff0) == 0x630 || 1172 reg == 0x640 || reg == 0x642 || 1173 reg == 0x662 || reg == 0x669 || 1174 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || 1175 reg == 0x73 || reg == 0x75 || reg == 0x77; 1176 case nct6776: 1177 return (((reg & 0xff00) == 0x100 || 1178 (reg & 0xff00) == 0x200) && 1179 ((reg & 0x00ff) == 0x50 || 1180 (reg & 0x00ff) == 0x53 || 1181 (reg & 0x00ff) == 0x55)) || 1182 (reg & 0xfff0) == 0x630 || 1183 reg == 0x402 || 1184 (reg >= 0x409 && reg < 0x419 && (reg & 1)) || 1185 reg == 0x640 || reg == 0x642 || 1186 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || 1187 reg == 0x73 || reg == 0x75 || reg == 0x77; 1188 case nct6779: 1189 case nct6791: 1190 case nct6792: 1191 case nct6793: 1192 case nct6795: 1193 case nct6796: 1194 case nct6797: 1195 case nct6798: 1196 case nct6799: 1197 return reg == 0x150 || reg == 0x153 || reg == 0x155 || 1198 (reg & 0xfff0) == 0x4c0 || 1199 reg == 0x402 || 1200 (reg >= 0x409 && reg < 0x419 && (reg & 1)) || 1201 reg == 0x63a || reg == 0x63c || reg == 0x63e || 1202 reg == 0x640 || reg == 0x642 || reg == 0x64a || 1203 reg == 0x64c || 1204 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 || 1205 reg == 0x7b || reg == 0x7d; 1206 } 1207 return false; 1208 } 1209 EXPORT_SYMBOL_GPL(nct6775_reg_is_word_sized); 1210 1211 /* We left-align 8-bit temperature values to make the code simpler */ 1212 static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val) 1213 { 1214 int err; 1215 1216 err = nct6775_read_value(data, reg, val); 1217 if (err) 1218 return err; 1219 1220 if (!nct6775_reg_is_word_sized(data, reg)) 1221 *val <<= 8; 1222 1223 return 0; 1224 } 1225 1226 /* This function assumes that the caller holds data->update_lock */ 1227 static int nct6775_write_fan_div(struct nct6775_data *data, int nr) 1228 { 1229 u16 reg; 1230 int err; 1231 u16 fandiv_reg = nr < 2 ? NCT6775_REG_FANDIV1 : NCT6775_REG_FANDIV2; 1232 unsigned int oddshift = (nr & 1) * 4; /* masks shift by four if nr is odd */ 1233 1234 err = nct6775_read_value(data, fandiv_reg, ®); 1235 if (err) 1236 return err; 1237 reg &= 0x70 >> oddshift; 1238 reg |= (data->fan_div[nr] & 0x7) << oddshift; 1239 return nct6775_write_value(data, fandiv_reg, reg); 1240 } 1241 1242 static int nct6775_write_fan_div_common(struct nct6775_data *data, int nr) 1243 { 1244 if (data->kind == nct6775) 1245 return nct6775_write_fan_div(data, nr); 1246 return 0; 1247 } 1248 1249 static int nct6775_update_fan_div(struct nct6775_data *data) 1250 { 1251 int err; 1252 u16 i; 1253 1254 err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &i); 1255 if (err) 1256 return err; 1257 data->fan_div[0] = i & 0x7; 1258 data->fan_div[1] = (i & 0x70) >> 4; 1259 err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &i); 1260 if (err) 1261 return err; 1262 data->fan_div[2] = i & 0x7; 1263 if (data->has_fan & BIT(3)) 1264 data->fan_div[3] = (i & 0x70) >> 4; 1265 1266 return 0; 1267 } 1268 1269 static int nct6775_update_fan_div_common(struct nct6775_data *data) 1270 { 1271 if (data->kind == nct6775) 1272 return nct6775_update_fan_div(data); 1273 return 0; 1274 } 1275 1276 static int nct6775_init_fan_div(struct nct6775_data *data) 1277 { 1278 int i, err; 1279 1280 err = nct6775_update_fan_div_common(data); 1281 if (err) 1282 return err; 1283 1284 /* 1285 * For all fans, start with highest divider value if the divider 1286 * register is not initialized. This ensures that we get a 1287 * reading from the fan count register, even if it is not optimal. 1288 * We'll compute a better divider later on. 1289 */ 1290 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) { 1291 if (!(data->has_fan & BIT(i))) 1292 continue; 1293 if (data->fan_div[i] == 0) { 1294 data->fan_div[i] = 7; 1295 err = nct6775_write_fan_div_common(data, i); 1296 if (err) 1297 return err; 1298 } 1299 } 1300 1301 return 0; 1302 } 1303 1304 static int nct6775_init_fan_common(struct device *dev, 1305 struct nct6775_data *data) 1306 { 1307 int i, err; 1308 u16 reg; 1309 1310 if (data->has_fan_div) { 1311 err = nct6775_init_fan_div(data); 1312 if (err) 1313 return err; 1314 } 1315 1316 /* 1317 * If fan_min is not set (0), set it to 0xff to disable it. This 1318 * prevents the unnecessary warning when fanX_min is reported as 0. 1319 */ 1320 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) { 1321 if (data->has_fan_min & BIT(i)) { 1322 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®); 1323 if (err) 1324 return err; 1325 if (!reg) { 1326 err = nct6775_write_value(data, data->REG_FAN_MIN[i], 1327 data->has_fan_div ? 0xff : 0xff1f); 1328 if (err) 1329 return err; 1330 } 1331 } 1332 } 1333 1334 return 0; 1335 } 1336 1337 static int nct6775_select_fan_div(struct device *dev, 1338 struct nct6775_data *data, int nr, u16 reg) 1339 { 1340 int err; 1341 u8 fan_div = data->fan_div[nr]; 1342 u16 fan_min; 1343 1344 if (!data->has_fan_div) 1345 return 0; 1346 1347 /* 1348 * If we failed to measure the fan speed, or the reported value is not 1349 * in the optimal range, and the clock divider can be modified, 1350 * let's try that for next time. 1351 */ 1352 if (reg == 0x00 && fan_div < 0x07) 1353 fan_div++; 1354 else if (reg != 0x00 && reg < 0x30 && fan_div > 0) 1355 fan_div--; 1356 1357 if (fan_div != data->fan_div[nr]) { 1358 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n", 1359 nr + 1, div_from_reg(data->fan_div[nr]), 1360 div_from_reg(fan_div)); 1361 1362 /* Preserve min limit if possible */ 1363 if (data->has_fan_min & BIT(nr)) { 1364 fan_min = data->fan_min[nr]; 1365 if (fan_div > data->fan_div[nr]) { 1366 if (fan_min != 255 && fan_min > 1) 1367 fan_min >>= 1; 1368 } else { 1369 if (fan_min != 255) { 1370 fan_min <<= 1; 1371 if (fan_min > 254) 1372 fan_min = 254; 1373 } 1374 } 1375 if (fan_min != data->fan_min[nr]) { 1376 data->fan_min[nr] = fan_min; 1377 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], fan_min); 1378 if (err) 1379 return err; 1380 } 1381 } 1382 data->fan_div[nr] = fan_div; 1383 err = nct6775_write_fan_div_common(data, nr); 1384 if (err) 1385 return err; 1386 } 1387 1388 return 0; 1389 } 1390 1391 static int nct6775_update_pwm(struct device *dev) 1392 { 1393 struct nct6775_data *data = dev_get_drvdata(dev); 1394 int i, j, err; 1395 u16 fanmodecfg, reg; 1396 bool duty_is_dc; 1397 1398 for (i = 0; i < data->pwm_num; i++) { 1399 if (!(data->has_pwm & BIT(i))) 1400 continue; 1401 1402 err = nct6775_read_value(data, data->REG_PWM_MODE[i], ®); 1403 if (err) 1404 return err; 1405 duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]); 1406 data->pwm_mode[i] = !duty_is_dc; 1407 1408 err = nct6775_read_value(data, data->REG_FAN_MODE[i], &fanmodecfg); 1409 if (err) 1410 return err; 1411 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) { 1412 if (data->REG_PWM[j] && data->REG_PWM[j][i]) { 1413 err = nct6775_read_value(data, data->REG_PWM[j][i], ®); 1414 if (err) 1415 return err; 1416 data->pwm[j][i] = reg; 1417 } 1418 } 1419 1420 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i], 1421 (fanmodecfg >> 4) & 7); 1422 1423 if (!data->temp_tolerance[0][i] || 1424 data->pwm_enable[i] != speed_cruise) 1425 data->temp_tolerance[0][i] = fanmodecfg & 0x0f; 1426 if (!data->target_speed_tolerance[i] || 1427 data->pwm_enable[i] == speed_cruise) { 1428 u8 t = fanmodecfg & 0x0f; 1429 1430 if (data->REG_TOLERANCE_H) { 1431 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®); 1432 if (err) 1433 return err; 1434 t |= (reg & 0x70) >> 1; 1435 } 1436 data->target_speed_tolerance[i] = t; 1437 } 1438 1439 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], ®); 1440 if (err) 1441 return err; 1442 data->temp_tolerance[1][i] = reg; 1443 1444 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], ®); 1445 if (err) 1446 return err; 1447 data->pwm_temp_sel[i] = reg & 0x1f; 1448 /* If fan can stop, report floor as 0 */ 1449 if (reg & 0x80) 1450 data->pwm[2][i] = 0; 1451 1452 if (!data->REG_WEIGHT_TEMP_SEL[i]) 1453 continue; 1454 1455 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], ®); 1456 if (err) 1457 return err; 1458 data->pwm_weight_temp_sel[i] = reg & 0x1f; 1459 /* If weight is disabled, report weight source as 0 */ 1460 if (!(reg & 0x80)) 1461 data->pwm_weight_temp_sel[i] = 0; 1462 1463 /* Weight temp data */ 1464 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) { 1465 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], ®); 1466 if (err) 1467 return err; 1468 data->weight_temp[j][i] = reg; 1469 } 1470 } 1471 1472 return 0; 1473 } 1474 1475 static int nct6775_update_pwm_limits(struct device *dev) 1476 { 1477 struct nct6775_data *data = dev_get_drvdata(dev); 1478 int i, j, err; 1479 u16 reg, reg_t; 1480 1481 for (i = 0; i < data->pwm_num; i++) { 1482 if (!(data->has_pwm & BIT(i))) 1483 continue; 1484 1485 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) { 1486 err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], ®); 1487 if (err) 1488 return err; 1489 data->fan_time[j][i] = reg; 1490 } 1491 1492 err = nct6775_read_value(data, data->REG_TARGET[i], ®_t); 1493 if (err) 1494 return err; 1495 1496 /* Update only in matching mode or if never updated */ 1497 if (!data->target_temp[i] || 1498 data->pwm_enable[i] == thermal_cruise) 1499 data->target_temp[i] = reg_t & data->target_temp_mask; 1500 if (!data->target_speed[i] || 1501 data->pwm_enable[i] == speed_cruise) { 1502 if (data->REG_TOLERANCE_H) { 1503 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®); 1504 if (err) 1505 return err; 1506 reg_t |= (reg & 0x0f) << 8; 1507 } 1508 data->target_speed[i] = reg_t; 1509 } 1510 1511 for (j = 0; j < data->auto_pwm_num; j++) { 1512 err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), ®); 1513 if (err) 1514 return err; 1515 data->auto_pwm[i][j] = reg; 1516 1517 err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), ®); 1518 if (err) 1519 return err; 1520 data->auto_temp[i][j] = reg; 1521 } 1522 1523 /* critical auto_pwm temperature data */ 1524 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], ®); 1525 if (err) 1526 return err; 1527 data->auto_temp[i][data->auto_pwm_num] = reg; 1528 1529 switch (data->kind) { 1530 case nct6775: 1531 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], ®); 1532 if (err) 1533 return err; 1534 data->auto_pwm[i][data->auto_pwm_num] = 1535 (reg & 0x02) ? 0xff : 0x00; 1536 break; 1537 case nct6776: 1538 data->auto_pwm[i][data->auto_pwm_num] = 0xff; 1539 break; 1540 case nct6106: 1541 case nct6116: 1542 case nct6779: 1543 case nct6791: 1544 case nct6792: 1545 case nct6793: 1546 case nct6795: 1547 case nct6796: 1548 case nct6797: 1549 case nct6798: 1550 case nct6799: 1551 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], ®); 1552 if (err) 1553 return err; 1554 if (reg & data->CRITICAL_PWM_ENABLE_MASK) { 1555 err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], ®); 1556 if (err) 1557 return err; 1558 } else { 1559 reg = 0xff; 1560 } 1561 data->auto_pwm[i][data->auto_pwm_num] = reg; 1562 break; 1563 } 1564 } 1565 1566 return 0; 1567 } 1568 1569 struct nct6775_data *nct6775_update_device(struct device *dev) 1570 { 1571 struct nct6775_data *data = dev_get_drvdata(dev); 1572 int i, j, err = 0; 1573 u16 reg; 1574 1575 mutex_lock(&data->update_lock); 1576 1577 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 1578 || !data->valid) { 1579 /* Fan clock dividers */ 1580 err = nct6775_update_fan_div_common(data); 1581 if (err) 1582 goto out; 1583 1584 /* Measured voltages and limits */ 1585 for (i = 0; i < data->in_num; i++) { 1586 if (!(data->have_in & BIT(i))) 1587 continue; 1588 1589 err = nct6775_read_value(data, data->REG_VIN[i], ®); 1590 if (err) 1591 goto out; 1592 data->in[i][0] = reg; 1593 1594 err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], ®); 1595 if (err) 1596 goto out; 1597 data->in[i][1] = reg; 1598 1599 err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], ®); 1600 if (err) 1601 goto out; 1602 data->in[i][2] = reg; 1603 } 1604 1605 /* Measured fan speeds and limits */ 1606 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) { 1607 if (!(data->has_fan & BIT(i))) 1608 continue; 1609 1610 err = nct6775_read_value(data, data->REG_FAN[i], ®); 1611 if (err) 1612 goto out; 1613 data->rpm[i] = data->fan_from_reg(reg, 1614 data->fan_div[i]); 1615 1616 if (data->has_fan_min & BIT(i)) { 1617 u16 tmp; 1618 1619 err = nct6775_read_value(data, data->REG_FAN_MIN[i], &tmp); 1620 if (err) 1621 goto out; 1622 data->fan_min[i] = tmp; 1623 } 1624 1625 if (data->REG_FAN_PULSES[i]) { 1626 u16 tmp; 1627 1628 err = nct6775_read_value(data, data->REG_FAN_PULSES[i], &tmp); 1629 if (err) 1630 goto out; 1631 data->fan_pulses[i] = (tmp >> data->FAN_PULSE_SHIFT[i]) & 0x03; 1632 } 1633 1634 err = nct6775_select_fan_div(dev, data, i, reg); 1635 if (err) 1636 goto out; 1637 } 1638 1639 err = nct6775_update_pwm(dev); 1640 if (err) 1641 goto out; 1642 1643 err = nct6775_update_pwm_limits(dev); 1644 if (err) 1645 goto out; 1646 1647 /* Measured temperatures and limits */ 1648 for (i = 0; i < NUM_TEMP; i++) { 1649 if (!(data->have_temp & BIT(i))) 1650 continue; 1651 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) { 1652 if (data->reg_temp[j][i]) { 1653 err = nct6775_read_temp(data, data->reg_temp[j][i], ®); 1654 if (err) 1655 goto out; 1656 data->temp[j][i] = reg; 1657 } 1658 } 1659 if (i >= NUM_TEMP_FIXED || 1660 !(data->have_temp_fixed & BIT(i))) 1661 continue; 1662 err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], ®); 1663 if (err) 1664 goto out; 1665 data->temp_offset[i] = reg; 1666 } 1667 1668 for (i = 0; i < NUM_TSI_TEMP; i++) { 1669 if (!(data->have_tsi_temp & BIT(i))) 1670 continue; 1671 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], ®); 1672 if (err) 1673 goto out; 1674 data->tsi_temp[i] = reg; 1675 } 1676 1677 data->alarms = 0; 1678 for (i = 0; i < NUM_REG_ALARM; i++) { 1679 u16 alarm; 1680 1681 if (!data->REG_ALARM[i]) 1682 continue; 1683 err = nct6775_read_value(data, data->REG_ALARM[i], &alarm); 1684 if (err) 1685 goto out; 1686 data->alarms |= ((u64)alarm) << (i << 3); 1687 } 1688 1689 data->beeps = 0; 1690 for (i = 0; i < NUM_REG_BEEP; i++) { 1691 u16 beep; 1692 1693 if (!data->REG_BEEP[i]) 1694 continue; 1695 err = nct6775_read_value(data, data->REG_BEEP[i], &beep); 1696 if (err) 1697 goto out; 1698 data->beeps |= ((u64)beep) << (i << 3); 1699 } 1700 1701 data->last_updated = jiffies; 1702 data->valid = true; 1703 } 1704 out: 1705 mutex_unlock(&data->update_lock); 1706 return err ? ERR_PTR(err) : data; 1707 } 1708 EXPORT_SYMBOL_GPL(nct6775_update_device); 1709 1710 /* 1711 * Sysfs callback functions 1712 */ 1713 static ssize_t 1714 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf) 1715 { 1716 struct nct6775_data *data = nct6775_update_device(dev); 1717 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1718 int index = sattr->index; 1719 int nr = sattr->nr; 1720 1721 if (IS_ERR(data)) 1722 return PTR_ERR(data); 1723 1724 return sprintf(buf, "%ld\n", 1725 in_from_reg(data->in[nr][index], nr, data->scale_in)); 1726 } 1727 1728 static ssize_t 1729 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf, 1730 size_t count) 1731 { 1732 struct nct6775_data *data = dev_get_drvdata(dev); 1733 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1734 int index = sattr->index; 1735 int nr = sattr->nr; 1736 unsigned long val; 1737 int err; 1738 1739 err = kstrtoul(buf, 10, &val); 1740 if (err < 0) 1741 return err; 1742 mutex_lock(&data->update_lock); 1743 data->in[nr][index] = in_to_reg(val, nr, data->scale_in); 1744 err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]); 1745 mutex_unlock(&data->update_lock); 1746 return err ? : count; 1747 } 1748 1749 ssize_t 1750 nct6775_show_alarm(struct device *dev, struct device_attribute *attr, char *buf) 1751 { 1752 struct nct6775_data *data = nct6775_update_device(dev); 1753 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1754 int nr; 1755 1756 if (IS_ERR(data)) 1757 return PTR_ERR(data); 1758 1759 nr = data->ALARM_BITS[sattr->index]; 1760 return sprintf(buf, "%u\n", 1761 (unsigned int)((data->alarms >> nr) & 0x01)); 1762 } 1763 EXPORT_SYMBOL_GPL(nct6775_show_alarm); 1764 1765 static int find_temp_source(struct nct6775_data *data, int index, int count) 1766 { 1767 int source = data->temp_src[index]; 1768 int nr, err; 1769 1770 for (nr = 0; nr < count; nr++) { 1771 u16 src; 1772 1773 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr], &src); 1774 if (err) 1775 return err; 1776 if ((src & 0x1f) == source) 1777 return nr; 1778 } 1779 return -ENODEV; 1780 } 1781 1782 static ssize_t 1783 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf) 1784 { 1785 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1786 struct nct6775_data *data = nct6775_update_device(dev); 1787 unsigned int alarm = 0; 1788 int nr; 1789 1790 if (IS_ERR(data)) 1791 return PTR_ERR(data); 1792 1793 /* 1794 * For temperatures, there is no fixed mapping from registers to alarm 1795 * bits. Alarm bits are determined by the temperature source mapping. 1796 */ 1797 nr = find_temp_source(data, sattr->index, data->num_temp_alarms); 1798 if (nr >= 0) { 1799 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE]; 1800 1801 alarm = (data->alarms >> bit) & 0x01; 1802 } 1803 return sprintf(buf, "%u\n", alarm); 1804 } 1805 1806 ssize_t 1807 nct6775_show_beep(struct device *dev, struct device_attribute *attr, char *buf) 1808 { 1809 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1810 struct nct6775_data *data = nct6775_update_device(dev); 1811 int nr; 1812 1813 if (IS_ERR(data)) 1814 return PTR_ERR(data); 1815 1816 nr = data->BEEP_BITS[sattr->index]; 1817 1818 return sprintf(buf, "%u\n", 1819 (unsigned int)((data->beeps >> nr) & 0x01)); 1820 } 1821 EXPORT_SYMBOL_GPL(nct6775_show_beep); 1822 1823 ssize_t 1824 nct6775_store_beep(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 1825 { 1826 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1827 struct nct6775_data *data = dev_get_drvdata(dev); 1828 int nr = data->BEEP_BITS[sattr->index]; 1829 int regindex = nr >> 3; 1830 unsigned long val; 1831 int err; 1832 1833 err = kstrtoul(buf, 10, &val); 1834 if (err < 0) 1835 return err; 1836 if (val > 1) 1837 return -EINVAL; 1838 1839 mutex_lock(&data->update_lock); 1840 if (val) 1841 data->beeps |= (1ULL << nr); 1842 else 1843 data->beeps &= ~(1ULL << nr); 1844 err = nct6775_write_value(data, data->REG_BEEP[regindex], 1845 (data->beeps >> (regindex << 3)) & 0xff); 1846 mutex_unlock(&data->update_lock); 1847 return err ? : count; 1848 } 1849 EXPORT_SYMBOL_GPL(nct6775_store_beep); 1850 1851 static ssize_t 1852 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf) 1853 { 1854 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1855 struct nct6775_data *data = nct6775_update_device(dev); 1856 unsigned int beep = 0; 1857 int nr; 1858 1859 if (IS_ERR(data)) 1860 return PTR_ERR(data); 1861 1862 /* 1863 * For temperatures, there is no fixed mapping from registers to beep 1864 * enable bits. Beep enable bits are determined by the temperature 1865 * source mapping. 1866 */ 1867 nr = find_temp_source(data, sattr->index, data->num_temp_beeps); 1868 if (nr >= 0) { 1869 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE]; 1870 1871 beep = (data->beeps >> bit) & 0x01; 1872 } 1873 return sprintf(buf, "%u\n", beep); 1874 } 1875 1876 static ssize_t 1877 store_temp_beep(struct device *dev, struct device_attribute *attr, 1878 const char *buf, size_t count) 1879 { 1880 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 1881 struct nct6775_data *data = dev_get_drvdata(dev); 1882 int nr, bit, regindex; 1883 unsigned long val; 1884 int err; 1885 1886 err = kstrtoul(buf, 10, &val); 1887 if (err < 0) 1888 return err; 1889 if (val > 1) 1890 return -EINVAL; 1891 1892 nr = find_temp_source(data, sattr->index, data->num_temp_beeps); 1893 if (nr < 0) 1894 return nr; 1895 1896 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE]; 1897 regindex = bit >> 3; 1898 1899 mutex_lock(&data->update_lock); 1900 if (val) 1901 data->beeps |= (1ULL << bit); 1902 else 1903 data->beeps &= ~(1ULL << bit); 1904 err = nct6775_write_value(data, data->REG_BEEP[regindex], 1905 (data->beeps >> (regindex << 3)) & 0xff); 1906 mutex_unlock(&data->update_lock); 1907 1908 return err ? : count; 1909 } 1910 1911 static umode_t nct6775_in_is_visible(struct kobject *kobj, 1912 struct attribute *attr, int index) 1913 { 1914 struct device *dev = kobj_to_dev(kobj); 1915 struct nct6775_data *data = dev_get_drvdata(dev); 1916 int in = index / 5; /* voltage index */ 1917 int nr = index % 5; /* attribute index */ 1918 1919 if (nr == 1 && data->ALARM_BITS[in] == -1) 1920 return 0; 1921 1922 if (!(data->have_in & BIT(in))) 1923 return 0; 1924 1925 return nct6775_attr_mode(data, attr); 1926 } 1927 1928 SENSOR_TEMPLATE_2(in_input, "in%d_input", 0444, show_in_reg, NULL, 0, 0); 1929 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", 0444, nct6775_show_alarm, NULL, 0); 1930 SENSOR_TEMPLATE(in_beep, "in%d_beep", 0644, nct6775_show_beep, nct6775_store_beep, 0); 1931 SENSOR_TEMPLATE_2(in_min, "in%d_min", 0644, show_in_reg, store_in_reg, 0, 1); 1932 SENSOR_TEMPLATE_2(in_max, "in%d_max", 0644, show_in_reg, store_in_reg, 0, 2); 1933 1934 /* 1935 * nct6775_in_is_visible uses the index into the following array 1936 * to determine if attributes should be created or not. 1937 * Any change in order or content must be matched. 1938 */ 1939 static struct sensor_device_template *nct6775_attributes_in_template[] = { 1940 &sensor_dev_template_in_input, 1941 &sensor_dev_template_in_alarm, 1942 &sensor_dev_template_in_beep, 1943 &sensor_dev_template_in_min, 1944 &sensor_dev_template_in_max, 1945 NULL 1946 }; 1947 1948 static const struct sensor_template_group nct6775_in_template_group = { 1949 .templates = nct6775_attributes_in_template, 1950 .is_visible = nct6775_in_is_visible, 1951 }; 1952 1953 static ssize_t 1954 show_fan(struct device *dev, struct device_attribute *attr, char *buf) 1955 { 1956 struct nct6775_data *data = nct6775_update_device(dev); 1957 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1958 int nr = sattr->index; 1959 1960 if (IS_ERR(data)) 1961 return PTR_ERR(data); 1962 1963 return sprintf(buf, "%d\n", data->rpm[nr]); 1964 } 1965 1966 static ssize_t 1967 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf) 1968 { 1969 struct nct6775_data *data = nct6775_update_device(dev); 1970 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1971 int nr = sattr->index; 1972 1973 if (IS_ERR(data)) 1974 return PTR_ERR(data); 1975 1976 return sprintf(buf, "%d\n", 1977 data->fan_from_reg_min(data->fan_min[nr], 1978 data->fan_div[nr])); 1979 } 1980 1981 static ssize_t 1982 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf) 1983 { 1984 struct nct6775_data *data = nct6775_update_device(dev); 1985 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 1986 int nr = sattr->index; 1987 1988 if (IS_ERR(data)) 1989 return PTR_ERR(data); 1990 1991 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr])); 1992 } 1993 1994 static ssize_t 1995 store_fan_min(struct device *dev, struct device_attribute *attr, 1996 const char *buf, size_t count) 1997 { 1998 struct nct6775_data *data = dev_get_drvdata(dev); 1999 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2000 int nr = sattr->index; 2001 unsigned long val; 2002 unsigned int reg; 2003 u8 new_div; 2004 int err; 2005 2006 err = kstrtoul(buf, 10, &val); 2007 if (err < 0) 2008 return err; 2009 2010 mutex_lock(&data->update_lock); 2011 if (!data->has_fan_div) { 2012 /* NCT6776F or NCT6779D; we know this is a 13 bit register */ 2013 if (!val) { 2014 val = 0xff1f; 2015 } else { 2016 if (val > 1350000U) 2017 val = 135000U; 2018 val = 1350000U / val; 2019 val = (val & 0x1f) | ((val << 3) & 0xff00); 2020 } 2021 data->fan_min[nr] = val; 2022 goto write_min; /* Leave fan divider alone */ 2023 } 2024 if (!val) { 2025 /* No min limit, alarm disabled */ 2026 data->fan_min[nr] = 255; 2027 new_div = data->fan_div[nr]; /* No change */ 2028 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1); 2029 goto write_div; 2030 } 2031 reg = 1350000U / val; 2032 if (reg >= 128 * 255) { 2033 /* 2034 * Speed below this value cannot possibly be represented, 2035 * even with the highest divider (128) 2036 */ 2037 data->fan_min[nr] = 254; 2038 new_div = 7; /* 128 == BIT(7) */ 2039 dev_warn(dev, 2040 "fan%u low limit %lu below minimum %u, set to minimum\n", 2041 nr + 1, val, data->fan_from_reg_min(254, 7)); 2042 } else if (!reg) { 2043 /* 2044 * Speed above this value cannot possibly be represented, 2045 * even with the lowest divider (1) 2046 */ 2047 data->fan_min[nr] = 1; 2048 new_div = 0; /* 1 == BIT(0) */ 2049 dev_warn(dev, 2050 "fan%u low limit %lu above maximum %u, set to maximum\n", 2051 nr + 1, val, data->fan_from_reg_min(1, 0)); 2052 } else { 2053 /* 2054 * Automatically pick the best divider, i.e. the one such 2055 * that the min limit will correspond to a register value 2056 * in the 96..192 range 2057 */ 2058 new_div = 0; 2059 while (reg > 192 && new_div < 7) { 2060 reg >>= 1; 2061 new_div++; 2062 } 2063 data->fan_min[nr] = reg; 2064 } 2065 2066 write_div: 2067 /* 2068 * Write both the fan clock divider (if it changed) and the new 2069 * fan min (unconditionally) 2070 */ 2071 if (new_div != data->fan_div[nr]) { 2072 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n", 2073 nr + 1, div_from_reg(data->fan_div[nr]), 2074 div_from_reg(new_div)); 2075 data->fan_div[nr] = new_div; 2076 err = nct6775_write_fan_div_common(data, nr); 2077 if (err) 2078 goto write_min; 2079 /* Give the chip time to sample a new speed value */ 2080 data->last_updated = jiffies; 2081 } 2082 2083 write_min: 2084 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]); 2085 mutex_unlock(&data->update_lock); 2086 2087 return err ? : count; 2088 } 2089 2090 static ssize_t 2091 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf) 2092 { 2093 struct nct6775_data *data = nct6775_update_device(dev); 2094 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2095 int p; 2096 2097 if (IS_ERR(data)) 2098 return PTR_ERR(data); 2099 2100 p = data->fan_pulses[sattr->index]; 2101 return sprintf(buf, "%d\n", p ? : 4); 2102 } 2103 2104 static ssize_t 2105 store_fan_pulses(struct device *dev, struct device_attribute *attr, 2106 const char *buf, size_t count) 2107 { 2108 struct nct6775_data *data = dev_get_drvdata(dev); 2109 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2110 int nr = sattr->index; 2111 unsigned long val; 2112 int err; 2113 u16 reg; 2114 2115 err = kstrtoul(buf, 10, &val); 2116 if (err < 0) 2117 return err; 2118 2119 if (val > 4) 2120 return -EINVAL; 2121 2122 mutex_lock(&data->update_lock); 2123 data->fan_pulses[nr] = val & 3; 2124 err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], ®); 2125 if (err) 2126 goto out; 2127 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]); 2128 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr]; 2129 err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg); 2130 out: 2131 mutex_unlock(&data->update_lock); 2132 2133 return err ? : count; 2134 } 2135 2136 static umode_t nct6775_fan_is_visible(struct kobject *kobj, 2137 struct attribute *attr, int index) 2138 { 2139 struct device *dev = kobj_to_dev(kobj); 2140 struct nct6775_data *data = dev_get_drvdata(dev); 2141 int fan = index / 6; /* fan index */ 2142 int nr = index % 6; /* attribute index */ 2143 2144 if (!(data->has_fan & BIT(fan))) 2145 return 0; 2146 2147 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1) 2148 return 0; 2149 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1) 2150 return 0; 2151 if (nr == 3 && !data->REG_FAN_PULSES[fan]) 2152 return 0; 2153 if (nr == 4 && !(data->has_fan_min & BIT(fan))) 2154 return 0; 2155 if (nr == 5 && data->kind != nct6775) 2156 return 0; 2157 2158 return nct6775_attr_mode(data, attr); 2159 } 2160 2161 SENSOR_TEMPLATE(fan_input, "fan%d_input", 0444, show_fan, NULL, 0); 2162 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", 0444, nct6775_show_alarm, NULL, FAN_ALARM_BASE); 2163 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", 0644, nct6775_show_beep, 2164 nct6775_store_beep, FAN_ALARM_BASE); 2165 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", 0644, show_fan_pulses, store_fan_pulses, 0); 2166 SENSOR_TEMPLATE(fan_min, "fan%d_min", 0644, show_fan_min, store_fan_min, 0); 2167 SENSOR_TEMPLATE(fan_div, "fan%d_div", 0444, show_fan_div, NULL, 0); 2168 2169 /* 2170 * nct6775_fan_is_visible uses the index into the following array 2171 * to determine if attributes should be created or not. 2172 * Any change in order or content must be matched. 2173 */ 2174 static struct sensor_device_template *nct6775_attributes_fan_template[] = { 2175 &sensor_dev_template_fan_input, 2176 &sensor_dev_template_fan_alarm, /* 1 */ 2177 &sensor_dev_template_fan_beep, /* 2 */ 2178 &sensor_dev_template_fan_pulses, 2179 &sensor_dev_template_fan_min, /* 4 */ 2180 &sensor_dev_template_fan_div, /* 5 */ 2181 NULL 2182 }; 2183 2184 static const struct sensor_template_group nct6775_fan_template_group = { 2185 .templates = nct6775_attributes_fan_template, 2186 .is_visible = nct6775_fan_is_visible, 2187 .base = 1, 2188 }; 2189 2190 static ssize_t 2191 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf) 2192 { 2193 struct nct6775_data *data = nct6775_update_device(dev); 2194 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2195 int nr = sattr->index; 2196 2197 if (IS_ERR(data)) 2198 return PTR_ERR(data); 2199 2200 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]); 2201 } 2202 2203 static ssize_t 2204 show_temp(struct device *dev, struct device_attribute *attr, char *buf) 2205 { 2206 struct nct6775_data *data = nct6775_update_device(dev); 2207 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2208 int nr = sattr->nr; 2209 int index = sattr->index; 2210 2211 if (IS_ERR(data)) 2212 return PTR_ERR(data); 2213 2214 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr])); 2215 } 2216 2217 static ssize_t 2218 store_temp(struct device *dev, struct device_attribute *attr, const char *buf, 2219 size_t count) 2220 { 2221 struct nct6775_data *data = dev_get_drvdata(dev); 2222 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2223 int nr = sattr->nr; 2224 int index = sattr->index; 2225 int err; 2226 long val; 2227 2228 err = kstrtol(buf, 10, &val); 2229 if (err < 0) 2230 return err; 2231 2232 mutex_lock(&data->update_lock); 2233 data->temp[index][nr] = LM75_TEMP_TO_REG(val); 2234 err = nct6775_write_temp(data, data->reg_temp[index][nr], data->temp[index][nr]); 2235 mutex_unlock(&data->update_lock); 2236 return err ? : count; 2237 } 2238 2239 static ssize_t 2240 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf) 2241 { 2242 struct nct6775_data *data = nct6775_update_device(dev); 2243 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2244 2245 if (IS_ERR(data)) 2246 return PTR_ERR(data); 2247 2248 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000); 2249 } 2250 2251 static ssize_t 2252 store_temp_offset(struct device *dev, struct device_attribute *attr, 2253 const char *buf, size_t count) 2254 { 2255 struct nct6775_data *data = dev_get_drvdata(dev); 2256 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2257 int nr = sattr->index; 2258 long val; 2259 int err; 2260 2261 err = kstrtol(buf, 10, &val); 2262 if (err < 0) 2263 return err; 2264 2265 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127); 2266 2267 mutex_lock(&data->update_lock); 2268 data->temp_offset[nr] = val; 2269 err = nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val); 2270 mutex_unlock(&data->update_lock); 2271 2272 return err ? : count; 2273 } 2274 2275 static ssize_t 2276 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf) 2277 { 2278 struct nct6775_data *data = nct6775_update_device(dev); 2279 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2280 int nr = sattr->index; 2281 2282 if (IS_ERR(data)) 2283 return PTR_ERR(data); 2284 2285 return sprintf(buf, "%d\n", (int)data->temp_type[nr]); 2286 } 2287 2288 static ssize_t 2289 store_temp_type(struct device *dev, struct device_attribute *attr, 2290 const char *buf, size_t count) 2291 { 2292 struct nct6775_data *data = nct6775_update_device(dev); 2293 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2294 int nr = sattr->index; 2295 unsigned long val; 2296 int err; 2297 u8 vbit, dbit; 2298 u16 vbat, diode; 2299 2300 if (IS_ERR(data)) 2301 return PTR_ERR(data); 2302 2303 err = kstrtoul(buf, 10, &val); 2304 if (err < 0) 2305 return err; 2306 2307 if (val != 1 && val != 3 && val != 4) 2308 return -EINVAL; 2309 2310 mutex_lock(&data->update_lock); 2311 2312 data->temp_type[nr] = val; 2313 vbit = 0x02 << nr; 2314 dbit = data->DIODE_MASK << nr; 2315 2316 err = nct6775_read_value(data, data->REG_VBAT, &vbat); 2317 if (err) 2318 goto out; 2319 vbat &= ~vbit; 2320 2321 err = nct6775_read_value(data, data->REG_DIODE, &diode); 2322 if (err) 2323 goto out; 2324 diode &= ~dbit; 2325 2326 switch (val) { 2327 case 1: /* CPU diode (diode, current mode) */ 2328 vbat |= vbit; 2329 diode |= dbit; 2330 break; 2331 case 3: /* diode, voltage mode */ 2332 vbat |= dbit; 2333 break; 2334 case 4: /* thermistor */ 2335 break; 2336 } 2337 err = nct6775_write_value(data, data->REG_VBAT, vbat); 2338 if (err) 2339 goto out; 2340 err = nct6775_write_value(data, data->REG_DIODE, diode); 2341 out: 2342 mutex_unlock(&data->update_lock); 2343 return err ? : count; 2344 } 2345 2346 static umode_t nct6775_temp_is_visible(struct kobject *kobj, 2347 struct attribute *attr, int index) 2348 { 2349 struct device *dev = kobj_to_dev(kobj); 2350 struct nct6775_data *data = dev_get_drvdata(dev); 2351 int temp = index / 10; /* temp index */ 2352 int nr = index % 10; /* attribute index */ 2353 2354 if (!(data->have_temp & BIT(temp))) 2355 return 0; 2356 2357 if (nr == 1 && !data->temp_label) 2358 return 0; 2359 2360 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0) 2361 return 0; /* alarm */ 2362 2363 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0) 2364 return 0; /* beep */ 2365 2366 if (nr == 4 && !data->reg_temp[1][temp]) /* max */ 2367 return 0; 2368 2369 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */ 2370 return 0; 2371 2372 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */ 2373 return 0; 2374 2375 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */ 2376 return 0; 2377 2378 /* offset and type only apply to fixed sensors */ 2379 if (nr > 7 && !(data->have_temp_fixed & BIT(temp))) 2380 return 0; 2381 2382 return nct6775_attr_mode(data, attr); 2383 } 2384 2385 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", 0444, show_temp, NULL, 0, 0); 2386 SENSOR_TEMPLATE(temp_label, "temp%d_label", 0444, show_temp_label, NULL, 0); 2387 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", 0644, show_temp, store_temp, 0, 1); 2388 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", 0644, show_temp, store_temp, 0, 2); 2389 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", 0644, show_temp, store_temp, 0, 3); 2390 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", 0644, show_temp, store_temp, 0, 4); 2391 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", 0644, show_temp_offset, store_temp_offset, 0); 2392 SENSOR_TEMPLATE(temp_type, "temp%d_type", 0644, show_temp_type, store_temp_type, 0); 2393 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", 0444, show_temp_alarm, NULL, 0); 2394 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", 0644, show_temp_beep, store_temp_beep, 0); 2395 2396 /* 2397 * nct6775_temp_is_visible uses the index into the following array 2398 * to determine if attributes should be created or not. 2399 * Any change in order or content must be matched. 2400 */ 2401 static struct sensor_device_template *nct6775_attributes_temp_template[] = { 2402 &sensor_dev_template_temp_input, 2403 &sensor_dev_template_temp_label, 2404 &sensor_dev_template_temp_alarm, /* 2 */ 2405 &sensor_dev_template_temp_beep, /* 3 */ 2406 &sensor_dev_template_temp_max, /* 4 */ 2407 &sensor_dev_template_temp_max_hyst, /* 5 */ 2408 &sensor_dev_template_temp_crit, /* 6 */ 2409 &sensor_dev_template_temp_lcrit, /* 7 */ 2410 &sensor_dev_template_temp_offset, /* 8 */ 2411 &sensor_dev_template_temp_type, /* 9 */ 2412 NULL 2413 }; 2414 2415 static const struct sensor_template_group nct6775_temp_template_group = { 2416 .templates = nct6775_attributes_temp_template, 2417 .is_visible = nct6775_temp_is_visible, 2418 .base = 1, 2419 }; 2420 2421 static ssize_t show_tsi_temp(struct device *dev, struct device_attribute *attr, char *buf) 2422 { 2423 struct nct6775_data *data = nct6775_update_device(dev); 2424 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2425 2426 if (IS_ERR(data)) 2427 return PTR_ERR(data); 2428 2429 return sysfs_emit(buf, "%u\n", tsi_temp_from_reg(data->tsi_temp[sattr->index])); 2430 } 2431 2432 static ssize_t show_tsi_temp_label(struct device *dev, struct device_attribute *attr, char *buf) 2433 { 2434 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2435 2436 return sysfs_emit(buf, "TSI%d_TEMP\n", sattr->index); 2437 } 2438 2439 SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0); 2440 SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0); 2441 2442 static umode_t nct6775_tsi_temp_is_visible(struct kobject *kobj, struct attribute *attr, 2443 int index) 2444 { 2445 struct device *dev = kobj_to_dev(kobj); 2446 struct nct6775_data *data = dev_get_drvdata(dev); 2447 int temp = index / 2; 2448 2449 return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0; 2450 } 2451 2452 /* 2453 * The index calculation in nct6775_tsi_temp_is_visible() must be kept in 2454 * sync with the size of this array. 2455 */ 2456 static struct sensor_device_template *nct6775_tsi_temp_template[] = { 2457 &sensor_dev_template_tsi_temp_input, 2458 &sensor_dev_template_tsi_temp_label, 2459 NULL 2460 }; 2461 2462 static ssize_t 2463 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf) 2464 { 2465 struct nct6775_data *data = nct6775_update_device(dev); 2466 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2467 2468 if (IS_ERR(data)) 2469 return PTR_ERR(data); 2470 2471 return sprintf(buf, "%d\n", data->pwm_mode[sattr->index]); 2472 } 2473 2474 static ssize_t 2475 store_pwm_mode(struct device *dev, struct device_attribute *attr, 2476 const char *buf, size_t count) 2477 { 2478 struct nct6775_data *data = dev_get_drvdata(dev); 2479 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2480 int nr = sattr->index; 2481 unsigned long val; 2482 int err; 2483 u16 reg; 2484 2485 err = kstrtoul(buf, 10, &val); 2486 if (err < 0) 2487 return err; 2488 2489 if (val > 1) 2490 return -EINVAL; 2491 2492 /* Setting DC mode (0) is not supported for all chips/channels */ 2493 if (data->REG_PWM_MODE[nr] == 0) { 2494 if (!val) 2495 return -EINVAL; 2496 return count; 2497 } 2498 2499 mutex_lock(&data->update_lock); 2500 data->pwm_mode[nr] = val; 2501 err = nct6775_read_value(data, data->REG_PWM_MODE[nr], ®); 2502 if (err) 2503 goto out; 2504 reg &= ~data->PWM_MODE_MASK[nr]; 2505 if (!val) 2506 reg |= data->PWM_MODE_MASK[nr]; 2507 err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg); 2508 out: 2509 mutex_unlock(&data->update_lock); 2510 return err ? : count; 2511 } 2512 2513 static ssize_t 2514 show_pwm(struct device *dev, struct device_attribute *attr, char *buf) 2515 { 2516 struct nct6775_data *data = nct6775_update_device(dev); 2517 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2518 int nr = sattr->nr; 2519 int index = sattr->index; 2520 int err; 2521 u16 pwm; 2522 2523 if (IS_ERR(data)) 2524 return PTR_ERR(data); 2525 2526 /* 2527 * For automatic fan control modes, show current pwm readings. 2528 * Otherwise, show the configured value. 2529 */ 2530 if (index == 0 && data->pwm_enable[nr] > manual) { 2531 err = nct6775_read_value(data, data->REG_PWM_READ[nr], &pwm); 2532 if (err) 2533 return err; 2534 } else { 2535 pwm = data->pwm[index][nr]; 2536 } 2537 2538 return sprintf(buf, "%d\n", pwm); 2539 } 2540 2541 static ssize_t 2542 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf, 2543 size_t count) 2544 { 2545 struct nct6775_data *data = dev_get_drvdata(dev); 2546 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2547 int nr = sattr->nr; 2548 int index = sattr->index; 2549 unsigned long val; 2550 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 }; 2551 int maxval[7] 2552 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 }; 2553 int err; 2554 u16 reg; 2555 2556 err = kstrtoul(buf, 10, &val); 2557 if (err < 0) 2558 return err; 2559 val = clamp_val(val, minval[index], maxval[index]); 2560 2561 mutex_lock(&data->update_lock); 2562 data->pwm[index][nr] = val; 2563 err = nct6775_write_value(data, data->REG_PWM[index][nr], val); 2564 if (err) 2565 goto out; 2566 if (index == 2) { /* floor: disable if val == 0 */ 2567 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®); 2568 if (err) 2569 goto out; 2570 reg &= 0x7f; 2571 if (val) 2572 reg |= 0x80; 2573 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg); 2574 } 2575 out: 2576 mutex_unlock(&data->update_lock); 2577 return err ? : count; 2578 } 2579 2580 /* Returns 0 if OK, -EINVAL otherwise */ 2581 static int check_trip_points(struct nct6775_data *data, int nr) 2582 { 2583 int i; 2584 2585 for (i = 0; i < data->auto_pwm_num - 1; i++) { 2586 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1]) 2587 return -EINVAL; 2588 } 2589 for (i = 0; i < data->auto_pwm_num - 1; i++) { 2590 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1]) 2591 return -EINVAL; 2592 } 2593 /* validate critical temperature and pwm if enabled (pwm > 0) */ 2594 if (data->auto_pwm[nr][data->auto_pwm_num]) { 2595 if (data->auto_temp[nr][data->auto_pwm_num - 1] > 2596 data->auto_temp[nr][data->auto_pwm_num] || 2597 data->auto_pwm[nr][data->auto_pwm_num - 1] > 2598 data->auto_pwm[nr][data->auto_pwm_num]) 2599 return -EINVAL; 2600 } 2601 return 0; 2602 } 2603 2604 static int pwm_update_registers(struct nct6775_data *data, int nr) 2605 { 2606 u16 reg; 2607 int err; 2608 2609 switch (data->pwm_enable[nr]) { 2610 case off: 2611 case manual: 2612 break; 2613 case speed_cruise: 2614 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2615 if (err) 2616 return err; 2617 reg = (reg & ~data->tolerance_mask) | 2618 (data->target_speed_tolerance[nr] & data->tolerance_mask); 2619 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2620 if (err) 2621 return err; 2622 err = nct6775_write_value(data, data->REG_TARGET[nr], 2623 data->target_speed[nr] & 0xff); 2624 if (err) 2625 return err; 2626 if (data->REG_TOLERANCE_H) { 2627 reg = (data->target_speed[nr] >> 8) & 0x0f; 2628 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1; 2629 err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg); 2630 if (err) 2631 return err; 2632 } 2633 break; 2634 case thermal_cruise: 2635 err = nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]); 2636 if (err) 2637 return err; 2638 fallthrough; 2639 default: 2640 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2641 if (err) 2642 return err; 2643 reg = (reg & ~data->tolerance_mask) | 2644 data->temp_tolerance[0][nr]; 2645 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2646 if (err) 2647 return err; 2648 break; 2649 } 2650 2651 return 0; 2652 } 2653 2654 static ssize_t 2655 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) 2656 { 2657 struct nct6775_data *data = nct6775_update_device(dev); 2658 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2659 2660 if (IS_ERR(data)) 2661 return PTR_ERR(data); 2662 2663 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]); 2664 } 2665 2666 static ssize_t 2667 store_pwm_enable(struct device *dev, struct device_attribute *attr, 2668 const char *buf, size_t count) 2669 { 2670 struct nct6775_data *data = dev_get_drvdata(dev); 2671 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2672 int nr = sattr->index; 2673 unsigned long val; 2674 int err; 2675 u16 reg; 2676 2677 err = kstrtoul(buf, 10, &val); 2678 if (err < 0) 2679 return err; 2680 2681 if (val > sf4) 2682 return -EINVAL; 2683 2684 if (val == sf3 && data->kind != nct6775) 2685 return -EINVAL; 2686 2687 if (val == sf4 && check_trip_points(data, nr)) { 2688 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n"); 2689 dev_err(dev, "Adjust trip points and try again\n"); 2690 return -EINVAL; 2691 } 2692 2693 mutex_lock(&data->update_lock); 2694 data->pwm_enable[nr] = val; 2695 if (val == off) { 2696 /* 2697 * turn off pwm control: select manual mode, set pwm to maximum 2698 */ 2699 data->pwm[0][nr] = 255; 2700 err = nct6775_write_value(data, data->REG_PWM[0][nr], 255); 2701 if (err) 2702 goto out; 2703 } 2704 err = pwm_update_registers(data, nr); 2705 if (err) 2706 goto out; 2707 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®); 2708 if (err) 2709 goto out; 2710 reg &= 0x0f; 2711 reg |= pwm_enable_to_reg(val) << 4; 2712 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg); 2713 out: 2714 mutex_unlock(&data->update_lock); 2715 return err ? : count; 2716 } 2717 2718 static ssize_t 2719 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src) 2720 { 2721 int i, sel = 0; 2722 2723 for (i = 0; i < NUM_TEMP; i++) { 2724 if (!(data->have_temp & BIT(i))) 2725 continue; 2726 if (src == data->temp_src[i]) { 2727 sel = i + 1; 2728 break; 2729 } 2730 } 2731 2732 return sprintf(buf, "%d\n", sel); 2733 } 2734 2735 static ssize_t 2736 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf) 2737 { 2738 struct nct6775_data *data = nct6775_update_device(dev); 2739 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2740 int index = sattr->index; 2741 2742 if (IS_ERR(data)) 2743 return PTR_ERR(data); 2744 2745 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]); 2746 } 2747 2748 static ssize_t 2749 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr, 2750 const char *buf, size_t count) 2751 { 2752 struct nct6775_data *data = nct6775_update_device(dev); 2753 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2754 int nr = sattr->index; 2755 unsigned long val; 2756 int err, src; 2757 u16 reg; 2758 2759 if (IS_ERR(data)) 2760 return PTR_ERR(data); 2761 2762 err = kstrtoul(buf, 10, &val); 2763 if (err < 0) 2764 return err; 2765 if (val == 0 || val > NUM_TEMP) 2766 return -EINVAL; 2767 if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1]) 2768 return -EINVAL; 2769 2770 mutex_lock(&data->update_lock); 2771 src = data->temp_src[val - 1]; 2772 data->pwm_temp_sel[nr] = src; 2773 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®); 2774 if (err) 2775 goto out; 2776 reg &= 0xe0; 2777 reg |= src; 2778 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg); 2779 out: 2780 mutex_unlock(&data->update_lock); 2781 2782 return err ? : count; 2783 } 2784 2785 static ssize_t 2786 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr, 2787 char *buf) 2788 { 2789 struct nct6775_data *data = nct6775_update_device(dev); 2790 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2791 int index = sattr->index; 2792 2793 if (IS_ERR(data)) 2794 return PTR_ERR(data); 2795 2796 return show_pwm_temp_sel_common(data, buf, 2797 data->pwm_weight_temp_sel[index]); 2798 } 2799 2800 static ssize_t 2801 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr, 2802 const char *buf, size_t count) 2803 { 2804 struct nct6775_data *data = nct6775_update_device(dev); 2805 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2806 int nr = sattr->index; 2807 unsigned long val; 2808 int err, src; 2809 u16 reg; 2810 2811 if (IS_ERR(data)) 2812 return PTR_ERR(data); 2813 2814 err = kstrtoul(buf, 10, &val); 2815 if (err < 0) 2816 return err; 2817 if (val > NUM_TEMP) 2818 return -EINVAL; 2819 val = array_index_nospec(val, NUM_TEMP + 1); 2820 if (val && (!(data->have_temp & BIT(val - 1)) || 2821 !data->temp_src[val - 1])) 2822 return -EINVAL; 2823 2824 mutex_lock(&data->update_lock); 2825 if (val) { 2826 src = data->temp_src[val - 1]; 2827 data->pwm_weight_temp_sel[nr] = src; 2828 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®); 2829 if (err) 2830 goto out; 2831 reg &= 0xe0; 2832 reg |= (src | 0x80); 2833 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg); 2834 } else { 2835 data->pwm_weight_temp_sel[nr] = 0; 2836 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®); 2837 if (err) 2838 goto out; 2839 reg &= 0x7f; 2840 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg); 2841 } 2842 out: 2843 mutex_unlock(&data->update_lock); 2844 2845 return err ? : count; 2846 } 2847 2848 static ssize_t 2849 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf) 2850 { 2851 struct nct6775_data *data = nct6775_update_device(dev); 2852 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2853 2854 if (IS_ERR(data)) 2855 return PTR_ERR(data); 2856 2857 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000); 2858 } 2859 2860 static ssize_t 2861 store_target_temp(struct device *dev, struct device_attribute *attr, 2862 const char *buf, size_t count) 2863 { 2864 struct nct6775_data *data = dev_get_drvdata(dev); 2865 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2866 int nr = sattr->index; 2867 unsigned long val; 2868 int err; 2869 2870 err = kstrtoul(buf, 10, &val); 2871 if (err < 0) 2872 return err; 2873 2874 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 2875 data->target_temp_mask); 2876 2877 mutex_lock(&data->update_lock); 2878 data->target_temp[nr] = val; 2879 err = pwm_update_registers(data, nr); 2880 mutex_unlock(&data->update_lock); 2881 return err ? : count; 2882 } 2883 2884 static ssize_t 2885 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf) 2886 { 2887 struct nct6775_data *data = nct6775_update_device(dev); 2888 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2889 int nr = sattr->index; 2890 2891 if (IS_ERR(data)) 2892 return PTR_ERR(data); 2893 2894 return sprintf(buf, "%d\n", 2895 fan_from_reg16(data->target_speed[nr], 2896 data->fan_div[nr])); 2897 } 2898 2899 static ssize_t 2900 store_target_speed(struct device *dev, struct device_attribute *attr, 2901 const char *buf, size_t count) 2902 { 2903 struct nct6775_data *data = dev_get_drvdata(dev); 2904 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2905 int nr = sattr->index; 2906 unsigned long val; 2907 int err; 2908 u16 speed; 2909 2910 err = kstrtoul(buf, 10, &val); 2911 if (err < 0) 2912 return err; 2913 2914 val = clamp_val(val, 0, 1350000U); 2915 speed = fan_to_reg(val, data->fan_div[nr]); 2916 2917 mutex_lock(&data->update_lock); 2918 data->target_speed[nr] = speed; 2919 err = pwm_update_registers(data, nr); 2920 mutex_unlock(&data->update_lock); 2921 return err ? : count; 2922 } 2923 2924 static ssize_t 2925 show_temp_tolerance(struct device *dev, struct device_attribute *attr, 2926 char *buf) 2927 { 2928 struct nct6775_data *data = nct6775_update_device(dev); 2929 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2930 int nr = sattr->nr; 2931 int index = sattr->index; 2932 2933 if (IS_ERR(data)) 2934 return PTR_ERR(data); 2935 2936 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000); 2937 } 2938 2939 static ssize_t 2940 store_temp_tolerance(struct device *dev, struct device_attribute *attr, 2941 const char *buf, size_t count) 2942 { 2943 struct nct6775_data *data = dev_get_drvdata(dev); 2944 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 2945 int nr = sattr->nr; 2946 int index = sattr->index; 2947 unsigned long val; 2948 int err; 2949 2950 err = kstrtoul(buf, 10, &val); 2951 if (err < 0) 2952 return err; 2953 2954 /* Limit tolerance as needed */ 2955 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask); 2956 2957 mutex_lock(&data->update_lock); 2958 data->temp_tolerance[index][nr] = val; 2959 if (index) 2960 err = pwm_update_registers(data, nr); 2961 else 2962 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[nr], val); 2963 mutex_unlock(&data->update_lock); 2964 return err ? : count; 2965 } 2966 2967 /* 2968 * Fan speed tolerance is a tricky beast, since the associated register is 2969 * a tick counter, but the value is reported and configured as rpm. 2970 * Compute resulting low and high rpm values and report the difference. 2971 * A fan speed tolerance only makes sense if a fan target speed has been 2972 * configured, so only display values other than 0 if that is the case. 2973 */ 2974 static ssize_t 2975 show_speed_tolerance(struct device *dev, struct device_attribute *attr, 2976 char *buf) 2977 { 2978 struct nct6775_data *data = nct6775_update_device(dev); 2979 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 2980 int nr = sattr->index; 2981 int target, tolerance = 0; 2982 2983 if (IS_ERR(data)) 2984 return PTR_ERR(data); 2985 2986 target = data->target_speed[nr]; 2987 2988 if (target) { 2989 int low = target - data->target_speed_tolerance[nr]; 2990 int high = target + data->target_speed_tolerance[nr]; 2991 2992 if (low <= 0) 2993 low = 1; 2994 if (high > 0xffff) 2995 high = 0xffff; 2996 if (high < low) 2997 high = low; 2998 2999 tolerance = (fan_from_reg16(low, data->fan_div[nr]) 3000 - fan_from_reg16(high, data->fan_div[nr])) / 2; 3001 } 3002 3003 return sprintf(buf, "%d\n", tolerance); 3004 } 3005 3006 static ssize_t 3007 store_speed_tolerance(struct device *dev, struct device_attribute *attr, 3008 const char *buf, size_t count) 3009 { 3010 struct nct6775_data *data = dev_get_drvdata(dev); 3011 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr); 3012 int nr = sattr->index; 3013 unsigned long val; 3014 int err; 3015 int low, high; 3016 3017 err = kstrtoul(buf, 10, &val); 3018 if (err < 0) 3019 return err; 3020 3021 high = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) + val; 3022 low = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) - val; 3023 if (low <= 0) 3024 low = 1; 3025 if (high < low) 3026 high = low; 3027 3028 val = (fan_to_reg(low, data->fan_div[nr]) - 3029 fan_to_reg(high, data->fan_div[nr])) / 2; 3030 3031 /* Limit tolerance as needed */ 3032 val = clamp_val(val, 0, data->speed_tolerance_limit); 3033 3034 mutex_lock(&data->update_lock); 3035 data->target_speed_tolerance[nr] = val; 3036 err = pwm_update_registers(data, nr); 3037 mutex_unlock(&data->update_lock); 3038 return err ? : count; 3039 } 3040 3041 SENSOR_TEMPLATE_2(pwm, "pwm%d", 0644, show_pwm, store_pwm, 0, 0); 3042 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", 0644, show_pwm_mode, store_pwm_mode, 0); 3043 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", 0644, show_pwm_enable, store_pwm_enable, 0); 3044 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", 0644, show_pwm_temp_sel, store_pwm_temp_sel, 0); 3045 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", 0644, show_target_temp, store_target_temp, 0); 3046 SENSOR_TEMPLATE(fan_target, "fan%d_target", 0644, show_target_speed, store_target_speed, 0); 3047 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", 0644, show_speed_tolerance, 3048 store_speed_tolerance, 0); 3049 3050 /* Smart Fan registers */ 3051 3052 static ssize_t 3053 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf) 3054 { 3055 struct nct6775_data *data = nct6775_update_device(dev); 3056 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3057 int nr = sattr->nr; 3058 int index = sattr->index; 3059 3060 if (IS_ERR(data)) 3061 return PTR_ERR(data); 3062 3063 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000); 3064 } 3065 3066 static ssize_t 3067 store_weight_temp(struct device *dev, struct device_attribute *attr, 3068 const char *buf, size_t count) 3069 { 3070 struct nct6775_data *data = dev_get_drvdata(dev); 3071 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3072 int nr = sattr->nr; 3073 int index = sattr->index; 3074 unsigned long val; 3075 int err; 3076 3077 err = kstrtoul(buf, 10, &val); 3078 if (err < 0) 3079 return err; 3080 3081 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255); 3082 3083 mutex_lock(&data->update_lock); 3084 data->weight_temp[index][nr] = val; 3085 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val); 3086 mutex_unlock(&data->update_lock); 3087 return err ? : count; 3088 } 3089 3090 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", 0644, 3091 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0); 3092 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step", 3093 0644, show_weight_temp, store_weight_temp, 0, 0); 3094 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol", 3095 0644, show_weight_temp, store_weight_temp, 0, 1); 3096 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base", 3097 0644, show_weight_temp, store_weight_temp, 0, 2); 3098 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step", 0644, show_pwm, store_pwm, 0, 5); 3099 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base", 0644, show_pwm, store_pwm, 0, 6); 3100 3101 static ssize_t 3102 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf) 3103 { 3104 struct nct6775_data *data = nct6775_update_device(dev); 3105 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3106 int nr = sattr->nr; 3107 int index = sattr->index; 3108 3109 if (IS_ERR(data)) 3110 return PTR_ERR(data); 3111 3112 return sprintf(buf, "%d\n", 3113 step_time_from_reg(data->fan_time[index][nr], 3114 data->pwm_mode[nr])); 3115 } 3116 3117 static ssize_t 3118 store_fan_time(struct device *dev, struct device_attribute *attr, 3119 const char *buf, size_t count) 3120 { 3121 struct nct6775_data *data = dev_get_drvdata(dev); 3122 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3123 int nr = sattr->nr; 3124 int index = sattr->index; 3125 unsigned long val; 3126 int err; 3127 3128 err = kstrtoul(buf, 10, &val); 3129 if (err < 0) 3130 return err; 3131 3132 val = step_time_to_reg(val, data->pwm_mode[nr]); 3133 mutex_lock(&data->update_lock); 3134 data->fan_time[index][nr] = val; 3135 err = nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val); 3136 mutex_unlock(&data->update_lock); 3137 return err ? : count; 3138 } 3139 3140 static ssize_t 3141 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf) 3142 { 3143 struct nct6775_data *data = nct6775_update_device(dev); 3144 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3145 3146 if (IS_ERR(data)) 3147 return PTR_ERR(data); 3148 3149 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]); 3150 } 3151 3152 static ssize_t 3153 store_auto_pwm(struct device *dev, struct device_attribute *attr, 3154 const char *buf, size_t count) 3155 { 3156 struct nct6775_data *data = dev_get_drvdata(dev); 3157 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3158 int nr = sattr->nr; 3159 int point = sattr->index; 3160 unsigned long val; 3161 int err; 3162 u16 reg; 3163 3164 err = kstrtoul(buf, 10, &val); 3165 if (err < 0) 3166 return err; 3167 if (val > 255) 3168 return -EINVAL; 3169 3170 if (point == data->auto_pwm_num) { 3171 if (data->kind != nct6775 && !val) 3172 return -EINVAL; 3173 if (data->kind != nct6779 && val) 3174 val = 0xff; 3175 } 3176 3177 mutex_lock(&data->update_lock); 3178 data->auto_pwm[nr][point] = val; 3179 if (point < data->auto_pwm_num) { 3180 err = nct6775_write_value(data, NCT6775_AUTO_PWM(data, nr, point), 3181 data->auto_pwm[nr][point]); 3182 } else { 3183 switch (data->kind) { 3184 case nct6775: 3185 /* disable if needed (pwm == 0) */ 3186 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], ®); 3187 if (err) 3188 break; 3189 if (val) 3190 reg |= 0x02; 3191 else 3192 reg &= ~0x02; 3193 err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg); 3194 break; 3195 case nct6776: 3196 break; /* always enabled, nothing to do */ 3197 case nct6106: 3198 case nct6116: 3199 case nct6779: 3200 case nct6791: 3201 case nct6792: 3202 case nct6793: 3203 case nct6795: 3204 case nct6796: 3205 case nct6797: 3206 case nct6798: 3207 case nct6799: 3208 err = nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], val); 3209 if (err) 3210 break; 3211 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], ®); 3212 if (err) 3213 break; 3214 if (val == 255) 3215 reg &= ~data->CRITICAL_PWM_ENABLE_MASK; 3216 else 3217 reg |= data->CRITICAL_PWM_ENABLE_MASK; 3218 err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg); 3219 break; 3220 } 3221 } 3222 mutex_unlock(&data->update_lock); 3223 return err ? : count; 3224 } 3225 3226 static ssize_t 3227 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf) 3228 { 3229 struct nct6775_data *data = nct6775_update_device(dev); 3230 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3231 int nr = sattr->nr; 3232 int point = sattr->index; 3233 3234 if (IS_ERR(data)) 3235 return PTR_ERR(data); 3236 3237 /* 3238 * We don't know for sure if the temperature is signed or unsigned. 3239 * Assume it is unsigned. 3240 */ 3241 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000); 3242 } 3243 3244 static ssize_t 3245 store_auto_temp(struct device *dev, struct device_attribute *attr, 3246 const char *buf, size_t count) 3247 { 3248 struct nct6775_data *data = dev_get_drvdata(dev); 3249 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr); 3250 int nr = sattr->nr; 3251 int point = sattr->index; 3252 unsigned long val; 3253 int err; 3254 3255 err = kstrtoul(buf, 10, &val); 3256 if (err) 3257 return err; 3258 if (val > 255000) 3259 return -EINVAL; 3260 3261 mutex_lock(&data->update_lock); 3262 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000); 3263 if (point < data->auto_pwm_num) { 3264 err = nct6775_write_value(data, NCT6775_AUTO_TEMP(data, nr, point), 3265 data->auto_temp[nr][point]); 3266 } else { 3267 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr], 3268 data->auto_temp[nr][point]); 3269 } 3270 mutex_unlock(&data->update_lock); 3271 return err ? : count; 3272 } 3273 3274 static umode_t nct6775_pwm_is_visible(struct kobject *kobj, 3275 struct attribute *attr, int index) 3276 { 3277 struct device *dev = kobj_to_dev(kobj); 3278 struct nct6775_data *data = dev_get_drvdata(dev); 3279 int pwm = index / 36; /* pwm index */ 3280 int nr = index % 36; /* attribute index */ 3281 3282 if (!(data->has_pwm & BIT(pwm))) 3283 return 0; 3284 3285 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */ 3286 if (!data->REG_WEIGHT_TEMP_SEL[pwm]) 3287 return 0; 3288 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */ 3289 return 0; 3290 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */ 3291 return 0; 3292 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */ 3293 return 0; 3294 3295 if (nr >= 22 && nr <= 35) { /* auto point */ 3296 int api = (nr - 22) / 2; /* auto point index */ 3297 3298 if (api > data->auto_pwm_num) 3299 return 0; 3300 } 3301 return nct6775_attr_mode(data, attr); 3302 } 3303 3304 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", 0644, show_fan_time, store_fan_time, 0, 0); 3305 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", 0644, 3306 show_fan_time, store_fan_time, 0, 1); 3307 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", 0644, 3308 show_fan_time, store_fan_time, 0, 2); 3309 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", 0644, show_pwm, store_pwm, 0, 1); 3310 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", 0644, show_pwm, store_pwm, 0, 2); 3311 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", 0644, 3312 show_temp_tolerance, store_temp_tolerance, 0, 0); 3313 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance", 3314 0644, show_temp_tolerance, store_temp_tolerance, 0, 1); 3315 3316 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", 0644, show_pwm, store_pwm, 0, 3); 3317 3318 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", 0644, show_pwm, store_pwm, 0, 4); 3319 3320 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm", 3321 0644, show_auto_pwm, store_auto_pwm, 0, 0); 3322 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp", 3323 0644, show_auto_temp, store_auto_temp, 0, 0); 3324 3325 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm", 3326 0644, show_auto_pwm, store_auto_pwm, 0, 1); 3327 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp", 3328 0644, show_auto_temp, store_auto_temp, 0, 1); 3329 3330 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm", 3331 0644, show_auto_pwm, store_auto_pwm, 0, 2); 3332 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp", 3333 0644, show_auto_temp, store_auto_temp, 0, 2); 3334 3335 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm", 3336 0644, show_auto_pwm, store_auto_pwm, 0, 3); 3337 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp", 3338 0644, show_auto_temp, store_auto_temp, 0, 3); 3339 3340 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm", 3341 0644, show_auto_pwm, store_auto_pwm, 0, 4); 3342 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp", 3343 0644, show_auto_temp, store_auto_temp, 0, 4); 3344 3345 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm", 3346 0644, show_auto_pwm, store_auto_pwm, 0, 5); 3347 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp", 3348 0644, show_auto_temp, store_auto_temp, 0, 5); 3349 3350 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm", 3351 0644, show_auto_pwm, store_auto_pwm, 0, 6); 3352 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp", 3353 0644, show_auto_temp, store_auto_temp, 0, 6); 3354 3355 /* 3356 * nct6775_pwm_is_visible uses the index into the following array 3357 * to determine if attributes should be created or not. 3358 * Any change in order or content must be matched. 3359 */ 3360 static struct sensor_device_template *nct6775_attributes_pwm_template[] = { 3361 &sensor_dev_template_pwm, 3362 &sensor_dev_template_pwm_mode, 3363 &sensor_dev_template_pwm_enable, 3364 &sensor_dev_template_pwm_temp_sel, 3365 &sensor_dev_template_pwm_temp_tolerance, 3366 &sensor_dev_template_pwm_crit_temp_tolerance, 3367 &sensor_dev_template_pwm_target_temp, 3368 &sensor_dev_template_fan_target, 3369 &sensor_dev_template_fan_tolerance, 3370 &sensor_dev_template_pwm_stop_time, 3371 &sensor_dev_template_pwm_step_up_time, 3372 &sensor_dev_template_pwm_step_down_time, 3373 &sensor_dev_template_pwm_start, 3374 &sensor_dev_template_pwm_floor, 3375 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */ 3376 &sensor_dev_template_pwm_weight_temp_step, 3377 &sensor_dev_template_pwm_weight_temp_step_tol, 3378 &sensor_dev_template_pwm_weight_temp_step_base, 3379 &sensor_dev_template_pwm_weight_duty_step, /* 18 */ 3380 &sensor_dev_template_pwm_max, /* 19 */ 3381 &sensor_dev_template_pwm_step, /* 20 */ 3382 &sensor_dev_template_pwm_weight_duty_base, /* 21 */ 3383 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */ 3384 &sensor_dev_template_pwm_auto_point1_temp, 3385 &sensor_dev_template_pwm_auto_point2_pwm, 3386 &sensor_dev_template_pwm_auto_point2_temp, 3387 &sensor_dev_template_pwm_auto_point3_pwm, 3388 &sensor_dev_template_pwm_auto_point3_temp, 3389 &sensor_dev_template_pwm_auto_point4_pwm, 3390 &sensor_dev_template_pwm_auto_point4_temp, 3391 &sensor_dev_template_pwm_auto_point5_pwm, 3392 &sensor_dev_template_pwm_auto_point5_temp, 3393 &sensor_dev_template_pwm_auto_point6_pwm, 3394 &sensor_dev_template_pwm_auto_point6_temp, 3395 &sensor_dev_template_pwm_auto_point7_pwm, 3396 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */ 3397 3398 NULL 3399 }; 3400 3401 static const struct sensor_template_group nct6775_pwm_template_group = { 3402 .templates = nct6775_attributes_pwm_template, 3403 .is_visible = nct6775_pwm_is_visible, 3404 .base = 1, 3405 }; 3406 3407 static inline int nct6775_init_device(struct nct6775_data *data) 3408 { 3409 int i, err; 3410 u16 tmp, diode; 3411 3412 /* Start monitoring if needed */ 3413 if (data->REG_CONFIG) { 3414 err = nct6775_read_value(data, data->REG_CONFIG, &tmp); 3415 if (err) 3416 return err; 3417 if (!(tmp & 0x01)) { 3418 err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01); 3419 if (err) 3420 return err; 3421 } 3422 } 3423 3424 /* Enable temperature sensors if needed */ 3425 for (i = 0; i < NUM_TEMP; i++) { 3426 if (!(data->have_temp & BIT(i))) 3427 continue; 3428 if (!data->reg_temp_config[i]) 3429 continue; 3430 err = nct6775_read_value(data, data->reg_temp_config[i], &tmp); 3431 if (err) 3432 return err; 3433 if (tmp & 0x01) { 3434 err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe); 3435 if (err) 3436 return err; 3437 } 3438 } 3439 3440 /* Enable VBAT monitoring if needed */ 3441 err = nct6775_read_value(data, data->REG_VBAT, &tmp); 3442 if (err) 3443 return err; 3444 if (!(tmp & 0x01)) { 3445 err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01); 3446 if (err) 3447 return err; 3448 } 3449 3450 err = nct6775_read_value(data, data->REG_DIODE, &diode); 3451 if (err) 3452 return err; 3453 3454 for (i = 0; i < data->temp_fixed_num; i++) { 3455 if (!(data->have_temp_fixed & BIT(i))) 3456 continue; 3457 if ((tmp & (data->DIODE_MASK << i))) /* diode */ 3458 data->temp_type[i] 3459 = 3 - ((diode >> i) & data->DIODE_MASK); 3460 else /* thermistor */ 3461 data->temp_type[i] = 4; 3462 } 3463 3464 return 0; 3465 } 3466 3467 static int add_temp_sensors(struct nct6775_data *data, const u16 *regp, 3468 int *available, int *mask) 3469 { 3470 int i, err; 3471 u16 src; 3472 3473 for (i = 0; i < data->pwm_num && *available; i++) { 3474 int index; 3475 3476 if (!regp[i]) 3477 continue; 3478 err = nct6775_read_value(data, regp[i], &src); 3479 if (err) 3480 return err; 3481 src &= 0x1f; 3482 if (!src || (*mask & BIT(src))) 3483 continue; 3484 if (!(data->temp_mask & BIT(src))) 3485 continue; 3486 3487 index = __ffs(*available); 3488 err = nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src); 3489 if (err) 3490 return err; 3491 *available &= ~BIT(index); 3492 *mask |= BIT(src); 3493 } 3494 3495 return 0; 3496 } 3497 3498 int nct6775_probe(struct device *dev, struct nct6775_data *data, 3499 const struct regmap_config *regmapcfg) 3500 { 3501 int i, s, err = 0; 3502 int mask, available; 3503 u16 src; 3504 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config; 3505 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit; 3506 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL; 3507 int num_reg_temp, num_reg_temp_mon, num_reg_tsi_temp; 3508 struct device *hwmon_dev; 3509 struct sensor_template_group tsi_temp_tg; 3510 3511 data->regmap = devm_regmap_init(dev, NULL, data, regmapcfg); 3512 if (IS_ERR(data->regmap)) 3513 return PTR_ERR(data->regmap); 3514 3515 mutex_init(&data->update_lock); 3516 data->name = nct6775_device_names[data->kind]; 3517 data->bank = 0xff; /* Force initial bank selection */ 3518 data->scale_in = scale_in; 3519 3520 switch (data->kind) { 3521 case nct6106: 3522 data->in_num = 9; 3523 data->pwm_num = 3; 3524 data->auto_pwm_num = 4; 3525 data->temp_fixed_num = 3; 3526 data->num_temp_alarms = 6; 3527 data->num_temp_beeps = 6; 3528 3529 data->fan_from_reg = fan_from_reg13; 3530 data->fan_from_reg_min = fan_from_reg13; 3531 3532 data->temp_label = nct6776_temp_label; 3533 data->temp_mask = NCT6776_TEMP_MASK; 3534 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3535 3536 data->REG_VBAT = NCT6106_REG_VBAT; 3537 data->REG_DIODE = NCT6106_REG_DIODE; 3538 data->DIODE_MASK = NCT6106_DIODE_MASK; 3539 data->REG_VIN = NCT6106_REG_IN; 3540 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; 3541 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX; 3542 data->REG_TARGET = NCT6106_REG_TARGET; 3543 data->REG_FAN = NCT6106_REG_FAN; 3544 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE; 3545 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN; 3546 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES; 3547 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT; 3548 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME; 3549 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME; 3550 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME; 3551 data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H; 3552 data->REG_PWM[0] = NCT6116_REG_PWM; 3553 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT; 3554 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT; 3555 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP; 3556 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE; 3557 data->REG_PWM_READ = NCT6106_REG_PWM_READ; 3558 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE; 3559 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK; 3560 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP; 3561 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM; 3562 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP; 3563 data->REG_CRITICAL_TEMP_TOLERANCE 3564 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE; 3565 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE; 3566 data->CRITICAL_PWM_ENABLE_MASK 3567 = NCT6106_CRITICAL_PWM_ENABLE_MASK; 3568 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM; 3569 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET; 3570 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE; 3571 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL; 3572 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL; 3573 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; 3574 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL; 3575 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE; 3576 data->REG_ALARM = NCT6106_REG_ALARM; 3577 data->ALARM_BITS = NCT6106_ALARM_BITS; 3578 data->REG_BEEP = NCT6106_REG_BEEP; 3579 data->BEEP_BITS = NCT6106_BEEP_BITS; 3580 data->REG_TSI_TEMP = NCT6106_REG_TSI_TEMP; 3581 3582 reg_temp = NCT6106_REG_TEMP; 3583 reg_temp_mon = NCT6106_REG_TEMP_MON; 3584 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP); 3585 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON); 3586 num_reg_tsi_temp = ARRAY_SIZE(NCT6106_REG_TSI_TEMP); 3587 reg_temp_over = NCT6106_REG_TEMP_OVER; 3588 reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3589 reg_temp_config = NCT6106_REG_TEMP_CONFIG; 3590 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE; 3591 reg_temp_crit = NCT6106_REG_TEMP_CRIT; 3592 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L; 3593 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H; 3594 3595 break; 3596 case nct6116: 3597 data->in_num = 9; 3598 data->pwm_num = 3; 3599 data->auto_pwm_num = 4; 3600 data->temp_fixed_num = 3; 3601 data->num_temp_alarms = 3; 3602 data->num_temp_beeps = 3; 3603 3604 data->fan_from_reg = fan_from_reg13; 3605 data->fan_from_reg_min = fan_from_reg13; 3606 3607 data->temp_label = nct6776_temp_label; 3608 data->temp_mask = NCT6776_TEMP_MASK; 3609 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3610 3611 data->REG_VBAT = NCT6106_REG_VBAT; 3612 data->REG_DIODE = NCT6106_REG_DIODE; 3613 data->DIODE_MASK = NCT6106_DIODE_MASK; 3614 data->REG_VIN = NCT6106_REG_IN; 3615 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; 3616 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX; 3617 data->REG_TARGET = NCT6116_REG_TARGET; 3618 data->REG_FAN = NCT6116_REG_FAN; 3619 data->REG_FAN_MODE = NCT6116_REG_FAN_MODE; 3620 data->REG_FAN_MIN = NCT6116_REG_FAN_MIN; 3621 data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES; 3622 data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT; 3623 data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME; 3624 data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME; 3625 data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME; 3626 data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H; 3627 data->REG_PWM[0] = NCT6116_REG_PWM; 3628 data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT; 3629 data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT; 3630 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP; 3631 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE; 3632 data->REG_PWM_READ = NCT6106_REG_PWM_READ; 3633 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE; 3634 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK; 3635 data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP; 3636 data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM; 3637 data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP; 3638 data->REG_CRITICAL_TEMP_TOLERANCE 3639 = NCT6116_REG_CRITICAL_TEMP_TOLERANCE; 3640 data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE; 3641 data->CRITICAL_PWM_ENABLE_MASK 3642 = NCT6106_CRITICAL_PWM_ENABLE_MASK; 3643 data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM; 3644 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET; 3645 data->REG_TEMP_SOURCE = NCT6116_REG_TEMP_SOURCE; 3646 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL; 3647 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL; 3648 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; 3649 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL; 3650 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE; 3651 data->REG_ALARM = NCT6106_REG_ALARM; 3652 data->ALARM_BITS = NCT6116_ALARM_BITS; 3653 data->REG_BEEP = NCT6106_REG_BEEP; 3654 data->BEEP_BITS = NCT6116_BEEP_BITS; 3655 data->REG_TSI_TEMP = NCT6116_REG_TSI_TEMP; 3656 3657 reg_temp = NCT6106_REG_TEMP; 3658 reg_temp_mon = NCT6106_REG_TEMP_MON; 3659 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP); 3660 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON); 3661 num_reg_tsi_temp = ARRAY_SIZE(NCT6116_REG_TSI_TEMP); 3662 reg_temp_over = NCT6106_REG_TEMP_OVER; 3663 reg_temp_hyst = NCT6106_REG_TEMP_HYST; 3664 reg_temp_config = NCT6106_REG_TEMP_CONFIG; 3665 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE; 3666 reg_temp_crit = NCT6106_REG_TEMP_CRIT; 3667 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L; 3668 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H; 3669 3670 break; 3671 case nct6775: 3672 data->in_num = 9; 3673 data->pwm_num = 3; 3674 data->auto_pwm_num = 6; 3675 data->has_fan_div = true; 3676 data->temp_fixed_num = 3; 3677 data->num_temp_alarms = 3; 3678 data->num_temp_beeps = 3; 3679 3680 data->ALARM_BITS = NCT6775_ALARM_BITS; 3681 data->BEEP_BITS = NCT6775_BEEP_BITS; 3682 3683 data->fan_from_reg = fan_from_reg16; 3684 data->fan_from_reg_min = fan_from_reg8; 3685 data->target_temp_mask = 0x7f; 3686 data->tolerance_mask = 0x0f; 3687 data->speed_tolerance_limit = 15; 3688 3689 data->temp_label = nct6775_temp_label; 3690 data->temp_mask = NCT6775_TEMP_MASK; 3691 data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK; 3692 3693 data->REG_CONFIG = NCT6775_REG_CONFIG; 3694 data->REG_VBAT = NCT6775_REG_VBAT; 3695 data->REG_DIODE = NCT6775_REG_DIODE; 3696 data->DIODE_MASK = NCT6775_DIODE_MASK; 3697 data->REG_VIN = NCT6775_REG_IN; 3698 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3699 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3700 data->REG_TARGET = NCT6775_REG_TARGET; 3701 data->REG_FAN = NCT6775_REG_FAN; 3702 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3703 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN; 3704 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES; 3705 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3706 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3707 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME; 3708 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME; 3709 data->REG_PWM[0] = NCT6775_REG_PWM; 3710 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3711 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3712 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT; 3713 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT; 3714 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3715 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3716 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE; 3717 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK; 3718 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3719 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3720 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3721 data->REG_CRITICAL_TEMP_TOLERANCE 3722 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3723 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET; 3724 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3725 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3726 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3727 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3728 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3729 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3730 data->REG_ALARM = NCT6775_REG_ALARM; 3731 data->REG_BEEP = NCT6775_REG_BEEP; 3732 data->REG_TSI_TEMP = NCT6775_REG_TSI_TEMP; 3733 3734 reg_temp = NCT6775_REG_TEMP; 3735 reg_temp_mon = NCT6775_REG_TEMP_MON; 3736 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3737 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3738 num_reg_tsi_temp = ARRAY_SIZE(NCT6775_REG_TSI_TEMP); 3739 reg_temp_over = NCT6775_REG_TEMP_OVER; 3740 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3741 reg_temp_config = NCT6775_REG_TEMP_CONFIG; 3742 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE; 3743 reg_temp_crit = NCT6775_REG_TEMP_CRIT; 3744 3745 break; 3746 case nct6776: 3747 data->in_num = 9; 3748 data->pwm_num = 3; 3749 data->auto_pwm_num = 4; 3750 data->has_fan_div = false; 3751 data->temp_fixed_num = 3; 3752 data->num_temp_alarms = 3; 3753 data->num_temp_beeps = 6; 3754 3755 data->ALARM_BITS = NCT6776_ALARM_BITS; 3756 data->BEEP_BITS = NCT6776_BEEP_BITS; 3757 3758 data->fan_from_reg = fan_from_reg13; 3759 data->fan_from_reg_min = fan_from_reg13; 3760 data->target_temp_mask = 0xff; 3761 data->tolerance_mask = 0x07; 3762 data->speed_tolerance_limit = 63; 3763 3764 data->temp_label = nct6776_temp_label; 3765 data->temp_mask = NCT6776_TEMP_MASK; 3766 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK; 3767 3768 data->REG_CONFIG = NCT6775_REG_CONFIG; 3769 data->REG_VBAT = NCT6775_REG_VBAT; 3770 data->REG_DIODE = NCT6775_REG_DIODE; 3771 data->DIODE_MASK = NCT6775_DIODE_MASK; 3772 data->REG_VIN = NCT6775_REG_IN; 3773 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3774 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3775 data->REG_TARGET = NCT6775_REG_TARGET; 3776 data->REG_FAN = NCT6775_REG_FAN; 3777 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3778 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3779 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES; 3780 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3781 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3782 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3783 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3784 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3785 data->REG_PWM[0] = NCT6775_REG_PWM; 3786 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3787 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3788 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3789 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE; 3790 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3791 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3792 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3793 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3794 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3795 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3796 data->REG_CRITICAL_TEMP_TOLERANCE 3797 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3798 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET; 3799 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3800 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3801 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3802 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3803 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3804 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3805 data->REG_ALARM = NCT6775_REG_ALARM; 3806 data->REG_BEEP = NCT6776_REG_BEEP; 3807 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3808 3809 reg_temp = NCT6775_REG_TEMP; 3810 reg_temp_mon = NCT6775_REG_TEMP_MON; 3811 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP); 3812 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON); 3813 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3814 reg_temp_over = NCT6775_REG_TEMP_OVER; 3815 reg_temp_hyst = NCT6775_REG_TEMP_HYST; 3816 reg_temp_config = NCT6776_REG_TEMP_CONFIG; 3817 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE; 3818 reg_temp_crit = NCT6776_REG_TEMP_CRIT; 3819 3820 break; 3821 case nct6779: 3822 data->in_num = 15; 3823 data->pwm_num = 5; 3824 data->auto_pwm_num = 4; 3825 data->has_fan_div = false; 3826 data->temp_fixed_num = 6; 3827 data->num_temp_alarms = 2; 3828 data->num_temp_beeps = 2; 3829 3830 data->ALARM_BITS = NCT6779_ALARM_BITS; 3831 data->BEEP_BITS = NCT6779_BEEP_BITS; 3832 3833 data->fan_from_reg = fan_from_reg_rpm; 3834 data->fan_from_reg_min = fan_from_reg13; 3835 data->target_temp_mask = 0xff; 3836 data->tolerance_mask = 0x07; 3837 data->speed_tolerance_limit = 63; 3838 3839 data->temp_label = nct6779_temp_label; 3840 data->temp_mask = NCT6779_TEMP_MASK; 3841 data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK; 3842 3843 data->REG_CONFIG = NCT6775_REG_CONFIG; 3844 data->REG_VBAT = NCT6775_REG_VBAT; 3845 data->REG_DIODE = NCT6775_REG_DIODE; 3846 data->DIODE_MASK = NCT6775_DIODE_MASK; 3847 data->REG_VIN = NCT6779_REG_IN; 3848 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3849 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3850 data->REG_TARGET = NCT6775_REG_TARGET; 3851 data->REG_FAN = NCT6779_REG_FAN; 3852 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3853 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3854 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3855 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3856 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3857 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3858 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3859 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3860 data->REG_PWM[0] = NCT6775_REG_PWM; 3861 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3862 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3863 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP; 3864 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE; 3865 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3866 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3867 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3868 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3869 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3870 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3871 data->REG_CRITICAL_TEMP_TOLERANCE 3872 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3873 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 3874 data->CRITICAL_PWM_ENABLE_MASK 3875 = NCT6779_CRITICAL_PWM_ENABLE_MASK; 3876 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 3877 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 3878 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3879 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3880 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL; 3881 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; 3882 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL; 3883 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE; 3884 data->REG_ALARM = NCT6779_REG_ALARM; 3885 data->REG_BEEP = NCT6776_REG_BEEP; 3886 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 3887 3888 reg_temp = NCT6779_REG_TEMP; 3889 reg_temp_mon = NCT6779_REG_TEMP_MON; 3890 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 3891 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 3892 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 3893 reg_temp_over = NCT6779_REG_TEMP_OVER; 3894 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 3895 reg_temp_config = NCT6779_REG_TEMP_CONFIG; 3896 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE; 3897 reg_temp_crit = NCT6779_REG_TEMP_CRIT; 3898 3899 break; 3900 case nct6791: 3901 case nct6792: 3902 case nct6793: 3903 case nct6795: 3904 case nct6796: 3905 case nct6797: 3906 data->in_num = 15; 3907 data->pwm_num = (data->kind == nct6796 || 3908 data->kind == nct6797) ? 7 : 6; 3909 data->auto_pwm_num = 4; 3910 data->has_fan_div = false; 3911 data->temp_fixed_num = 6; 3912 data->num_temp_alarms = 2; 3913 data->num_temp_beeps = 2; 3914 3915 data->ALARM_BITS = NCT6791_ALARM_BITS; 3916 data->BEEP_BITS = NCT6779_BEEP_BITS; 3917 3918 data->fan_from_reg = fan_from_reg_rpm; 3919 data->fan_from_reg_min = fan_from_reg13; 3920 data->target_temp_mask = 0xff; 3921 data->tolerance_mask = 0x07; 3922 data->speed_tolerance_limit = 63; 3923 3924 switch (data->kind) { 3925 default: 3926 case nct6791: 3927 data->temp_label = nct6779_temp_label; 3928 data->temp_mask = NCT6791_TEMP_MASK; 3929 data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK; 3930 break; 3931 case nct6792: 3932 data->temp_label = nct6792_temp_label; 3933 data->temp_mask = NCT6792_TEMP_MASK; 3934 data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK; 3935 break; 3936 case nct6793: 3937 data->temp_label = nct6793_temp_label; 3938 data->temp_mask = NCT6793_TEMP_MASK; 3939 data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK; 3940 break; 3941 case nct6795: 3942 case nct6797: 3943 data->temp_label = nct6795_temp_label; 3944 data->temp_mask = NCT6795_TEMP_MASK; 3945 data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK; 3946 break; 3947 case nct6796: 3948 data->temp_label = nct6796_temp_label; 3949 data->temp_mask = NCT6796_TEMP_MASK; 3950 data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK; 3951 break; 3952 } 3953 3954 data->REG_CONFIG = NCT6775_REG_CONFIG; 3955 data->REG_VBAT = NCT6775_REG_VBAT; 3956 data->REG_DIODE = NCT6775_REG_DIODE; 3957 data->DIODE_MASK = NCT6775_DIODE_MASK; 3958 data->REG_VIN = NCT6779_REG_IN; 3959 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 3960 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 3961 data->REG_TARGET = NCT6775_REG_TARGET; 3962 data->REG_FAN = NCT6779_REG_FAN; 3963 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 3964 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 3965 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 3966 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 3967 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 3968 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 3969 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 3970 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 3971 data->REG_PWM[0] = NCT6775_REG_PWM; 3972 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 3973 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 3974 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP; 3975 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE; 3976 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 3977 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 3978 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 3979 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 3980 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 3981 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 3982 data->REG_CRITICAL_TEMP_TOLERANCE 3983 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 3984 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 3985 data->CRITICAL_PWM_ENABLE_MASK 3986 = NCT6779_CRITICAL_PWM_ENABLE_MASK; 3987 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 3988 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 3989 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE; 3990 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 3991 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL; 3992 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP; 3993 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL; 3994 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE; 3995 data->REG_ALARM = NCT6791_REG_ALARM; 3996 if (data->kind == nct6791) 3997 data->REG_BEEP = NCT6776_REG_BEEP; 3998 else 3999 data->REG_BEEP = NCT6792_REG_BEEP; 4000 switch (data->kind) { 4001 case nct6791: 4002 case nct6792: 4003 case nct6793: 4004 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP; 4005 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP); 4006 break; 4007 case nct6795: 4008 case nct6796: 4009 case nct6797: 4010 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; 4011 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); 4012 break; 4013 default: 4014 num_reg_tsi_temp = 0; 4015 break; 4016 } 4017 4018 reg_temp = NCT6779_REG_TEMP; 4019 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP); 4020 if (data->kind == nct6791) { 4021 reg_temp_mon = NCT6779_REG_TEMP_MON; 4022 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON); 4023 } else { 4024 reg_temp_mon = NCT6792_REG_TEMP_MON; 4025 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON); 4026 } 4027 reg_temp_over = NCT6779_REG_TEMP_OVER; 4028 reg_temp_hyst = NCT6779_REG_TEMP_HYST; 4029 reg_temp_config = NCT6779_REG_TEMP_CONFIG; 4030 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE; 4031 reg_temp_crit = NCT6779_REG_TEMP_CRIT; 4032 4033 break; 4034 case nct6798: 4035 case nct6799: 4036 data->in_num = data->kind == nct6799 ? 18 : 15; 4037 data->scale_in = scale_in_6798; 4038 data->pwm_num = 7; 4039 data->auto_pwm_num = 4; 4040 data->has_fan_div = false; 4041 data->temp_fixed_num = 6; 4042 data->num_temp_alarms = 7; 4043 data->num_temp_beeps = 8; 4044 4045 data->ALARM_BITS = NCT6799_ALARM_BITS; 4046 data->BEEP_BITS = NCT6799_BEEP_BITS; 4047 4048 data->fan_from_reg = fan_from_reg_rpm; 4049 data->fan_from_reg_min = fan_from_reg13; 4050 data->target_temp_mask = 0xff; 4051 data->tolerance_mask = 0x07; 4052 data->speed_tolerance_limit = 63; 4053 4054 switch (data->kind) { 4055 default: 4056 case nct6798: 4057 data->temp_label = nct6798_temp_label; 4058 data->temp_mask = NCT6798_TEMP_MASK; 4059 data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK; 4060 break; 4061 case nct6799: 4062 data->temp_label = nct6799_temp_label; 4063 data->temp_mask = NCT6799_TEMP_MASK; 4064 data->virt_temp_mask = NCT6799_VIRT_TEMP_MASK; 4065 break; 4066 } 4067 4068 data->REG_CONFIG = NCT6775_REG_CONFIG; 4069 data->REG_VBAT = NCT6775_REG_VBAT; 4070 data->REG_DIODE = NCT6775_REG_DIODE; 4071 data->DIODE_MASK = NCT6775_DIODE_MASK; 4072 data->REG_VIN = NCT6779_REG_IN; 4073 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; 4074 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX; 4075 data->REG_TARGET = NCT6775_REG_TARGET; 4076 data->REG_FAN = NCT6779_REG_FAN; 4077 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE; 4078 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN; 4079 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES; 4080 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT; 4081 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; 4082 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME; 4083 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME; 4084 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H; 4085 data->REG_PWM[0] = NCT6775_REG_PWM; 4086 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT; 4087 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT; 4088 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP; 4089 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE; 4090 data->REG_PWM_READ = NCT6775_REG_PWM_READ; 4091 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE; 4092 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK; 4093 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP; 4094 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM; 4095 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP; 4096 data->REG_CRITICAL_TEMP_TOLERANCE = NCT6775_REG_CRITICAL_TEMP_TOLERANCE; 4097 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE; 4098 data->CRITICAL_PWM_ENABLE_MASK = NCT6779_CRITICAL_PWM_ENABLE_MASK; 4099 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM; 4100 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET; 4101 data->REG_TEMP_SOURCE = NCT6798_REG_TEMP_SOURCE; 4102 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL; 4103 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL; 4104 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP; 4105 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL; 4106 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE; 4107 data->REG_ALARM = NCT6799_REG_ALARM; 4108 data->REG_BEEP = NCT6792_REG_BEEP; 4109 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP; 4110 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP); 4111 4112 reg_temp = NCT6798_REG_TEMP; 4113 num_reg_temp = ARRAY_SIZE(NCT6798_REG_TEMP); 4114 reg_temp_mon = NCT6798_REG_TEMP_MON; 4115 num_reg_temp_mon = ARRAY_SIZE(NCT6798_REG_TEMP_MON); 4116 reg_temp_over = NCT6798_REG_TEMP_OVER; 4117 reg_temp_hyst = NCT6798_REG_TEMP_HYST; 4118 reg_temp_config = NCT6779_REG_TEMP_CONFIG; 4119 reg_temp_alternate = NCT6798_REG_TEMP_ALTERNATE; 4120 reg_temp_crit = NCT6798_REG_TEMP_CRIT; 4121 4122 break; 4123 default: 4124 return -ENODEV; 4125 } 4126 data->have_in = BIT(data->in_num) - 1; 4127 data->have_temp = 0; 4128 4129 /* 4130 * On some boards, not all available temperature sources are monitored, 4131 * even though some of the monitoring registers are unused. 4132 * Get list of unused monitoring registers, then detect if any fan 4133 * controls are configured to use unmonitored temperature sources. 4134 * If so, assign the unmonitored temperature sources to available 4135 * monitoring registers. 4136 */ 4137 mask = 0; 4138 available = 0; 4139 for (i = 0; i < num_reg_temp; i++) { 4140 if (reg_temp[i] == 0) 4141 continue; 4142 4143 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src); 4144 if (err) 4145 return err; 4146 src &= 0x1f; 4147 if (!src || (mask & BIT(src))) 4148 available |= BIT(i); 4149 4150 mask |= BIT(src); 4151 } 4152 4153 /* 4154 * Now find unmonitored temperature registers and enable monitoring 4155 * if additional monitoring registers are available. 4156 */ 4157 err = add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask); 4158 if (err) 4159 return err; 4160 err = add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask); 4161 if (err) 4162 return err; 4163 4164 mask = 0; 4165 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */ 4166 for (i = 0; i < num_reg_temp; i++) { 4167 if (reg_temp[i] == 0) 4168 continue; 4169 4170 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src); 4171 if (err) 4172 return err; 4173 src &= 0x1f; 4174 if (!src || (mask & BIT(src))) 4175 continue; 4176 4177 if (!(data->temp_mask & BIT(src))) { 4178 dev_info(dev, 4179 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", 4180 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]); 4181 continue; 4182 } 4183 4184 mask |= BIT(src); 4185 4186 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */ 4187 if (src <= data->temp_fixed_num) { 4188 data->have_temp |= BIT(src - 1); 4189 data->have_temp_fixed |= BIT(src - 1); 4190 data->reg_temp[0][src - 1] = reg_temp[i]; 4191 data->reg_temp[1][src - 1] = reg_temp_over[i]; 4192 data->reg_temp[2][src - 1] = reg_temp_hyst[i]; 4193 if (reg_temp_crit_h && reg_temp_crit_h[i]) 4194 data->reg_temp[3][src - 1] = reg_temp_crit_h[i]; 4195 else if (reg_temp_crit[src - 1]) 4196 data->reg_temp[3][src - 1] 4197 = reg_temp_crit[src - 1]; 4198 if (reg_temp_crit_l && reg_temp_crit_l[i]) 4199 data->reg_temp[4][src - 1] = reg_temp_crit_l[i]; 4200 data->reg_temp_config[src - 1] = reg_temp_config[i]; 4201 data->temp_src[src - 1] = src; 4202 continue; 4203 } 4204 4205 if (s >= NUM_TEMP) 4206 continue; 4207 4208 /* Use dynamic index for other sources */ 4209 data->have_temp |= BIT(s); 4210 data->reg_temp[0][s] = reg_temp[i]; 4211 data->reg_temp[1][s] = reg_temp_over[i]; 4212 data->reg_temp[2][s] = reg_temp_hyst[i]; 4213 data->reg_temp_config[s] = reg_temp_config[i]; 4214 if (reg_temp_crit_h && reg_temp_crit_h[i]) 4215 data->reg_temp[3][s] = reg_temp_crit_h[i]; 4216 else if (reg_temp_crit[src - 1]) 4217 data->reg_temp[3][s] = reg_temp_crit[src - 1]; 4218 if (reg_temp_crit_l && reg_temp_crit_l[i]) 4219 data->reg_temp[4][s] = reg_temp_crit_l[i]; 4220 4221 data->temp_src[s] = src; 4222 s++; 4223 } 4224 4225 /* 4226 * Repeat with temperatures used for fan control. 4227 * This set of registers does not support limits. 4228 */ 4229 for (i = 0; i < num_reg_temp_mon; i++) { 4230 if (reg_temp_mon[i] == 0) 4231 continue; 4232 4233 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &src); 4234 if (err) 4235 return err; 4236 src &= 0x1f; 4237 if (!src) 4238 continue; 4239 4240 if (!(data->temp_mask & BIT(src))) { 4241 dev_info(dev, 4242 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", 4243 src, i, data->REG_TEMP_SEL[i], 4244 reg_temp_mon[i]); 4245 continue; 4246 } 4247 4248 /* 4249 * For virtual temperature sources, the 'virtual' temperature 4250 * for each fan reflects a different temperature, and there 4251 * are no duplicates. 4252 */ 4253 if (!(data->virt_temp_mask & BIT(src))) { 4254 if (mask & BIT(src)) 4255 continue; 4256 mask |= BIT(src); 4257 } 4258 4259 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */ 4260 if (src <= data->temp_fixed_num) { 4261 if (data->have_temp & BIT(src - 1)) 4262 continue; 4263 data->have_temp |= BIT(src - 1); 4264 data->have_temp_fixed |= BIT(src - 1); 4265 data->reg_temp[0][src - 1] = reg_temp_mon[i]; 4266 data->temp_src[src - 1] = src; 4267 continue; 4268 } 4269 4270 if (s >= NUM_TEMP) 4271 continue; 4272 4273 /* Use dynamic index for other sources */ 4274 data->have_temp |= BIT(s); 4275 data->reg_temp[0][s] = reg_temp_mon[i]; 4276 data->temp_src[s] = src; 4277 s++; 4278 } 4279 4280 #ifdef USE_ALTERNATE 4281 /* 4282 * Go through the list of alternate temp registers and enable 4283 * if possible. 4284 * The temperature is already monitored if the respective bit in <mask> 4285 * is set. 4286 */ 4287 for (i = 0; i < 31; i++) { 4288 if (!(data->temp_mask & BIT(i + 1))) 4289 continue; 4290 if (!reg_temp_alternate[i]) 4291 continue; 4292 if (mask & BIT(i + 1)) 4293 continue; 4294 if (i < data->temp_fixed_num) { 4295 if (data->have_temp & BIT(i)) 4296 continue; 4297 data->have_temp |= BIT(i); 4298 data->have_temp_fixed |= BIT(i); 4299 data->reg_temp[0][i] = reg_temp_alternate[i]; 4300 if (i < num_reg_temp) { 4301 data->reg_temp[1][i] = reg_temp_over[i]; 4302 data->reg_temp[2][i] = reg_temp_hyst[i]; 4303 } 4304 data->temp_src[i] = i + 1; 4305 continue; 4306 } 4307 4308 if (s >= NUM_TEMP) /* Abort if no more space */ 4309 break; 4310 4311 data->have_temp |= BIT(s); 4312 data->reg_temp[0][s] = reg_temp_alternate[i]; 4313 data->temp_src[s] = i + 1; 4314 s++; 4315 } 4316 #endif /* USE_ALTERNATE */ 4317 4318 /* Check which TSIx_TEMP registers are active */ 4319 for (i = 0; i < num_reg_tsi_temp; i++) { 4320 u16 tmp; 4321 4322 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &tmp); 4323 if (err) 4324 return err; 4325 if (tmp) 4326 data->have_tsi_temp |= BIT(i); 4327 } 4328 4329 /* Initialize the chip */ 4330 err = nct6775_init_device(data); 4331 if (err) 4332 return err; 4333 4334 if (data->driver_init) { 4335 err = data->driver_init(data); 4336 if (err) 4337 return err; 4338 } 4339 4340 /* Read fan clock dividers immediately */ 4341 err = nct6775_init_fan_common(dev, data); 4342 if (err) 4343 return err; 4344 4345 /* Register sysfs hooks */ 4346 err = nct6775_add_template_attr_group(dev, data, &nct6775_pwm_template_group, 4347 data->pwm_num); 4348 if (err) 4349 return err; 4350 4351 err = nct6775_add_template_attr_group(dev, data, &nct6775_in_template_group, 4352 fls(data->have_in)); 4353 if (err) 4354 return err; 4355 4356 err = nct6775_add_template_attr_group(dev, data, &nct6775_fan_template_group, 4357 fls(data->has_fan)); 4358 if (err) 4359 return err; 4360 4361 err = nct6775_add_template_attr_group(dev, data, &nct6775_temp_template_group, 4362 fls(data->have_temp)); 4363 if (err) 4364 return err; 4365 4366 if (data->have_tsi_temp) { 4367 tsi_temp_tg.templates = nct6775_tsi_temp_template; 4368 tsi_temp_tg.is_visible = nct6775_tsi_temp_is_visible; 4369 tsi_temp_tg.base = fls(data->have_temp) + 1; 4370 err = nct6775_add_template_attr_group(dev, data, &tsi_temp_tg, 4371 fls(data->have_tsi_temp)); 4372 if (err) 4373 return err; 4374 } 4375 4376 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name, 4377 data, data->groups); 4378 return PTR_ERR_OR_ZERO(hwmon_dev); 4379 } 4380 EXPORT_SYMBOL_GPL(nct6775_probe); 4381 4382 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>"); 4383 MODULE_DESCRIPTION("Core driver for NCT6775F and compatible chips"); 4384 MODULE_LICENSE("GPL"); 4385