xref: /linux/drivers/hwmon/max6639.c (revision c31f4aa8fed048fa70e742c4bb49bb48dc489ab3)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * max6639.c - Support for Maxim MAX6639
4  *
5  * 2-Channel Temperature Monitor with Dual PWM Fan-Speed Controller
6  *
7  * Copyright (C) 2010, 2011 Roland Stigge <stigge@antcom.de>
8  *
9  * based on the initial MAX6639 support from semptian.net
10  * by He Changqing <hechangqing@semptian.com>
11  */
12 
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/slab.h>
16 #include <linux/jiffies.h>
17 #include <linux/i2c.h>
18 #include <linux/hwmon.h>
19 #include <linux/err.h>
20 #include <linux/regmap.h>
21 #include <linux/util_macros.h>
22 
23 /* Addresses to scan */
24 static const unsigned short normal_i2c[] = { 0x2c, 0x2e, 0x2f, I2C_CLIENT_END };
25 
26 /* The MAX6639 registers, valid channel numbers: 0, 1 */
27 #define MAX6639_REG_TEMP(ch)			(0x00 + (ch))
28 #define MAX6639_REG_STATUS			0x02
29 #define MAX6639_REG_OUTPUT_MASK			0x03
30 #define MAX6639_REG_GCONFIG			0x04
31 #define MAX6639_REG_TEMP_EXT(ch)		(0x05 + (ch))
32 #define MAX6639_REG_ALERT_LIMIT(ch)		(0x08 + (ch))
33 #define MAX6639_REG_OT_LIMIT(ch)		(0x0A + (ch))
34 #define MAX6639_REG_THERM_LIMIT(ch)		(0x0C + (ch))
35 #define MAX6639_REG_FAN_CONFIG1(ch)		(0x10 + (ch) * 4)
36 #define MAX6639_REG_FAN_CONFIG2a(ch)		(0x11 + (ch) * 4)
37 #define MAX6639_REG_FAN_CONFIG2b(ch)		(0x12 + (ch) * 4)
38 #define MAX6639_REG_FAN_CONFIG3(ch)		(0x13 + (ch) * 4)
39 #define MAX6639_REG_FAN_CNT(ch)			(0x20 + (ch))
40 #define MAX6639_REG_TARGET_CNT(ch)		(0x22 + (ch))
41 #define MAX6639_REG_FAN_PPR(ch)			(0x24 + (ch))
42 #define MAX6639_REG_TARGTDUTY(ch)		(0x26 + (ch))
43 #define MAX6639_REG_FAN_START_TEMP(ch)		(0x28 + (ch))
44 #define MAX6639_REG_DEVID			0x3D
45 #define MAX6639_REG_MANUID			0x3E
46 #define MAX6639_REG_DEVREV			0x3F
47 
48 /* Register bits */
49 #define MAX6639_GCONFIG_STANDBY			0x80
50 #define MAX6639_GCONFIG_POR			0x40
51 #define MAX6639_GCONFIG_DISABLE_TIMEOUT		0x20
52 #define MAX6639_GCONFIG_CH2_LOCAL		0x10
53 #define MAX6639_GCONFIG_PWM_FREQ_HI		0x08
54 
55 #define MAX6639_FAN_CONFIG1_PWM			0x80
56 #define MAX6639_FAN_CONFIG3_FREQ_MASK		0x03
57 #define MAX6639_FAN_CONFIG3_THERM_FULL_SPEED	0x40
58 
59 #define MAX6639_NUM_CHANNELS			2
60 
61 static const int rpm_ranges[] = { 2000, 4000, 8000, 16000 };
62 
63 /* Supported PWM frequency */
64 static const unsigned int freq_table[] = { 20, 33, 50, 100, 5000, 8333, 12500,
65 					   25000 };
66 
67 #define FAN_FROM_REG(val, rpm_range)	((val) == 0 || (val) == 255 ? \
68 				0 : (rpm_ranges[rpm_range] * 30) / (val))
69 #define TEMP_LIMIT_TO_REG(val)	clamp_val((val) / 1000, 0, 255)
70 
71 /*
72  * Client data (each client gets its own)
73  */
74 struct max6639_data {
75 	struct regmap *regmap;
76 
77 	/* Register values initialized only once */
78 	u8 ppr[MAX6639_NUM_CHANNELS];	/* Pulses per rotation 0..3 for 1..4 ppr */
79 	u8 rpm_range[MAX6639_NUM_CHANNELS]; /* Index in above rpm_ranges table */
80 	u32 target_rpm[MAX6639_NUM_CHANNELS];
81 
82 	/* Optional regulator for FAN supply */
83 	struct regulator *reg;
84 };
85 
86 static int max6639_temp_read_input(struct device *dev, int channel, long *temp)
87 {
88 	u32 regs[2] = { MAX6639_REG_TEMP_EXT(channel), MAX6639_REG_TEMP(channel) };
89 	struct max6639_data *data = dev_get_drvdata(dev);
90 	u8 regvals[2];
91 	int res;
92 
93 	res = regmap_multi_reg_read(data->regmap, regs, regvals, 2);
94 	if (res < 0)
95 		return res;
96 
97 	*temp = ((regvals[0] >> 5) | (regvals[1] << 3)) * 125;
98 
99 	return 0;
100 }
101 
102 static int max6639_temp_read_fault(struct device *dev, int channel, long *fault)
103 {
104 	struct max6639_data *data = dev_get_drvdata(dev);
105 	unsigned int val;
106 	int res;
107 
108 	res = regmap_read(data->regmap, MAX6639_REG_TEMP_EXT(channel), &val);
109 	if (res < 0)
110 		return res;
111 
112 	*fault = val & 1;
113 
114 	return 0;
115 }
116 
117 static int max6639_temp_read_max(struct device *dev, int channel, long *max)
118 {
119 	struct max6639_data *data = dev_get_drvdata(dev);
120 	unsigned int val;
121 	int res;
122 
123 	res = regmap_read(data->regmap, MAX6639_REG_THERM_LIMIT(channel), &val);
124 	if (res < 0)
125 		return res;
126 
127 	*max = (long)val * 1000;
128 
129 	return 0;
130 }
131 
132 static int max6639_temp_read_crit(struct device *dev, int channel, long *crit)
133 {
134 	struct max6639_data *data = dev_get_drvdata(dev);
135 	unsigned int val;
136 	int res;
137 
138 	res = regmap_read(data->regmap, MAX6639_REG_ALERT_LIMIT(channel), &val);
139 	if (res < 0)
140 		return res;
141 
142 	*crit = (long)val * 1000;
143 
144 	return 0;
145 }
146 
147 static int max6639_temp_read_emergency(struct device *dev, int channel, long *emerg)
148 {
149 	struct max6639_data *data = dev_get_drvdata(dev);
150 	unsigned int val;
151 	int res;
152 
153 	res = regmap_read(data->regmap, MAX6639_REG_OT_LIMIT(channel), &val);
154 	if (res < 0)
155 		return res;
156 
157 	*emerg = (long)val * 1000;
158 
159 	return 0;
160 }
161 
162 static int max6639_get_status(struct device *dev, unsigned int *status)
163 {
164 	struct max6639_data *data = dev_get_drvdata(dev);
165 	unsigned int val;
166 	int res;
167 
168 	res = regmap_read(data->regmap, MAX6639_REG_STATUS, &val);
169 	if (res < 0)
170 		return res;
171 
172 	*status = val;
173 
174 	return 0;
175 }
176 
177 static int max6639_temp_set_max(struct max6639_data *data, int channel, long val)
178 {
179 	int res;
180 
181 	res = regmap_write(data->regmap, MAX6639_REG_THERM_LIMIT(channel),
182 			   TEMP_LIMIT_TO_REG(val));
183 	return res;
184 }
185 
186 static int max6639_temp_set_crit(struct max6639_data *data, int channel, long val)
187 {
188 	int res;
189 
190 	res = regmap_write(data->regmap, MAX6639_REG_ALERT_LIMIT(channel), TEMP_LIMIT_TO_REG(val));
191 
192 	return res;
193 }
194 
195 static int max6639_temp_set_emergency(struct max6639_data *data, int channel, long val)
196 {
197 	int res;
198 
199 	res = regmap_write(data->regmap, MAX6639_REG_OT_LIMIT(channel), TEMP_LIMIT_TO_REG(val));
200 
201 	return res;
202 }
203 
204 static int max6639_read_fan(struct device *dev, u32 attr, int channel,
205 			    long *fan_val)
206 {
207 	struct max6639_data *data = dev_get_drvdata(dev);
208 	unsigned int val;
209 	int res;
210 
211 	switch (attr) {
212 	case hwmon_fan_input:
213 		res = regmap_read(data->regmap, MAX6639_REG_FAN_CNT(channel), &val);
214 		if (res < 0)
215 			return res;
216 		*fan_val = FAN_FROM_REG(val, data->rpm_range[channel]);
217 		return 0;
218 	case hwmon_fan_fault:
219 		res = max6639_get_status(dev, &val);
220 		if (res < 0)
221 			return res;
222 		*fan_val = !!(val & BIT(1 - channel));
223 		return 0;
224 	case hwmon_fan_pulses:
225 		*fan_val = data->ppr[channel];
226 		return 0;
227 	default:
228 		return -EOPNOTSUPP;
229 	}
230 }
231 
232 static int max6639_set_ppr(struct max6639_data *data, int channel, u8 ppr)
233 {
234 	/* Decrement the PPR value and shift left by 6 to match the register format */
235 	return regmap_write(data->regmap, MAX6639_REG_FAN_PPR(channel), ppr-- << 6);
236 }
237 
238 static int max6639_write_fan(struct device *dev, u32 attr, int channel,
239 			     long val)
240 {
241 	struct max6639_data *data = dev_get_drvdata(dev);
242 	int err;
243 
244 	switch (attr) {
245 	case hwmon_fan_pulses:
246 		if (val <= 0 || val > 4)
247 			return -EINVAL;
248 
249 		/* Set Fan pulse per revolution */
250 		err = max6639_set_ppr(data, channel, val);
251 		if (err < 0)
252 			return err;
253 		data->ppr[channel] = val;
254 		return 0;
255 	default:
256 		return -EOPNOTSUPP;
257 	}
258 }
259 
260 static umode_t max6639_fan_is_visible(const void *_data, u32 attr, int channel)
261 {
262 	switch (attr) {
263 	case hwmon_fan_input:
264 	case hwmon_fan_fault:
265 		return 0444;
266 	case hwmon_fan_pulses:
267 		return 0644;
268 	default:
269 		return 0;
270 	}
271 }
272 
273 static int max6639_read_pwm(struct device *dev, u32 attr, int channel,
274 			    long *pwm_val)
275 {
276 	u32 regs[2] = { MAX6639_REG_FAN_CONFIG3(channel), MAX6639_REG_GCONFIG };
277 	struct max6639_data *data = dev_get_drvdata(dev);
278 	unsigned int val;
279 	u8 regvals[2];
280 	int res;
281 	u8 i;
282 
283 	switch (attr) {
284 	case hwmon_pwm_input:
285 		res = regmap_read(data->regmap, MAX6639_REG_TARGTDUTY(channel), &val);
286 		if (res < 0)
287 			return res;
288 		*pwm_val = val * 255 / 120;
289 		return 0;
290 	case hwmon_pwm_freq:
291 		res = regmap_multi_reg_read(data->regmap, regs, regvals, 2);
292 		if (res < 0)
293 			return res;
294 		i = regvals[0] & MAX6639_FAN_CONFIG3_FREQ_MASK;
295 		if (regvals[1] & MAX6639_GCONFIG_PWM_FREQ_HI)
296 			i |= 0x4;
297 		*pwm_val = freq_table[i];
298 		return 0;
299 	default:
300 		return -EOPNOTSUPP;
301 	}
302 }
303 
304 static int max6639_write_pwm(struct device *dev, u32 attr, int channel,
305 			     long val)
306 {
307 	struct max6639_data *data = dev_get_drvdata(dev);
308 	int err;
309 	u8 i;
310 
311 	switch (attr) {
312 	case hwmon_pwm_input:
313 		if (val < 0 || val > 255)
314 			return -EINVAL;
315 		return regmap_write(data->regmap, MAX6639_REG_TARGTDUTY(channel),
316 				    val * 120 / 255);
317 	case hwmon_pwm_freq:
318 		val = clamp_val(val, 0, 25000);
319 
320 		i = find_closest(val, freq_table, ARRAY_SIZE(freq_table));
321 
322 		err = regmap_update_bits(data->regmap, MAX6639_REG_FAN_CONFIG3(channel),
323 					 MAX6639_FAN_CONFIG3_FREQ_MASK, i);
324 		if (err < 0)
325 			return err;
326 
327 		if (i >> 2)
328 			err = regmap_set_bits(data->regmap, MAX6639_REG_GCONFIG,
329 					      MAX6639_GCONFIG_PWM_FREQ_HI);
330 		else
331 			err = regmap_clear_bits(data->regmap, MAX6639_REG_GCONFIG,
332 						MAX6639_GCONFIG_PWM_FREQ_HI);
333 
334 		return err;
335 	default:
336 		return -EOPNOTSUPP;
337 	}
338 }
339 
340 static umode_t max6639_pwm_is_visible(const void *_data, u32 attr, int channel)
341 {
342 	switch (attr) {
343 	case hwmon_pwm_input:
344 	case hwmon_pwm_freq:
345 		return 0644;
346 	default:
347 		return 0;
348 	}
349 }
350 
351 static int max6639_read_temp(struct device *dev, u32 attr, int channel,
352 			     long *val)
353 {
354 	unsigned int status;
355 	int res;
356 
357 	switch (attr) {
358 	case hwmon_temp_input:
359 		res = max6639_temp_read_input(dev, channel, val);
360 		return res;
361 	case hwmon_temp_fault:
362 		res = max6639_temp_read_fault(dev, channel, val);
363 		return res;
364 	case hwmon_temp_max:
365 		res = max6639_temp_read_max(dev, channel, val);
366 		return res;
367 	case hwmon_temp_crit:
368 		res = max6639_temp_read_crit(dev, channel, val);
369 		return res;
370 	case hwmon_temp_emergency:
371 		res = max6639_temp_read_emergency(dev, channel, val);
372 		return res;
373 	case hwmon_temp_max_alarm:
374 		res = max6639_get_status(dev, &status);
375 		if (res < 0)
376 			return res;
377 		*val = !!(status & BIT(3 - channel));
378 		return 0;
379 	case hwmon_temp_crit_alarm:
380 		res = max6639_get_status(dev, &status);
381 		if (res < 0)
382 			return res;
383 		*val = !!(status & BIT(7 - channel));
384 		return 0;
385 	case hwmon_temp_emergency_alarm:
386 		res = max6639_get_status(dev, &status);
387 		if (res < 0)
388 			return res;
389 		*val = !!(status & BIT(5 - channel));
390 		return 0;
391 	default:
392 		return -EOPNOTSUPP;
393 	}
394 }
395 
396 static int max6639_write_temp(struct device *dev, u32 attr, int channel,
397 			      long val)
398 {
399 	struct max6639_data *data = dev_get_drvdata(dev);
400 
401 	switch (attr) {
402 	case hwmon_temp_max:
403 		return max6639_temp_set_max(data, channel, val);
404 	case hwmon_temp_crit:
405 		return max6639_temp_set_crit(data, channel, val);
406 	case hwmon_temp_emergency:
407 		return max6639_temp_set_emergency(data, channel, val);
408 	default:
409 		return -EOPNOTSUPP;
410 	}
411 }
412 
413 static umode_t max6639_temp_is_visible(const void *_data, u32 attr, int channel)
414 {
415 	switch (attr) {
416 	case hwmon_temp_input:
417 	case hwmon_temp_fault:
418 	case hwmon_temp_max_alarm:
419 	case hwmon_temp_crit_alarm:
420 	case hwmon_temp_emergency_alarm:
421 		return 0444;
422 	case hwmon_temp_max:
423 	case hwmon_temp_crit:
424 	case hwmon_temp_emergency:
425 		return 0644;
426 	default:
427 		return 0;
428 	}
429 }
430 
431 static int max6639_read(struct device *dev, enum hwmon_sensor_types type,
432 			u32 attr, int channel, long *val)
433 {
434 	switch (type) {
435 	case hwmon_fan:
436 		return max6639_read_fan(dev, attr, channel, val);
437 	case hwmon_pwm:
438 		return max6639_read_pwm(dev, attr, channel, val);
439 	case hwmon_temp:
440 		return max6639_read_temp(dev, attr, channel, val);
441 	default:
442 		return -EOPNOTSUPP;
443 	}
444 }
445 
446 static int max6639_write(struct device *dev, enum hwmon_sensor_types type,
447 			 u32 attr, int channel, long val)
448 {
449 	switch (type) {
450 	case hwmon_fan:
451 		return max6639_write_fan(dev, attr, channel, val);
452 	case hwmon_pwm:
453 		return max6639_write_pwm(dev, attr, channel, val);
454 	case hwmon_temp:
455 		return max6639_write_temp(dev, attr, channel, val);
456 	default:
457 		return -EOPNOTSUPP;
458 	}
459 }
460 
461 static umode_t max6639_is_visible(const void *data,
462 				  enum hwmon_sensor_types type,
463 				  u32 attr, int channel)
464 {
465 	switch (type) {
466 	case hwmon_fan:
467 		return max6639_fan_is_visible(data, attr, channel);
468 	case hwmon_pwm:
469 		return max6639_pwm_is_visible(data, attr, channel);
470 	case hwmon_temp:
471 		return max6639_temp_is_visible(data, attr, channel);
472 	default:
473 		return 0;
474 	}
475 }
476 
477 static const struct hwmon_channel_info * const max6639_info[] = {
478 	HWMON_CHANNEL_INFO(fan,
479 			   HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_PULSES,
480 			   HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_PULSES),
481 	HWMON_CHANNEL_INFO(pwm,
482 			   HWMON_PWM_INPUT | HWMON_PWM_FREQ,
483 			   HWMON_PWM_INPUT | HWMON_PWM_FREQ),
484 	HWMON_CHANNEL_INFO(temp,
485 			   HWMON_T_INPUT | HWMON_T_FAULT | HWMON_T_MAX | HWMON_T_MAX_ALARM |
486 			   HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY |
487 			   HWMON_T_EMERGENCY_ALARM,
488 			   HWMON_T_INPUT | HWMON_T_FAULT | HWMON_T_MAX | HWMON_T_MAX_ALARM |
489 			   HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY |
490 			   HWMON_T_EMERGENCY_ALARM),
491 	NULL
492 };
493 
494 static const struct hwmon_ops max6639_hwmon_ops = {
495 	.is_visible = max6639_is_visible,
496 	.read = max6639_read,
497 	.write = max6639_write,
498 };
499 
500 static const struct hwmon_chip_info max6639_chip_info = {
501 	.ops = &max6639_hwmon_ops,
502 	.info = max6639_info,
503 };
504 
505 /*
506  *  returns respective index in rpm_ranges table
507  *  1 by default on invalid range
508  */
509 static int rpm_range_to_reg(int range)
510 {
511 	int i;
512 
513 	for (i = 0; i < ARRAY_SIZE(rpm_ranges); i++) {
514 		if (rpm_ranges[i] == range)
515 			return i;
516 	}
517 
518 	return 1; /* default: 4000 RPM */
519 }
520 
521 static int max6639_probe_child_from_dt(struct i2c_client *client,
522 				       struct device_node *child,
523 				       struct max6639_data *data)
524 
525 {
526 	struct device *dev = &client->dev;
527 	u32 i;
528 	int err, val;
529 
530 	err = of_property_read_u32(child, "reg", &i);
531 	if (err) {
532 		dev_err(dev, "missing reg property of %pOFn\n", child);
533 		return err;
534 	}
535 
536 	if (i > 1) {
537 		dev_err(dev, "Invalid fan index reg %d\n", i);
538 		return -EINVAL;
539 	}
540 
541 	err = of_property_read_u32(child, "pulses-per-revolution", &val);
542 	if (!err) {
543 		if (val < 1 || val > 5) {
544 			dev_err(dev, "invalid pulses-per-revolution %d of %pOFn\n", val, child);
545 			return -EINVAL;
546 		}
547 		data->ppr[i] = val;
548 	}
549 
550 	err = of_property_read_u32(child, "max-rpm", &val);
551 	if (!err)
552 		data->rpm_range[i] = rpm_range_to_reg(val);
553 
554 	err = of_property_read_u32(child, "target-rpm", &val);
555 	if (!err)
556 		data->target_rpm[i] = val;
557 
558 	return 0;
559 }
560 
561 static int max6639_init_client(struct i2c_client *client,
562 			       struct max6639_data *data)
563 {
564 	struct device *dev = &client->dev;
565 	const struct device_node *np = dev->of_node;
566 	struct device_node *child;
567 	int i, err;
568 	u8 target_duty;
569 
570 	/* Reset chip to default values, see below for GCONFIG setup */
571 	err = regmap_write(data->regmap, MAX6639_REG_GCONFIG, MAX6639_GCONFIG_POR);
572 	if (err)
573 		return err;
574 
575 	/* Fans pulse per revolution is 2 by default */
576 	data->ppr[0] = 2;
577 	data->ppr[1] = 2;
578 
579 	/* default: 4000 RPM */
580 	data->rpm_range[0] = 1;
581 	data->rpm_range[1] = 1;
582 	data->target_rpm[0] = 4000;
583 	data->target_rpm[1] = 4000;
584 
585 	for_each_child_of_node(np, child) {
586 		if (strcmp(child->name, "fan"))
587 			continue;
588 
589 		err = max6639_probe_child_from_dt(client, child, data);
590 		if (err) {
591 			of_node_put(child);
592 			return err;
593 		}
594 	}
595 
596 	for (i = 0; i < MAX6639_NUM_CHANNELS; i++) {
597 		err = regmap_set_bits(data->regmap, MAX6639_REG_OUTPUT_MASK, BIT(1 - i));
598 		if (err)
599 			return err;
600 
601 		/* Set Fan pulse per revolution */
602 		err = max6639_set_ppr(data, i, data->ppr[i]);
603 		if (err)
604 			return err;
605 
606 		/* Fans config PWM, RPM */
607 		err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG1(i),
608 				   MAX6639_FAN_CONFIG1_PWM | data->rpm_range[i]);
609 		if (err)
610 			return err;
611 
612 		/* Fans PWM polarity high by default */
613 		err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG2a(i), 0x00);
614 		if (err)
615 			return err;
616 
617 		/*
618 		 * /THERM full speed enable,
619 		 * PWM frequency 25kHz, see also GCONFIG below
620 		 */
621 		err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG3(i),
622 				   MAX6639_FAN_CONFIG3_THERM_FULL_SPEED | 0x03);
623 		if (err)
624 			return err;
625 
626 		/* Max. temp. 80C/90C/100C */
627 		err = regmap_write(data->regmap, MAX6639_REG_THERM_LIMIT(i), 80);
628 		if (err)
629 			return err;
630 		err = regmap_write(data->regmap, MAX6639_REG_ALERT_LIMIT(i), 90);
631 		if (err)
632 			return err;
633 		err = regmap_write(data->regmap, MAX6639_REG_OT_LIMIT(i), 100);
634 		if (err)
635 			return err;
636 
637 		/* Set PWM based on target RPM if specified */
638 		if (data->target_rpm[i] >  rpm_ranges[data->rpm_range[i]])
639 			data->target_rpm[i] = rpm_ranges[data->rpm_range[i]];
640 
641 		target_duty = 120 * data->target_rpm[i] / rpm_ranges[data->rpm_range[i]];
642 		err = regmap_write(data->regmap, MAX6639_REG_TARGTDUTY(i), target_duty);
643 		if (err)
644 			return err;
645 	}
646 	/* Start monitoring */
647 	return regmap_write(data->regmap, MAX6639_REG_GCONFIG,
648 			    MAX6639_GCONFIG_DISABLE_TIMEOUT | MAX6639_GCONFIG_CH2_LOCAL |
649 			    MAX6639_GCONFIG_PWM_FREQ_HI);
650 
651 }
652 
653 /* Return 0 if detection is successful, -ENODEV otherwise */
654 static int max6639_detect(struct i2c_client *client,
655 			  struct i2c_board_info *info)
656 {
657 	struct i2c_adapter *adapter = client->adapter;
658 	int dev_id, manu_id;
659 
660 	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
661 		return -ENODEV;
662 
663 	/* Actual detection via device and manufacturer ID */
664 	dev_id = i2c_smbus_read_byte_data(client, MAX6639_REG_DEVID);
665 	manu_id = i2c_smbus_read_byte_data(client, MAX6639_REG_MANUID);
666 	if (dev_id != 0x58 || manu_id != 0x4D)
667 		return -ENODEV;
668 
669 	strscpy(info->type, "max6639", I2C_NAME_SIZE);
670 
671 	return 0;
672 }
673 
674 static void max6639_regulator_disable(void *data)
675 {
676 	regulator_disable(data);
677 }
678 
679 static bool max6639_regmap_is_volatile(struct device *dev, unsigned int reg)
680 {
681 	switch (reg) {
682 	case MAX6639_REG_TEMP(0):
683 	case MAX6639_REG_TEMP_EXT(0):
684 	case MAX6639_REG_TEMP(1):
685 	case MAX6639_REG_TEMP_EXT(1):
686 	case MAX6639_REG_STATUS:
687 	case MAX6639_REG_FAN_CNT(0):
688 	case MAX6639_REG_FAN_CNT(1):
689 	case MAX6639_REG_TARGTDUTY(0):
690 	case MAX6639_REG_TARGTDUTY(1):
691 		return true;
692 	default:
693 		return false;
694 	}
695 }
696 
697 static const struct regmap_config max6639_regmap_config = {
698 	.reg_bits = 8,
699 	.val_bits = 8,
700 	.max_register = MAX6639_REG_DEVREV,
701 	.cache_type = REGCACHE_MAPLE,
702 	.volatile_reg = max6639_regmap_is_volatile,
703 };
704 
705 static int max6639_probe(struct i2c_client *client)
706 {
707 	struct device *dev = &client->dev;
708 	struct max6639_data *data;
709 	struct device *hwmon_dev;
710 	int err;
711 
712 	data = devm_kzalloc(dev, sizeof(struct max6639_data), GFP_KERNEL);
713 	if (!data)
714 		return -ENOMEM;
715 
716 	data->regmap = devm_regmap_init_i2c(client, &max6639_regmap_config);
717 	if (IS_ERR(data->regmap))
718 		return dev_err_probe(dev,
719 				     PTR_ERR(data->regmap),
720 				     "regmap initialization failed\n");
721 
722 	data->reg = devm_regulator_get_optional(dev, "fan");
723 	if (IS_ERR(data->reg)) {
724 		if (PTR_ERR(data->reg) != -ENODEV)
725 			return PTR_ERR(data->reg);
726 
727 		data->reg = NULL;
728 	} else {
729 		/* Spin up fans */
730 		err = regulator_enable(data->reg);
731 		if (err) {
732 			dev_err(dev, "Failed to enable fan supply: %d\n", err);
733 			return err;
734 		}
735 		err = devm_add_action_or_reset(dev, max6639_regulator_disable,
736 					       data->reg);
737 		if (err) {
738 			dev_err(dev, "Failed to register action: %d\n", err);
739 			return err;
740 		}
741 	}
742 
743 	/* Initialize the max6639 chip */
744 	err = max6639_init_client(client, data);
745 	if (err < 0)
746 		return err;
747 
748 	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
749 							 data, &max6639_chip_info,
750 							 NULL);
751 
752 	return PTR_ERR_OR_ZERO(hwmon_dev);
753 }
754 
755 static int max6639_suspend(struct device *dev)
756 {
757 	struct max6639_data *data = dev_get_drvdata(dev);
758 
759 	if (data->reg)
760 		regulator_disable(data->reg);
761 
762 	return regmap_write_bits(data->regmap, MAX6639_REG_GCONFIG, MAX6639_GCONFIG_STANDBY,
763 				 MAX6639_GCONFIG_STANDBY);
764 }
765 
766 static int max6639_resume(struct device *dev)
767 {
768 	struct max6639_data *data = dev_get_drvdata(dev);
769 	int ret;
770 
771 	if (data->reg) {
772 		ret = regulator_enable(data->reg);
773 		if (ret) {
774 			dev_err(dev, "Failed to enable fan supply: %d\n", ret);
775 			return ret;
776 		}
777 	}
778 
779 	return regmap_write_bits(data->regmap, MAX6639_REG_GCONFIG, MAX6639_GCONFIG_STANDBY,
780 				 ~MAX6639_GCONFIG_STANDBY);
781 }
782 
783 static const struct i2c_device_id max6639_id[] = {
784 	{"max6639"},
785 	{ }
786 };
787 
788 MODULE_DEVICE_TABLE(i2c, max6639_id);
789 
790 static DEFINE_SIMPLE_DEV_PM_OPS(max6639_pm_ops, max6639_suspend, max6639_resume);
791 
792 static const struct of_device_id max6639_of_match[] = {
793 	{ .compatible = "maxim,max6639", },
794 	{ },
795 };
796 
797 static struct i2c_driver max6639_driver = {
798 	.class = I2C_CLASS_HWMON,
799 	.driver = {
800 		   .name = "max6639",
801 		   .pm = pm_sleep_ptr(&max6639_pm_ops),
802 		   .of_match_table = max6639_of_match,
803 		   },
804 	.probe = max6639_probe,
805 	.id_table = max6639_id,
806 	.detect = max6639_detect,
807 	.address_list = normal_i2c,
808 };
809 
810 module_i2c_driver(max6639_driver);
811 
812 MODULE_AUTHOR("Roland Stigge <stigge@antcom.de>");
813 MODULE_DESCRIPTION("max6639 driver");
814 MODULE_LICENSE("GPL");
815