1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * max6639.c - Support for Maxim MAX6639
4 *
5 * 2-Channel Temperature Monitor with Dual PWM Fan-Speed Controller
6 *
7 * Copyright (C) 2010, 2011 Roland Stigge <stigge@antcom.de>
8 *
9 * based on the initial MAX6639 support from semptian.net
10 * by He Changqing <hechangqing@semptian.com>
11 */
12
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/slab.h>
16 #include <linux/jiffies.h>
17 #include <linux/i2c.h>
18 #include <linux/hwmon.h>
19 #include <linux/hwmon-sysfs.h>
20 #include <linux/err.h>
21 #include <linux/mutex.h>
22 #include <linux/regmap.h>
23 #include <linux/util_macros.h>
24
25 /* Addresses to scan */
26 static const unsigned short normal_i2c[] = { 0x2c, 0x2e, 0x2f, I2C_CLIENT_END };
27
28 /* The MAX6639 registers, valid channel numbers: 0, 1 */
29 #define MAX6639_REG_TEMP(ch) (0x00 + (ch))
30 #define MAX6639_REG_STATUS 0x02
31 #define MAX6639_REG_OUTPUT_MASK 0x03
32 #define MAX6639_REG_GCONFIG 0x04
33 #define MAX6639_REG_TEMP_EXT(ch) (0x05 + (ch))
34 #define MAX6639_REG_ALERT_LIMIT(ch) (0x08 + (ch))
35 #define MAX6639_REG_OT_LIMIT(ch) (0x0A + (ch))
36 #define MAX6639_REG_THERM_LIMIT(ch) (0x0C + (ch))
37 #define MAX6639_REG_FAN_CONFIG1(ch) (0x10 + (ch) * 4)
38 #define MAX6639_REG_FAN_CONFIG2a(ch) (0x11 + (ch) * 4)
39 #define MAX6639_REG_FAN_CONFIG2b(ch) (0x12 + (ch) * 4)
40 #define MAX6639_REG_FAN_CONFIG3(ch) (0x13 + (ch) * 4)
41 #define MAX6639_REG_FAN_CNT(ch) (0x20 + (ch))
42 #define MAX6639_REG_TARGET_CNT(ch) (0x22 + (ch))
43 #define MAX6639_REG_FAN_PPR(ch) (0x24 + (ch))
44 #define MAX6639_REG_TARGTDUTY(ch) (0x26 + (ch))
45 #define MAX6639_REG_FAN_START_TEMP(ch) (0x28 + (ch))
46 #define MAX6639_REG_DEVID 0x3D
47 #define MAX6639_REG_MANUID 0x3E
48 #define MAX6639_REG_DEVREV 0x3F
49
50 /* Register bits */
51 #define MAX6639_GCONFIG_STANDBY 0x80
52 #define MAX6639_GCONFIG_POR 0x40
53 #define MAX6639_GCONFIG_DISABLE_TIMEOUT 0x20
54 #define MAX6639_GCONFIG_CH2_LOCAL 0x10
55 #define MAX6639_GCONFIG_PWM_FREQ_HI 0x08
56
57 #define MAX6639_FAN_CONFIG1_PWM 0x80
58 #define MAX6639_FAN_CONFIG3_FREQ_MASK 0x03
59 #define MAX6639_FAN_CONFIG3_THERM_FULL_SPEED 0x40
60
61 #define MAX6639_NUM_CHANNELS 2
62
63 static const int rpm_ranges[] = { 2000, 4000, 8000, 16000 };
64
65 /* Supported PWM frequency */
66 static const unsigned int freq_table[] = { 20, 33, 50, 100, 5000, 8333, 12500,
67 25000 };
68
69 #define FAN_FROM_REG(val, rpm_range) ((val) == 0 || (val) == 255 ? \
70 0 : (rpm_ranges[rpm_range] * 30) / (val))
71 #define TEMP_LIMIT_TO_REG(val) clamp_val((val) / 1000, 0, 255)
72
73 /*
74 * Client data (each client gets its own)
75 */
76 struct max6639_data {
77 struct regmap *regmap;
78 struct mutex update_lock;
79
80 /* Register values initialized only once */
81 u8 ppr[MAX6639_NUM_CHANNELS]; /* Pulses per rotation 0..3 for 1..4 ppr */
82 u8 rpm_range[MAX6639_NUM_CHANNELS]; /* Index in above rpm_ranges table */
83
84 /* Optional regulator for FAN supply */
85 struct regulator *reg;
86 };
87
max6639_temp_read_input(struct device * dev,int channel,long * temp)88 static int max6639_temp_read_input(struct device *dev, int channel, long *temp)
89 {
90 u32 regs[2] = { MAX6639_REG_TEMP_EXT(channel), MAX6639_REG_TEMP(channel) };
91 struct max6639_data *data = dev_get_drvdata(dev);
92 u8 regvals[2];
93 int res;
94
95 res = regmap_multi_reg_read(data->regmap, regs, regvals, 2);
96 if (res < 0)
97 return res;
98
99 *temp = ((regvals[0] >> 5) | (regvals[1] << 3)) * 125;
100
101 return 0;
102 }
103
max6639_temp_read_fault(struct device * dev,int channel,long * fault)104 static int max6639_temp_read_fault(struct device *dev, int channel, long *fault)
105 {
106 struct max6639_data *data = dev_get_drvdata(dev);
107 unsigned int val;
108 int res;
109
110 res = regmap_read(data->regmap, MAX6639_REG_TEMP_EXT(channel), &val);
111 if (res < 0)
112 return res;
113
114 *fault = val & 1;
115
116 return 0;
117 }
118
max6639_temp_read_max(struct device * dev,int channel,long * max)119 static int max6639_temp_read_max(struct device *dev, int channel, long *max)
120 {
121 struct max6639_data *data = dev_get_drvdata(dev);
122 unsigned int val;
123 int res;
124
125 res = regmap_read(data->regmap, MAX6639_REG_THERM_LIMIT(channel), &val);
126 if (res < 0)
127 return res;
128
129 *max = (long)val * 1000;
130
131 return 0;
132 }
133
max6639_temp_read_crit(struct device * dev,int channel,long * crit)134 static int max6639_temp_read_crit(struct device *dev, int channel, long *crit)
135 {
136 struct max6639_data *data = dev_get_drvdata(dev);
137 unsigned int val;
138 int res;
139
140 res = regmap_read(data->regmap, MAX6639_REG_ALERT_LIMIT(channel), &val);
141 if (res < 0)
142 return res;
143
144 *crit = (long)val * 1000;
145
146 return 0;
147 }
148
max6639_temp_read_emergency(struct device * dev,int channel,long * emerg)149 static int max6639_temp_read_emergency(struct device *dev, int channel, long *emerg)
150 {
151 struct max6639_data *data = dev_get_drvdata(dev);
152 unsigned int val;
153 int res;
154
155 res = regmap_read(data->regmap, MAX6639_REG_OT_LIMIT(channel), &val);
156 if (res < 0)
157 return res;
158
159 *emerg = (long)val * 1000;
160
161 return 0;
162 }
163
max6639_get_status(struct device * dev,unsigned int * status)164 static int max6639_get_status(struct device *dev, unsigned int *status)
165 {
166 struct max6639_data *data = dev_get_drvdata(dev);
167 unsigned int val;
168 int res;
169
170 res = regmap_read(data->regmap, MAX6639_REG_STATUS, &val);
171 if (res < 0)
172 return res;
173
174 *status = val;
175
176 return 0;
177 }
178
max6639_temp_set_max(struct max6639_data * data,int channel,long val)179 static int max6639_temp_set_max(struct max6639_data *data, int channel, long val)
180 {
181 int res;
182
183 res = regmap_write(data->regmap, MAX6639_REG_THERM_LIMIT(channel),
184 TEMP_LIMIT_TO_REG(val));
185 return res;
186 }
187
max6639_temp_set_crit(struct max6639_data * data,int channel,long val)188 static int max6639_temp_set_crit(struct max6639_data *data, int channel, long val)
189 {
190 int res;
191
192 res = regmap_write(data->regmap, MAX6639_REG_ALERT_LIMIT(channel), TEMP_LIMIT_TO_REG(val));
193
194 return res;
195 }
196
max6639_temp_set_emergency(struct max6639_data * data,int channel,long val)197 static int max6639_temp_set_emergency(struct max6639_data *data, int channel, long val)
198 {
199 int res;
200
201 res = regmap_write(data->regmap, MAX6639_REG_OT_LIMIT(channel), TEMP_LIMIT_TO_REG(val));
202
203 return res;
204 }
205
max6639_read_fan(struct device * dev,u32 attr,int channel,long * fan_val)206 static int max6639_read_fan(struct device *dev, u32 attr, int channel,
207 long *fan_val)
208 {
209 struct max6639_data *data = dev_get_drvdata(dev);
210 unsigned int val;
211 int res;
212
213 switch (attr) {
214 case hwmon_fan_input:
215 res = regmap_read(data->regmap, MAX6639_REG_FAN_CNT(channel), &val);
216 if (res < 0)
217 return res;
218 *fan_val = FAN_FROM_REG(val, data->rpm_range[channel]);
219 return 0;
220 case hwmon_fan_fault:
221 res = max6639_get_status(dev, &val);
222 if (res < 0)
223 return res;
224 *fan_val = !!(val & BIT(1 - channel));
225 return 0;
226 case hwmon_fan_pulses:
227 *fan_val = data->ppr[channel];
228 return 0;
229 default:
230 return -EOPNOTSUPP;
231 }
232 }
233
max6639_set_ppr(struct max6639_data * data,int channel,u8 ppr)234 static int max6639_set_ppr(struct max6639_data *data, int channel, u8 ppr)
235 {
236 /* Decrement the PPR value and shift left by 6 to match the register format */
237 return regmap_write(data->regmap, MAX6639_REG_FAN_PPR(channel), ppr-- << 6);
238 }
239
max6639_write_fan(struct device * dev,u32 attr,int channel,long val)240 static int max6639_write_fan(struct device *dev, u32 attr, int channel,
241 long val)
242 {
243 struct max6639_data *data = dev_get_drvdata(dev);
244 int err;
245
246 switch (attr) {
247 case hwmon_fan_pulses:
248 if (val <= 0 || val > 4)
249 return -EINVAL;
250
251 mutex_lock(&data->update_lock);
252 /* Set Fan pulse per revolution */
253 err = max6639_set_ppr(data, channel, val);
254 if (err < 0) {
255 mutex_unlock(&data->update_lock);
256 return err;
257 }
258 data->ppr[channel] = val;
259
260 mutex_unlock(&data->update_lock);
261 return 0;
262 default:
263 return -EOPNOTSUPP;
264 }
265 }
266
max6639_fan_is_visible(const void * _data,u32 attr,int channel)267 static umode_t max6639_fan_is_visible(const void *_data, u32 attr, int channel)
268 {
269 switch (attr) {
270 case hwmon_fan_input:
271 case hwmon_fan_fault:
272 return 0444;
273 case hwmon_fan_pulses:
274 return 0644;
275 default:
276 return 0;
277 }
278 }
279
max6639_read_pwm(struct device * dev,u32 attr,int channel,long * pwm_val)280 static int max6639_read_pwm(struct device *dev, u32 attr, int channel,
281 long *pwm_val)
282 {
283 u32 regs[2] = { MAX6639_REG_FAN_CONFIG3(channel), MAX6639_REG_GCONFIG };
284 struct max6639_data *data = dev_get_drvdata(dev);
285 unsigned int val;
286 u8 regvals[2];
287 int res;
288 u8 i;
289
290 switch (attr) {
291 case hwmon_pwm_input:
292 res = regmap_read(data->regmap, MAX6639_REG_TARGTDUTY(channel), &val);
293 if (res < 0)
294 return res;
295 *pwm_val = val * 255 / 120;
296 return 0;
297 case hwmon_pwm_freq:
298 res = regmap_multi_reg_read(data->regmap, regs, regvals, 2);
299 if (res < 0)
300 return res;
301 i = regvals[0] & MAX6639_FAN_CONFIG3_FREQ_MASK;
302 if (regvals[1] & MAX6639_GCONFIG_PWM_FREQ_HI)
303 i |= 0x4;
304 *pwm_val = freq_table[i];
305 return 0;
306 default:
307 return -EOPNOTSUPP;
308 }
309 }
310
max6639_write_pwm(struct device * dev,u32 attr,int channel,long val)311 static int max6639_write_pwm(struct device *dev, u32 attr, int channel,
312 long val)
313 {
314 struct max6639_data *data = dev_get_drvdata(dev);
315 int err;
316 u8 i;
317
318 switch (attr) {
319 case hwmon_pwm_input:
320 if (val < 0 || val > 255)
321 return -EINVAL;
322 err = regmap_write(data->regmap, MAX6639_REG_TARGTDUTY(channel),
323 val * 120 / 255);
324 return err;
325 case hwmon_pwm_freq:
326 val = clamp_val(val, 0, 25000);
327
328 i = find_closest(val, freq_table, ARRAY_SIZE(freq_table));
329
330 mutex_lock(&data->update_lock);
331 err = regmap_update_bits(data->regmap, MAX6639_REG_FAN_CONFIG3(channel),
332 MAX6639_FAN_CONFIG3_FREQ_MASK, i);
333 if (err < 0) {
334 mutex_unlock(&data->update_lock);
335 return err;
336 }
337
338 if (i >> 2)
339 err = regmap_set_bits(data->regmap, MAX6639_REG_GCONFIG,
340 MAX6639_GCONFIG_PWM_FREQ_HI);
341 else
342 err = regmap_clear_bits(data->regmap, MAX6639_REG_GCONFIG,
343 MAX6639_GCONFIG_PWM_FREQ_HI);
344
345 mutex_unlock(&data->update_lock);
346 return err;
347 default:
348 return -EOPNOTSUPP;
349 }
350 }
351
max6639_pwm_is_visible(const void * _data,u32 attr,int channel)352 static umode_t max6639_pwm_is_visible(const void *_data, u32 attr, int channel)
353 {
354 switch (attr) {
355 case hwmon_pwm_input:
356 case hwmon_pwm_freq:
357 return 0644;
358 default:
359 return 0;
360 }
361 }
362
max6639_read_temp(struct device * dev,u32 attr,int channel,long * val)363 static int max6639_read_temp(struct device *dev, u32 attr, int channel,
364 long *val)
365 {
366 unsigned int status;
367 int res;
368
369 switch (attr) {
370 case hwmon_temp_input:
371 res = max6639_temp_read_input(dev, channel, val);
372 return res;
373 case hwmon_temp_fault:
374 res = max6639_temp_read_fault(dev, channel, val);
375 return res;
376 case hwmon_temp_max:
377 res = max6639_temp_read_max(dev, channel, val);
378 return res;
379 case hwmon_temp_crit:
380 res = max6639_temp_read_crit(dev, channel, val);
381 return res;
382 case hwmon_temp_emergency:
383 res = max6639_temp_read_emergency(dev, channel, val);
384 return res;
385 case hwmon_temp_max_alarm:
386 res = max6639_get_status(dev, &status);
387 if (res < 0)
388 return res;
389 *val = !!(status & BIT(3 - channel));
390 return 0;
391 case hwmon_temp_crit_alarm:
392 res = max6639_get_status(dev, &status);
393 if (res < 0)
394 return res;
395 *val = !!(status & BIT(7 - channel));
396 return 0;
397 case hwmon_temp_emergency_alarm:
398 res = max6639_get_status(dev, &status);
399 if (res < 0)
400 return res;
401 *val = !!(status & BIT(5 - channel));
402 return 0;
403 default:
404 return -EOPNOTSUPP;
405 }
406 }
407
max6639_write_temp(struct device * dev,u32 attr,int channel,long val)408 static int max6639_write_temp(struct device *dev, u32 attr, int channel,
409 long val)
410 {
411 struct max6639_data *data = dev_get_drvdata(dev);
412
413 switch (attr) {
414 case hwmon_temp_max:
415 return max6639_temp_set_max(data, channel, val);
416 case hwmon_temp_crit:
417 return max6639_temp_set_crit(data, channel, val);
418 case hwmon_temp_emergency:
419 return max6639_temp_set_emergency(data, channel, val);
420 default:
421 return -EOPNOTSUPP;
422 }
423 }
424
max6639_temp_is_visible(const void * _data,u32 attr,int channel)425 static umode_t max6639_temp_is_visible(const void *_data, u32 attr, int channel)
426 {
427 switch (attr) {
428 case hwmon_temp_input:
429 case hwmon_temp_fault:
430 case hwmon_temp_max_alarm:
431 case hwmon_temp_crit_alarm:
432 case hwmon_temp_emergency_alarm:
433 return 0444;
434 case hwmon_temp_max:
435 case hwmon_temp_crit:
436 case hwmon_temp_emergency:
437 return 0644;
438 default:
439 return 0;
440 }
441 }
442
max6639_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * val)443 static int max6639_read(struct device *dev, enum hwmon_sensor_types type,
444 u32 attr, int channel, long *val)
445 {
446 switch (type) {
447 case hwmon_fan:
448 return max6639_read_fan(dev, attr, channel, val);
449 case hwmon_pwm:
450 return max6639_read_pwm(dev, attr, channel, val);
451 case hwmon_temp:
452 return max6639_read_temp(dev, attr, channel, val);
453 default:
454 return -EOPNOTSUPP;
455 }
456 }
457
max6639_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long val)458 static int max6639_write(struct device *dev, enum hwmon_sensor_types type,
459 u32 attr, int channel, long val)
460 {
461 switch (type) {
462 case hwmon_fan:
463 return max6639_write_fan(dev, attr, channel, val);
464 case hwmon_pwm:
465 return max6639_write_pwm(dev, attr, channel, val);
466 case hwmon_temp:
467 return max6639_write_temp(dev, attr, channel, val);
468 default:
469 return -EOPNOTSUPP;
470 }
471 }
472
max6639_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)473 static umode_t max6639_is_visible(const void *data,
474 enum hwmon_sensor_types type,
475 u32 attr, int channel)
476 {
477 switch (type) {
478 case hwmon_fan:
479 return max6639_fan_is_visible(data, attr, channel);
480 case hwmon_pwm:
481 return max6639_pwm_is_visible(data, attr, channel);
482 case hwmon_temp:
483 return max6639_temp_is_visible(data, attr, channel);
484 default:
485 return 0;
486 }
487 }
488
489 static const struct hwmon_channel_info * const max6639_info[] = {
490 HWMON_CHANNEL_INFO(fan,
491 HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_PULSES,
492 HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_PULSES),
493 HWMON_CHANNEL_INFO(pwm,
494 HWMON_PWM_INPUT | HWMON_PWM_FREQ,
495 HWMON_PWM_INPUT | HWMON_PWM_FREQ),
496 HWMON_CHANNEL_INFO(temp,
497 HWMON_T_INPUT | HWMON_T_FAULT | HWMON_T_MAX | HWMON_T_MAX_ALARM |
498 HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY |
499 HWMON_T_EMERGENCY_ALARM,
500 HWMON_T_INPUT | HWMON_T_FAULT | HWMON_T_MAX | HWMON_T_MAX_ALARM |
501 HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY |
502 HWMON_T_EMERGENCY_ALARM),
503 NULL
504 };
505
506 static const struct hwmon_ops max6639_hwmon_ops = {
507 .is_visible = max6639_is_visible,
508 .read = max6639_read,
509 .write = max6639_write,
510 };
511
512 static const struct hwmon_chip_info max6639_chip_info = {
513 .ops = &max6639_hwmon_ops,
514 .info = max6639_info,
515 };
516
517 /*
518 * returns respective index in rpm_ranges table
519 * 1 by default on invalid range
520 */
rpm_range_to_reg(int range)521 static int rpm_range_to_reg(int range)
522 {
523 int i;
524
525 for (i = 0; i < ARRAY_SIZE(rpm_ranges); i++) {
526 if (rpm_ranges[i] == range)
527 return i;
528 }
529
530 return 1; /* default: 4000 RPM */
531 }
532
max6639_probe_child_from_dt(struct i2c_client * client,struct device_node * child,struct max6639_data * data)533 static int max6639_probe_child_from_dt(struct i2c_client *client,
534 struct device_node *child,
535 struct max6639_data *data)
536
537 {
538 struct device *dev = &client->dev;
539 u32 i;
540 int err, val;
541
542 err = of_property_read_u32(child, "reg", &i);
543 if (err) {
544 dev_err(dev, "missing reg property of %pOFn\n", child);
545 return err;
546 }
547
548 if (i > 1) {
549 dev_err(dev, "Invalid fan index reg %d\n", i);
550 return -EINVAL;
551 }
552
553 err = of_property_read_u32(child, "pulses-per-revolution", &val);
554 if (!err) {
555 if (val < 1 || val > 5) {
556 dev_err(dev, "invalid pulses-per-revolution %d of %pOFn\n", val, child);
557 return -EINVAL;
558 }
559 data->ppr[i] = val;
560 }
561
562 err = of_property_read_u32(child, "max-rpm", &val);
563 if (!err)
564 data->rpm_range[i] = rpm_range_to_reg(val);
565
566 return 0;
567 }
568
max6639_init_client(struct i2c_client * client,struct max6639_data * data)569 static int max6639_init_client(struct i2c_client *client,
570 struct max6639_data *data)
571 {
572 struct device *dev = &client->dev;
573 const struct device_node *np = dev->of_node;
574 struct device_node *child;
575 int i, err;
576
577 /* Reset chip to default values, see below for GCONFIG setup */
578 err = regmap_write(data->regmap, MAX6639_REG_GCONFIG, MAX6639_GCONFIG_POR);
579 if (err)
580 return err;
581
582 /* Fans pulse per revolution is 2 by default */
583 data->ppr[0] = 2;
584 data->ppr[1] = 2;
585
586 /* default: 4000 RPM */
587 data->rpm_range[0] = 1;
588 data->rpm_range[1] = 1;
589
590 for_each_child_of_node(np, child) {
591 if (strcmp(child->name, "fan"))
592 continue;
593
594 err = max6639_probe_child_from_dt(client, child, data);
595 if (err) {
596 of_node_put(child);
597 return err;
598 }
599 }
600
601 for (i = 0; i < MAX6639_NUM_CHANNELS; i++) {
602 err = regmap_set_bits(data->regmap, MAX6639_REG_OUTPUT_MASK, BIT(1 - i));
603 if (err)
604 return err;
605
606 /* Set Fan pulse per revolution */
607 err = max6639_set_ppr(data, i, data->ppr[i]);
608 if (err)
609 return err;
610
611 /* Fans config PWM, RPM */
612 err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG1(i),
613 MAX6639_FAN_CONFIG1_PWM | data->rpm_range[i]);
614 if (err)
615 return err;
616
617 /* Fans PWM polarity high by default */
618 err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG2a(i), 0x00);
619 if (err)
620 return err;
621
622 /*
623 * /THERM full speed enable,
624 * PWM frequency 25kHz, see also GCONFIG below
625 */
626 err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG3(i),
627 MAX6639_FAN_CONFIG3_THERM_FULL_SPEED | 0x03);
628 if (err)
629 return err;
630
631 /* Max. temp. 80C/90C/100C */
632 err = regmap_write(data->regmap, MAX6639_REG_THERM_LIMIT(i), 80);
633 if (err)
634 return err;
635 err = regmap_write(data->regmap, MAX6639_REG_ALERT_LIMIT(i), 90);
636 if (err)
637 return err;
638 err = regmap_write(data->regmap, MAX6639_REG_OT_LIMIT(i), 100);
639 if (err)
640 return err;
641
642 /* PWM 120/120 (i.e. 100%) */
643 err = regmap_write(data->regmap, MAX6639_REG_TARGTDUTY(i), 120);
644 if (err)
645 return err;
646 }
647 /* Start monitoring */
648 return regmap_write(data->regmap, MAX6639_REG_GCONFIG,
649 MAX6639_GCONFIG_DISABLE_TIMEOUT | MAX6639_GCONFIG_CH2_LOCAL |
650 MAX6639_GCONFIG_PWM_FREQ_HI);
651
652 }
653
654 /* Return 0 if detection is successful, -ENODEV otherwise */
max6639_detect(struct i2c_client * client,struct i2c_board_info * info)655 static int max6639_detect(struct i2c_client *client,
656 struct i2c_board_info *info)
657 {
658 struct i2c_adapter *adapter = client->adapter;
659 int dev_id, manu_id;
660
661 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
662 return -ENODEV;
663
664 /* Actual detection via device and manufacturer ID */
665 dev_id = i2c_smbus_read_byte_data(client, MAX6639_REG_DEVID);
666 manu_id = i2c_smbus_read_byte_data(client, MAX6639_REG_MANUID);
667 if (dev_id != 0x58 || manu_id != 0x4D)
668 return -ENODEV;
669
670 strscpy(info->type, "max6639", I2C_NAME_SIZE);
671
672 return 0;
673 }
674
max6639_regulator_disable(void * data)675 static void max6639_regulator_disable(void *data)
676 {
677 regulator_disable(data);
678 }
679
max6639_regmap_is_volatile(struct device * dev,unsigned int reg)680 static bool max6639_regmap_is_volatile(struct device *dev, unsigned int reg)
681 {
682 switch (reg) {
683 case MAX6639_REG_TEMP(0):
684 case MAX6639_REG_TEMP_EXT(0):
685 case MAX6639_REG_TEMP(1):
686 case MAX6639_REG_TEMP_EXT(1):
687 case MAX6639_REG_STATUS:
688 case MAX6639_REG_FAN_CNT(0):
689 case MAX6639_REG_FAN_CNT(1):
690 case MAX6639_REG_TARGTDUTY(0):
691 case MAX6639_REG_TARGTDUTY(1):
692 return true;
693 default:
694 return false;
695 }
696 }
697
698 static const struct regmap_config max6639_regmap_config = {
699 .reg_bits = 8,
700 .val_bits = 8,
701 .max_register = MAX6639_REG_DEVREV,
702 .cache_type = REGCACHE_MAPLE,
703 .volatile_reg = max6639_regmap_is_volatile,
704 };
705
max6639_probe(struct i2c_client * client)706 static int max6639_probe(struct i2c_client *client)
707 {
708 struct device *dev = &client->dev;
709 struct max6639_data *data;
710 struct device *hwmon_dev;
711 int err;
712
713 data = devm_kzalloc(dev, sizeof(struct max6639_data), GFP_KERNEL);
714 if (!data)
715 return -ENOMEM;
716
717 data->regmap = devm_regmap_init_i2c(client, &max6639_regmap_config);
718 if (IS_ERR(data->regmap))
719 return dev_err_probe(dev,
720 PTR_ERR(data->regmap),
721 "regmap initialization failed\n");
722
723 data->reg = devm_regulator_get_optional(dev, "fan");
724 if (IS_ERR(data->reg)) {
725 if (PTR_ERR(data->reg) != -ENODEV)
726 return PTR_ERR(data->reg);
727
728 data->reg = NULL;
729 } else {
730 /* Spin up fans */
731 err = regulator_enable(data->reg);
732 if (err) {
733 dev_err(dev, "Failed to enable fan supply: %d\n", err);
734 return err;
735 }
736 err = devm_add_action_or_reset(dev, max6639_regulator_disable,
737 data->reg);
738 if (err) {
739 dev_err(dev, "Failed to register action: %d\n", err);
740 return err;
741 }
742 }
743
744 mutex_init(&data->update_lock);
745
746 /* Initialize the max6639 chip */
747 err = max6639_init_client(client, data);
748 if (err < 0)
749 return err;
750
751 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
752 data, &max6639_chip_info,
753 NULL);
754
755 return PTR_ERR_OR_ZERO(hwmon_dev);
756 }
757
max6639_suspend(struct device * dev)758 static int max6639_suspend(struct device *dev)
759 {
760 struct max6639_data *data = dev_get_drvdata(dev);
761
762 if (data->reg)
763 regulator_disable(data->reg);
764
765 return regmap_write_bits(data->regmap, MAX6639_REG_GCONFIG, MAX6639_GCONFIG_STANDBY,
766 MAX6639_GCONFIG_STANDBY);
767 }
768
max6639_resume(struct device * dev)769 static int max6639_resume(struct device *dev)
770 {
771 struct max6639_data *data = dev_get_drvdata(dev);
772 int ret;
773
774 if (data->reg) {
775 ret = regulator_enable(data->reg);
776 if (ret) {
777 dev_err(dev, "Failed to enable fan supply: %d\n", ret);
778 return ret;
779 }
780 }
781
782 return regmap_write_bits(data->regmap, MAX6639_REG_GCONFIG, MAX6639_GCONFIG_STANDBY,
783 ~MAX6639_GCONFIG_STANDBY);
784 }
785
786 static const struct i2c_device_id max6639_id[] = {
787 {"max6639"},
788 { }
789 };
790
791 MODULE_DEVICE_TABLE(i2c, max6639_id);
792
793 static DEFINE_SIMPLE_DEV_PM_OPS(max6639_pm_ops, max6639_suspend, max6639_resume);
794
795 static const struct of_device_id max6639_of_match[] = {
796 { .compatible = "maxim,max6639", },
797 { },
798 };
799
800 static struct i2c_driver max6639_driver = {
801 .class = I2C_CLASS_HWMON,
802 .driver = {
803 .name = "max6639",
804 .pm = pm_sleep_ptr(&max6639_pm_ops),
805 .of_match_table = max6639_of_match,
806 },
807 .probe = max6639_probe,
808 .id_table = max6639_id,
809 .detect = max6639_detect,
810 .address_list = normal_i2c,
811 };
812
813 module_i2c_driver(max6639_driver);
814
815 MODULE_AUTHOR("Roland Stigge <stigge@antcom.de>");
816 MODULE_DESCRIPTION("max6639 driver");
817 MODULE_LICENSE("GPL");
818