xref: /linux/drivers/hwmon/ltc2991.c (revision 5027ec19f1049a07df5b0a37b1f462514cf2724b)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2023 Analog Devices, Inc.
4  * Author: Antoniu Miclaus <antoniu.miclaus@analog.com>
5  */
6 
7 #include <linux/bitops.h>
8 #include <linux/err.h>
9 #include <linux/hwmon.h>
10 #include <linux/i2c.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/property.h>
14 #include <linux/regmap.h>
15 #include <linux/regulator/consumer.h>
16 
17 #define LTC2991_STATUS_LOW		0x00
18 #define LTC2991_CH_EN_TRIGGER		0x01
19 #define LTC2991_V1_V4_CTRL		0x06
20 #define LTC2991_V5_V8_CTRL		0x07
21 #define LTC2991_PWM_TH_LSB_T_INT	0x08
22 #define LTC2991_PWM_TH_MSB		0x09
23 #define LTC2991_CHANNEL_V_MSB(x)	(0x0A + ((x) * 2))
24 #define LTC2991_CHANNEL_T_MSB(x)	(0x0A + ((x) * 4))
25 #define LTC2991_CHANNEL_C_MSB(x)	(0x0C + ((x) * 4))
26 #define LTC2991_T_INT_MSB		0x1A
27 #define LTC2991_VCC_MSB			0x1C
28 
29 #define LTC2991_V7_V8_EN		BIT(7)
30 #define LTC2991_V5_V6_EN		BIT(6)
31 #define LTC2991_V3_V4_EN		BIT(5)
32 #define LTC2991_V1_V2_EN		BIT(4)
33 #define LTC2991_T_INT_VCC_EN		BIT(3)
34 
35 #define LTC2991_V3_V4_FILT_EN		BIT(7)
36 #define LTC2991_V3_V4_TEMP_EN		BIT(5)
37 #define LTC2991_V3_V4_DIFF_EN		BIT(4)
38 #define LTC2991_V1_V2_FILT_EN		BIT(3)
39 #define LTC2991_V1_V2_TEMP_EN		BIT(1)
40 #define LTC2991_V1_V2_DIFF_EN		BIT(0)
41 
42 #define LTC2991_V7_V8_FILT_EN		BIT(7)
43 #define LTC2991_V7_V8_TEMP_EN		BIT(5)
44 #define LTC2991_V7_V8_DIFF_EN		BIT(4)
45 #define LTC2991_V5_V6_FILT_EN		BIT(7)
46 #define LTC2991_V5_V6_TEMP_EN		BIT(5)
47 #define LTC2991_V5_V6_DIFF_EN		BIT(4)
48 
49 #define LTC2991_REPEAT_ACQ_EN		BIT(4)
50 #define LTC2991_T_INT_FILT_EN		BIT(3)
51 
52 #define LTC2991_MAX_CHANNEL		4
53 #define LTC2991_T_INT_CH_NR		4
54 #define LTC2991_VCC_CH_NR		0
55 
56 struct ltc2991_state {
57 	struct device		*dev;
58 	struct regmap		*regmap;
59 	u32			r_sense_uohm[LTC2991_MAX_CHANNEL];
60 	bool			temp_en[LTC2991_MAX_CHANNEL];
61 };
62 
63 static int ltc2991_read_reg(struct ltc2991_state *st, u8 addr, u8 reg_len,
64 			    int *val)
65 {
66 	__be16 regvals;
67 	int ret;
68 
69 	if (reg_len < 2)
70 		return regmap_read(st->regmap, addr, val);
71 
72 	ret = regmap_bulk_read(st->regmap, addr, &regvals, reg_len);
73 	if (ret)
74 		return ret;
75 
76 	*val = be16_to_cpu(regvals);
77 
78 	return 0;
79 }
80 
81 static int ltc2991_get_voltage(struct ltc2991_state *st, u32 reg, long *val)
82 {
83 	int reg_val, ret, offset = 0;
84 
85 	ret = ltc2991_read_reg(st, reg, 2, &reg_val);
86 	if (ret)
87 		return ret;
88 
89 	if (reg == LTC2991_VCC_MSB)
90 		/* Vcc 2.5V offset */
91 		offset = 2500;
92 
93 	/* Vx, 305.18uV/LSB */
94 	*val = DIV_ROUND_CLOSEST(sign_extend32(reg_val, 14) * 30518,
95 				 1000 * 100) + offset;
96 
97 	return 0;
98 }
99 
100 static int ltc2991_read_in(struct device *dev, u32 attr, int channel, long *val)
101 {
102 	struct ltc2991_state *st = dev_get_drvdata(dev);
103 	u32 reg;
104 
105 	switch (attr) {
106 	case hwmon_in_input:
107 		if (channel == LTC2991_VCC_CH_NR)
108 			reg = LTC2991_VCC_MSB;
109 		else
110 			reg = LTC2991_CHANNEL_V_MSB(channel - 1);
111 
112 		return ltc2991_get_voltage(st, reg, val);
113 	default:
114 		return -EOPNOTSUPP;
115 	}
116 }
117 
118 static int ltc2991_get_curr(struct ltc2991_state *st, u32 reg, int channel,
119 			    long *val)
120 {
121 	int reg_val, ret;
122 
123 	ret = ltc2991_read_reg(st, reg, 2, &reg_val);
124 	if (ret)
125 		return ret;
126 
127 	/* Vx-Vy, 19.075uV/LSB */
128 	*val = DIV_ROUND_CLOSEST(sign_extend32(reg_val, 14) * 19075,
129 				 st->r_sense_uohm[channel]);
130 
131 	return 0;
132 }
133 
134 static int ltc2991_read_curr(struct device *dev, u32 attr, int channel,
135 			     long *val)
136 {
137 	struct ltc2991_state *st = dev_get_drvdata(dev);
138 	u32 reg;
139 
140 	switch (attr) {
141 	case hwmon_curr_input:
142 		reg = LTC2991_CHANNEL_C_MSB(channel);
143 		return ltc2991_get_curr(st, reg, channel, val);
144 	default:
145 		return -EOPNOTSUPP;
146 	}
147 }
148 
149 static int ltc2991_get_temp(struct ltc2991_state *st, u32 reg, int channel,
150 			    long *val)
151 {
152 	int reg_val, ret;
153 
154 	ret = ltc2991_read_reg(st, reg, 2, &reg_val);
155 	if (ret)
156 		return ret;
157 
158 	/* Temp LSB = 0.0625 Degrees */
159 	*val = DIV_ROUND_CLOSEST(sign_extend32(reg_val, 12) * 1000, 16);
160 
161 	return 0;
162 }
163 
164 static int ltc2991_read_temp(struct device *dev, u32 attr, int channel,
165 			     long *val)
166 {
167 	struct ltc2991_state *st = dev_get_drvdata(dev);
168 	u32 reg;
169 
170 	switch (attr) {
171 	case hwmon_temp_input:
172 		if (channel == LTC2991_T_INT_CH_NR)
173 			reg = LTC2991_T_INT_MSB;
174 		else
175 			reg = LTC2991_CHANNEL_T_MSB(channel);
176 
177 		return ltc2991_get_temp(st, reg, channel, val);
178 	default:
179 		return -EOPNOTSUPP;
180 	}
181 }
182 
183 static int ltc2991_read(struct device *dev, enum hwmon_sensor_types type,
184 			u32 attr, int channel, long *val)
185 {
186 	switch (type) {
187 	case hwmon_in:
188 		return ltc2991_read_in(dev, attr, channel, val);
189 	case hwmon_curr:
190 		return ltc2991_read_curr(dev, attr, channel, val);
191 	case hwmon_temp:
192 		return ltc2991_read_temp(dev, attr, channel, val);
193 	default:
194 		return -EOPNOTSUPP;
195 	}
196 }
197 
198 static umode_t ltc2991_is_visible(const void *data,
199 				  enum hwmon_sensor_types type, u32 attr,
200 				  int channel)
201 {
202 	const struct ltc2991_state *st = data;
203 
204 	switch (type) {
205 	case hwmon_in:
206 		switch (attr) {
207 		case hwmon_in_input:
208 			if (channel == LTC2991_VCC_CH_NR)
209 				return 0444;
210 			if (st->temp_en[(channel - 1) / 2])
211 				break;
212 			if (channel % 2)
213 				return 0444;
214 			if (!st->r_sense_uohm[(channel - 1) / 2])
215 				return 0444;
216 		}
217 		break;
218 	case hwmon_curr:
219 		switch (attr) {
220 		case hwmon_curr_input:
221 			if (st->r_sense_uohm[channel])
222 				return 0444;
223 			break;
224 		}
225 		break;
226 	case hwmon_temp:
227 		switch (attr) {
228 		case hwmon_temp_input:
229 			if (st->temp_en[channel] ||
230 			    channel == LTC2991_T_INT_CH_NR)
231 				return 0444;
232 			break;
233 		}
234 		break;
235 	default:
236 		break;
237 	}
238 
239 	return 0;
240 }
241 
242 static const struct hwmon_ops ltc2991_hwmon_ops = {
243 	.is_visible = ltc2991_is_visible,
244 	.read = ltc2991_read,
245 };
246 
247 static const struct hwmon_channel_info *ltc2991_info[] = {
248 	HWMON_CHANNEL_INFO(temp,
249 			   HWMON_T_INPUT,
250 			   HWMON_T_INPUT,
251 			   HWMON_T_INPUT,
252 			   HWMON_T_INPUT,
253 			   HWMON_T_INPUT
254 			   ),
255 	HWMON_CHANNEL_INFO(curr,
256 			   HWMON_C_INPUT,
257 			   HWMON_C_INPUT,
258 			   HWMON_C_INPUT,
259 			   HWMON_C_INPUT
260 			   ),
261 	HWMON_CHANNEL_INFO(in,
262 			   HWMON_I_INPUT,
263 			   HWMON_I_INPUT,
264 			   HWMON_I_INPUT,
265 			   HWMON_I_INPUT,
266 			   HWMON_I_INPUT,
267 			   HWMON_I_INPUT,
268 			   HWMON_I_INPUT,
269 			   HWMON_I_INPUT,
270 			   HWMON_I_INPUT
271 			   ),
272 	NULL
273 };
274 
275 static const struct hwmon_chip_info ltc2991_chip_info = {
276 	.ops = &ltc2991_hwmon_ops,
277 	.info = ltc2991_info,
278 };
279 
280 static const struct regmap_config ltc2991_regmap_config = {
281 	.reg_bits = 8,
282 	.val_bits = 8,
283 	.max_register = 0x1D,
284 };
285 
286 static int ltc2991_init(struct ltc2991_state *st)
287 {
288 	struct fwnode_handle *child;
289 	int ret;
290 	u32 val, addr;
291 	u8 v5_v8_reg_data = 0, v1_v4_reg_data = 0;
292 
293 	ret = devm_regulator_get_enable(st->dev, "vcc");
294 	if (ret)
295 		return dev_err_probe(st->dev, ret,
296 				     "failed to enable regulator\n");
297 
298 	device_for_each_child_node(st->dev, child) {
299 		ret = fwnode_property_read_u32(child, "reg", &addr);
300 		if (ret < 0) {
301 			fwnode_handle_put(child);
302 			return ret;
303 		}
304 
305 		if (addr > 3) {
306 			fwnode_handle_put(child);
307 			return -EINVAL;
308 		}
309 
310 		ret = fwnode_property_read_u32(child,
311 					       "shunt-resistor-micro-ohms",
312 					       &val);
313 		if (!ret) {
314 			if (!val)
315 				return dev_err_probe(st->dev, -EINVAL,
316 						     "shunt resistor value cannot be zero\n");
317 
318 			st->r_sense_uohm[addr] = val;
319 
320 			switch (addr) {
321 			case 0:
322 				v1_v4_reg_data |= LTC2991_V1_V2_DIFF_EN;
323 				break;
324 			case 1:
325 				v1_v4_reg_data |= LTC2991_V3_V4_DIFF_EN;
326 				break;
327 			case 2:
328 				v5_v8_reg_data |= LTC2991_V5_V6_DIFF_EN;
329 				break;
330 			case 3:
331 				v5_v8_reg_data |= LTC2991_V7_V8_DIFF_EN;
332 				break;
333 			default:
334 				break;
335 			}
336 		}
337 
338 		ret = fwnode_property_read_bool(child,
339 						"adi,temperature-enable");
340 		if (ret) {
341 			st->temp_en[addr] = ret;
342 
343 			switch (addr) {
344 			case 0:
345 				v1_v4_reg_data |= LTC2991_V1_V2_TEMP_EN;
346 				break;
347 			case 1:
348 				v1_v4_reg_data |= LTC2991_V3_V4_TEMP_EN;
349 				break;
350 			case 2:
351 				v5_v8_reg_data |= LTC2991_V5_V6_TEMP_EN;
352 				break;
353 			case 3:
354 				v5_v8_reg_data |= LTC2991_V7_V8_TEMP_EN;
355 				break;
356 			default:
357 				break;
358 			}
359 		}
360 	}
361 
362 	ret = regmap_write(st->regmap, LTC2991_V5_V8_CTRL, v5_v8_reg_data);
363 	if (ret)
364 		return dev_err_probe(st->dev, ret,
365 				     "Error: Failed to set V5-V8 CTRL reg.\n");
366 
367 	ret = regmap_write(st->regmap, LTC2991_V1_V4_CTRL, v1_v4_reg_data);
368 	if (ret)
369 		return dev_err_probe(st->dev, ret,
370 				     "Error: Failed to set V1-V4 CTRL reg.\n");
371 
372 	ret = regmap_write(st->regmap, LTC2991_PWM_TH_LSB_T_INT,
373 			   LTC2991_REPEAT_ACQ_EN);
374 	if (ret)
375 		return dev_err_probe(st->dev, ret,
376 				     "Error: Failed to set contiuous mode.\n");
377 
378 	/* Enable all channels and trigger conversions */
379 	return regmap_write(st->regmap, LTC2991_CH_EN_TRIGGER,
380 			    LTC2991_V7_V8_EN | LTC2991_V5_V6_EN |
381 			    LTC2991_V3_V4_EN | LTC2991_V1_V2_EN |
382 			    LTC2991_T_INT_VCC_EN);
383 }
384 
385 static int ltc2991_i2c_probe(struct i2c_client *client)
386 {
387 	int ret;
388 	struct device *hwmon_dev;
389 	struct ltc2991_state *st;
390 
391 	st = devm_kzalloc(&client->dev, sizeof(*st), GFP_KERNEL);
392 	if (!st)
393 		return -ENOMEM;
394 
395 	st->dev = &client->dev;
396 	st->regmap = devm_regmap_init_i2c(client, &ltc2991_regmap_config);
397 	if (IS_ERR(st->regmap))
398 		return PTR_ERR(st->regmap);
399 
400 	ret = ltc2991_init(st);
401 	if (ret)
402 		return ret;
403 
404 	hwmon_dev = devm_hwmon_device_register_with_info(&client->dev,
405 							 client->name, st,
406 							 &ltc2991_chip_info,
407 							 NULL);
408 
409 	return PTR_ERR_OR_ZERO(hwmon_dev);
410 }
411 
412 static const struct of_device_id ltc2991_of_match[] = {
413 	{ .compatible = "adi,ltc2991" },
414 	{ }
415 };
416 MODULE_DEVICE_TABLE(of, ltc2991_of_match);
417 
418 static const struct i2c_device_id ltc2991_i2c_id[] = {
419 	{ "ltc2991", 0 },
420 	{}
421 };
422 MODULE_DEVICE_TABLE(i2c, ltc2991_i2c_id);
423 
424 static struct i2c_driver ltc2991_i2c_driver = {
425 	.driver = {
426 		.name = "ltc2991",
427 		.of_match_table = ltc2991_of_match,
428 	},
429 	.probe = ltc2991_i2c_probe,
430 	.id_table = ltc2991_i2c_id,
431 };
432 
433 module_i2c_driver(ltc2991_i2c_driver);
434 
435 MODULE_AUTHOR("Antoniu Miclaus <antoniu.miclaus@analog.com>");
436 MODULE_DESCRIPTION("Analog Devices LTC2991 HWMON Driver");
437 MODULE_LICENSE("GPL");
438