106160327SDavide Rizzo /* 20f1deb4bSDavide Rizzo * Copyright (C) 2008, 2010 Davide Rizzo <elpa.rizzo@gmail.com> 306160327SDavide Rizzo * 40f1deb4bSDavide Rizzo * The LM95241 is a sensor chip made by National Semiconductors. 50f1deb4bSDavide Rizzo * It reports up to three temperatures (its own plus up to two external ones). 60f1deb4bSDavide Rizzo * Complete datasheet can be obtained from National's website at: 706160327SDavide Rizzo * http://www.national.com/ds.cgi/LM/LM95241.pdf 806160327SDavide Rizzo * 906160327SDavide Rizzo * This program is free software; you can redistribute it and/or modify 1006160327SDavide Rizzo * it under the terms of the GNU General Public License as published by 1106160327SDavide Rizzo * the Free Software Foundation; either version 2 of the License, or 1206160327SDavide Rizzo * (at your option) any later version. 1306160327SDavide Rizzo * 1406160327SDavide Rizzo * This program is distributed in the hope that it will be useful, 1506160327SDavide Rizzo * but WITHOUT ANY WARRANTY; without even the implied warranty of 1606160327SDavide Rizzo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1706160327SDavide Rizzo * GNU General Public License for more details. 1806160327SDavide Rizzo */ 1906160327SDavide Rizzo 20e8172a93SGuenter Roeck #include <linux/bitops.h> 214b2ea08bSGuenter Roeck #include <linux/err.h> 2206160327SDavide Rizzo #include <linux/i2c.h> 234b2ea08bSGuenter Roeck #include <linux/init.h> 244b2ea08bSGuenter Roeck #include <linux/jiffies.h> 2506160327SDavide Rizzo #include <linux/hwmon.h> 264b2ea08bSGuenter Roeck #include <linux/module.h> 2706160327SDavide Rizzo #include <linux/mutex.h> 284b2ea08bSGuenter Roeck #include <linux/slab.h> 2906160327SDavide Rizzo 300f1deb4bSDavide Rizzo #define DEVNAME "lm95241" 310f1deb4bSDavide Rizzo 3206160327SDavide Rizzo static const unsigned short normal_i2c[] = { 3306160327SDavide Rizzo 0x19, 0x2a, 0x2b, I2C_CLIENT_END }; 3406160327SDavide Rizzo 3506160327SDavide Rizzo /* LM95241 registers */ 3606160327SDavide Rizzo #define LM95241_REG_R_MAN_ID 0xFE 3706160327SDavide Rizzo #define LM95241_REG_R_CHIP_ID 0xFF 3806160327SDavide Rizzo #define LM95241_REG_R_STATUS 0x02 3906160327SDavide Rizzo #define LM95241_REG_RW_CONFIG 0x03 4006160327SDavide Rizzo #define LM95241_REG_RW_REM_FILTER 0x06 4106160327SDavide Rizzo #define LM95241_REG_RW_TRUTHERM 0x07 4206160327SDavide Rizzo #define LM95241_REG_W_ONE_SHOT 0x0F 4306160327SDavide Rizzo #define LM95241_REG_R_LOCAL_TEMPH 0x10 4406160327SDavide Rizzo #define LM95241_REG_R_REMOTE1_TEMPH 0x11 4506160327SDavide Rizzo #define LM95241_REG_R_REMOTE2_TEMPH 0x12 4606160327SDavide Rizzo #define LM95241_REG_R_LOCAL_TEMPL 0x20 4706160327SDavide Rizzo #define LM95241_REG_R_REMOTE1_TEMPL 0x21 4806160327SDavide Rizzo #define LM95241_REG_R_REMOTE2_TEMPL 0x22 4906160327SDavide Rizzo #define LM95241_REG_RW_REMOTE_MODEL 0x30 5006160327SDavide Rizzo 5106160327SDavide Rizzo /* LM95241 specific bitfields */ 52e8172a93SGuenter Roeck #define CFG_STOP BIT(6) 5306160327SDavide Rizzo #define CFG_CR0076 0x00 54e8172a93SGuenter Roeck #define CFG_CR0182 BIT(4) 55e8172a93SGuenter Roeck #define CFG_CR1000 BIT(5) 56e8172a93SGuenter Roeck #define CFG_CR2700 (BIT(4) | BIT(5)) 57e8172a93SGuenter Roeck #define CFG_CRMASK (BIT(4) | BIT(5)) 58e8172a93SGuenter Roeck #define R1MS_MASK BIT(0) 59e8172a93SGuenter Roeck #define R2MS_MASK BIT(2) 60e8172a93SGuenter Roeck #define R1DF_MASK BIT(1) 61e8172a93SGuenter Roeck #define R2DF_MASK BIT(2) 62e8172a93SGuenter Roeck #define R1FE_MASK BIT(0) 63e8172a93SGuenter Roeck #define R2FE_MASK BIT(2) 64e8172a93SGuenter Roeck #define R1DM BIT(0) 65e8172a93SGuenter Roeck #define R2DM BIT(1) 6606160327SDavide Rizzo #define TT1_SHIFT 0 6706160327SDavide Rizzo #define TT2_SHIFT 4 6806160327SDavide Rizzo #define TT_OFF 0 6906160327SDavide Rizzo #define TT_ON 1 7006160327SDavide Rizzo #define TT_MASK 7 718c1d0419SGuenter Roeck #define NATSEMI_MAN_ID 0x01 728c1d0419SGuenter Roeck #define LM95231_CHIP_ID 0xA1 738c1d0419SGuenter Roeck #define LM95241_CHIP_ID 0xA4 7406160327SDavide Rizzo 750f1deb4bSDavide Rizzo static const u8 lm95241_reg_address[] = { 760f1deb4bSDavide Rizzo LM95241_REG_R_LOCAL_TEMPH, 770f1deb4bSDavide Rizzo LM95241_REG_R_LOCAL_TEMPL, 780f1deb4bSDavide Rizzo LM95241_REG_R_REMOTE1_TEMPH, 790f1deb4bSDavide Rizzo LM95241_REG_R_REMOTE1_TEMPL, 800f1deb4bSDavide Rizzo LM95241_REG_R_REMOTE2_TEMPH, 810f1deb4bSDavide Rizzo LM95241_REG_R_REMOTE2_TEMPL 820f1deb4bSDavide Rizzo }; 8306160327SDavide Rizzo 8406160327SDavide Rizzo /* Client data (each client gets its own) */ 8506160327SDavide Rizzo struct lm95241_data { 86f809621eSGuenter Roeck struct i2c_client *client; 8706160327SDavide Rizzo struct mutex update_lock; 88f48ccb26SGuenter Roeck unsigned long last_updated; /* in jiffies */ 89f48ccb26SGuenter Roeck unsigned long interval; /* in milli-seconds */ 9006160327SDavide Rizzo char valid; /* zero until following fields are valid */ 9106160327SDavide Rizzo /* registers values */ 920f1deb4bSDavide Rizzo u8 temp[ARRAY_SIZE(lm95241_reg_address)]; 93090a7f8eSGuenter Roeck u8 status, config, model, trutherm; 9406160327SDavide Rizzo }; 9506160327SDavide Rizzo 960f1deb4bSDavide Rizzo /* Conversions */ 970c2a40e2SGuenter Roeck static int temp_from_reg_signed(u8 val_h, u8 val_l) 980f1deb4bSDavide Rizzo { 990c2a40e2SGuenter Roeck s16 val_hl = (val_h << 8) | val_l; 1000c2a40e2SGuenter Roeck return val_hl * 1000 / 256; 1010c2a40e2SGuenter Roeck } 1020c2a40e2SGuenter Roeck 1030c2a40e2SGuenter Roeck static int temp_from_reg_unsigned(u8 val_h, u8 val_l) 1040c2a40e2SGuenter Roeck { 1050c2a40e2SGuenter Roeck u16 val_hl = (val_h << 8) | val_l; 1060c2a40e2SGuenter Roeck return val_hl * 1000 / 256; 10706160327SDavide Rizzo } 1080f1deb4bSDavide Rizzo 1090f1deb4bSDavide Rizzo static struct lm95241_data *lm95241_update_device(struct device *dev) 1100f1deb4bSDavide Rizzo { 111f809621eSGuenter Roeck struct lm95241_data *data = dev_get_drvdata(dev); 112f809621eSGuenter Roeck struct i2c_client *client = data->client; 1130f1deb4bSDavide Rizzo 1140f1deb4bSDavide Rizzo mutex_lock(&data->update_lock); 1150f1deb4bSDavide Rizzo 116f48ccb26SGuenter Roeck if (time_after(jiffies, data->last_updated 117f48ccb26SGuenter Roeck + msecs_to_jiffies(data->interval)) || 1180f1deb4bSDavide Rizzo !data->valid) { 1190f1deb4bSDavide Rizzo int i; 1200f1deb4bSDavide Rizzo 121f809621eSGuenter Roeck dev_dbg(dev, "Updating lm95241 data.\n"); 1220f1deb4bSDavide Rizzo for (i = 0; i < ARRAY_SIZE(lm95241_reg_address); i++) 1230f1deb4bSDavide Rizzo data->temp[i] 1240f1deb4bSDavide Rizzo = i2c_smbus_read_byte_data(client, 1250f1deb4bSDavide Rizzo lm95241_reg_address[i]); 126090a7f8eSGuenter Roeck 127090a7f8eSGuenter Roeck data->status = i2c_smbus_read_byte_data(client, 128090a7f8eSGuenter Roeck LM95241_REG_R_STATUS); 1290f1deb4bSDavide Rizzo data->last_updated = jiffies; 1300f1deb4bSDavide Rizzo data->valid = 1; 1310f1deb4bSDavide Rizzo } 1320f1deb4bSDavide Rizzo 1330f1deb4bSDavide Rizzo mutex_unlock(&data->update_lock); 1340f1deb4bSDavide Rizzo 1350f1deb4bSDavide Rizzo return data; 1360f1deb4bSDavide Rizzo } 1370f1deb4bSDavide Rizzo 138*3e904628SGuenter Roeck static int lm95241_read_chip(struct device *dev, u32 attr, int channel, 139*3e904628SGuenter Roeck long *val) 140*3e904628SGuenter Roeck { 141*3e904628SGuenter Roeck struct lm95241_data *data = dev_get_drvdata(dev); 142*3e904628SGuenter Roeck 143*3e904628SGuenter Roeck switch (attr) { 144*3e904628SGuenter Roeck case hwmon_chip_update_interval: 145*3e904628SGuenter Roeck *val = data->interval; 146*3e904628SGuenter Roeck return 0; 147*3e904628SGuenter Roeck default: 148*3e904628SGuenter Roeck return -EOPNOTSUPP; 149*3e904628SGuenter Roeck } 150*3e904628SGuenter Roeck } 151*3e904628SGuenter Roeck 152*3e904628SGuenter Roeck static int lm95241_read_temp(struct device *dev, u32 attr, int channel, 153*3e904628SGuenter Roeck long *val) 1540f1deb4bSDavide Rizzo { 1550f1deb4bSDavide Rizzo struct lm95241_data *data = lm95241_update_device(dev); 1560f1deb4bSDavide Rizzo 157*3e904628SGuenter Roeck switch (attr) { 158*3e904628SGuenter Roeck case hwmon_temp_input: 159*3e904628SGuenter Roeck if (!channel || (data->config & BIT(channel - 1))) 160*3e904628SGuenter Roeck *val = temp_from_reg_signed(data->temp[channel * 2], 161*3e904628SGuenter Roeck data->temp[channel * 2 + 1]); 1620f1deb4bSDavide Rizzo else 163*3e904628SGuenter Roeck *val = temp_from_reg_unsigned(data->temp[channel * 2], 164*3e904628SGuenter Roeck data->temp[channel * 2 + 1]); 165*3e904628SGuenter Roeck return 0; 166*3e904628SGuenter Roeck case hwmon_temp_min: 167*3e904628SGuenter Roeck if (channel == 1) 168*3e904628SGuenter Roeck *val = (data->config & R1DF_MASK) ? -128000 : 0; 1690f1deb4bSDavide Rizzo else 170*3e904628SGuenter Roeck *val = (data->config & R2DF_MASK) ? -128000 : 0; 171*3e904628SGuenter Roeck return 0; 172*3e904628SGuenter Roeck case hwmon_temp_max: 173*3e904628SGuenter Roeck if (channel == 1) 174*3e904628SGuenter Roeck *val = (data->config & R1DF_MASK) ? 127875 : 255875; 175*3e904628SGuenter Roeck else 176*3e904628SGuenter Roeck *val = (data->config & R2DF_MASK) ? 127875 : 255875; 177*3e904628SGuenter Roeck return 0; 178*3e904628SGuenter Roeck case hwmon_temp_type: 179*3e904628SGuenter Roeck if (channel == 1) 180*3e904628SGuenter Roeck *val = (data->model & R1MS_MASK) ? 1 : 2; 181*3e904628SGuenter Roeck else 182*3e904628SGuenter Roeck *val = (data->model & R2MS_MASK) ? 1 : 2; 183*3e904628SGuenter Roeck return 0; 184*3e904628SGuenter Roeck case hwmon_temp_fault: 185*3e904628SGuenter Roeck if (channel == 1) 186*3e904628SGuenter Roeck *val = !!(data->status & R1DM); 187*3e904628SGuenter Roeck else 188*3e904628SGuenter Roeck *val = !!(data->status & R2DM); 189*3e904628SGuenter Roeck return 0; 190*3e904628SGuenter Roeck default: 191*3e904628SGuenter Roeck return -EOPNOTSUPP; 192*3e904628SGuenter Roeck } 1930f1deb4bSDavide Rizzo } 19406160327SDavide Rizzo 195*3e904628SGuenter Roeck static int lm95241_read(struct device *dev, enum hwmon_sensor_types type, 196*3e904628SGuenter Roeck u32 attr, int channel, long *val) 197090a7f8eSGuenter Roeck { 198*3e904628SGuenter Roeck switch (type) { 199*3e904628SGuenter Roeck case hwmon_chip: 200*3e904628SGuenter Roeck return lm95241_read_chip(dev, attr, channel, val); 201*3e904628SGuenter Roeck case hwmon_temp: 202*3e904628SGuenter Roeck return lm95241_read_temp(dev, attr, channel, val); 203*3e904628SGuenter Roeck default: 204*3e904628SGuenter Roeck return -EOPNOTSUPP; 205*3e904628SGuenter Roeck } 206090a7f8eSGuenter Roeck } 207090a7f8eSGuenter Roeck 208*3e904628SGuenter Roeck static int lm95241_write_chip(struct device *dev, u32 attr, int channel, 209*3e904628SGuenter Roeck long val) 21006160327SDavide Rizzo { 211f809621eSGuenter Roeck struct lm95241_data *data = dev_get_drvdata(dev); 212f48ccb26SGuenter Roeck int convrate; 213f48ccb26SGuenter Roeck u8 config; 214*3e904628SGuenter Roeck int ret; 21561ec2da5SJean Delvare 216f48ccb26SGuenter Roeck mutex_lock(&data->update_lock); 217f48ccb26SGuenter Roeck 218*3e904628SGuenter Roeck switch (attr) { 219*3e904628SGuenter Roeck case hwmon_chip_update_interval: 220f48ccb26SGuenter Roeck config = data->config & ~CFG_CRMASK; 221f48ccb26SGuenter Roeck if (val < 130) { 222f48ccb26SGuenter Roeck convrate = 76; 223f48ccb26SGuenter Roeck config |= CFG_CR0076; 224f48ccb26SGuenter Roeck } else if (val < 590) { 225f48ccb26SGuenter Roeck convrate = 182; 226f48ccb26SGuenter Roeck config |= CFG_CR0182; 227f48ccb26SGuenter Roeck } else if (val < 1850) { 228f48ccb26SGuenter Roeck convrate = 1000; 229f48ccb26SGuenter Roeck config |= CFG_CR1000; 230f48ccb26SGuenter Roeck } else { 231f48ccb26SGuenter Roeck convrate = 2700; 232f48ccb26SGuenter Roeck config |= CFG_CR2700; 233f48ccb26SGuenter Roeck } 234f48ccb26SGuenter Roeck data->interval = convrate; 235f48ccb26SGuenter Roeck data->config = config; 236*3e904628SGuenter Roeck ret = i2c_smbus_write_byte_data(data->client, 237*3e904628SGuenter Roeck LM95241_REG_RW_CONFIG, config); 238*3e904628SGuenter Roeck break; 239*3e904628SGuenter Roeck default: 240*3e904628SGuenter Roeck ret = -EOPNOTSUPP; 241*3e904628SGuenter Roeck break; 242*3e904628SGuenter Roeck } 243f48ccb26SGuenter Roeck mutex_unlock(&data->update_lock); 244*3e904628SGuenter Roeck return ret; 24506160327SDavide Rizzo } 24606160327SDavide Rizzo 247*3e904628SGuenter Roeck static int lm95241_write_temp(struct device *dev, u32 attr, int channel, 248*3e904628SGuenter Roeck long val) 249*3e904628SGuenter Roeck { 250*3e904628SGuenter Roeck struct lm95241_data *data = dev_get_drvdata(dev); 251*3e904628SGuenter Roeck struct i2c_client *client = data->client; 252*3e904628SGuenter Roeck int ret; 25306160327SDavide Rizzo 254*3e904628SGuenter Roeck mutex_lock(&data->update_lock); 255*3e904628SGuenter Roeck 256*3e904628SGuenter Roeck switch (attr) { 257*3e904628SGuenter Roeck case hwmon_temp_min: 258*3e904628SGuenter Roeck if (channel == 1) { 259*3e904628SGuenter Roeck if (val < 0) 260*3e904628SGuenter Roeck data->config |= R1DF_MASK; 261*3e904628SGuenter Roeck else 262*3e904628SGuenter Roeck data->config &= ~R1DF_MASK; 263*3e904628SGuenter Roeck } else { 264*3e904628SGuenter Roeck if (val < 0) 265*3e904628SGuenter Roeck data->config |= R2DF_MASK; 266*3e904628SGuenter Roeck else 267*3e904628SGuenter Roeck data->config &= ~R2DF_MASK; 268*3e904628SGuenter Roeck } 269*3e904628SGuenter Roeck data->valid = 0; 270*3e904628SGuenter Roeck ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG, 271*3e904628SGuenter Roeck data->config); 272*3e904628SGuenter Roeck break; 273*3e904628SGuenter Roeck case hwmon_temp_max: 274*3e904628SGuenter Roeck if (channel == 1) { 275*3e904628SGuenter Roeck if (val <= 127875) 276*3e904628SGuenter Roeck data->config |= R1DF_MASK; 277*3e904628SGuenter Roeck else 278*3e904628SGuenter Roeck data->config &= ~R1DF_MASK; 279*3e904628SGuenter Roeck } else { 280*3e904628SGuenter Roeck if (val <= 127875) 281*3e904628SGuenter Roeck data->config |= R2DF_MASK; 282*3e904628SGuenter Roeck else 283*3e904628SGuenter Roeck data->config &= ~R2DF_MASK; 284*3e904628SGuenter Roeck } 285*3e904628SGuenter Roeck data->valid = 0; 286*3e904628SGuenter Roeck ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG, 287*3e904628SGuenter Roeck data->config); 288*3e904628SGuenter Roeck break; 289*3e904628SGuenter Roeck case hwmon_temp_type: 290*3e904628SGuenter Roeck if (val != 1 && val != 2) { 291*3e904628SGuenter Roeck ret = -EINVAL; 292*3e904628SGuenter Roeck break; 293*3e904628SGuenter Roeck } 294*3e904628SGuenter Roeck if (channel == 1) { 295*3e904628SGuenter Roeck data->trutherm &= ~(TT_MASK << TT1_SHIFT); 296*3e904628SGuenter Roeck if (val == 1) { 297*3e904628SGuenter Roeck data->model |= R1MS_MASK; 298*3e904628SGuenter Roeck data->trutherm |= (TT_ON << TT1_SHIFT); 299*3e904628SGuenter Roeck } else { 300*3e904628SGuenter Roeck data->model &= ~R1MS_MASK; 301*3e904628SGuenter Roeck data->trutherm |= (TT_OFF << TT1_SHIFT); 302*3e904628SGuenter Roeck } 303*3e904628SGuenter Roeck } else { 304*3e904628SGuenter Roeck data->trutherm &= ~(TT_MASK << TT2_SHIFT); 305*3e904628SGuenter Roeck if (val == 1) { 306*3e904628SGuenter Roeck data->model |= R2MS_MASK; 307*3e904628SGuenter Roeck data->trutherm |= (TT_ON << TT2_SHIFT); 308*3e904628SGuenter Roeck } else { 309*3e904628SGuenter Roeck data->model &= ~R2MS_MASK; 310*3e904628SGuenter Roeck data->trutherm |= (TT_OFF << TT2_SHIFT); 311*3e904628SGuenter Roeck } 312*3e904628SGuenter Roeck } 313*3e904628SGuenter Roeck ret = i2c_smbus_write_byte_data(client, 314*3e904628SGuenter Roeck LM95241_REG_RW_REMOTE_MODEL, 315*3e904628SGuenter Roeck data->model); 316*3e904628SGuenter Roeck if (ret < 0) 317*3e904628SGuenter Roeck break; 318*3e904628SGuenter Roeck ret = i2c_smbus_write_byte_data(client, LM95241_REG_RW_TRUTHERM, 319*3e904628SGuenter Roeck data->trutherm); 320*3e904628SGuenter Roeck break; 321*3e904628SGuenter Roeck default: 322*3e904628SGuenter Roeck ret = -EOPNOTSUPP; 323*3e904628SGuenter Roeck break; 324*3e904628SGuenter Roeck } 325*3e904628SGuenter Roeck 326*3e904628SGuenter Roeck mutex_unlock(&data->update_lock); 327*3e904628SGuenter Roeck 328*3e904628SGuenter Roeck return ret; 329*3e904628SGuenter Roeck } 330*3e904628SGuenter Roeck 331*3e904628SGuenter Roeck static int lm95241_write(struct device *dev, enum hwmon_sensor_types type, 332*3e904628SGuenter Roeck u32 attr, int channel, long val) 333*3e904628SGuenter Roeck { 334*3e904628SGuenter Roeck switch (type) { 335*3e904628SGuenter Roeck case hwmon_chip: 336*3e904628SGuenter Roeck return lm95241_write_chip(dev, attr, channel, val); 337*3e904628SGuenter Roeck case hwmon_temp: 338*3e904628SGuenter Roeck return lm95241_write_temp(dev, attr, channel, val); 339*3e904628SGuenter Roeck default: 340*3e904628SGuenter Roeck return -EOPNOTSUPP; 341*3e904628SGuenter Roeck } 342*3e904628SGuenter Roeck } 343*3e904628SGuenter Roeck 344*3e904628SGuenter Roeck static umode_t lm95241_is_visible(const void *data, 345*3e904628SGuenter Roeck enum hwmon_sensor_types type, 346*3e904628SGuenter Roeck u32 attr, int channel) 347*3e904628SGuenter Roeck { 348*3e904628SGuenter Roeck switch (type) { 349*3e904628SGuenter Roeck case hwmon_chip: 350*3e904628SGuenter Roeck switch (attr) { 351*3e904628SGuenter Roeck case hwmon_chip_update_interval: 352*3e904628SGuenter Roeck return S_IRUGO | S_IWUSR; 353*3e904628SGuenter Roeck } 354*3e904628SGuenter Roeck break; 355*3e904628SGuenter Roeck case hwmon_temp: 356*3e904628SGuenter Roeck switch (attr) { 357*3e904628SGuenter Roeck case hwmon_temp_input: 358*3e904628SGuenter Roeck return S_IRUGO; 359*3e904628SGuenter Roeck case hwmon_temp_fault: 360*3e904628SGuenter Roeck return S_IRUGO; 361*3e904628SGuenter Roeck case hwmon_temp_min: 362*3e904628SGuenter Roeck case hwmon_temp_max: 363*3e904628SGuenter Roeck case hwmon_temp_type: 364*3e904628SGuenter Roeck return S_IRUGO | S_IWUSR; 365*3e904628SGuenter Roeck } 366*3e904628SGuenter Roeck break; 367*3e904628SGuenter Roeck default: 368*3e904628SGuenter Roeck break; 369*3e904628SGuenter Roeck } 370*3e904628SGuenter Roeck return 0; 371*3e904628SGuenter Roeck } 37206160327SDavide Rizzo 373797eaa4bSJean Delvare /* Return 0 if detection is successful, -ENODEV otherwise */ 374310ec792SJean Delvare static int lm95241_detect(struct i2c_client *new_client, 375797eaa4bSJean Delvare struct i2c_board_info *info) 37606160327SDavide Rizzo { 377797eaa4bSJean Delvare struct i2c_adapter *adapter = new_client->adapter; 37852df6440SJean Delvare const char *name; 3798c1d0419SGuenter Roeck int mfg_id, chip_id; 38006160327SDavide Rizzo 38106160327SDavide Rizzo if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 382797eaa4bSJean Delvare return -ENODEV; 38306160327SDavide Rizzo 3848c1d0419SGuenter Roeck mfg_id = i2c_smbus_read_byte_data(new_client, LM95241_REG_R_MAN_ID); 3858c1d0419SGuenter Roeck if (mfg_id != NATSEMI_MAN_ID) 3868c1d0419SGuenter Roeck return -ENODEV; 3878c1d0419SGuenter Roeck 3888c1d0419SGuenter Roeck chip_id = i2c_smbus_read_byte_data(new_client, LM95241_REG_R_CHIP_ID); 3898c1d0419SGuenter Roeck switch (chip_id) { 3908c1d0419SGuenter Roeck case LM95231_CHIP_ID: 3918c1d0419SGuenter Roeck name = "lm95231"; 3928c1d0419SGuenter Roeck break; 3938c1d0419SGuenter Roeck case LM95241_CHIP_ID: 3948c1d0419SGuenter Roeck name = "lm95241"; 3958c1d0419SGuenter Roeck break; 3968c1d0419SGuenter Roeck default: 397797eaa4bSJean Delvare return -ENODEV; 39806160327SDavide Rizzo } 39906160327SDavide Rizzo 400797eaa4bSJean Delvare /* Fill the i2c board info */ 401797eaa4bSJean Delvare strlcpy(info->type, name, I2C_NAME_SIZE); 402797eaa4bSJean Delvare return 0; 403797eaa4bSJean Delvare } 40406160327SDavide Rizzo 405f809621eSGuenter Roeck static void lm95241_init_client(struct i2c_client *client, 406f809621eSGuenter Roeck struct lm95241_data *data) 4070f1deb4bSDavide Rizzo { 408f48ccb26SGuenter Roeck data->interval = 1000; 409f48ccb26SGuenter Roeck data->config = CFG_CR1000; 4100f1deb4bSDavide Rizzo data->trutherm = (TT_OFF << TT1_SHIFT) | (TT_OFF << TT2_SHIFT); 4110f1deb4bSDavide Rizzo 4120f1deb4bSDavide Rizzo i2c_smbus_write_byte_data(client, LM95241_REG_RW_CONFIG, data->config); 4130f1deb4bSDavide Rizzo i2c_smbus_write_byte_data(client, LM95241_REG_RW_REM_FILTER, 4140f1deb4bSDavide Rizzo R1FE_MASK | R2FE_MASK); 4150f1deb4bSDavide Rizzo i2c_smbus_write_byte_data(client, LM95241_REG_RW_TRUTHERM, 4160f1deb4bSDavide Rizzo data->trutherm); 4170f1deb4bSDavide Rizzo i2c_smbus_write_byte_data(client, LM95241_REG_RW_REMOTE_MODEL, 4180f1deb4bSDavide Rizzo data->model); 4190f1deb4bSDavide Rizzo } 4200f1deb4bSDavide Rizzo 421*3e904628SGuenter Roeck static const u32 lm95241_chip_config[] = { 422*3e904628SGuenter Roeck HWMON_C_UPDATE_INTERVAL, 423*3e904628SGuenter Roeck 0 424*3e904628SGuenter Roeck }; 425*3e904628SGuenter Roeck 426*3e904628SGuenter Roeck static const struct hwmon_channel_info lm95241_chip = { 427*3e904628SGuenter Roeck .type = hwmon_chip, 428*3e904628SGuenter Roeck .config = lm95241_chip_config, 429*3e904628SGuenter Roeck }; 430*3e904628SGuenter Roeck 431*3e904628SGuenter Roeck static const u32 lm95241_temp_config[] = { 432*3e904628SGuenter Roeck HWMON_T_INPUT, 433*3e904628SGuenter Roeck HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN | HWMON_T_TYPE | 434*3e904628SGuenter Roeck HWMON_T_FAULT, 435*3e904628SGuenter Roeck HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN | HWMON_T_TYPE | 436*3e904628SGuenter Roeck HWMON_T_FAULT, 437*3e904628SGuenter Roeck 0 438*3e904628SGuenter Roeck }; 439*3e904628SGuenter Roeck 440*3e904628SGuenter Roeck static const struct hwmon_channel_info lm95241_temp = { 441*3e904628SGuenter Roeck .type = hwmon_temp, 442*3e904628SGuenter Roeck .config = lm95241_temp_config, 443*3e904628SGuenter Roeck }; 444*3e904628SGuenter Roeck 445*3e904628SGuenter Roeck static const struct hwmon_channel_info *lm95241_info[] = { 446*3e904628SGuenter Roeck &lm95241_chip, 447*3e904628SGuenter Roeck &lm95241_temp, 448*3e904628SGuenter Roeck NULL 449*3e904628SGuenter Roeck }; 450*3e904628SGuenter Roeck 451*3e904628SGuenter Roeck static const struct hwmon_ops lm95241_hwmon_ops = { 452*3e904628SGuenter Roeck .is_visible = lm95241_is_visible, 453*3e904628SGuenter Roeck .read = lm95241_read, 454*3e904628SGuenter Roeck .write = lm95241_write, 455*3e904628SGuenter Roeck }; 456*3e904628SGuenter Roeck 457*3e904628SGuenter Roeck static const struct hwmon_chip_info lm95241_chip_info = { 458*3e904628SGuenter Roeck .ops = &lm95241_hwmon_ops, 459*3e904628SGuenter Roeck .info = lm95241_info, 460*3e904628SGuenter Roeck }; 461*3e904628SGuenter Roeck 462f809621eSGuenter Roeck static int lm95241_probe(struct i2c_client *client, 463797eaa4bSJean Delvare const struct i2c_device_id *id) 464797eaa4bSJean Delvare { 465f809621eSGuenter Roeck struct device *dev = &client->dev; 466797eaa4bSJean Delvare struct lm95241_data *data; 467f809621eSGuenter Roeck struct device *hwmon_dev; 468797eaa4bSJean Delvare 469f809621eSGuenter Roeck data = devm_kzalloc(dev, sizeof(struct lm95241_data), GFP_KERNEL); 4701487bf70SGuenter Roeck if (!data) 4711487bf70SGuenter Roeck return -ENOMEM; 472797eaa4bSJean Delvare 473f809621eSGuenter Roeck data->client = client; 47406160327SDavide Rizzo mutex_init(&data->update_lock); 47506160327SDavide Rizzo 47606160327SDavide Rizzo /* Initialize the LM95241 chip */ 477f809621eSGuenter Roeck lm95241_init_client(client, data); 47806160327SDavide Rizzo 479*3e904628SGuenter Roeck hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 480f809621eSGuenter Roeck data, 481*3e904628SGuenter Roeck &lm95241_chip_info, 482*3e904628SGuenter Roeck NULL); 483f809621eSGuenter Roeck return PTR_ERR_OR_ZERO(hwmon_dev); 48406160327SDavide Rizzo } 48506160327SDavide Rizzo 486797eaa4bSJean Delvare /* Driver data (common to all clients) */ 487797eaa4bSJean Delvare static const struct i2c_device_id lm95241_id[] = { 4888c1d0419SGuenter Roeck { "lm95231", 0 }, 4898c1d0419SGuenter Roeck { "lm95241", 0 }, 490797eaa4bSJean Delvare { } 491797eaa4bSJean Delvare }; 492797eaa4bSJean Delvare MODULE_DEVICE_TABLE(i2c, lm95241_id); 493797eaa4bSJean Delvare 494797eaa4bSJean Delvare static struct i2c_driver lm95241_driver = { 495797eaa4bSJean Delvare .class = I2C_CLASS_HWMON, 496797eaa4bSJean Delvare .driver = { 4970f1deb4bSDavide Rizzo .name = DEVNAME, 498797eaa4bSJean Delvare }, 499797eaa4bSJean Delvare .probe = lm95241_probe, 500797eaa4bSJean Delvare .id_table = lm95241_id, 501797eaa4bSJean Delvare .detect = lm95241_detect, 502c3813d6aSJean Delvare .address_list = normal_i2c, 503797eaa4bSJean Delvare }; 504797eaa4bSJean Delvare 505f0967eeaSAxel Lin module_i2c_driver(lm95241_driver); 50606160327SDavide Rizzo 5070f1deb4bSDavide Rizzo MODULE_AUTHOR("Davide Rizzo <elpa.rizzo@gmail.com>"); 50806160327SDavide Rizzo MODULE_DESCRIPTION("LM95241 sensor driver"); 50906160327SDavide Rizzo MODULE_LICENSE("GPL"); 510