1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Driver for Texas Instruments / National Semiconductor LM95234 4 * 5 * Copyright (c) 2013, 2014 Guenter Roeck <linux@roeck-us.net> 6 * 7 * Derived from lm95241.c 8 * Copyright (C) 2008, 2010 Davide Rizzo <elpa.rizzo@gmail.com> 9 */ 10 11 #include <linux/err.h> 12 #include <linux/hwmon.h> 13 #include <linux/i2c.h> 14 #include <linux/init.h> 15 #include <linux/module.h> 16 #include <linux/slab.h> 17 #include <linux/mutex.h> 18 #include <linux/regmap.h> 19 #include <linux/util_macros.h> 20 21 #define DRVNAME "lm95234" 22 23 enum chips { lm95233, lm95234 }; 24 25 static const unsigned short normal_i2c[] = { 26 0x18, 0x2a, 0x2b, 0x4d, 0x4e, I2C_CLIENT_END }; 27 28 /* LM95234 registers */ 29 #define LM95234_REG_MAN_ID 0xFE 30 #define LM95234_REG_CHIP_ID 0xFF 31 #define LM95234_REG_STATUS 0x02 32 #define LM95234_REG_CONFIG 0x03 33 #define LM95234_REG_CONVRATE 0x04 34 #define LM95234_REG_ENABLE 0x05 35 #define LM95234_REG_FILTER 0x06 36 #define LM95234_REG_STS_FAULT 0x07 37 #define LM95234_REG_STS_TCRIT1 0x08 38 #define LM95234_REG_STS_TCRIT2 0x09 39 #define LM95234_REG_TEMPH(x) ((x) + 0x10) 40 #define LM95234_REG_TEMPL(x) ((x) + 0x20) 41 #define LM95234_REG_UTEMPH(x) ((x) + 0x19) /* Remote only */ 42 #define LM95234_REG_UTEMPL(x) ((x) + 0x29) 43 #define LM95234_REG_REM_MODEL 0x30 44 #define LM95234_REG_REM_MODEL_STS 0x38 45 #define LM95234_REG_OFFSET(x) ((x) + 0x31) /* Remote only */ 46 #define LM95234_REG_TCRIT1(x) ((x) + 0x40) 47 #define LM95234_REG_TCRIT2(x) ((x) + 0x49) /* Remote channel 1,2 */ 48 #define LM95234_REG_TCRIT_HYST 0x5a 49 50 #define NATSEMI_MAN_ID 0x01 51 #define LM95233_CHIP_ID 0x89 52 #define LM95234_CHIP_ID 0x79 53 54 /* Client data (each client gets its own) */ 55 struct lm95234_data { 56 struct regmap *regmap; 57 struct mutex update_lock; 58 enum chips type; 59 }; 60 61 static int lm95234_read_temp(struct regmap *regmap, int index, long *t) 62 { 63 unsigned int regs[2]; 64 int temp = 0, ret; 65 u8 regvals[2]; 66 67 if (index) { 68 regs[0] = LM95234_REG_UTEMPH(index - 1); 69 regs[1] = LM95234_REG_UTEMPL(index - 1); 70 ret = regmap_multi_reg_read(regmap, regs, regvals, 2); 71 if (ret) 72 return ret; 73 temp = (regvals[0] << 8) | regvals[1]; 74 } 75 /* 76 * Read signed temperature if unsigned temperature is 0, 77 * or if this is the local sensor. 78 */ 79 if (!temp) { 80 regs[0] = LM95234_REG_TEMPH(index); 81 regs[1] = LM95234_REG_TEMPL(index); 82 ret = regmap_multi_reg_read(regmap, regs, regvals, 2); 83 if (ret) 84 return ret; 85 temp = (regvals[0] << 8) | regvals[1]; 86 temp = sign_extend32(temp, 15); 87 } 88 *t = DIV_ROUND_CLOSEST(temp * 125, 32); 89 return 0; 90 } 91 92 static int lm95234_hyst_get(struct regmap *regmap, int reg, long *val) 93 { 94 unsigned int regs[2] = {reg, LM95234_REG_TCRIT_HYST}; 95 u8 regvals[2]; 96 int ret; 97 98 ret = regmap_multi_reg_read(regmap, regs, regvals, 2); 99 if (ret) 100 return ret; 101 *val = (regvals[0] - regvals[1]) * 1000; 102 return 0; 103 } 104 105 static ssize_t lm95234_hyst_set(struct lm95234_data *data, long val) 106 { 107 u32 tcrit; 108 int ret; 109 110 mutex_lock(&data->update_lock); 111 112 ret = regmap_read(data->regmap, LM95234_REG_TCRIT1(0), &tcrit); 113 if (ret) 114 goto unlock; 115 116 val = DIV_ROUND_CLOSEST(clamp_val(val, -255000, 255000), 1000); 117 val = clamp_val((int)tcrit - val, 0, 31); 118 119 ret = regmap_write(data->regmap, LM95234_REG_TCRIT_HYST, val); 120 unlock: 121 mutex_unlock(&data->update_lock); 122 return ret; 123 } 124 125 static int lm95234_crit_reg(int channel) 126 { 127 if (channel == 1 || channel == 2) 128 return LM95234_REG_TCRIT2(channel - 1); 129 return LM95234_REG_TCRIT1(channel); 130 } 131 132 static int lm95234_temp_write(struct device *dev, u32 attr, int channel, long val) 133 { 134 struct lm95234_data *data = dev_get_drvdata(dev); 135 struct regmap *regmap = data->regmap; 136 137 switch (attr) { 138 case hwmon_temp_enable: 139 if (val && val != 1) 140 return -EINVAL; 141 return regmap_update_bits(regmap, LM95234_REG_ENABLE, 142 BIT(channel), val ? BIT(channel) : 0); 143 case hwmon_temp_type: 144 if (val != 1 && val != 2) 145 return -EINVAL; 146 return regmap_update_bits(regmap, LM95234_REG_REM_MODEL, 147 BIT(channel), 148 val == 1 ? BIT(channel) : 0); 149 case hwmon_temp_offset: 150 val = DIV_ROUND_CLOSEST(clamp_val(val, -64000, 63500), 500); 151 return regmap_write(regmap, LM95234_REG_OFFSET(channel - 1), val); 152 case hwmon_temp_max: 153 val = clamp_val(val, 0, channel == 1 ? 127000 : 255000); 154 val = DIV_ROUND_CLOSEST(val, 1000); 155 return regmap_write(regmap, lm95234_crit_reg(channel), val); 156 case hwmon_temp_max_hyst: 157 return lm95234_hyst_set(data, val); 158 case hwmon_temp_crit: 159 val = DIV_ROUND_CLOSEST(clamp_val(val, 0, 255000), 1000); 160 return regmap_write(regmap, LM95234_REG_TCRIT1(channel), val); 161 default: 162 return -EOPNOTSUPP; 163 } 164 return 0; 165 } 166 167 static int lm95234_alarm_reg(int channel) 168 { 169 if (channel == 1 || channel == 2) 170 return LM95234_REG_STS_TCRIT2; 171 return LM95234_REG_STS_TCRIT1; 172 } 173 174 static int lm95234_temp_read(struct device *dev, u32 attr, int channel, long *val) 175 { 176 struct lm95234_data *data = dev_get_drvdata(dev); 177 struct regmap *regmap = data->regmap; 178 u32 regval, mask; 179 int ret; 180 181 switch (attr) { 182 case hwmon_temp_enable: 183 ret = regmap_read(regmap, LM95234_REG_ENABLE, ®val); 184 if (ret) 185 return ret; 186 *val = !!(regval & BIT(channel)); 187 break; 188 case hwmon_temp_input: 189 return lm95234_read_temp(regmap, channel, val); 190 case hwmon_temp_max_alarm: 191 ret = regmap_read(regmap, lm95234_alarm_reg(channel), ®val); 192 if (ret) 193 return ret; 194 *val = !!(regval & BIT(channel)); 195 break; 196 case hwmon_temp_crit_alarm: 197 ret = regmap_read(regmap, LM95234_REG_STS_TCRIT1, ®val); 198 if (ret) 199 return ret; 200 *val = !!(regval & BIT(channel)); 201 break; 202 case hwmon_temp_crit_hyst: 203 return lm95234_hyst_get(regmap, LM95234_REG_TCRIT1(channel), val); 204 case hwmon_temp_type: 205 ret = regmap_read(regmap, LM95234_REG_REM_MODEL, ®val); 206 if (ret) 207 return ret; 208 *val = (regval & BIT(channel)) ? 1 : 2; 209 break; 210 case hwmon_temp_offset: 211 ret = regmap_read(regmap, LM95234_REG_OFFSET(channel - 1), ®val); 212 if (ret) 213 return ret; 214 *val = sign_extend32(regval, 7) * 500; 215 break; 216 case hwmon_temp_fault: 217 ret = regmap_read(regmap, LM95234_REG_STS_FAULT, ®val); 218 if (ret) 219 return ret; 220 mask = (BIT(0) | BIT(1)) << ((channel - 1) << 1); 221 *val = !!(regval & mask); 222 break; 223 case hwmon_temp_max: 224 ret = regmap_read(regmap, lm95234_crit_reg(channel), ®val); 225 if (ret) 226 return ret; 227 *val = regval * 1000; 228 break; 229 case hwmon_temp_max_hyst: 230 return lm95234_hyst_get(regmap, lm95234_crit_reg(channel), val); 231 case hwmon_temp_crit: 232 ret = regmap_read(regmap, LM95234_REG_TCRIT1(channel), ®val); 233 if (ret) 234 return ret; 235 *val = regval * 1000; 236 break; 237 default: 238 return -EOPNOTSUPP; 239 } 240 return 0; 241 } 242 243 static u16 update_intervals[] = { 143, 364, 1000, 2500 }; 244 245 static int lm95234_chip_write(struct device *dev, u32 attr, long val) 246 { 247 struct lm95234_data *data = dev_get_drvdata(dev); 248 249 switch (attr) { 250 case hwmon_chip_update_interval: 251 val = find_closest(val, update_intervals, ARRAY_SIZE(update_intervals)); 252 return regmap_write(data->regmap, LM95234_REG_CONVRATE, val); 253 default: 254 return -EOPNOTSUPP; 255 } 256 return 0; 257 } 258 259 static int lm95234_chip_read(struct device *dev, u32 attr, long *val) 260 { 261 struct lm95234_data *data = dev_get_drvdata(dev); 262 u32 convrate; 263 int ret; 264 265 switch (attr) { 266 case hwmon_chip_update_interval: 267 ret = regmap_read(data->regmap, LM95234_REG_CONVRATE, &convrate); 268 if (ret) 269 return ret; 270 271 *val = update_intervals[convrate & 0x03]; 272 break; 273 default: 274 return -EOPNOTSUPP; 275 } 276 return 0; 277 } 278 279 static int lm95234_write(struct device *dev, enum hwmon_sensor_types type, 280 u32 attr, int channel, long val) 281 { 282 switch (type) { 283 case hwmon_chip: 284 return lm95234_chip_write(dev, attr, val); 285 case hwmon_temp: 286 return lm95234_temp_write(dev, attr, channel, val); 287 default: 288 return -EOPNOTSUPP; 289 } 290 } 291 292 static int lm95234_read(struct device *dev, enum hwmon_sensor_types type, 293 u32 attr, int channel, long *val) 294 { 295 switch (type) { 296 case hwmon_chip: 297 return lm95234_chip_read(dev, attr, val); 298 case hwmon_temp: 299 return lm95234_temp_read(dev, attr, channel, val); 300 default: 301 return -EOPNOTSUPP; 302 } 303 } 304 305 static umode_t lm95234_is_visible(const void *_data, enum hwmon_sensor_types type, 306 u32 attr, int channel) 307 { 308 const struct lm95234_data *data = _data; 309 310 if (data->type == lm95233 && channel > 2) 311 return 0; 312 313 switch (type) { 314 case hwmon_chip: 315 switch (attr) { 316 case hwmon_chip_update_interval: 317 return 0644; 318 default: 319 break; 320 } 321 break; 322 case hwmon_temp: 323 switch (attr) { 324 case hwmon_temp_input: 325 case hwmon_temp_max_alarm: 326 return 0444; 327 case hwmon_temp_crit_alarm: 328 case hwmon_temp_crit_hyst: 329 return (channel && channel < 3) ? 0444 : 0; 330 case hwmon_temp_type: 331 case hwmon_temp_offset: 332 return channel ? 0644 : 0; 333 case hwmon_temp_fault: 334 return channel ? 0444 : 0; 335 case hwmon_temp_max: 336 case hwmon_temp_enable: 337 return 0644; 338 case hwmon_temp_max_hyst: 339 return channel ? 0444 : 0644; 340 case hwmon_temp_crit: 341 return (channel && channel < 3) ? 0644 : 0; 342 default: 343 break; 344 } 345 break; 346 default: 347 break; 348 } 349 return 0; 350 } 351 352 static const struct hwmon_channel_info * const lm95234_info[] = { 353 HWMON_CHANNEL_INFO(chip, HWMON_C_UPDATE_INTERVAL), 354 HWMON_CHANNEL_INFO(temp, 355 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | 356 HWMON_T_MAX_ALARM | HWMON_T_ENABLE, 357 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | 358 HWMON_T_MAX_ALARM | HWMON_T_FAULT | HWMON_T_TYPE | 359 HWMON_T_CRIT | HWMON_T_CRIT_HYST | 360 HWMON_T_CRIT_ALARM | HWMON_T_OFFSET | HWMON_T_ENABLE, 361 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | 362 HWMON_T_MAX_ALARM | HWMON_T_FAULT | HWMON_T_TYPE | 363 HWMON_T_CRIT | HWMON_T_CRIT_HYST | 364 HWMON_T_CRIT_ALARM | HWMON_T_OFFSET | HWMON_T_ENABLE, 365 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | 366 HWMON_T_MAX_ALARM | HWMON_T_FAULT | HWMON_T_TYPE | 367 HWMON_T_OFFSET | HWMON_T_ENABLE, 368 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | 369 HWMON_T_MAX_ALARM | HWMON_T_FAULT | HWMON_T_TYPE | 370 HWMON_T_OFFSET | HWMON_T_ENABLE), 371 NULL 372 }; 373 374 static const struct hwmon_ops lm95234_hwmon_ops = { 375 .is_visible = lm95234_is_visible, 376 .read = lm95234_read, 377 .write = lm95234_write, 378 }; 379 380 static const struct hwmon_chip_info lm95234_chip_info = { 381 .ops = &lm95234_hwmon_ops, 382 .info = lm95234_info, 383 }; 384 385 static bool lm95234_volatile_reg(struct device *dev, unsigned int reg) 386 { 387 switch (reg) { 388 case LM95234_REG_TEMPH(0) ... LM95234_REG_TEMPH(4): 389 case LM95234_REG_TEMPL(0) ... LM95234_REG_TEMPL(4): 390 case LM95234_REG_UTEMPH(0) ... LM95234_REG_UTEMPH(3): 391 case LM95234_REG_UTEMPL(0) ... LM95234_REG_UTEMPL(3): 392 case LM95234_REG_STS_FAULT: 393 case LM95234_REG_STS_TCRIT1: 394 case LM95234_REG_STS_TCRIT2: 395 case LM95234_REG_REM_MODEL_STS: 396 return true; 397 default: 398 return false; 399 } 400 } 401 402 static bool lm95234_writeable_reg(struct device *dev, unsigned int reg) 403 { 404 switch (reg) { 405 case LM95234_REG_CONFIG ... LM95234_REG_FILTER: 406 case LM95234_REG_REM_MODEL ... LM95234_REG_OFFSET(3): 407 case LM95234_REG_TCRIT1(0) ... LM95234_REG_TCRIT1(4): 408 case LM95234_REG_TCRIT2(0) ... LM95234_REG_TCRIT2(1): 409 case LM95234_REG_TCRIT_HYST: 410 return true; 411 default: 412 return false; 413 } 414 } 415 416 static const struct regmap_config lm95234_regmap_config = { 417 .reg_bits = 8, 418 .val_bits = 8, 419 .writeable_reg = lm95234_writeable_reg, 420 .volatile_reg = lm95234_volatile_reg, 421 .cache_type = REGCACHE_MAPLE, 422 }; 423 424 static int lm95234_detect(struct i2c_client *client, 425 struct i2c_board_info *info) 426 { 427 struct i2c_adapter *adapter = client->adapter; 428 int address = client->addr; 429 u8 config_mask, model_mask; 430 int mfg_id, chip_id, val; 431 const char *name; 432 433 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 434 return -ENODEV; 435 436 mfg_id = i2c_smbus_read_byte_data(client, LM95234_REG_MAN_ID); 437 if (mfg_id != NATSEMI_MAN_ID) 438 return -ENODEV; 439 440 chip_id = i2c_smbus_read_byte_data(client, LM95234_REG_CHIP_ID); 441 switch (chip_id) { 442 case LM95233_CHIP_ID: 443 if (address != 0x18 && address != 0x2a && address != 0x2b) 444 return -ENODEV; 445 config_mask = 0xbf; 446 model_mask = 0xf9; 447 name = "lm95233"; 448 break; 449 case LM95234_CHIP_ID: 450 if (address != 0x18 && address != 0x4d && address != 0x4e) 451 return -ENODEV; 452 config_mask = 0xbc; 453 model_mask = 0xe1; 454 name = "lm95234"; 455 break; 456 default: 457 return -ENODEV; 458 } 459 460 val = i2c_smbus_read_byte_data(client, LM95234_REG_STATUS); 461 if (val & 0x30) 462 return -ENODEV; 463 464 val = i2c_smbus_read_byte_data(client, LM95234_REG_CONFIG); 465 if (val & config_mask) 466 return -ENODEV; 467 468 val = i2c_smbus_read_byte_data(client, LM95234_REG_CONVRATE); 469 if (val & 0xfc) 470 return -ENODEV; 471 472 val = i2c_smbus_read_byte_data(client, LM95234_REG_REM_MODEL); 473 if (val & model_mask) 474 return -ENODEV; 475 476 val = i2c_smbus_read_byte_data(client, LM95234_REG_REM_MODEL_STS); 477 if (val & model_mask) 478 return -ENODEV; 479 480 strscpy(info->type, name, I2C_NAME_SIZE); 481 return 0; 482 } 483 484 static int lm95234_init_client(struct device *dev, struct regmap *regmap) 485 { 486 u32 val, model; 487 int ret; 488 489 /* start conversion if necessary */ 490 ret = regmap_clear_bits(regmap, LM95234_REG_CONFIG, 0x40); 491 if (ret) 492 return ret; 493 494 /* If diode type status reports an error, try to fix it */ 495 ret = regmap_read(regmap, LM95234_REG_REM_MODEL_STS, &val); 496 if (ret < 0) 497 return ret; 498 ret = regmap_read(regmap, LM95234_REG_REM_MODEL, &model); 499 if (ret < 0) 500 return ret; 501 if (model & val) { 502 dev_notice(dev, 503 "Fixing remote diode type misconfiguration (0x%x)\n", 504 val); 505 ret = regmap_write(regmap, LM95234_REG_REM_MODEL, model & ~val); 506 } 507 return ret; 508 } 509 510 static int lm95234_probe(struct i2c_client *client) 511 { 512 struct device *dev = &client->dev; 513 struct lm95234_data *data; 514 struct device *hwmon_dev; 515 struct regmap *regmap; 516 int err; 517 518 data = devm_kzalloc(dev, sizeof(struct lm95234_data), GFP_KERNEL); 519 if (!data) 520 return -ENOMEM; 521 522 data->type = (uintptr_t)i2c_get_match_data(client); 523 524 regmap = devm_regmap_init_i2c(client, &lm95234_regmap_config); 525 if (IS_ERR(regmap)) 526 return PTR_ERR(regmap); 527 528 data->regmap = regmap; 529 mutex_init(&data->update_lock); 530 531 /* Initialize the LM95234 chip */ 532 err = lm95234_init_client(dev, regmap); 533 if (err < 0) 534 return err; 535 536 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 537 data, &lm95234_chip_info, NULL); 538 return PTR_ERR_OR_ZERO(hwmon_dev); 539 } 540 541 /* Driver data (common to all clients) */ 542 static const struct i2c_device_id lm95234_id[] = { 543 { "lm95233", lm95233 }, 544 { "lm95234", lm95234 }, 545 { } 546 }; 547 MODULE_DEVICE_TABLE(i2c, lm95234_id); 548 549 static struct i2c_driver lm95234_driver = { 550 .class = I2C_CLASS_HWMON, 551 .driver = { 552 .name = DRVNAME, 553 }, 554 .probe = lm95234_probe, 555 .id_table = lm95234_id, 556 .detect = lm95234_detect, 557 .address_list = normal_i2c, 558 }; 559 560 module_i2c_driver(lm95234_driver); 561 562 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>"); 563 MODULE_DESCRIPTION("LM95233/LM95234 sensor driver"); 564 MODULE_LICENSE("GPL"); 565