1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware 4 * monitoring 5 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de> 6 * 7 * Based on the lm83 driver. The LM90 is a sensor chip made by National 8 * Semiconductor. It reports up to two temperatures (its own plus up to 9 * one external one) with a 0.125 deg resolution (1 deg for local 10 * temperature) and a 3-4 deg accuracy. 11 * 12 * This driver also supports the LM89 and LM99, two other sensor chips 13 * made by National Semiconductor. Both have an increased remote 14 * temperature measurement accuracy (1 degree), and the LM99 15 * additionally shifts remote temperatures (measured and limits) by 16 16 * degrees, which allows for higher temperatures measurement. 17 * Note that there is no way to differentiate between both chips. 18 * When device is auto-detected, the driver will assume an LM99. 19 * 20 * This driver also supports the LM86, another sensor chip made by 21 * National Semiconductor. It is exactly similar to the LM90 except it 22 * has a higher accuracy. 23 * 24 * This driver also supports the ADM1032, a sensor chip made by Analog 25 * Devices. That chip is similar to the LM90, with a few differences 26 * that are not handled by this driver. Among others, it has a higher 27 * accuracy than the LM90, much like the LM86 does. 28 * 29 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor 30 * chips made by Maxim. These chips are similar to the LM86. 31 * Note that there is no easy way to differentiate between the three 32 * variants. We use the device address to detect MAX6659, which will result 33 * in a detection as max6657 if it is on address 0x4c. The extra address 34 * and features of the MAX6659 are only supported if the chip is configured 35 * explicitly as max6659, or if its address is not 0x4c. 36 * These chips lack the remote temperature offset feature. 37 * 38 * This driver also supports the MAX6654 chip made by Maxim. This chip can be 39 * at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is similar 40 * to MAX6657/MAX6658/MAX6659, but does not support critical temperature 41 * limits. Extended range is available by setting the configuration register 42 * accordingly, and is done during initialization. Extended precision is only 43 * available at conversion rates of 1 Hz and slower. Note that extended 44 * precision is not enabled by default, as this driver initializes all chips 45 * to 2 Hz by design. The driver also supports MAX6690, which is practically 46 * identical to MAX6654. 47 * 48 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and 49 * MAX6692 chips made by Maxim. These are again similar to the LM86, 50 * but they use unsigned temperature values and can report temperatures 51 * from 0 to 145 degrees. 52 * 53 * This driver also supports the MAX6680 and MAX6681, two other sensor 54 * chips made by Maxim. These are quite similar to the other Maxim 55 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can 56 * be treated identically. 57 * 58 * This driver also supports the MAX6695 and MAX6696, two other sensor 59 * chips made by Maxim. These are also quite similar to other Maxim 60 * chips, but support three temperature sensors instead of two. MAX6695 61 * and MAX6696 only differ in the pinout so they can be treated identically. 62 * 63 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as 64 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility 65 * and extended mode. They are mostly compatible with LM90 except for a data 66 * format difference for the temperature value registers. 67 * 68 * This driver also supports ADT7481, ADT7482, and ADT7483 from Analog Devices 69 * / ON Semiconductor. The chips are similar to ADT7461 but support two external 70 * temperature sensors. 71 * 72 * This driver also supports NCT72, NCT214, and NCT218 from ON Semiconductor. 73 * The chips are similar to ADT7461/ADT7461A but have full PEC support 74 * (undocumented). 75 * 76 * This driver also supports the SA56004 from Philips. This device is 77 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible. 78 * 79 * This driver also supports the G781 from GMT. This device is compatible 80 * with the ADM1032. 81 * 82 * This driver also supports TMP451 and TMP461 from Texas Instruments. 83 * Those devices are supported in both compatibility and extended mode. 84 * They are mostly compatible with ADT7461 except for local temperature 85 * low byte register and max conversion rate. 86 * 87 * This driver also supports MAX1617 and various clones such as G767 88 * and NE1617. Such clones will be detected as MAX1617. 89 * 90 * This driver also supports NE1618 from Philips. It is similar to NE1617 91 * but supports 11 bit external temperature values. 92 * 93 * This driver also supports NCT7716, NCT7717 and NCT7718 from Nuvoton. 94 * The NCT7716 is similar to NCT7717 but has one more address support. 95 * 96 * Since the LM90 was the first chipset supported by this driver, most 97 * comments will refer to this chipset, but are actually general and 98 * concern all supported chipsets, unless mentioned otherwise. 99 */ 100 101 #include <linux/bits.h> 102 #include <linux/device.h> 103 #include <linux/err.h> 104 #include <linux/i2c.h> 105 #include <linux/init.h> 106 #include <linux/interrupt.h> 107 #include <linux/jiffies.h> 108 #include <linux/hwmon.h> 109 #include <linux/kstrtox.h> 110 #include <linux/module.h> 111 #include <linux/of.h> 112 #include <linux/regulator/consumer.h> 113 #include <linux/slab.h> 114 #include <linux/workqueue.h> 115 116 /* The maximum number of channels currently supported */ 117 #define MAX_CHANNELS 3 118 119 /* 120 * Addresses to scan 121 * Address is fully defined internally and cannot be changed except for 122 * MAX6659, MAX6680 and MAX6681. 123 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649, 124 * MAX6657, MAX6658, NCT1008, NCT7718 and W83L771 have address 0x4c. 125 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D 126 * have address 0x4d. 127 * MAX6647 has address 0x4e. 128 * MAX6659 can have address 0x4c, 0x4d or 0x4e. 129 * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29, 130 * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e. 131 * NCT7716 can have address 0x48 or 0x49. 132 * NCT7717 has address 0x48. 133 * SA56004 can have address 0x48 through 0x4F. 134 */ 135 136 static const unsigned short normal_i2c[] = { 137 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 138 0x4d, 0x4e, 0x4f, I2C_CLIENT_END }; 139 140 enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481, 141 g781, lm84, lm90, lm99, 142 max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696, 143 nct210, nct72, nct7716, nct7717, nct7718, ne1618, sa56004, tmp451, tmp461, w83l771, 144 }; 145 146 /* 147 * The LM90 registers 148 */ 149 150 #define LM90_REG_MAN_ID 0xFE 151 #define LM90_REG_CHIP_ID 0xFF 152 #define LM90_REG_CONFIG1 0x03 153 #define LM90_REG_CONFIG2 0xBF 154 #define LM90_REG_CONVRATE 0x04 155 #define LM90_REG_STATUS 0x02 156 #define LM90_REG_LOCAL_TEMP 0x00 157 #define LM90_REG_LOCAL_HIGH 0x05 158 #define LM90_REG_LOCAL_LOW 0x06 159 #define LM90_REG_LOCAL_CRIT 0x20 160 #define LM90_REG_REMOTE_TEMPH 0x01 161 #define LM90_REG_REMOTE_TEMPL 0x10 162 #define LM90_REG_REMOTE_OFFSH 0x11 163 #define LM90_REG_REMOTE_OFFSL 0x12 164 #define LM90_REG_REMOTE_HIGHH 0x07 165 #define LM90_REG_REMOTE_HIGHL 0x13 166 #define LM90_REG_REMOTE_LOWH 0x08 167 #define LM90_REG_REMOTE_LOWL 0x14 168 #define LM90_REG_REMOTE_CRIT 0x19 169 #define LM90_REG_TCRIT_HYST 0x21 170 171 /* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */ 172 173 #define MAX6657_REG_LOCAL_TEMPL 0x11 174 #define MAX6696_REG_STATUS2 0x12 175 #define MAX6659_REG_REMOTE_EMERG 0x16 176 #define MAX6659_REG_LOCAL_EMERG 0x17 177 178 /* SA56004 registers */ 179 180 #define SA56004_REG_LOCAL_TEMPL 0x22 181 182 #define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */ 183 184 /* TMP451/TMP461 registers */ 185 #define TMP451_REG_LOCAL_TEMPL 0x15 186 #define TMP451_REG_CONALERT 0x22 187 188 #define TMP461_REG_CHEN 0x16 189 #define TMP461_REG_DFC 0x24 190 191 /* ADT7481 registers */ 192 #define ADT7481_REG_STATUS2 0x23 193 #define ADT7481_REG_CONFIG2 0x24 194 195 #define ADT7481_REG_MAN_ID 0x3e 196 #define ADT7481_REG_CHIP_ID 0x3d 197 198 /* NCT7716/7717/7718 registers */ 199 #define NCT7716_REG_CHIP_ID 0xFD 200 201 /* Device features */ 202 #define LM90_HAVE_EXTENDED_TEMP BIT(0) /* extended temperature support */ 203 #define LM90_HAVE_OFFSET BIT(1) /* temperature offset register */ 204 #define LM90_HAVE_UNSIGNED_TEMP BIT(2) /* temperatures are unsigned */ 205 #define LM90_HAVE_REM_LIMIT_EXT BIT(3) /* extended remote limit */ 206 #define LM90_HAVE_EMERGENCY BIT(4) /* 3rd upper (emergency) limit */ 207 #define LM90_HAVE_EMERGENCY_ALARM BIT(5)/* emergency alarm */ 208 #define LM90_HAVE_TEMP3 BIT(6) /* 3rd temperature sensor */ 209 #define LM90_HAVE_BROKEN_ALERT BIT(7) /* Broken alert */ 210 #define LM90_PAUSE_FOR_CONFIG BIT(8) /* Pause conversion for config */ 211 #define LM90_HAVE_CRIT BIT(9) /* Chip supports CRIT/OVERT register */ 212 #define LM90_HAVE_CRIT_ALRM_SWP BIT(10) /* critical alarm bits swapped */ 213 #define LM90_HAVE_PEC BIT(11) /* Chip supports PEC */ 214 #define LM90_HAVE_PARTIAL_PEC BIT(12) /* Partial PEC support (adm1032)*/ 215 #define LM90_HAVE_ALARMS BIT(13) /* Create 'alarms' attribute */ 216 #define LM90_HAVE_EXT_UNSIGNED BIT(14) /* extended unsigned temperature*/ 217 #define LM90_HAVE_LOW BIT(15) /* low limits */ 218 #define LM90_HAVE_CONVRATE BIT(16) /* conversion rate */ 219 #define LM90_HAVE_REMOTE_EXT BIT(17) /* extended remote temperature */ 220 #define LM90_HAVE_FAULTQUEUE BIT(18) /* configurable samples count */ 221 222 /* LM90 status */ 223 #define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */ 224 #define LM90_STATUS_RTHRM BIT(1) /* remote THERM limit tripped */ 225 #define LM90_STATUS_ROPEN BIT(2) /* remote is an open circuit */ 226 #define LM90_STATUS_RLOW BIT(3) /* remote low temp limit tripped */ 227 #define LM90_STATUS_RHIGH BIT(4) /* remote high temp limit tripped */ 228 #define LM90_STATUS_LLOW BIT(5) /* local low temp limit tripped */ 229 #define LM90_STATUS_LHIGH BIT(6) /* local high temp limit tripped */ 230 #define LM90_STATUS_BUSY BIT(7) /* conversion is ongoing */ 231 232 /* MAX6695/6696 and ADT7481 2nd status register */ 233 #define MAX6696_STATUS2_R2THRM BIT(1) /* remote2 THERM limit tripped */ 234 #define MAX6696_STATUS2_R2OPEN BIT(2) /* remote2 is an open circuit */ 235 #define MAX6696_STATUS2_R2LOW BIT(3) /* remote2 low temp limit tripped */ 236 #define MAX6696_STATUS2_R2HIGH BIT(4) /* remote2 high temp limit tripped */ 237 #define MAX6696_STATUS2_ROT2 BIT(5) /* remote emergency limit tripped */ 238 #define MAX6696_STATUS2_R2OT2 BIT(6) /* remote2 emergency limit tripped */ 239 #define MAX6696_STATUS2_LOT2 BIT(7) /* local emergency limit tripped */ 240 241 /* 242 * Driver data (common to all clients) 243 */ 244 245 static const struct i2c_device_id lm90_id[] = { 246 { "adm1020", max1617 }, 247 { "adm1021", max1617 }, 248 { "adm1023", adm1023 }, 249 { "adm1032", adm1032 }, 250 { "adt7421", adt7461a }, 251 { "adt7461", adt7461 }, 252 { "adt7461a", adt7461a }, 253 { "adt7481", adt7481 }, 254 { "adt7482", adt7481 }, 255 { "adt7483a", adt7481 }, 256 { "g781", g781 }, 257 { "gl523sm", max1617 }, 258 { "lm84", lm84 }, 259 { "lm86", lm90 }, 260 { "lm89", lm90 }, 261 { "lm90", lm90 }, 262 { "lm99", lm99 }, 263 { "max1617", max1617 }, 264 { "max6642", max6642 }, 265 { "max6646", max6646 }, 266 { "max6647", max6646 }, 267 { "max6648", max6648 }, 268 { "max6649", max6646 }, 269 { "max6654", max6654 }, 270 { "max6657", max6657 }, 271 { "max6658", max6657 }, 272 { "max6659", max6659 }, 273 { "max6680", max6680 }, 274 { "max6681", max6680 }, 275 { "max6690", max6654 }, 276 { "max6692", max6648 }, 277 { "max6695", max6696 }, 278 { "max6696", max6696 }, 279 { "mc1066", max1617 }, 280 { "nct1008", adt7461a }, 281 { "nct210", nct210 }, 282 { "nct214", nct72 }, 283 { "nct218", nct72 }, 284 { "nct72", nct72 }, 285 { "nct7716", nct7716 }, 286 { "nct7717", nct7717 }, 287 { "nct7718", nct7718 }, 288 { "ne1618", ne1618 }, 289 { "w83l771", w83l771 }, 290 { "sa56004", sa56004 }, 291 { "thmc10", max1617 }, 292 { "tmp451", tmp451 }, 293 { "tmp461", tmp461 }, 294 { } 295 }; 296 MODULE_DEVICE_TABLE(i2c, lm90_id); 297 298 static const struct of_device_id __maybe_unused lm90_of_match[] = { 299 { 300 .compatible = "adi,adm1032", 301 .data = (void *)adm1032 302 }, 303 { 304 .compatible = "adi,adt7461", 305 .data = (void *)adt7461 306 }, 307 { 308 .compatible = "adi,adt7461a", 309 .data = (void *)adt7461a 310 }, 311 { 312 .compatible = "adi,adt7481", 313 .data = (void *)adt7481 314 }, 315 { 316 .compatible = "gmt,g781", 317 .data = (void *)g781 318 }, 319 { 320 .compatible = "national,lm90", 321 .data = (void *)lm90 322 }, 323 { 324 .compatible = "national,lm86", 325 .data = (void *)lm90 326 }, 327 { 328 .compatible = "national,lm89", 329 .data = (void *)lm90 330 }, 331 { 332 .compatible = "national,lm99", 333 .data = (void *)lm99 334 }, 335 { 336 .compatible = "dallas,max6646", 337 .data = (void *)max6646 338 }, 339 { 340 .compatible = "dallas,max6647", 341 .data = (void *)max6646 342 }, 343 { 344 .compatible = "dallas,max6649", 345 .data = (void *)max6646 346 }, 347 { 348 .compatible = "dallas,max6654", 349 .data = (void *)max6654 350 }, 351 { 352 .compatible = "dallas,max6657", 353 .data = (void *)max6657 354 }, 355 { 356 .compatible = "dallas,max6658", 357 .data = (void *)max6657 358 }, 359 { 360 .compatible = "dallas,max6659", 361 .data = (void *)max6659 362 }, 363 { 364 .compatible = "dallas,max6680", 365 .data = (void *)max6680 366 }, 367 { 368 .compatible = "dallas,max6681", 369 .data = (void *)max6680 370 }, 371 { 372 .compatible = "dallas,max6695", 373 .data = (void *)max6696 374 }, 375 { 376 .compatible = "dallas,max6696", 377 .data = (void *)max6696 378 }, 379 { 380 .compatible = "onnn,nct1008", 381 .data = (void *)adt7461a 382 }, 383 { 384 .compatible = "onnn,nct214", 385 .data = (void *)nct72 386 }, 387 { 388 .compatible = "onnn,nct218", 389 .data = (void *)nct72 390 }, 391 { 392 .compatible = "onnn,nct72", 393 .data = (void *)nct72 394 }, 395 { 396 .compatible = "nuvoton,nct7716", 397 .data = (void *)nct7716 398 }, 399 { 400 .compatible = "nuvoton,nct7717", 401 .data = (void *)nct7717 402 }, 403 { 404 .compatible = "nuvoton,nct7718", 405 .data = (void *)nct7718 406 }, 407 { 408 .compatible = "winbond,w83l771", 409 .data = (void *)w83l771 410 }, 411 { 412 .compatible = "nxp,sa56004", 413 .data = (void *)sa56004 414 }, 415 { 416 .compatible = "ti,tmp451", 417 .data = (void *)tmp451 418 }, 419 { 420 .compatible = "ti,tmp461", 421 .data = (void *)tmp461 422 }, 423 { }, 424 }; 425 MODULE_DEVICE_TABLE(of, lm90_of_match); 426 427 /* 428 * chip type specific parameters 429 */ 430 struct lm90_params { 431 u32 flags; /* Capabilities */ 432 u16 alert_alarms; /* Which alarm bits trigger ALERT# */ 433 /* Upper 8 bits for max6695/96 */ 434 u8 max_convrate; /* Maximum conversion rate register value */ 435 u8 resolution; /* 16-bit resolution (default 11 bit) */ 436 u8 reg_status2; /* 2nd status register (optional) */ 437 u8 reg_local_ext; /* Extended local temp register (optional) */ 438 u8 faultqueue_mask; /* fault queue bit mask */ 439 u8 faultqueue_depth; /* fault queue depth if mask is used */ 440 }; 441 442 static const struct lm90_params lm90_params[] = { 443 [adm1023] = { 444 .flags = LM90_HAVE_ALARMS | LM90_HAVE_OFFSET | LM90_HAVE_BROKEN_ALERT 445 | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 446 | LM90_HAVE_REMOTE_EXT, 447 .alert_alarms = 0x7c, 448 .resolution = 8, 449 .max_convrate = 7, 450 }, 451 [adm1032] = { 452 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 453 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT 454 | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS 455 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT 456 | LM90_HAVE_FAULTQUEUE, 457 .alert_alarms = 0x7c, 458 .max_convrate = 10, 459 }, 460 [adt7461] = { 461 /* 462 * Standard temperature range is supposed to be unsigned, 463 * but that does not match reality. Negative temperatures 464 * are always reported. 465 */ 466 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 467 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP 468 | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC 469 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 470 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 471 .alert_alarms = 0x7c, 472 .max_convrate = 10, 473 .resolution = 10, 474 }, 475 [adt7461a] = { 476 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 477 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP 478 | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS 479 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT 480 | LM90_HAVE_FAULTQUEUE, 481 .alert_alarms = 0x7c, 482 .max_convrate = 10, 483 }, 484 [adt7481] = { 485 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 486 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP 487 | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC 488 | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW 489 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT 490 | LM90_HAVE_FAULTQUEUE, 491 .alert_alarms = 0x1c7c, 492 .max_convrate = 11, 493 .resolution = 10, 494 .reg_status2 = ADT7481_REG_STATUS2, 495 }, 496 [g781] = { 497 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 498 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT 499 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 500 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 501 .alert_alarms = 0x7c, 502 .max_convrate = 7, 503 }, 504 [lm84] = { 505 .flags = LM90_HAVE_ALARMS, 506 .resolution = 8, 507 }, 508 [lm90] = { 509 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 510 | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW 511 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT 512 | LM90_HAVE_FAULTQUEUE, 513 .alert_alarms = 0x7b, 514 .max_convrate = 9, 515 .faultqueue_mask = BIT(0), 516 .faultqueue_depth = 3, 517 }, 518 [lm99] = { 519 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 520 | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW 521 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT 522 | LM90_HAVE_FAULTQUEUE, 523 .alert_alarms = 0x7b, 524 .max_convrate = 9, 525 .faultqueue_mask = BIT(0), 526 .faultqueue_depth = 3, 527 }, 528 [max1617] = { 529 .flags = LM90_HAVE_CONVRATE | LM90_HAVE_BROKEN_ALERT | 530 LM90_HAVE_LOW | LM90_HAVE_ALARMS, 531 .alert_alarms = 0x78, 532 .resolution = 8, 533 .max_convrate = 7, 534 }, 535 [max6642] = { 536 .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED 537 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 538 .alert_alarms = 0x50, 539 .resolution = 10, 540 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 541 .faultqueue_mask = BIT(4), 542 .faultqueue_depth = 2, 543 }, 544 [max6646] = { 545 .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT 546 | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW 547 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, 548 .alert_alarms = 0x7c, 549 .max_convrate = 6, 550 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 551 }, 552 [max6648] = { 553 .flags = LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_CRIT 554 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_LOW 555 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, 556 .alert_alarms = 0x7c, 557 .max_convrate = 6, 558 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 559 }, 560 [max6654] = { 561 .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS | LM90_HAVE_LOW 562 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, 563 .alert_alarms = 0x7c, 564 .max_convrate = 7, 565 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 566 }, 567 [max6657] = { 568 .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT 569 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 570 | LM90_HAVE_REMOTE_EXT, 571 .alert_alarms = 0x7c, 572 .max_convrate = 8, 573 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 574 }, 575 [max6659] = { 576 .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT 577 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 578 | LM90_HAVE_REMOTE_EXT, 579 .alert_alarms = 0x7c, 580 .max_convrate = 8, 581 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 582 }, 583 [max6680] = { 584 /* 585 * Apparent temperatures of 128 degrees C or higher are reported 586 * and treated as negative temperatures (meaning min_alarm will 587 * be set). 588 */ 589 .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT 590 | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT 591 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 592 | LM90_HAVE_REMOTE_EXT, 593 .alert_alarms = 0x7c, 594 .max_convrate = 7, 595 }, 596 [max6696] = { 597 .flags = LM90_HAVE_EMERGENCY 598 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT 599 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 600 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 601 .alert_alarms = 0x1c7c, 602 .max_convrate = 6, 603 .reg_status2 = MAX6696_REG_STATUS2, 604 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, 605 .faultqueue_mask = BIT(5), 606 .faultqueue_depth = 4, 607 }, 608 [nct72] = { 609 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 610 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP 611 | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_UNSIGNED_TEMP 612 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT 613 | LM90_HAVE_FAULTQUEUE, 614 .alert_alarms = 0x7c, 615 .max_convrate = 10, 616 .resolution = 10, 617 }, 618 [nct210] = { 619 .flags = LM90_HAVE_ALARMS | LM90_HAVE_BROKEN_ALERT 620 | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 621 | LM90_HAVE_REMOTE_EXT, 622 .alert_alarms = 0x7c, 623 .resolution = 11, 624 .max_convrate = 7, 625 }, 626 [nct7716] = { 627 .flags = LM90_HAVE_ALARMS | LM90_HAVE_CONVRATE, 628 .alert_alarms = 0x40, 629 .resolution = 8, 630 .max_convrate = 8, 631 }, 632 [nct7717] = { 633 .flags = LM90_HAVE_ALARMS | LM90_HAVE_CONVRATE, 634 .alert_alarms = 0x40, 635 .resolution = 8, 636 .max_convrate = 8, 637 }, 638 [nct7718] = { 639 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT 640 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 641 | LM90_HAVE_REMOTE_EXT, 642 .alert_alarms = 0x7c, 643 .resolution = 11, 644 .max_convrate = 8, 645 }, 646 [ne1618] = { 647 .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_BROKEN_ALERT 648 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, 649 .alert_alarms = 0x7c, 650 .resolution = 11, 651 .max_convrate = 7, 652 }, 653 [w83l771] = { 654 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT 655 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 656 | LM90_HAVE_REMOTE_EXT, 657 .alert_alarms = 0x7c, 658 .max_convrate = 8, 659 }, 660 [sa56004] = { 661 /* 662 * Apparent temperatures of 128 degrees C or higher are reported 663 * and treated as negative temperatures (meaning min_alarm will 664 * be set). 665 */ 666 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT 667 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 668 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 669 .alert_alarms = 0x7b, 670 .max_convrate = 9, 671 .reg_local_ext = SA56004_REG_LOCAL_TEMPL, 672 .faultqueue_mask = BIT(0), 673 .faultqueue_depth = 3, 674 }, 675 [tmp451] = { 676 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 677 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT 678 | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW 679 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 680 .alert_alarms = 0x7c, 681 .max_convrate = 9, 682 .resolution = 12, 683 .reg_local_ext = TMP451_REG_LOCAL_TEMPL, 684 }, 685 [tmp461] = { 686 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT 687 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT 688 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE 689 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, 690 .alert_alarms = 0x7c, 691 .max_convrate = 9, 692 .resolution = 12, 693 .reg_local_ext = TMP451_REG_LOCAL_TEMPL, 694 }, 695 }; 696 697 /* 698 * temperature register index 699 */ 700 enum lm90_temp_reg_index { 701 LOCAL_LOW = 0, 702 LOCAL_HIGH, 703 LOCAL_CRIT, 704 REMOTE_CRIT, 705 LOCAL_EMERG, /* max6659 and max6695/96 */ 706 REMOTE_EMERG, /* max6659 and max6695/96 */ 707 REMOTE2_CRIT, /* max6695/96 only */ 708 REMOTE2_EMERG, /* max6695/96 only */ 709 710 REMOTE_TEMP, 711 REMOTE_LOW, 712 REMOTE_HIGH, 713 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */ 714 LOCAL_TEMP, 715 REMOTE2_TEMP, /* max6695/96 only */ 716 REMOTE2_LOW, /* max6695/96 only */ 717 REMOTE2_HIGH, /* max6695/96 only */ 718 REMOTE2_OFFSET, 719 720 TEMP_REG_NUM 721 }; 722 723 /* 724 * Client data (each client gets its own) 725 */ 726 727 struct lm90_data { 728 struct i2c_client *client; 729 struct device *hwmon_dev; 730 u32 chip_config[2]; 731 u32 channel_config[MAX_CHANNELS + 1]; 732 const char *channel_label[MAX_CHANNELS]; 733 struct hwmon_channel_info chip_info; 734 struct hwmon_channel_info temp_info; 735 const struct hwmon_channel_info *info[3]; 736 struct hwmon_chip_info chip; 737 struct delayed_work alert_work; 738 struct work_struct report_work; 739 bool shutdown; /* true if shutting down */ 740 bool valid; /* true if register values are valid */ 741 bool alarms_valid; /* true if status register values are valid */ 742 unsigned long last_updated; /* in jiffies */ 743 unsigned long alarms_updated; /* in jiffies */ 744 int kind; 745 u32 flags; 746 747 unsigned int update_interval; /* in milliseconds */ 748 749 u8 config; /* Current configuration register value */ 750 u8 config_orig; /* Original configuration register value */ 751 u8 convrate_orig; /* Original conversion rate register value */ 752 u8 resolution; /* temperature resolution in bit */ 753 u16 alert_alarms; /* Which alarm bits trigger ALERT# */ 754 /* Upper 8 bits for max6695/96 */ 755 u8 max_convrate; /* Maximum conversion rate */ 756 u8 reg_status2; /* 2nd status register (optional) */ 757 u8 reg_local_ext; /* local extension register offset */ 758 u8 reg_remote_ext; /* remote temperature low byte */ 759 u8 faultqueue_mask; /* fault queue mask */ 760 u8 faultqueue_depth; /* fault queue mask */ 761 762 /* registers values */ 763 u16 temp[TEMP_REG_NUM]; 764 u8 temp_hyst; 765 u8 conalert; 766 u16 reported_alarms; /* alarms reported as sysfs/udev events */ 767 u16 current_alarms; /* current alarms, reported by chip */ 768 u16 alarms; /* alarms not yet reported to user */ 769 }; 770 771 /* 772 * Support functions 773 */ 774 775 /* 776 * If the chip supports PEC but not on write byte transactions, we need 777 * to explicitly ask for a transaction without PEC. 778 */ 779 static inline s32 lm90_write_no_pec(struct i2c_client *client, u8 value) 780 { 781 return i2c_smbus_xfer(client->adapter, client->addr, 782 client->flags & ~I2C_CLIENT_PEC, 783 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL); 784 } 785 786 /* 787 * It is assumed that client->update_lock is held (unless we are in 788 * detection or initialization steps). This matters when PEC is enabled 789 * for chips with partial PEC support, because we don't want the address 790 * pointer to change between the write byte and the read byte transactions. 791 */ 792 static int lm90_read_reg(struct i2c_client *client, u8 reg) 793 { 794 struct lm90_data *data = i2c_get_clientdata(client); 795 bool partial_pec = (client->flags & I2C_CLIENT_PEC) && 796 (data->flags & LM90_HAVE_PARTIAL_PEC); 797 int err; 798 799 if (partial_pec) { 800 err = lm90_write_no_pec(client, reg); 801 if (err) 802 return err; 803 return i2c_smbus_read_byte(client); 804 } 805 return i2c_smbus_read_byte_data(client, reg); 806 } 807 808 /* 809 * Return register write address 810 * 811 * The write address for registers 0x03 .. 0x08 is the read address plus 6. 812 * For other registers the write address matches the read address. 813 */ 814 static u8 lm90_write_reg_addr(u8 reg) 815 { 816 if (reg >= LM90_REG_CONFIG1 && reg <= LM90_REG_REMOTE_LOWH) 817 return reg + 6; 818 return reg; 819 } 820 821 /* 822 * Write into LM90 register. 823 * Convert register address to write address if needed, then execute the 824 * operation. 825 */ 826 static int lm90_write_reg(struct i2c_client *client, u8 reg, u8 val) 827 { 828 return i2c_smbus_write_byte_data(client, lm90_write_reg_addr(reg), val); 829 } 830 831 /* 832 * Write into 16-bit LM90 register. 833 * Convert register addresses to write address if needed, then execute the 834 * operation. 835 */ 836 static int lm90_write16(struct i2c_client *client, u8 regh, u8 regl, u16 val) 837 { 838 int ret; 839 840 ret = lm90_write_reg(client, regh, val >> 8); 841 if (ret < 0 || !regl) 842 return ret; 843 return lm90_write_reg(client, regl, val & 0xff); 844 } 845 846 static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl, 847 bool is_volatile) 848 { 849 int oldh, newh, l; 850 851 oldh = lm90_read_reg(client, regh); 852 if (oldh < 0) 853 return oldh; 854 855 if (!regl) 856 return oldh << 8; 857 858 l = lm90_read_reg(client, regl); 859 if (l < 0) 860 return l; 861 862 if (!is_volatile) 863 return (oldh << 8) | l; 864 865 /* 866 * For volatile registers we have to use a trick. 867 * We have to read two registers to have the sensor temperature, 868 * but we have to beware a conversion could occur between the 869 * readings. The datasheet says we should either use 870 * the one-shot conversion register, which we don't want to do 871 * (disables hardware monitoring) or monitor the busy bit, which is 872 * impossible (we can't read the values and monitor that bit at the 873 * exact same time). So the solution used here is to read the high 874 * the high byte again. If the new high byte matches the old one, 875 * then we have a valid reading. Otherwise we have to read the low 876 * byte again, and now we believe we have a correct reading. 877 */ 878 newh = lm90_read_reg(client, regh); 879 if (newh < 0) 880 return newh; 881 if (oldh != newh) { 882 l = lm90_read_reg(client, regl); 883 if (l < 0) 884 return l; 885 } 886 return (newh << 8) | l; 887 } 888 889 static int lm90_update_confreg(struct lm90_data *data, u8 config) 890 { 891 if (data->config != config) { 892 int err; 893 894 err = lm90_write_reg(data->client, LM90_REG_CONFIG1, config); 895 if (err) 896 return err; 897 data->config = config; 898 } 899 return 0; 900 } 901 902 /* 903 * client->update_lock must be held when calling this function (unless we are 904 * in detection or initialization steps), and while a remote channel other 905 * than channel 0 is selected. Also, calling code must make sure to re-select 906 * external channel 0 before releasing the lock. This is necessary because 907 * various registers have different meanings as a result of selecting a 908 * non-default remote channel. 909 */ 910 static int lm90_select_remote_channel(struct lm90_data *data, bool second) 911 { 912 u8 config = data->config & ~0x08; 913 914 if (second) 915 config |= 0x08; 916 917 return lm90_update_confreg(data, config); 918 } 919 920 static int lm90_write_convrate(struct lm90_data *data, int val) 921 { 922 u8 config = data->config; 923 int err; 924 925 /* Save config and pause conversion */ 926 if (data->flags & LM90_PAUSE_FOR_CONFIG) { 927 err = lm90_update_confreg(data, config | 0x40); 928 if (err < 0) 929 return err; 930 } 931 932 /* Set conv rate */ 933 err = lm90_write_reg(data->client, LM90_REG_CONVRATE, val); 934 935 /* Revert change to config */ 936 lm90_update_confreg(data, config); 937 938 return err; 939 } 940 941 /* 942 * Set conversion rate. 943 * client->update_lock must be held when calling this function (unless we are 944 * in detection or initialization steps). 945 */ 946 static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data, 947 unsigned int interval) 948 { 949 unsigned int update_interval; 950 int i, err; 951 952 /* Shift calculations to avoid rounding errors */ 953 interval <<= 6; 954 955 /* find the nearest update rate */ 956 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6; 957 i < data->max_convrate; i++, update_interval >>= 1) 958 if (interval >= update_interval * 3 / 4) 959 break; 960 961 err = lm90_write_convrate(data, i); 962 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64); 963 return err; 964 } 965 966 static int lm90_set_faultqueue(struct i2c_client *client, 967 struct lm90_data *data, int val) 968 { 969 int err; 970 971 if (data->faultqueue_mask) { 972 err = lm90_update_confreg(data, val <= data->faultqueue_depth / 2 ? 973 data->config & ~data->faultqueue_mask : 974 data->config | data->faultqueue_mask); 975 } else { 976 static const u8 values[4] = {0, 2, 6, 0x0e}; 977 978 data->conalert = (data->conalert & 0xf1) | values[val - 1]; 979 err = lm90_write_reg(data->client, TMP451_REG_CONALERT, 980 data->conalert); 981 } 982 983 return err; 984 } 985 986 static int lm90_update_limits(struct device *dev) 987 { 988 struct lm90_data *data = dev_get_drvdata(dev); 989 struct i2c_client *client = data->client; 990 int val; 991 992 if (data->flags & LM90_HAVE_CRIT) { 993 val = lm90_read_reg(client, LM90_REG_LOCAL_CRIT); 994 if (val < 0) 995 return val; 996 data->temp[LOCAL_CRIT] = val << 8; 997 998 val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT); 999 if (val < 0) 1000 return val; 1001 data->temp[REMOTE_CRIT] = val << 8; 1002 1003 val = lm90_read_reg(client, LM90_REG_TCRIT_HYST); 1004 if (val < 0) 1005 return val; 1006 data->temp_hyst = val; 1007 } 1008 if ((data->flags & LM90_HAVE_FAULTQUEUE) && !data->faultqueue_mask) { 1009 val = lm90_read_reg(client, TMP451_REG_CONALERT); 1010 if (val < 0) 1011 return val; 1012 data->conalert = val; 1013 } 1014 1015 val = lm90_read16(client, LM90_REG_REMOTE_LOWH, 1016 (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_LOWL : 0, 1017 false); 1018 if (val < 0) 1019 return val; 1020 data->temp[REMOTE_LOW] = val; 1021 1022 val = lm90_read16(client, LM90_REG_REMOTE_HIGHH, 1023 (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_HIGHL : 0, 1024 false); 1025 if (val < 0) 1026 return val; 1027 data->temp[REMOTE_HIGH] = val; 1028 1029 if (data->flags & LM90_HAVE_OFFSET) { 1030 val = lm90_read16(client, LM90_REG_REMOTE_OFFSH, 1031 LM90_REG_REMOTE_OFFSL, false); 1032 if (val < 0) 1033 return val; 1034 data->temp[REMOTE_OFFSET] = val; 1035 } 1036 1037 if (data->flags & LM90_HAVE_EMERGENCY) { 1038 val = lm90_read_reg(client, MAX6659_REG_LOCAL_EMERG); 1039 if (val < 0) 1040 return val; 1041 data->temp[LOCAL_EMERG] = val << 8; 1042 1043 val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG); 1044 if (val < 0) 1045 return val; 1046 data->temp[REMOTE_EMERG] = val << 8; 1047 } 1048 1049 if (data->flags & LM90_HAVE_TEMP3) { 1050 val = lm90_select_remote_channel(data, true); 1051 if (val < 0) 1052 return val; 1053 1054 val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT); 1055 if (val < 0) 1056 return val; 1057 data->temp[REMOTE2_CRIT] = val << 8; 1058 1059 if (data->flags & LM90_HAVE_EMERGENCY) { 1060 val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG); 1061 if (val < 0) 1062 return val; 1063 data->temp[REMOTE2_EMERG] = val << 8; 1064 } 1065 1066 val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH); 1067 if (val < 0) 1068 return val; 1069 data->temp[REMOTE2_LOW] = val << 8; 1070 1071 val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH); 1072 if (val < 0) 1073 return val; 1074 data->temp[REMOTE2_HIGH] = val << 8; 1075 1076 if (data->flags & LM90_HAVE_OFFSET) { 1077 val = lm90_read16(client, LM90_REG_REMOTE_OFFSH, 1078 LM90_REG_REMOTE_OFFSL, false); 1079 if (val < 0) 1080 return val; 1081 data->temp[REMOTE2_OFFSET] = val; 1082 } 1083 1084 lm90_select_remote_channel(data, false); 1085 } 1086 1087 return 0; 1088 } 1089 1090 static void lm90_report_alarms(struct work_struct *work) 1091 { 1092 struct lm90_data *data = container_of(work, struct lm90_data, report_work); 1093 u16 cleared_alarms, new_alarms, current_alarms; 1094 struct device *hwmon_dev = data->hwmon_dev; 1095 struct device *dev = &data->client->dev; 1096 int st, st2; 1097 1098 current_alarms = data->current_alarms; 1099 cleared_alarms = data->reported_alarms & ~current_alarms; 1100 new_alarms = current_alarms & ~data->reported_alarms; 1101 1102 if (!cleared_alarms && !new_alarms) 1103 return; 1104 1105 st = new_alarms & 0xff; 1106 st2 = new_alarms >> 8; 1107 1108 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) || 1109 (st2 & MAX6696_STATUS2_LOT2)) 1110 dev_dbg(dev, "temp%d out of range, please check!\n", 1); 1111 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) || 1112 (st2 & MAX6696_STATUS2_ROT2)) 1113 dev_dbg(dev, "temp%d out of range, please check!\n", 2); 1114 if (st & LM90_STATUS_ROPEN) 1115 dev_dbg(dev, "temp%d diode open, please check!\n", 2); 1116 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH | 1117 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2)) 1118 dev_dbg(dev, "temp%d out of range, please check!\n", 3); 1119 if (st2 & MAX6696_STATUS2_R2OPEN) 1120 dev_dbg(dev, "temp%d diode open, please check!\n", 3); 1121 1122 st |= cleared_alarms & 0xff; 1123 st2 |= cleared_alarms >> 8; 1124 1125 if (st & LM90_STATUS_LLOW) 1126 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 0); 1127 if (st & LM90_STATUS_RLOW) 1128 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 1); 1129 if (st2 & MAX6696_STATUS2_R2LOW) 1130 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 2); 1131 1132 if (st & LM90_STATUS_LHIGH) 1133 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 0); 1134 if (st & LM90_STATUS_RHIGH) 1135 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 1); 1136 if (st2 & MAX6696_STATUS2_R2HIGH) 1137 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 2); 1138 1139 if (st & LM90_STATUS_LTHRM) 1140 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 0); 1141 if (st & LM90_STATUS_RTHRM) 1142 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 1); 1143 if (st2 & MAX6696_STATUS2_R2THRM) 1144 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 2); 1145 1146 if (st2 & MAX6696_STATUS2_LOT2) 1147 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 0); 1148 if (st2 & MAX6696_STATUS2_ROT2) 1149 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 1); 1150 if (st2 & MAX6696_STATUS2_R2OT2) 1151 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 2); 1152 1153 data->reported_alarms = current_alarms; 1154 } 1155 1156 static int lm90_update_alarms_locked(struct lm90_data *data, bool force) 1157 { 1158 if (data->shutdown) 1159 return 0; 1160 1161 if (force || !data->alarms_valid || 1162 time_after(jiffies, data->alarms_updated + msecs_to_jiffies(data->update_interval))) { 1163 struct i2c_client *client = data->client; 1164 bool check_enable; 1165 u16 alarms; 1166 int val; 1167 1168 data->alarms_valid = false; 1169 1170 val = lm90_read_reg(client, LM90_REG_STATUS); 1171 if (val < 0) 1172 return val; 1173 alarms = val & ~LM90_STATUS_BUSY; 1174 1175 if (data->reg_status2) { 1176 val = lm90_read_reg(client, data->reg_status2); 1177 if (val < 0) 1178 return val; 1179 alarms |= val << 8; 1180 } 1181 /* 1182 * If the update is forced (called from interrupt or alert 1183 * handler) and alarm data is valid, the alarms may have been 1184 * updated after the last update interval, and the status 1185 * register may still be cleared. Only add additional alarms 1186 * in this case. Alarms will be cleared later if appropriate. 1187 */ 1188 if (force && data->alarms_valid) 1189 data->current_alarms |= alarms; 1190 else 1191 data->current_alarms = alarms; 1192 data->alarms |= alarms; 1193 1194 check_enable = (client->irq || !(data->config_orig & 0x80)) && 1195 (data->config & 0x80); 1196 1197 if (force || check_enable) 1198 schedule_work(&data->report_work); 1199 1200 /* 1201 * Re-enable ALERT# output if it was originally enabled, relevant 1202 * alarms are all clear, and alerts are currently disabled. 1203 * Otherwise (re)schedule worker if needed. 1204 */ 1205 if (check_enable) { 1206 if (!(data->current_alarms & data->alert_alarms)) { 1207 dev_dbg(&client->dev, "Re-enabling ALERT#\n"); 1208 lm90_update_confreg(data, data->config & ~0x80); 1209 /* 1210 * We may have been called from the update handler. 1211 * If so, the worker, if scheduled, is no longer 1212 * needed. Cancel it. Don't synchronize because 1213 * it may already be running. 1214 */ 1215 cancel_delayed_work(&data->alert_work); 1216 } else { 1217 schedule_delayed_work(&data->alert_work, 1218 max_t(int, HZ, msecs_to_jiffies(data->update_interval))); 1219 } 1220 } 1221 data->alarms_updated = jiffies; 1222 data->alarms_valid = true; 1223 } 1224 return 0; 1225 } 1226 1227 static int lm90_update_alarms(struct lm90_data *data, bool force) 1228 { 1229 int err; 1230 1231 hwmon_lock(data->hwmon_dev); 1232 err = lm90_update_alarms_locked(data, force); 1233 hwmon_unlock(data->hwmon_dev); 1234 1235 return err; 1236 } 1237 1238 static void lm90_alert_work(struct work_struct *__work) 1239 { 1240 struct delayed_work *delayed_work = to_delayed_work(__work); 1241 struct lm90_data *data = container_of(delayed_work, struct lm90_data, alert_work); 1242 1243 /* Nothing to do if alerts are enabled */ 1244 if (!(data->config & 0x80)) 1245 return; 1246 1247 lm90_update_alarms(data, true); 1248 } 1249 1250 static int lm90_update_device(struct device *dev) 1251 { 1252 struct lm90_data *data = dev_get_drvdata(dev); 1253 struct i2c_client *client = data->client; 1254 unsigned long next_update; 1255 int val; 1256 1257 if (!data->valid) { 1258 val = lm90_update_limits(dev); 1259 if (val < 0) 1260 return val; 1261 } 1262 1263 next_update = data->last_updated + 1264 msecs_to_jiffies(data->update_interval); 1265 if (time_after(jiffies, next_update) || !data->valid) { 1266 dev_dbg(&client->dev, "Updating lm90 data.\n"); 1267 1268 data->valid = false; 1269 1270 val = lm90_read_reg(client, LM90_REG_LOCAL_LOW); 1271 if (val < 0) 1272 return val; 1273 data->temp[LOCAL_LOW] = val << 8; 1274 1275 val = lm90_read_reg(client, LM90_REG_LOCAL_HIGH); 1276 if (val < 0) 1277 return val; 1278 data->temp[LOCAL_HIGH] = val << 8; 1279 1280 val = lm90_read16(client, LM90_REG_LOCAL_TEMP, 1281 data->reg_local_ext, true); 1282 if (val < 0) 1283 return val; 1284 data->temp[LOCAL_TEMP] = val; 1285 val = lm90_read16(client, LM90_REG_REMOTE_TEMPH, 1286 data->reg_remote_ext, true); 1287 if (val < 0) 1288 return val; 1289 data->temp[REMOTE_TEMP] = val; 1290 1291 if (data->flags & LM90_HAVE_TEMP3) { 1292 val = lm90_select_remote_channel(data, true); 1293 if (val < 0) 1294 return val; 1295 1296 val = lm90_read16(client, LM90_REG_REMOTE_TEMPH, 1297 data->reg_remote_ext, true); 1298 if (val < 0) { 1299 lm90_select_remote_channel(data, false); 1300 return val; 1301 } 1302 data->temp[REMOTE2_TEMP] = val; 1303 1304 lm90_select_remote_channel(data, false); 1305 } 1306 1307 val = lm90_update_alarms_locked(data, false); 1308 if (val < 0) 1309 return val; 1310 1311 data->last_updated = jiffies; 1312 data->valid = true; 1313 } 1314 1315 return 0; 1316 } 1317 1318 static int lm90_temp_get_resolution(struct lm90_data *data, int index) 1319 { 1320 switch (index) { 1321 case REMOTE_TEMP: 1322 if (data->reg_remote_ext) 1323 return data->resolution; 1324 return 8; 1325 case REMOTE_OFFSET: 1326 case REMOTE2_OFFSET: 1327 case REMOTE2_TEMP: 1328 return data->resolution; 1329 case LOCAL_TEMP: 1330 if (data->reg_local_ext) 1331 return data->resolution; 1332 return 8; 1333 case REMOTE_LOW: 1334 case REMOTE_HIGH: 1335 case REMOTE2_LOW: 1336 case REMOTE2_HIGH: 1337 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) 1338 return data->resolution; 1339 return 8; 1340 default: 1341 return 8; 1342 } 1343 } 1344 1345 static int lm90_temp_from_reg(u32 flags, u16 regval, u8 resolution) 1346 { 1347 int val; 1348 1349 if (flags & LM90_HAVE_EXTENDED_TEMP) 1350 val = regval - 0x4000; 1351 else if (flags & (LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_EXT_UNSIGNED)) 1352 val = regval; 1353 else 1354 val = (s16)regval; 1355 1356 return ((val >> (16 - resolution)) * 1000) >> (resolution - 8); 1357 } 1358 1359 static int lm90_get_temp(struct lm90_data *data, int index, int channel) 1360 { 1361 int temp = lm90_temp_from_reg(data->flags, data->temp[index], 1362 lm90_temp_get_resolution(data, index)); 1363 1364 /* +16 degrees offset for remote temperature on LM99 */ 1365 if (data->kind == lm99 && channel) 1366 temp += 16000; 1367 1368 return temp; 1369 } 1370 1371 static u16 lm90_temp_to_reg(u32 flags, long val, u8 resolution) 1372 { 1373 int fraction = resolution > 8 ? 1374 1000 - DIV_ROUND_CLOSEST(1000, BIT(resolution - 8)) : 0; 1375 1376 if (flags & LM90_HAVE_EXTENDED_TEMP) { 1377 val = clamp_val(val, -64000, 191000 + fraction); 1378 val += 64000; 1379 } else if (flags & LM90_HAVE_EXT_UNSIGNED) { 1380 val = clamp_val(val, 0, 255000 + fraction); 1381 } else if (flags & LM90_HAVE_UNSIGNED_TEMP) { 1382 val = clamp_val(val, 0, 127000 + fraction); 1383 } else { 1384 val = clamp_val(val, -128000, 127000 + fraction); 1385 } 1386 1387 return DIV_ROUND_CLOSEST(val << (resolution - 8), 1000) << (16 - resolution); 1388 } 1389 1390 static int lm90_set_temp(struct lm90_data *data, int index, int channel, long val) 1391 { 1392 static const u8 regs[] = { 1393 [LOCAL_LOW] = LM90_REG_LOCAL_LOW, 1394 [LOCAL_HIGH] = LM90_REG_LOCAL_HIGH, 1395 [LOCAL_CRIT] = LM90_REG_LOCAL_CRIT, 1396 [REMOTE_CRIT] = LM90_REG_REMOTE_CRIT, 1397 [LOCAL_EMERG] = MAX6659_REG_LOCAL_EMERG, 1398 [REMOTE_EMERG] = MAX6659_REG_REMOTE_EMERG, 1399 [REMOTE2_CRIT] = LM90_REG_REMOTE_CRIT, 1400 [REMOTE2_EMERG] = MAX6659_REG_REMOTE_EMERG, 1401 [REMOTE_LOW] = LM90_REG_REMOTE_LOWH, 1402 [REMOTE_HIGH] = LM90_REG_REMOTE_HIGHH, 1403 [REMOTE2_LOW] = LM90_REG_REMOTE_LOWH, 1404 [REMOTE2_HIGH] = LM90_REG_REMOTE_HIGHH, 1405 }; 1406 struct i2c_client *client = data->client; 1407 u8 regh = regs[index]; 1408 u8 regl = 0; 1409 int err; 1410 1411 if (channel && (data->flags & LM90_HAVE_REM_LIMIT_EXT)) { 1412 if (index == REMOTE_LOW || index == REMOTE2_LOW) 1413 regl = LM90_REG_REMOTE_LOWL; 1414 else if (index == REMOTE_HIGH || index == REMOTE2_HIGH) 1415 regl = LM90_REG_REMOTE_HIGHL; 1416 } 1417 1418 /* +16 degrees offset for remote temperature on LM99 */ 1419 if (data->kind == lm99 && channel) { 1420 /* prevent integer underflow */ 1421 val = max(val, -128000l); 1422 val -= 16000; 1423 } 1424 1425 data->temp[index] = lm90_temp_to_reg(data->flags, val, 1426 lm90_temp_get_resolution(data, index)); 1427 1428 if (channel > 1) 1429 lm90_select_remote_channel(data, true); 1430 1431 err = lm90_write16(client, regh, regl, data->temp[index]); 1432 1433 if (channel > 1) 1434 lm90_select_remote_channel(data, false); 1435 1436 return err; 1437 } 1438 1439 static int lm90_get_temphyst(struct lm90_data *data, int index, int channel) 1440 { 1441 int temp = lm90_get_temp(data, index, channel); 1442 1443 return temp - data->temp_hyst * 1000; 1444 } 1445 1446 static int lm90_set_temphyst(struct lm90_data *data, long val) 1447 { 1448 int temp = lm90_get_temp(data, LOCAL_CRIT, 0); 1449 1450 /* prevent integer overflow/underflow */ 1451 val = clamp_val(val, -128000l, 255000l); 1452 data->temp_hyst = clamp_val(DIV_ROUND_CLOSEST(temp - val, 1000), 0, 31); 1453 1454 return lm90_write_reg(data->client, LM90_REG_TCRIT_HYST, data->temp_hyst); 1455 } 1456 1457 static int lm90_get_temp_offset(struct lm90_data *data, int index) 1458 { 1459 int res = lm90_temp_get_resolution(data, index); 1460 1461 return lm90_temp_from_reg(0, data->temp[index], res); 1462 } 1463 1464 static int lm90_set_temp_offset(struct lm90_data *data, int index, int channel, long val) 1465 { 1466 int err; 1467 1468 val = lm90_temp_to_reg(0, val, lm90_temp_get_resolution(data, index)); 1469 1470 /* For ADT7481 we can use the same registers for remote channel 1 and 2 */ 1471 if (channel > 1) 1472 lm90_select_remote_channel(data, true); 1473 1474 err = lm90_write16(data->client, LM90_REG_REMOTE_OFFSH, LM90_REG_REMOTE_OFFSL, val); 1475 1476 if (channel > 1) 1477 lm90_select_remote_channel(data, false); 1478 1479 if (err) 1480 return err; 1481 1482 data->temp[index] = val; 1483 1484 return 0; 1485 } 1486 1487 static const u8 lm90_temp_index[MAX_CHANNELS] = { 1488 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP 1489 }; 1490 1491 static const u8 lm90_temp_min_index[MAX_CHANNELS] = { 1492 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW 1493 }; 1494 1495 static const u8 lm90_temp_max_index[MAX_CHANNELS] = { 1496 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH 1497 }; 1498 1499 static const u8 lm90_temp_crit_index[MAX_CHANNELS] = { 1500 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT 1501 }; 1502 1503 static const u8 lm90_temp_emerg_index[MAX_CHANNELS] = { 1504 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG 1505 }; 1506 1507 static const s8 lm90_temp_offset_index[MAX_CHANNELS] = { 1508 -1, REMOTE_OFFSET, REMOTE2_OFFSET 1509 }; 1510 1511 static const u16 lm90_min_alarm_bits[MAX_CHANNELS] = { BIT(5), BIT(3), BIT(11) }; 1512 static const u16 lm90_max_alarm_bits[MAX_CHANNELS] = { BIT(6), BIT(4), BIT(12) }; 1513 static const u16 lm90_crit_alarm_bits[MAX_CHANNELS] = { BIT(0), BIT(1), BIT(9) }; 1514 static const u16 lm90_crit_alarm_bits_swapped[MAX_CHANNELS] = { BIT(1), BIT(0), BIT(9) }; 1515 static const u16 lm90_emergency_alarm_bits[MAX_CHANNELS] = { BIT(15), BIT(13), BIT(14) }; 1516 static const u16 lm90_fault_bits[MAX_CHANNELS] = { BIT(0), BIT(2), BIT(10) }; 1517 1518 static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val) 1519 { 1520 struct lm90_data *data = dev_get_drvdata(dev); 1521 int err; 1522 u16 bit; 1523 1524 err = lm90_update_device(dev); 1525 if (err) 1526 return err; 1527 1528 switch (attr) { 1529 case hwmon_temp_input: 1530 *val = lm90_get_temp(data, lm90_temp_index[channel], channel); 1531 break; 1532 case hwmon_temp_min_alarm: 1533 case hwmon_temp_max_alarm: 1534 case hwmon_temp_crit_alarm: 1535 case hwmon_temp_emergency_alarm: 1536 case hwmon_temp_fault: 1537 switch (attr) { 1538 case hwmon_temp_min_alarm: 1539 bit = lm90_min_alarm_bits[channel]; 1540 break; 1541 case hwmon_temp_max_alarm: 1542 bit = lm90_max_alarm_bits[channel]; 1543 break; 1544 case hwmon_temp_crit_alarm: 1545 if (data->flags & LM90_HAVE_CRIT_ALRM_SWP) 1546 bit = lm90_crit_alarm_bits_swapped[channel]; 1547 else 1548 bit = lm90_crit_alarm_bits[channel]; 1549 break; 1550 case hwmon_temp_emergency_alarm: 1551 bit = lm90_emergency_alarm_bits[channel]; 1552 break; 1553 case hwmon_temp_fault: 1554 bit = lm90_fault_bits[channel]; 1555 break; 1556 } 1557 *val = !!(data->alarms & bit); 1558 data->alarms &= ~bit; 1559 data->alarms |= data->current_alarms; 1560 break; 1561 case hwmon_temp_min: 1562 *val = lm90_get_temp(data, lm90_temp_min_index[channel], channel); 1563 break; 1564 case hwmon_temp_max: 1565 *val = lm90_get_temp(data, lm90_temp_max_index[channel], channel); 1566 break; 1567 case hwmon_temp_crit: 1568 *val = lm90_get_temp(data, lm90_temp_crit_index[channel], channel); 1569 break; 1570 case hwmon_temp_crit_hyst: 1571 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel], channel); 1572 break; 1573 case hwmon_temp_emergency: 1574 *val = lm90_get_temp(data, lm90_temp_emerg_index[channel], channel); 1575 break; 1576 case hwmon_temp_emergency_hyst: 1577 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel], channel); 1578 break; 1579 case hwmon_temp_offset: 1580 *val = lm90_get_temp_offset(data, lm90_temp_offset_index[channel]); 1581 break; 1582 default: 1583 return -EOPNOTSUPP; 1584 } 1585 return 0; 1586 } 1587 1588 static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val) 1589 { 1590 struct lm90_data *data = dev_get_drvdata(dev); 1591 int err; 1592 1593 err = lm90_update_device(dev); 1594 if (err) 1595 return err; 1596 1597 switch (attr) { 1598 case hwmon_temp_min: 1599 err = lm90_set_temp(data, lm90_temp_min_index[channel], 1600 channel, val); 1601 break; 1602 case hwmon_temp_max: 1603 err = lm90_set_temp(data, lm90_temp_max_index[channel], 1604 channel, val); 1605 break; 1606 case hwmon_temp_crit: 1607 err = lm90_set_temp(data, lm90_temp_crit_index[channel], 1608 channel, val); 1609 break; 1610 case hwmon_temp_crit_hyst: 1611 err = lm90_set_temphyst(data, val); 1612 break; 1613 case hwmon_temp_emergency: 1614 err = lm90_set_temp(data, lm90_temp_emerg_index[channel], 1615 channel, val); 1616 break; 1617 case hwmon_temp_offset: 1618 err = lm90_set_temp_offset(data, lm90_temp_offset_index[channel], 1619 channel, val); 1620 break; 1621 default: 1622 err = -EOPNOTSUPP; 1623 break; 1624 } 1625 return err; 1626 } 1627 1628 static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel) 1629 { 1630 switch (attr) { 1631 case hwmon_temp_input: 1632 case hwmon_temp_min_alarm: 1633 case hwmon_temp_max_alarm: 1634 case hwmon_temp_crit_alarm: 1635 case hwmon_temp_emergency_alarm: 1636 case hwmon_temp_emergency_hyst: 1637 case hwmon_temp_fault: 1638 case hwmon_temp_label: 1639 return 0444; 1640 case hwmon_temp_min: 1641 case hwmon_temp_max: 1642 case hwmon_temp_crit: 1643 case hwmon_temp_emergency: 1644 case hwmon_temp_offset: 1645 return 0644; 1646 case hwmon_temp_crit_hyst: 1647 if (channel == 0) 1648 return 0644; 1649 return 0444; 1650 default: 1651 return 0; 1652 } 1653 } 1654 1655 static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val) 1656 { 1657 struct lm90_data *data = dev_get_drvdata(dev); 1658 int err; 1659 1660 err = lm90_update_device(dev); 1661 if (err) 1662 return err; 1663 1664 switch (attr) { 1665 case hwmon_chip_update_interval: 1666 *val = data->update_interval; 1667 break; 1668 case hwmon_chip_alarms: 1669 *val = data->alarms; 1670 break; 1671 case hwmon_chip_temp_samples: 1672 if (data->faultqueue_mask) { 1673 *val = (data->config & data->faultqueue_mask) ? 1674 data->faultqueue_depth : 1; 1675 } else { 1676 switch (data->conalert & 0x0e) { 1677 case 0x0: 1678 default: 1679 *val = 1; 1680 break; 1681 case 0x2: 1682 *val = 2; 1683 break; 1684 case 0x6: 1685 *val = 3; 1686 break; 1687 case 0xe: 1688 *val = 4; 1689 break; 1690 } 1691 } 1692 break; 1693 default: 1694 return -EOPNOTSUPP; 1695 } 1696 1697 return 0; 1698 } 1699 1700 static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val) 1701 { 1702 struct lm90_data *data = dev_get_drvdata(dev); 1703 struct i2c_client *client = data->client; 1704 int err; 1705 1706 err = lm90_update_device(dev); 1707 if (err) 1708 return err; 1709 1710 switch (attr) { 1711 case hwmon_chip_update_interval: 1712 err = lm90_set_convrate(client, data, 1713 clamp_val(val, 0, 100000)); 1714 break; 1715 case hwmon_chip_temp_samples: 1716 err = lm90_set_faultqueue(client, data, clamp_val(val, 1, 4)); 1717 break; 1718 default: 1719 err = -EOPNOTSUPP; 1720 break; 1721 } 1722 return err; 1723 } 1724 1725 static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel) 1726 { 1727 switch (attr) { 1728 case hwmon_chip_update_interval: 1729 case hwmon_chip_temp_samples: 1730 return 0644; 1731 case hwmon_chip_alarms: 1732 return 0444; 1733 default: 1734 return 0; 1735 } 1736 } 1737 1738 static int lm90_read(struct device *dev, enum hwmon_sensor_types type, 1739 u32 attr, int channel, long *val) 1740 { 1741 switch (type) { 1742 case hwmon_chip: 1743 return lm90_chip_read(dev, attr, channel, val); 1744 case hwmon_temp: 1745 return lm90_temp_read(dev, attr, channel, val); 1746 default: 1747 return -EOPNOTSUPP; 1748 } 1749 } 1750 1751 static int lm90_read_string(struct device *dev, enum hwmon_sensor_types type, 1752 u32 attr, int channel, const char **str) 1753 { 1754 struct lm90_data *data = dev_get_drvdata(dev); 1755 1756 *str = data->channel_label[channel]; 1757 1758 return 0; 1759 } 1760 1761 static int lm90_write(struct device *dev, enum hwmon_sensor_types type, 1762 u32 attr, int channel, long val) 1763 { 1764 switch (type) { 1765 case hwmon_chip: 1766 return lm90_chip_write(dev, attr, channel, val); 1767 case hwmon_temp: 1768 return lm90_temp_write(dev, attr, channel, val); 1769 default: 1770 return -EOPNOTSUPP; 1771 } 1772 } 1773 1774 static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type, 1775 u32 attr, int channel) 1776 { 1777 switch (type) { 1778 case hwmon_chip: 1779 return lm90_chip_is_visible(data, attr, channel); 1780 case hwmon_temp: 1781 return lm90_temp_is_visible(data, attr, channel); 1782 default: 1783 return 0; 1784 } 1785 } 1786 1787 static const char *lm90_detect_lm84(struct i2c_client *client) 1788 { 1789 static const u8 regs[] = { 1790 LM90_REG_STATUS, LM90_REG_LOCAL_TEMP, LM90_REG_LOCAL_HIGH, 1791 LM90_REG_REMOTE_TEMPH, LM90_REG_REMOTE_HIGHH 1792 }; 1793 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS); 1794 int reg1, reg2, reg3, reg4; 1795 bool nonzero = false; 1796 u8 ff = 0xff; 1797 int i; 1798 1799 if (status < 0 || (status & 0xab)) 1800 return NULL; 1801 1802 /* 1803 * For LM84, undefined registers return the most recent value. 1804 * Repeat several times, each time checking against a different 1805 * (presumably) existing register. 1806 */ 1807 for (i = 0; i < ARRAY_SIZE(regs); i++) { 1808 reg1 = i2c_smbus_read_byte_data(client, regs[i]); 1809 reg2 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL); 1810 reg3 = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW); 1811 reg4 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH); 1812 1813 if (reg1 < 0) 1814 return NULL; 1815 1816 /* If any register has a different value, this is not an LM84 */ 1817 if (reg2 != reg1 || reg3 != reg1 || reg4 != reg1) 1818 return NULL; 1819 1820 nonzero |= reg1 || reg2 || reg3 || reg4; 1821 ff &= reg1; 1822 } 1823 /* 1824 * If all registers always returned 0 or 0xff, all bets are off, 1825 * and we can not make any predictions about the chip type. 1826 */ 1827 return nonzero && ff != 0xff ? "lm84" : NULL; 1828 } 1829 1830 static const char *lm90_detect_max1617(struct i2c_client *client, int config1) 1831 { 1832 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS); 1833 int llo, rlo, lhi, rhi; 1834 1835 if (status < 0 || (status & 0x03)) 1836 return NULL; 1837 1838 if (config1 & 0x3f) 1839 return NULL; 1840 1841 /* 1842 * Fail if unsupported registers return anything but 0xff. 1843 * The calling code already checked man_id and chip_id. 1844 * A byte read operation repeats the most recent read operation 1845 * and should also return 0xff. 1846 */ 1847 if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) != 0xff || 1848 i2c_smbus_read_byte_data(client, MAX6657_REG_LOCAL_TEMPL) != 0xff || 1849 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWL) != 0xff || 1850 i2c_smbus_read_byte(client) != 0xff) 1851 return NULL; 1852 1853 llo = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW); 1854 rlo = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH); 1855 1856 lhi = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH); 1857 rhi = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_HIGHH); 1858 1859 if (llo < 0 || rlo < 0) 1860 return NULL; 1861 1862 /* 1863 * A byte read operation repeats the most recent read and should 1864 * return the same value. 1865 */ 1866 if (i2c_smbus_read_byte(client) != rhi) 1867 return NULL; 1868 1869 /* 1870 * The following two checks are marginal since the checked values 1871 * are strictly speaking valid. 1872 */ 1873 1874 /* fail for negative high limits; this also catches read errors */ 1875 if ((s8)lhi < 0 || (s8)rhi < 0) 1876 return NULL; 1877 1878 /* fail if low limits are larger than or equal to high limits */ 1879 if ((s8)llo >= lhi || (s8)rlo >= rhi) 1880 return NULL; 1881 1882 if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) { 1883 /* 1884 * Word read operations return 0xff in second byte 1885 */ 1886 if (i2c_smbus_read_word_data(client, LM90_REG_REMOTE_TEMPL) != 1887 0xffff) 1888 return NULL; 1889 if (i2c_smbus_read_word_data(client, LM90_REG_CONFIG1) != 1890 (config1 | 0xff00)) 1891 return NULL; 1892 if (i2c_smbus_read_word_data(client, LM90_REG_LOCAL_HIGH) != 1893 (lhi | 0xff00)) 1894 return NULL; 1895 } 1896 1897 return "max1617"; 1898 } 1899 1900 static const char *lm90_detect_national(struct i2c_client *client, int chip_id, 1901 int config1, int convrate) 1902 { 1903 int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); 1904 int address = client->addr; 1905 const char *name = NULL; 1906 1907 if (config2 < 0) 1908 return NULL; 1909 1910 if ((config1 & 0x2a) || (config2 & 0xf8) || convrate > 0x09) 1911 return NULL; 1912 1913 if (address != 0x4c && address != 0x4d) 1914 return NULL; 1915 1916 switch (chip_id & 0xf0) { 1917 case 0x10: /* LM86 */ 1918 if (address == 0x4c) 1919 name = "lm86"; 1920 break; 1921 case 0x20: /* LM90 */ 1922 if (address == 0x4c) 1923 name = "lm90"; 1924 break; 1925 case 0x30: /* LM89/LM99 */ 1926 name = "lm99"; /* detect LM89 as LM99 */ 1927 break; 1928 default: 1929 break; 1930 } 1931 1932 return name; 1933 } 1934 1935 static const char *lm90_detect_on(struct i2c_client *client, int chip_id, int config1, 1936 int convrate) 1937 { 1938 int address = client->addr; 1939 const char *name = NULL; 1940 1941 switch (chip_id) { 1942 case 0xca: /* NCT218 */ 1943 if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && 1944 convrate <= 0x0a) 1945 name = "nct218"; 1946 break; 1947 default: 1948 break; 1949 } 1950 return name; 1951 } 1952 1953 static const char *lm90_detect_analog(struct i2c_client *client, bool common_address, 1954 int chip_id, int config1, int convrate) 1955 { 1956 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS); 1957 int config2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CONFIG2); 1958 int man_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_MAN_ID); 1959 int chip_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CHIP_ID); 1960 int address = client->addr; 1961 const char *name = NULL; 1962 1963 if (status < 0 || config2 < 0 || man_id2 < 0 || chip_id2 < 0) 1964 return NULL; 1965 1966 /* 1967 * The following chips should be detected by this function. Known 1968 * register values are listed. Registers 0x3d .. 0x3e are undocumented 1969 * for most of the chips, yet appear to return a well defined value. 1970 * Register 0xff is undocumented for some of the chips. Register 0x3f 1971 * is undocumented for all chips, but also returns a well defined value. 1972 * Values are as reported from real chips unless mentioned otherwise. 1973 * The code below checks values for registers 0x3d, 0x3e, and 0xff, 1974 * but not for register 0x3f. 1975 * 1976 * Chip Register 1977 * 3d 3e 3f fe ff Notes 1978 * ---------------------------------------------------------- 1979 * adm1020 00 00 00 41 39 1980 * adm1021 00 00 00 41 03 1981 * adm1021a 00 00 00 41 3c 1982 * adm1023 00 00 00 41 3c same as adm1021a 1983 * adm1032 00 00 00 41 42 1984 * 1985 * adt7421 21 41 04 41 04 1986 * adt7461 00 00 00 41 51 1987 * adt7461a 61 41 05 41 57 1988 * adt7481 81 41 02 41 62 1989 * adt7482 - - - 41 65 datasheet 1990 * 82 41 05 41 75 real chip 1991 * adt7483 83 41 04 41 94 1992 * 1993 * nct72 61 41 07 41 55 1994 * nct210 00 00 00 41 3f 1995 * nct214 61 41 08 41 5a 1996 * nct1008 - - - 41 57 datasheet rev. 3 1997 * 61 41 06 41 54 real chip 1998 * 1999 * nvt210 - - - 41 - datasheet 2000 * nvt211 - - - 41 - datasheet 2001 */ 2002 switch (chip_id) { 2003 case 0x00 ... 0x03: /* ADM1021 */ 2004 case 0x05 ... 0x0f: 2005 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address && 2006 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) 2007 name = "adm1021"; 2008 break; 2009 case 0x04: /* ADT7421 (undocumented) */ 2010 if (man_id2 == 0x41 && chip_id2 == 0x21 && 2011 (address == 0x4c || address == 0x4d) && 2012 (config1 & 0x0b) == 0x08 && convrate <= 0x0a) 2013 name = "adt7421"; 2014 break; 2015 case 0x30 ... 0x38: /* ADM1021A, ADM1023 */ 2016 case 0x3a ... 0x3e: 2017 /* 2018 * ADM1021A and compatible chips will be mis-detected as 2019 * ADM1023. Chips labeled 'ADM1021A' and 'ADM1023' were both 2020 * found to have a Chip ID of 0x3c. 2021 * ADM1021A does not officially support low byte registers 2022 * (0x12 .. 0x14), but a chip labeled ADM1021A does support it. 2023 * Official support for the temperature offset high byte 2024 * register (0x11) was added to revision F of the ADM1021A 2025 * datasheet. 2026 * It is currently unknown if there is a means to distinguish 2027 * ADM1021A from ADM1023, and/or if revisions of ADM1021A exist 2028 * which differ in functionality from ADM1023. 2029 */ 2030 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address && 2031 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) 2032 name = "adm1023"; 2033 break; 2034 case 0x39: /* ADM1020 (undocumented) */ 2035 if (man_id2 == 0x00 && chip_id2 == 0x00 && 2036 (address == 0x4c || address == 0x4d || address == 0x4e) && 2037 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) 2038 name = "adm1020"; 2039 break; 2040 case 0x3f: /* NCT210 */ 2041 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address && 2042 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) 2043 name = "nct210"; 2044 break; 2045 case 0x40 ... 0x4f: /* ADM1032 */ 2046 if (man_id2 == 0x00 && chip_id2 == 0x00 && 2047 (address == 0x4c || address == 0x4d) && !(config1 & 0x3f) && 2048 convrate <= 0x0a) 2049 name = "adm1032"; 2050 break; 2051 case 0x51: /* ADT7461 */ 2052 if (man_id2 == 0x00 && chip_id2 == 0x00 && 2053 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && 2054 convrate <= 0x0a) 2055 name = "adt7461"; 2056 break; 2057 case 0x54: /* NCT1008 */ 2058 if (man_id2 == 0x41 && chip_id2 == 0x61 && 2059 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && 2060 convrate <= 0x0a) 2061 name = "nct1008"; 2062 break; 2063 case 0x55: /* NCT72 */ 2064 if (man_id2 == 0x41 && chip_id2 == 0x61 && 2065 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && 2066 convrate <= 0x0a) 2067 name = "nct72"; 2068 break; 2069 case 0x57: /* ADT7461A, NCT1008 (datasheet rev. 3) */ 2070 if (man_id2 == 0x41 && chip_id2 == 0x61 && 2071 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && 2072 convrate <= 0x0a) 2073 name = "adt7461a"; 2074 break; 2075 case 0x5a: /* NCT214 */ 2076 if (man_id2 == 0x41 && chip_id2 == 0x61 && 2077 common_address && !(config1 & 0x1b) && convrate <= 0x0a) 2078 name = "nct214"; 2079 break; 2080 case 0x62: /* ADT7481, undocumented */ 2081 if (man_id2 == 0x41 && chip_id2 == 0x81 && 2082 (address == 0x4b || address == 0x4c) && !(config1 & 0x10) && 2083 !(config2 & 0x7f) && (convrate & 0x0f) <= 0x0b) { 2084 name = "adt7481"; 2085 } 2086 break; 2087 case 0x65: /* ADT7482, datasheet */ 2088 case 0x75: /* ADT7482, real chip */ 2089 if (man_id2 == 0x41 && chip_id2 == 0x82 && 2090 address == 0x4c && !(config1 & 0x10) && !(config2 & 0x7f) && 2091 convrate <= 0x0a) 2092 name = "adt7482"; 2093 break; 2094 case 0x94: /* ADT7483 */ 2095 if (man_id2 == 0x41 && chip_id2 == 0x83 && 2096 common_address && 2097 ((address >= 0x18 && address <= 0x1a) || 2098 (address >= 0x29 && address <= 0x2b) || 2099 (address >= 0x4c && address <= 0x4e)) && 2100 !(config1 & 0x10) && !(config2 & 0x7f) && convrate <= 0x0a) 2101 name = "adt7483a"; 2102 break; 2103 default: 2104 break; 2105 } 2106 2107 return name; 2108 } 2109 2110 static const char *lm90_detect_maxim(struct i2c_client *client, bool common_address, 2111 int chip_id, int config1, int convrate) 2112 { 2113 int man_id, emerg, emerg2, status2; 2114 int address = client->addr; 2115 const char *name = NULL; 2116 2117 switch (chip_id) { 2118 case 0x01: 2119 if (!common_address) 2120 break; 2121 2122 /* 2123 * We read MAX6659_REG_REMOTE_EMERG twice, and re-read 2124 * LM90_REG_MAN_ID in between. If MAX6659_REG_REMOTE_EMERG 2125 * exists, both readings will reflect the same value. Otherwise, 2126 * the readings will be different. 2127 */ 2128 emerg = i2c_smbus_read_byte_data(client, 2129 MAX6659_REG_REMOTE_EMERG); 2130 man_id = i2c_smbus_read_byte_data(client, 2131 LM90_REG_MAN_ID); 2132 emerg2 = i2c_smbus_read_byte_data(client, 2133 MAX6659_REG_REMOTE_EMERG); 2134 status2 = i2c_smbus_read_byte_data(client, 2135 MAX6696_REG_STATUS2); 2136 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0) 2137 return NULL; 2138 2139 /* 2140 * Even though MAX6695 and MAX6696 do not have a chip ID 2141 * register, reading it returns 0x01. Bit 4 of the config1 2142 * register is unused and should return zero when read. Bit 0 of 2143 * the status2 register is unused and should return zero when 2144 * read. 2145 * 2146 * MAX6695 and MAX6696 have an additional set of temperature 2147 * limit registers. We can detect those chips by checking if 2148 * one of those registers exists. 2149 */ 2150 if (!(config1 & 0x10) && !(status2 & 0x01) && emerg == emerg2 && 2151 convrate <= 0x07) 2152 name = "max6696"; 2153 /* 2154 * The chip_id register of the MAX6680 and MAX6681 holds the 2155 * revision of the chip. The lowest bit of the config1 register 2156 * is unused and should return zero when read, so should the 2157 * second to last bit of config1 (software reset). Register 2158 * address 0x12 (LM90_REG_REMOTE_OFFSL) exists for this chip and 2159 * should differ from emerg2, and emerg2 should match man_id 2160 * since it does not exist. 2161 */ 2162 else if (!(config1 & 0x03) && convrate <= 0x07 && 2163 emerg2 == man_id && emerg2 != status2) 2164 name = "max6680"; 2165 /* 2166 * MAX1617A does not have any extended registers (register 2167 * address 0x10 or higher) except for manufacturer and 2168 * device ID registers. Unlike other chips of this series, 2169 * unsupported registers were observed to return a fixed value 2170 * of 0x01. 2171 * Note: Multiple chips with different markings labeled as 2172 * "MAX1617" (no "A") were observed to report manufacturer ID 2173 * 0x4d and device ID 0x01. It is unknown if other variants of 2174 * MAX1617/MAX617A with different behavior exist. The detection 2175 * code below works for those chips. 2176 */ 2177 else if (!(config1 & 0x03f) && convrate <= 0x07 && 2178 emerg == 0x01 && emerg2 == 0x01 && status2 == 0x01) 2179 name = "max1617"; 2180 break; 2181 case 0x08: 2182 /* 2183 * The chip_id of the MAX6654 holds the revision of the chip. 2184 * The lowest 3 bits of the config1 register are unused and 2185 * should return zero when read. 2186 */ 2187 if (common_address && !(config1 & 0x07) && convrate <= 0x07) 2188 name = "max6654"; 2189 break; 2190 case 0x09: 2191 /* 2192 * The chip_id of the MAX6690 holds the revision of the chip. 2193 * The lowest 3 bits of the config1 register are unused and 2194 * should return zero when read. 2195 * Note that MAX6654 and MAX6690 are practically the same chips. 2196 * The only diference is the rated accuracy. Rev. 1 of the 2197 * MAX6690 datasheet lists a chip ID of 0x08, and a chip labeled 2198 * MAX6654 was observed to have a chip ID of 0x09. 2199 */ 2200 if (common_address && !(config1 & 0x07) && convrate <= 0x07) 2201 name = "max6690"; 2202 break; 2203 case 0x4d: 2204 /* 2205 * MAX6642, MAX6657, MAX6658 and MAX6659 do NOT have a chip_id 2206 * register. Reading from that address will return the last 2207 * read value, which in our case is those of the man_id 2208 * register, or 0x4d. 2209 * MAX6642 does not have a conversion rate register, nor low 2210 * limit registers. Reading from those registers returns the 2211 * last read value. 2212 * 2213 * For MAX6657, MAX6658 and MAX6659, the config1 register lacks 2214 * a low nibble, so the value will be those of the previous 2215 * read, so in our case again those of the man_id register. 2216 * MAX6659 has a third set of upper temperature limit registers. 2217 * Those registers also return values on MAX6657 and MAX6658, 2218 * thus the only way to detect MAX6659 is by its address. 2219 * For this reason it will be mis-detected as MAX6657 if its 2220 * address is 0x4c. 2221 */ 2222 if (address >= 0x48 && address <= 0x4f && config1 == convrate && 2223 !(config1 & 0x0f)) { 2224 int regval; 2225 2226 /* 2227 * We know that this is not a MAX6657/58/59 because its 2228 * configuration register has the wrong value and it does 2229 * not appear to have a conversion rate register. 2230 */ 2231 2232 /* re-read manufacturer ID to have a good baseline */ 2233 if (i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID) != 0x4d) 2234 break; 2235 2236 /* check various non-existing registers */ 2237 if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != 0x4d || 2238 i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != 0x4d || 2239 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != 0x4d) 2240 break; 2241 2242 /* check for unused status register bits */ 2243 regval = i2c_smbus_read_byte_data(client, LM90_REG_STATUS); 2244 if (regval < 0 || (regval & 0x2b)) 2245 break; 2246 2247 /* re-check unsupported registers */ 2248 if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != regval || 2249 i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != regval || 2250 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != regval) 2251 break; 2252 2253 name = "max6642"; 2254 } else if ((address == 0x4c || address == 0x4d || address == 0x4e) && 2255 (config1 & 0x1f) == 0x0d && convrate <= 0x09) { 2256 if (address == 0x4c) 2257 name = "max6657"; 2258 else 2259 name = "max6659"; 2260 } 2261 break; 2262 case 0x59: 2263 /* 2264 * The chip_id register of the MAX6646/6647/6649 holds the 2265 * revision of the chip. The lowest 6 bits of the config1 2266 * register are unused and should return zero when read. 2267 * The I2C address of MAX6648/6692 is fixed at 0x4c. 2268 * MAX6646 is at address 0x4d, MAX6647 is at address 0x4e, 2269 * and MAX6649 is at address 0x4c. A slight difference between 2270 * the two sets of chips is that the remote temperature register 2271 * reports different values if the DXP pin is open or shorted. 2272 * We can use that information to help distinguish between the 2273 * chips. MAX6648 will be mis-detected as MAX6649 if the remote 2274 * diode is connected, but there isn't really anything we can 2275 * do about that. 2276 */ 2277 if (!(config1 & 0x3f) && convrate <= 0x07) { 2278 int temp; 2279 2280 switch (address) { 2281 case 0x4c: 2282 /* 2283 * MAX6649 reports an external temperature 2284 * value of 0xff if DXP is open or shorted. 2285 * MAX6648 reports 0x80 in that case. 2286 */ 2287 temp = i2c_smbus_read_byte_data(client, 2288 LM90_REG_REMOTE_TEMPH); 2289 if (temp == 0x80) 2290 name = "max6648"; 2291 else 2292 name = "max6649"; 2293 break; 2294 case 0x4d: 2295 name = "max6646"; 2296 break; 2297 case 0x4e: 2298 name = "max6647"; 2299 break; 2300 default: 2301 break; 2302 } 2303 } 2304 break; 2305 default: 2306 break; 2307 } 2308 2309 return name; 2310 } 2311 2312 static const char *lm90_detect_nuvoton(struct i2c_client *client, int chip_id, 2313 int config1, int convrate) 2314 { 2315 int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); 2316 int address = client->addr; 2317 const char *name = NULL; 2318 2319 if (config2 < 0) 2320 return NULL; 2321 2322 if (address == 0x4c && !(config1 & 0x2a) && !(config2 & 0xf8)) { 2323 if (chip_id == 0x01 && convrate <= 0x09) { 2324 /* W83L771W/G */ 2325 name = "w83l771"; 2326 } else if ((chip_id & 0xfe) == 0x10 && convrate <= 0x08) { 2327 /* W83L771AWG/ASG */ 2328 name = "w83l771"; 2329 } 2330 } 2331 return name; 2332 } 2333 2334 static const char *lm90_detect_nuvoton_50(struct i2c_client *client, int chip_id, 2335 int config1, int convrate) 2336 { 2337 int chip_id2 = i2c_smbus_read_byte_data(client, NCT7716_REG_CHIP_ID); 2338 int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); 2339 int address = client->addr; 2340 const char *name = NULL; 2341 2342 if (chip_id2 < 0 || config2 < 0) 2343 return NULL; 2344 2345 if (chip_id2 != 0x50 || convrate > 0x08) 2346 return NULL; 2347 2348 switch (chip_id) { 2349 case 0x90: 2350 if (address == 0x48 && !(config1 & 0x3e) && !(config2 & 0xfe)) 2351 name = "nct7717"; 2352 break; 2353 case 0x91: 2354 if ((address == 0x48 || address == 0x49) && !(config1 & 0x3e) && 2355 !(config2 & 0xfe)) 2356 name = "nct7716"; 2357 else if (address == 0x4c && !(config1 & 0x38) && !(config2 & 0xf8)) 2358 name = "nct7718"; 2359 break; 2360 default: 2361 break; 2362 } 2363 return name; 2364 } 2365 2366 static const char *lm90_detect_nxp(struct i2c_client *client, bool common_address, 2367 int chip_id, int config1, int convrate) 2368 { 2369 int address = client->addr; 2370 const char *name = NULL; 2371 int config2; 2372 2373 switch (chip_id) { 2374 case 0x00: 2375 config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); 2376 if (config2 < 0) 2377 return NULL; 2378 if (address >= 0x48 && address <= 0x4f && 2379 !(config1 & 0x2a) && !(config2 & 0xfe) && convrate <= 0x09) 2380 name = "sa56004"; 2381 break; 2382 case 0x80: 2383 if (common_address && !(config1 & 0x3f) && convrate <= 0x07) 2384 name = "ne1618"; 2385 break; 2386 default: 2387 break; 2388 } 2389 return name; 2390 } 2391 2392 static const char *lm90_detect_gmt(struct i2c_client *client, int chip_id, 2393 int config1, int convrate) 2394 { 2395 int address = client->addr; 2396 2397 /* 2398 * According to the datasheet, G781 is supposed to be at I2C Address 2399 * 0x4c and have a chip ID of 0x01. G781-1 is supposed to be at I2C 2400 * address 0x4d and have a chip ID of 0x03. However, when support 2401 * for G781 was added, chips at 0x4c and 0x4d were found to have a 2402 * chip ID of 0x01. A G781-1 at I2C address 0x4d was now found with 2403 * chip ID 0x03. 2404 * To avoid detection failures, accept chip ID 0x01 and 0x03 at both 2405 * addresses. 2406 * G784 reports manufacturer ID 0x47 and chip ID 0x01. A public 2407 * datasheet is not available. Extensive testing suggests that 2408 * the chip appears to be fully compatible with G781. 2409 * Available register dumps show that G751 also reports manufacturer 2410 * ID 0x47 and chip ID 0x01 even though that chip does not officially 2411 * support those registers. This makes chip detection somewhat 2412 * vulnerable. To improve detection quality, read the offset low byte 2413 * and alert fault queue registers and verify that only expected bits 2414 * are set. 2415 */ 2416 if ((chip_id == 0x01 || chip_id == 0x03) && 2417 (address == 0x4c || address == 0x4d) && 2418 !(config1 & 0x3f) && convrate <= 0x08) { 2419 int reg; 2420 2421 reg = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_OFFSL); 2422 if (reg < 0 || reg & 0x1f) 2423 return NULL; 2424 reg = i2c_smbus_read_byte_data(client, TMP451_REG_CONALERT); 2425 if (reg < 0 || reg & 0xf1) 2426 return NULL; 2427 2428 return "g781"; 2429 } 2430 2431 return NULL; 2432 } 2433 2434 static const char *lm90_detect_ti49(struct i2c_client *client, bool common_address, 2435 int chip_id, int config1, int convrate) 2436 { 2437 if (common_address && chip_id == 0x00 && !(config1 & 0x3f) && !(convrate & 0xf8)) { 2438 /* THMC10: Unsupported registers return 0xff */ 2439 if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) == 0xff && 2440 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_CRIT) == 0xff) 2441 return "thmc10"; 2442 } 2443 return NULL; 2444 } 2445 2446 static const char *lm90_detect_ti(struct i2c_client *client, int chip_id, 2447 int config1, int convrate) 2448 { 2449 int address = client->addr; 2450 const char *name = NULL; 2451 2452 if (chip_id == 0x00 && !(config1 & 0x1b) && convrate <= 0x09) { 2453 int local_ext, conalert, chen, dfc; 2454 2455 local_ext = i2c_smbus_read_byte_data(client, 2456 TMP451_REG_LOCAL_TEMPL); 2457 conalert = i2c_smbus_read_byte_data(client, 2458 TMP451_REG_CONALERT); 2459 chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN); 2460 dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC); 2461 2462 if (!(local_ext & 0x0f) && (conalert & 0xf1) == 0x01 && 2463 (chen & 0xfc) == 0x00 && (dfc & 0xfc) == 0x00) { 2464 if (address == 0x4c && !(chen & 0x03)) 2465 name = "tmp451"; 2466 else if (address >= 0x48 && address <= 0x4f) 2467 name = "tmp461"; 2468 } 2469 } 2470 2471 return name; 2472 } 2473 2474 /* Return 0 if detection is successful, -ENODEV otherwise */ 2475 static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info) 2476 { 2477 struct i2c_adapter *adapter = client->adapter; 2478 int man_id, chip_id, config1, convrate, lhigh; 2479 const char *name = NULL; 2480 int address = client->addr; 2481 bool common_address = 2482 (address >= 0x18 && address <= 0x1a) || 2483 (address >= 0x29 && address <= 0x2b) || 2484 (address >= 0x4c && address <= 0x4e); 2485 2486 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 2487 return -ENODEV; 2488 2489 /* 2490 * Get well defined register value for chips with neither man_id nor 2491 * chip_id registers. 2492 */ 2493 lhigh = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH); 2494 2495 /* detection and identification */ 2496 man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID); 2497 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID); 2498 config1 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG1); 2499 convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE); 2500 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0 || lhigh < 0) 2501 return -ENODEV; 2502 2503 /* Bail out immediately if all register report the same value */ 2504 if (lhigh == man_id && lhigh == chip_id && lhigh == config1 && lhigh == convrate) 2505 return -ENODEV; 2506 2507 /* 2508 * If reading man_id and chip_id both return the same value as lhigh, 2509 * the chip may not support those registers and return the most recent read 2510 * value. Check again with a different register and handle accordingly. 2511 */ 2512 if (man_id == lhigh && chip_id == lhigh) { 2513 convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE); 2514 man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID); 2515 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID); 2516 if (convrate < 0 || man_id < 0 || chip_id < 0) 2517 return -ENODEV; 2518 if (man_id == convrate && chip_id == convrate) 2519 man_id = -1; 2520 } 2521 switch (man_id) { 2522 case -1: /* Chip does not support man_id / chip_id */ 2523 if (common_address && !convrate && !(config1 & 0x7f)) 2524 name = lm90_detect_lm84(client); 2525 break; 2526 case 0x01: /* National Semiconductor */ 2527 name = lm90_detect_national(client, chip_id, config1, convrate); 2528 break; 2529 case 0x1a: /* ON */ 2530 name = lm90_detect_on(client, chip_id, config1, convrate); 2531 break; 2532 case 0x23: /* Genesys Logic */ 2533 if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8)) 2534 name = "gl523sm"; 2535 break; 2536 case 0x41: /* Analog Devices */ 2537 name = lm90_detect_analog(client, common_address, chip_id, config1, 2538 convrate); 2539 break; 2540 case 0x47: /* GMT */ 2541 name = lm90_detect_gmt(client, chip_id, config1, convrate); 2542 break; 2543 case 0x49: /* TI */ 2544 name = lm90_detect_ti49(client, common_address, chip_id, config1, convrate); 2545 break; 2546 case 0x4d: /* Maxim Integrated */ 2547 name = lm90_detect_maxim(client, common_address, chip_id, 2548 config1, convrate); 2549 break; 2550 case 0x50: 2551 name = lm90_detect_nuvoton_50(client, chip_id, config1, convrate); 2552 break; 2553 case 0x54: /* ON MC1066, Microchip TC1068, TCM1617 (originally TelCom) */ 2554 if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8)) 2555 name = "mc1066"; 2556 break; 2557 case 0x55: /* TI */ 2558 name = lm90_detect_ti(client, chip_id, config1, convrate); 2559 break; 2560 case 0x5c: /* Winbond/Nuvoton */ 2561 name = lm90_detect_nuvoton(client, chip_id, config1, convrate); 2562 break; 2563 case 0xa1: /* NXP Semiconductor/Philips */ 2564 name = lm90_detect_nxp(client, common_address, chip_id, config1, convrate); 2565 break; 2566 case 0xff: /* MAX1617, G767, NE1617 */ 2567 if (common_address && chip_id == 0xff && convrate < 8) 2568 name = lm90_detect_max1617(client, config1); 2569 break; 2570 default: 2571 break; 2572 } 2573 2574 if (!name) { /* identification failed */ 2575 dev_dbg(&adapter->dev, 2576 "Unsupported chip at 0x%02x (man_id=0x%02X, chip_id=0x%02X)\n", 2577 client->addr, man_id, chip_id); 2578 return -ENODEV; 2579 } 2580 2581 strscpy(info->type, name, I2C_NAME_SIZE); 2582 2583 return 0; 2584 } 2585 2586 static void lm90_restore_conf(void *_data) 2587 { 2588 struct lm90_data *data = _data; 2589 struct i2c_client *client = data->client; 2590 2591 /* Restore initial configuration */ 2592 if (data->flags & LM90_HAVE_CONVRATE) 2593 lm90_write_convrate(data, data->convrate_orig); 2594 lm90_write_reg(client, LM90_REG_CONFIG1, data->config_orig); 2595 } 2596 2597 static void lm90_stop_work(void *_data) 2598 { 2599 struct lm90_data *data = _data; 2600 2601 hwmon_lock(data->hwmon_dev); 2602 data->shutdown = true; 2603 hwmon_unlock(data->hwmon_dev); 2604 cancel_delayed_work_sync(&data->alert_work); 2605 cancel_work_sync(&data->report_work); 2606 } 2607 2608 static int lm90_init_client(struct i2c_client *client, struct lm90_data *data) 2609 { 2610 struct device_node *np = client->dev.of_node; 2611 int config, convrate; 2612 2613 if (data->flags & LM90_HAVE_CONVRATE) { 2614 convrate = lm90_read_reg(client, LM90_REG_CONVRATE); 2615 if (convrate < 0) 2616 return convrate; 2617 data->convrate_orig = convrate; 2618 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */ 2619 } else { 2620 data->update_interval = 500; 2621 } 2622 2623 /* 2624 * Start the conversions. 2625 */ 2626 config = lm90_read_reg(client, LM90_REG_CONFIG1); 2627 if (config < 0) 2628 return config; 2629 data->config_orig = config; 2630 data->config = config; 2631 2632 /* Check Temperature Range Select */ 2633 if (data->flags & LM90_HAVE_EXTENDED_TEMP) { 2634 if (of_property_read_bool(np, "ti,extended-range-enable")) 2635 config |= 0x04; 2636 if (!(config & 0x04)) 2637 data->flags &= ~LM90_HAVE_EXTENDED_TEMP; 2638 } 2639 2640 /* 2641 * Put MAX6680/MAX8881 into extended resolution (bit 0x10, 2642 * 0.125 degree resolution) and range (0x08, extend range 2643 * to -64 degree) mode for the remote temperature sensor. 2644 * Note that expeciments with an actual chip do not show a difference 2645 * if bit 3 is set or not. 2646 */ 2647 if (data->kind == max6680) 2648 config |= 0x18; 2649 2650 /* 2651 * Put MAX6654 into extended range (0x20, extend minimum range from 2652 * 0 degrees to -64 degrees). Note that extended resolution is not 2653 * possible on the MAX6654 unless conversion rate is set to 1 Hz or 2654 * slower, which is intentionally not done by default. 2655 */ 2656 if (data->kind == max6654) 2657 config |= 0x20; 2658 2659 /* 2660 * Select external channel 0 for devices with three sensors 2661 */ 2662 if (data->flags & LM90_HAVE_TEMP3) 2663 config &= ~0x08; 2664 2665 /* 2666 * Interrupt is enabled by default on reset, but it may be disabled 2667 * by bootloader, unmask it. 2668 */ 2669 if (client->irq) 2670 config &= ~0x80; 2671 2672 config &= 0xBF; /* run */ 2673 lm90_update_confreg(data, config); 2674 2675 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data); 2676 } 2677 2678 static bool lm90_is_tripped(struct i2c_client *client) 2679 { 2680 struct lm90_data *data = i2c_get_clientdata(client); 2681 int ret; 2682 2683 ret = lm90_update_alarms(data, true); 2684 if (ret < 0) 2685 return false; 2686 2687 return !!data->current_alarms; 2688 } 2689 2690 static irqreturn_t lm90_irq_thread(int irq, void *dev_id) 2691 { 2692 struct i2c_client *client = dev_id; 2693 2694 if (lm90_is_tripped(client)) 2695 return IRQ_HANDLED; 2696 else 2697 return IRQ_NONE; 2698 } 2699 2700 static int lm90_probe_channel_from_dt(struct i2c_client *client, 2701 struct device_node *child, 2702 struct lm90_data *data) 2703 { 2704 u32 id; 2705 s32 val; 2706 int err; 2707 struct device *dev = &client->dev; 2708 2709 err = of_property_read_u32(child, "reg", &id); 2710 if (err) { 2711 dev_err(dev, "missing reg property of %pOFn\n", child); 2712 return err; 2713 } 2714 2715 if (id >= MAX_CHANNELS) { 2716 dev_err(dev, "invalid reg property value %d in %pOFn\n", id, child); 2717 return -EINVAL; 2718 } 2719 2720 err = of_property_read_string(child, "label", &data->channel_label[id]); 2721 if (err == -ENODATA || err == -EILSEQ) { 2722 dev_err(dev, "invalid label property in %pOFn\n", child); 2723 return err; 2724 } 2725 2726 if (data->channel_label[id]) 2727 data->channel_config[id] |= HWMON_T_LABEL; 2728 2729 err = of_property_read_s32(child, "temperature-offset-millicelsius", &val); 2730 if (!err) { 2731 if (id == 0) { 2732 dev_err(dev, "temperature-offset-millicelsius can't be set for internal channel\n"); 2733 return -EINVAL; 2734 } 2735 2736 err = lm90_set_temp_offset(data, lm90_temp_offset_index[id], id, val); 2737 if (err) { 2738 dev_err(dev, "can't set temperature offset %d for channel %d (%d)\n", 2739 val, id, err); 2740 return err; 2741 } 2742 } 2743 2744 return 0; 2745 } 2746 2747 static int lm90_parse_dt_channel_info(struct i2c_client *client, 2748 struct lm90_data *data) 2749 { 2750 int err; 2751 struct device *dev = &client->dev; 2752 const struct device_node *np = dev->of_node; 2753 2754 for_each_child_of_node_scoped(np, child) { 2755 if (strcmp(child->name, "channel")) 2756 continue; 2757 2758 err = lm90_probe_channel_from_dt(client, child, data); 2759 if (err) 2760 return err; 2761 } 2762 2763 return 0; 2764 } 2765 2766 static const struct hwmon_ops lm90_ops = { 2767 .is_visible = lm90_is_visible, 2768 .read = lm90_read, 2769 .read_string = lm90_read_string, 2770 .write = lm90_write, 2771 }; 2772 2773 static int lm90_probe(struct i2c_client *client) 2774 { 2775 struct device *dev = &client->dev; 2776 struct i2c_adapter *adapter = client->adapter; 2777 struct hwmon_channel_info *info; 2778 struct device *hwmon_dev; 2779 struct lm90_data *data; 2780 int err; 2781 2782 err = devm_regulator_get_enable(dev, "vcc"); 2783 if (err) 2784 return dev_err_probe(dev, err, "Failed to enable regulator\n"); 2785 2786 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL); 2787 if (!data) 2788 return -ENOMEM; 2789 2790 data->client = client; 2791 i2c_set_clientdata(client, data); 2792 INIT_DELAYED_WORK(&data->alert_work, lm90_alert_work); 2793 INIT_WORK(&data->report_work, lm90_report_alarms); 2794 2795 /* Set the device type */ 2796 data->kind = (uintptr_t)i2c_get_match_data(client); 2797 2798 /* 2799 * Different devices have different alarm bits triggering the 2800 * ALERT# output 2801 */ 2802 data->alert_alarms = lm90_params[data->kind].alert_alarms; 2803 data->resolution = lm90_params[data->kind].resolution ? : 11; 2804 2805 /* Set chip capabilities */ 2806 data->flags = lm90_params[data->kind].flags; 2807 2808 if ((data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) && 2809 !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_PEC)) 2810 data->flags &= ~(LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC); 2811 2812 if ((data->flags & LM90_HAVE_PARTIAL_PEC) && 2813 !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE)) 2814 data->flags &= ~LM90_HAVE_PARTIAL_PEC; 2815 2816 data->chip.ops = &lm90_ops; 2817 data->chip.info = data->info; 2818 2819 data->info[0] = &data->chip_info; 2820 info = &data->chip_info; 2821 info->type = hwmon_chip; 2822 info->config = data->chip_config; 2823 2824 data->chip_config[0] = HWMON_C_REGISTER_TZ; 2825 if (data->flags & LM90_HAVE_ALARMS) 2826 data->chip_config[0] |= HWMON_C_ALARMS; 2827 if (data->flags & LM90_HAVE_CONVRATE) 2828 data->chip_config[0] |= HWMON_C_UPDATE_INTERVAL; 2829 if (data->flags & LM90_HAVE_FAULTQUEUE) 2830 data->chip_config[0] |= HWMON_C_TEMP_SAMPLES; 2831 if (data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) 2832 data->chip_config[0] |= HWMON_C_PEC; 2833 data->info[1] = &data->temp_info; 2834 2835 info = &data->temp_info; 2836 info->type = hwmon_temp; 2837 info->config = data->channel_config; 2838 2839 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MAX | 2840 HWMON_T_MAX_ALARM; 2841 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MAX | 2842 HWMON_T_MAX_ALARM | HWMON_T_FAULT; 2843 2844 if (data->flags & LM90_HAVE_LOW) { 2845 data->channel_config[0] |= HWMON_T_MIN | HWMON_T_MIN_ALARM; 2846 data->channel_config[1] |= HWMON_T_MIN | HWMON_T_MIN_ALARM; 2847 } 2848 2849 if (data->flags & LM90_HAVE_CRIT) { 2850 data->channel_config[0] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST; 2851 data->channel_config[1] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST; 2852 } 2853 2854 if (data->flags & LM90_HAVE_OFFSET) 2855 data->channel_config[1] |= HWMON_T_OFFSET; 2856 2857 if (data->flags & LM90_HAVE_EMERGENCY) { 2858 data->channel_config[0] |= HWMON_T_EMERGENCY | 2859 HWMON_T_EMERGENCY_HYST; 2860 data->channel_config[1] |= HWMON_T_EMERGENCY | 2861 HWMON_T_EMERGENCY_HYST; 2862 } 2863 2864 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) { 2865 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM; 2866 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM; 2867 } 2868 2869 if (data->flags & LM90_HAVE_TEMP3) { 2870 data->channel_config[2] = HWMON_T_INPUT | 2871 HWMON_T_MIN | HWMON_T_MAX | 2872 HWMON_T_CRIT | HWMON_T_CRIT_HYST | 2873 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM | 2874 HWMON_T_CRIT_ALARM | HWMON_T_FAULT; 2875 if (data->flags & LM90_HAVE_EMERGENCY) { 2876 data->channel_config[2] |= HWMON_T_EMERGENCY | 2877 HWMON_T_EMERGENCY_HYST; 2878 } 2879 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) 2880 data->channel_config[2] |= HWMON_T_EMERGENCY_ALARM; 2881 if (data->flags & LM90_HAVE_OFFSET) 2882 data->channel_config[2] |= HWMON_T_OFFSET; 2883 } 2884 2885 data->faultqueue_mask = lm90_params[data->kind].faultqueue_mask; 2886 data->faultqueue_depth = lm90_params[data->kind].faultqueue_depth; 2887 data->reg_local_ext = lm90_params[data->kind].reg_local_ext; 2888 if (data->flags & LM90_HAVE_REMOTE_EXT) 2889 data->reg_remote_ext = LM90_REG_REMOTE_TEMPL; 2890 data->reg_status2 = lm90_params[data->kind].reg_status2; 2891 2892 /* Set maximum conversion rate */ 2893 data->max_convrate = lm90_params[data->kind].max_convrate; 2894 2895 /* Parse device-tree channel information */ 2896 if (client->dev.of_node) { 2897 err = lm90_parse_dt_channel_info(client, data); 2898 if (err) 2899 return err; 2900 } 2901 2902 /* Initialize the LM90 chip */ 2903 err = lm90_init_client(client, data); 2904 if (err < 0) { 2905 dev_err(dev, "Failed to initialize device\n"); 2906 return err; 2907 } 2908 2909 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 2910 data, &data->chip, 2911 NULL); 2912 if (IS_ERR(hwmon_dev)) 2913 return PTR_ERR(hwmon_dev); 2914 2915 data->hwmon_dev = hwmon_dev; 2916 2917 err = devm_add_action_or_reset(&client->dev, lm90_stop_work, data); 2918 if (err) 2919 return err; 2920 2921 if (client->irq) { 2922 dev_dbg(dev, "IRQ: %d\n", client->irq); 2923 err = devm_request_threaded_irq(dev, client->irq, 2924 NULL, lm90_irq_thread, 2925 IRQF_ONESHOT, "lm90", client); 2926 if (err < 0) { 2927 dev_err(dev, "cannot request IRQ %d\n", client->irq); 2928 return err; 2929 } 2930 } 2931 2932 return 0; 2933 } 2934 2935 static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type, 2936 unsigned int flag) 2937 { 2938 if (type != I2C_PROTOCOL_SMBUS_ALERT) 2939 return; 2940 2941 if (lm90_is_tripped(client)) { 2942 /* 2943 * Disable ALERT# output, because these chips don't implement 2944 * SMBus alert correctly; they should only hold the alert line 2945 * low briefly. 2946 */ 2947 struct lm90_data *data = i2c_get_clientdata(client); 2948 2949 hwmon_lock(data->hwmon_dev); 2950 if (!data->shutdown && (data->flags & LM90_HAVE_BROKEN_ALERT) && 2951 (data->current_alarms & data->alert_alarms)) { 2952 if (!(data->config & 0x80)) { 2953 dev_dbg(&client->dev, "Disabling ALERT#\n"); 2954 lm90_update_confreg(data, data->config | 0x80); 2955 } 2956 schedule_delayed_work(&data->alert_work, 2957 max_t(int, HZ, msecs_to_jiffies(data->update_interval))); 2958 } 2959 hwmon_unlock(data->hwmon_dev); 2960 } else { 2961 dev_dbg(&client->dev, "Everything OK\n"); 2962 } 2963 } 2964 2965 static int lm90_suspend(struct device *dev) 2966 { 2967 struct lm90_data *data = dev_get_drvdata(dev); 2968 struct i2c_client *client = data->client; 2969 2970 if (client->irq) 2971 disable_irq(client->irq); 2972 2973 return 0; 2974 } 2975 2976 static int lm90_resume(struct device *dev) 2977 { 2978 struct lm90_data *data = dev_get_drvdata(dev); 2979 struct i2c_client *client = data->client; 2980 2981 if (client->irq) 2982 enable_irq(client->irq); 2983 2984 return 0; 2985 } 2986 2987 static DEFINE_SIMPLE_DEV_PM_OPS(lm90_pm_ops, lm90_suspend, lm90_resume); 2988 2989 static struct i2c_driver lm90_driver = { 2990 .class = I2C_CLASS_HWMON, 2991 .driver = { 2992 .name = "lm90", 2993 .of_match_table = of_match_ptr(lm90_of_match), 2994 .pm = pm_sleep_ptr(&lm90_pm_ops), 2995 }, 2996 .probe = lm90_probe, 2997 .alert = lm90_alert, 2998 .id_table = lm90_id, 2999 .detect = lm90_detect, 3000 .address_list = normal_i2c, 3001 }; 3002 3003 module_i2c_driver(lm90_driver); 3004 3005 MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>"); 3006 MODULE_DESCRIPTION("LM90/ADM1032 driver"); 3007 MODULE_LICENSE("GPL"); 3008