1 /* 2 * jc42.c - driver for Jedec JC42.4 compliant temperature sensors 3 * 4 * Copyright (c) 2010 Ericsson AB. 5 * 6 * Derived from lm77.c by Andras BALI <drewie@freemail.hu>. 7 * 8 * JC42.4 compliant temperature sensors are typically used on memory modules. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #include <linux/module.h> 26 #include <linux/init.h> 27 #include <linux/slab.h> 28 #include <linux/jiffies.h> 29 #include <linux/i2c.h> 30 #include <linux/hwmon.h> 31 #include <linux/err.h> 32 #include <linux/mutex.h> 33 #include <linux/of.h> 34 35 /* Addresses to scan */ 36 static const unsigned short normal_i2c[] = { 37 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END }; 38 39 /* JC42 registers. All registers are 16 bit. */ 40 #define JC42_REG_CAP 0x00 41 #define JC42_REG_CONFIG 0x01 42 #define JC42_REG_TEMP_UPPER 0x02 43 #define JC42_REG_TEMP_LOWER 0x03 44 #define JC42_REG_TEMP_CRITICAL 0x04 45 #define JC42_REG_TEMP 0x05 46 #define JC42_REG_MANID 0x06 47 #define JC42_REG_DEVICEID 0x07 48 49 /* Status bits in temperature register */ 50 #define JC42_ALARM_CRIT_BIT 15 51 #define JC42_ALARM_MAX_BIT 14 52 #define JC42_ALARM_MIN_BIT 13 53 54 /* Configuration register defines */ 55 #define JC42_CFG_CRIT_ONLY (1 << 2) 56 #define JC42_CFG_TCRIT_LOCK (1 << 6) 57 #define JC42_CFG_EVENT_LOCK (1 << 7) 58 #define JC42_CFG_SHUTDOWN (1 << 8) 59 #define JC42_CFG_HYST_SHIFT 9 60 #define JC42_CFG_HYST_MASK (0x03 << 9) 61 62 /* Capabilities */ 63 #define JC42_CAP_RANGE (1 << 2) 64 65 /* Manufacturer IDs */ 66 #define ADT_MANID 0x11d4 /* Analog Devices */ 67 #define ATMEL_MANID 0x001f /* Atmel */ 68 #define ATMEL_MANID2 0x1114 /* Atmel */ 69 #define MAX_MANID 0x004d /* Maxim */ 70 #define IDT_MANID 0x00b3 /* IDT */ 71 #define MCP_MANID 0x0054 /* Microchip */ 72 #define NXP_MANID 0x1131 /* NXP Semiconductors */ 73 #define ONS_MANID 0x1b09 /* ON Semiconductor */ 74 #define STM_MANID 0x104a /* ST Microelectronics */ 75 76 /* Supported chips */ 77 78 /* Analog Devices */ 79 #define ADT7408_DEVID 0x0801 80 #define ADT7408_DEVID_MASK 0xffff 81 82 /* Atmel */ 83 #define AT30TS00_DEVID 0x8201 84 #define AT30TS00_DEVID_MASK 0xffff 85 86 #define AT30TSE004_DEVID 0x2200 87 #define AT30TSE004_DEVID_MASK 0xffff 88 89 /* IDT */ 90 #define TSE2004_DEVID 0x2200 91 #define TSE2004_DEVID_MASK 0xff00 92 93 #define TS3000_DEVID 0x2900 /* Also matches TSE2002 */ 94 #define TS3000_DEVID_MASK 0xff00 95 96 #define TS3001_DEVID 0x3000 97 #define TS3001_DEVID_MASK 0xff00 98 99 /* Maxim */ 100 #define MAX6604_DEVID 0x3e00 101 #define MAX6604_DEVID_MASK 0xffff 102 103 /* Microchip */ 104 #define MCP9804_DEVID 0x0200 105 #define MCP9804_DEVID_MASK 0xfffc 106 107 #define MCP9808_DEVID 0x0400 108 #define MCP9808_DEVID_MASK 0xfffc 109 110 #define MCP98242_DEVID 0x2000 111 #define MCP98242_DEVID_MASK 0xfffc 112 113 #define MCP98243_DEVID 0x2100 114 #define MCP98243_DEVID_MASK 0xfffc 115 116 #define MCP98244_DEVID 0x2200 117 #define MCP98244_DEVID_MASK 0xfffc 118 119 #define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */ 120 #define MCP9843_DEVID_MASK 0xfffe 121 122 /* NXP */ 123 #define SE97_DEVID 0xa200 124 #define SE97_DEVID_MASK 0xfffc 125 126 #define SE98_DEVID 0xa100 127 #define SE98_DEVID_MASK 0xfffc 128 129 /* ON Semiconductor */ 130 #define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */ 131 #define CAT6095_DEVID_MASK 0xffe0 132 133 /* ST Microelectronics */ 134 #define STTS424_DEVID 0x0101 135 #define STTS424_DEVID_MASK 0xffff 136 137 #define STTS424E_DEVID 0x0000 138 #define STTS424E_DEVID_MASK 0xfffe 139 140 #define STTS2002_DEVID 0x0300 141 #define STTS2002_DEVID_MASK 0xffff 142 143 #define STTS2004_DEVID 0x2201 144 #define STTS2004_DEVID_MASK 0xffff 145 146 #define STTS3000_DEVID 0x0200 147 #define STTS3000_DEVID_MASK 0xffff 148 149 static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 }; 150 151 struct jc42_chips { 152 u16 manid; 153 u16 devid; 154 u16 devid_mask; 155 }; 156 157 static struct jc42_chips jc42_chips[] = { 158 { ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK }, 159 { ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK }, 160 { ATMEL_MANID2, AT30TSE004_DEVID, AT30TSE004_DEVID_MASK }, 161 { IDT_MANID, TSE2004_DEVID, TSE2004_DEVID_MASK }, 162 { IDT_MANID, TS3000_DEVID, TS3000_DEVID_MASK }, 163 { IDT_MANID, TS3001_DEVID, TS3001_DEVID_MASK }, 164 { MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK }, 165 { MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK }, 166 { MCP_MANID, MCP9808_DEVID, MCP9808_DEVID_MASK }, 167 { MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK }, 168 { MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK }, 169 { MCP_MANID, MCP98244_DEVID, MCP98244_DEVID_MASK }, 170 { MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK }, 171 { NXP_MANID, SE97_DEVID, SE97_DEVID_MASK }, 172 { ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK }, 173 { NXP_MANID, SE98_DEVID, SE98_DEVID_MASK }, 174 { STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK }, 175 { STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK }, 176 { STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK }, 177 { STM_MANID, STTS2004_DEVID, STTS2004_DEVID_MASK }, 178 { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK }, 179 }; 180 181 enum temp_index { 182 t_input = 0, 183 t_crit, 184 t_min, 185 t_max, 186 t_num_temp 187 }; 188 189 static const u8 temp_regs[t_num_temp] = { 190 [t_input] = JC42_REG_TEMP, 191 [t_crit] = JC42_REG_TEMP_CRITICAL, 192 [t_min] = JC42_REG_TEMP_LOWER, 193 [t_max] = JC42_REG_TEMP_UPPER, 194 }; 195 196 /* Each client has this additional data */ 197 struct jc42_data { 198 struct i2c_client *client; 199 struct mutex update_lock; /* protect register access */ 200 bool extended; /* true if extended range supported */ 201 bool valid; 202 unsigned long last_updated; /* In jiffies */ 203 u16 orig_config; /* original configuration */ 204 u16 config; /* current configuration */ 205 u16 temp[t_num_temp];/* Temperatures */ 206 }; 207 208 #define JC42_TEMP_MIN_EXTENDED (-40000) 209 #define JC42_TEMP_MIN 0 210 #define JC42_TEMP_MAX 125000 211 212 static u16 jc42_temp_to_reg(long temp, bool extended) 213 { 214 int ntemp = clamp_val(temp, 215 extended ? JC42_TEMP_MIN_EXTENDED : 216 JC42_TEMP_MIN, JC42_TEMP_MAX); 217 218 /* convert from 0.001 to 0.0625 resolution */ 219 return (ntemp * 2 / 125) & 0x1fff; 220 } 221 222 static int jc42_temp_from_reg(s16 reg) 223 { 224 reg = sign_extend32(reg, 12); 225 226 /* convert from 0.0625 to 0.001 resolution */ 227 return reg * 125 / 2; 228 } 229 230 static struct jc42_data *jc42_update_device(struct device *dev) 231 { 232 struct jc42_data *data = dev_get_drvdata(dev); 233 struct i2c_client *client = data->client; 234 struct jc42_data *ret = data; 235 int i, val; 236 237 mutex_lock(&data->update_lock); 238 239 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { 240 for (i = 0; i < t_num_temp; i++) { 241 val = i2c_smbus_read_word_swapped(client, temp_regs[i]); 242 if (val < 0) { 243 ret = ERR_PTR(val); 244 goto abort; 245 } 246 data->temp[i] = val; 247 } 248 data->last_updated = jiffies; 249 data->valid = true; 250 } 251 abort: 252 mutex_unlock(&data->update_lock); 253 return ret; 254 } 255 256 static int jc42_read(struct device *dev, enum hwmon_sensor_types type, 257 u32 attr, int channel, long *val) 258 { 259 struct jc42_data *data = jc42_update_device(dev); 260 int temp, hyst; 261 262 if (IS_ERR(data)) 263 return PTR_ERR(data); 264 265 switch (attr) { 266 case hwmon_temp_input: 267 *val = jc42_temp_from_reg(data->temp[t_input]); 268 return 0; 269 case hwmon_temp_min: 270 *val = jc42_temp_from_reg(data->temp[t_min]); 271 return 0; 272 case hwmon_temp_max: 273 *val = jc42_temp_from_reg(data->temp[t_max]); 274 return 0; 275 case hwmon_temp_crit: 276 *val = jc42_temp_from_reg(data->temp[t_crit]); 277 return 0; 278 case hwmon_temp_max_hyst: 279 temp = jc42_temp_from_reg(data->temp[t_max]); 280 hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK) 281 >> JC42_CFG_HYST_SHIFT]; 282 *val = temp - hyst; 283 return 0; 284 case hwmon_temp_crit_hyst: 285 temp = jc42_temp_from_reg(data->temp[t_crit]); 286 hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK) 287 >> JC42_CFG_HYST_SHIFT]; 288 *val = temp - hyst; 289 return 0; 290 case hwmon_temp_min_alarm: 291 *val = (data->temp[t_input] >> JC42_ALARM_MIN_BIT) & 1; 292 return 0; 293 case hwmon_temp_max_alarm: 294 *val = (data->temp[t_input] >> JC42_ALARM_MAX_BIT) & 1; 295 return 0; 296 case hwmon_temp_crit_alarm: 297 *val = (data->temp[t_input] >> JC42_ALARM_CRIT_BIT) & 1; 298 return 0; 299 default: 300 return -EOPNOTSUPP; 301 } 302 } 303 304 static int jc42_write(struct device *dev, enum hwmon_sensor_types type, 305 u32 attr, int channel, long val) 306 { 307 struct jc42_data *data = dev_get_drvdata(dev); 308 struct i2c_client *client = data->client; 309 int diff, hyst; 310 int ret; 311 312 mutex_lock(&data->update_lock); 313 314 switch (attr) { 315 case hwmon_temp_min: 316 data->temp[t_min] = jc42_temp_to_reg(val, data->extended); 317 ret = i2c_smbus_write_word_swapped(client, temp_regs[t_min], 318 data->temp[t_min]); 319 break; 320 case hwmon_temp_max: 321 data->temp[t_max] = jc42_temp_to_reg(val, data->extended); 322 ret = i2c_smbus_write_word_swapped(client, temp_regs[t_max], 323 data->temp[t_max]); 324 break; 325 case hwmon_temp_crit: 326 data->temp[t_crit] = jc42_temp_to_reg(val, data->extended); 327 ret = i2c_smbus_write_word_swapped(client, temp_regs[t_crit], 328 data->temp[t_crit]); 329 break; 330 case hwmon_temp_crit_hyst: 331 /* 332 * JC42.4 compliant chips only support four hysteresis values. 333 * Pick best choice and go from there. 334 */ 335 val = clamp_val(val, (data->extended ? JC42_TEMP_MIN_EXTENDED 336 : JC42_TEMP_MIN) - 6000, 337 JC42_TEMP_MAX); 338 diff = jc42_temp_from_reg(data->temp[t_crit]) - val; 339 hyst = 0; 340 if (diff > 0) { 341 if (diff < 2250) 342 hyst = 1; /* 1.5 degrees C */ 343 else if (diff < 4500) 344 hyst = 2; /* 3.0 degrees C */ 345 else 346 hyst = 3; /* 6.0 degrees C */ 347 } 348 data->config = (data->config & ~JC42_CFG_HYST_MASK) | 349 (hyst << JC42_CFG_HYST_SHIFT); 350 ret = i2c_smbus_write_word_swapped(data->client, 351 JC42_REG_CONFIG, 352 data->config); 353 break; 354 default: 355 ret = -EOPNOTSUPP; 356 break; 357 } 358 359 mutex_unlock(&data->update_lock); 360 361 return ret; 362 } 363 364 static umode_t jc42_is_visible(const void *_data, enum hwmon_sensor_types type, 365 u32 attr, int channel) 366 { 367 const struct jc42_data *data = _data; 368 unsigned int config = data->config; 369 umode_t mode = S_IRUGO; 370 371 switch (attr) { 372 case hwmon_temp_min: 373 case hwmon_temp_max: 374 if (!(config & JC42_CFG_EVENT_LOCK)) 375 mode |= S_IWUSR; 376 break; 377 case hwmon_temp_crit: 378 if (!(config & JC42_CFG_TCRIT_LOCK)) 379 mode |= S_IWUSR; 380 break; 381 case hwmon_temp_crit_hyst: 382 if (!(config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK))) 383 mode |= S_IWUSR; 384 break; 385 case hwmon_temp_input: 386 case hwmon_temp_max_hyst: 387 case hwmon_temp_min_alarm: 388 case hwmon_temp_max_alarm: 389 case hwmon_temp_crit_alarm: 390 break; 391 default: 392 mode = 0; 393 break; 394 } 395 return mode; 396 } 397 398 /* Return 0 if detection is successful, -ENODEV otherwise */ 399 static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info) 400 { 401 struct i2c_adapter *adapter = client->adapter; 402 int i, config, cap, manid, devid; 403 404 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | 405 I2C_FUNC_SMBUS_WORD_DATA)) 406 return -ENODEV; 407 408 cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP); 409 config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG); 410 manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID); 411 devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID); 412 413 if (cap < 0 || config < 0 || manid < 0 || devid < 0) 414 return -ENODEV; 415 416 if ((cap & 0xff00) || (config & 0xf800)) 417 return -ENODEV; 418 419 for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) { 420 struct jc42_chips *chip = &jc42_chips[i]; 421 if (manid == chip->manid && 422 (devid & chip->devid_mask) == chip->devid) { 423 strlcpy(info->type, "jc42", I2C_NAME_SIZE); 424 return 0; 425 } 426 } 427 return -ENODEV; 428 } 429 430 static const u32 jc42_temp_config[] = { 431 HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | HWMON_T_CRIT | 432 HWMON_T_MAX_HYST | HWMON_T_CRIT_HYST | 433 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM, 434 0 435 }; 436 437 static const struct hwmon_channel_info jc42_temp = { 438 .type = hwmon_temp, 439 .config = jc42_temp_config, 440 }; 441 442 static const struct hwmon_channel_info *jc42_info[] = { 443 &jc42_temp, 444 NULL 445 }; 446 447 static const struct hwmon_ops jc42_hwmon_ops = { 448 .is_visible = jc42_is_visible, 449 .read = jc42_read, 450 .write = jc42_write, 451 }; 452 453 static const struct hwmon_chip_info jc42_chip_info = { 454 .ops = &jc42_hwmon_ops, 455 .info = jc42_info, 456 }; 457 458 static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id) 459 { 460 struct device *dev = &client->dev; 461 struct device *hwmon_dev; 462 struct jc42_data *data; 463 int config, cap; 464 465 data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL); 466 if (!data) 467 return -ENOMEM; 468 469 data->client = client; 470 i2c_set_clientdata(client, data); 471 mutex_init(&data->update_lock); 472 473 cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP); 474 if (cap < 0) 475 return cap; 476 477 data->extended = !!(cap & JC42_CAP_RANGE); 478 479 config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG); 480 if (config < 0) 481 return config; 482 483 data->orig_config = config; 484 if (config & JC42_CFG_SHUTDOWN) { 485 config &= ~JC42_CFG_SHUTDOWN; 486 i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config); 487 } 488 data->config = config; 489 490 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 491 data, &jc42_chip_info, 492 NULL); 493 return PTR_ERR_OR_ZERO(hwmon_dev); 494 } 495 496 static int jc42_remove(struct i2c_client *client) 497 { 498 struct jc42_data *data = i2c_get_clientdata(client); 499 500 /* Restore original configuration except hysteresis */ 501 if ((data->config & ~JC42_CFG_HYST_MASK) != 502 (data->orig_config & ~JC42_CFG_HYST_MASK)) { 503 int config; 504 505 config = (data->orig_config & ~JC42_CFG_HYST_MASK) 506 | (data->config & JC42_CFG_HYST_MASK); 507 i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config); 508 } 509 return 0; 510 } 511 512 #ifdef CONFIG_PM 513 514 static int jc42_suspend(struct device *dev) 515 { 516 struct jc42_data *data = dev_get_drvdata(dev); 517 518 data->config |= JC42_CFG_SHUTDOWN; 519 i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG, 520 data->config); 521 return 0; 522 } 523 524 static int jc42_resume(struct device *dev) 525 { 526 struct jc42_data *data = dev_get_drvdata(dev); 527 528 data->config &= ~JC42_CFG_SHUTDOWN; 529 i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG, 530 data->config); 531 return 0; 532 } 533 534 static const struct dev_pm_ops jc42_dev_pm_ops = { 535 .suspend = jc42_suspend, 536 .resume = jc42_resume, 537 }; 538 539 #define JC42_DEV_PM_OPS (&jc42_dev_pm_ops) 540 #else 541 #define JC42_DEV_PM_OPS NULL 542 #endif /* CONFIG_PM */ 543 544 static const struct i2c_device_id jc42_id[] = { 545 { "jc42", 0 }, 546 { } 547 }; 548 MODULE_DEVICE_TABLE(i2c, jc42_id); 549 550 #ifdef CONFIG_OF 551 static const struct of_device_id jc42_of_ids[] = { 552 { .compatible = "jedec,jc-42.4-temp", }, 553 { } 554 }; 555 MODULE_DEVICE_TABLE(of, jc42_of_ids); 556 #endif 557 558 static struct i2c_driver jc42_driver = { 559 .class = I2C_CLASS_SPD | I2C_CLASS_HWMON, 560 .driver = { 561 .name = "jc42", 562 .pm = JC42_DEV_PM_OPS, 563 .of_match_table = of_match_ptr(jc42_of_ids), 564 }, 565 .probe = jc42_probe, 566 .remove = jc42_remove, 567 .id_table = jc42_id, 568 .detect = jc42_detect, 569 .address_list = normal_i2c, 570 }; 571 572 module_i2c_driver(jc42_driver); 573 574 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>"); 575 MODULE_DESCRIPTION("JC42 driver"); 576 MODULE_LICENSE("GPL"); 577