1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for Texas Instruments INA219, INA226 power monitor chips 4 * 5 * INA219: 6 * Zero Drift Bi-Directional Current/Power Monitor with I2C Interface 7 * Datasheet: https://www.ti.com/product/ina219 8 * 9 * INA220: 10 * Bi-Directional Current/Power Monitor with I2C Interface 11 * Datasheet: https://www.ti.com/product/ina220 12 * 13 * INA226: 14 * Bi-Directional Current/Power Monitor with I2C Interface 15 * Datasheet: https://www.ti.com/product/ina226 16 * 17 * INA230: 18 * Bi-directional Current/Power Monitor with I2C Interface 19 * Datasheet: https://www.ti.com/product/ina230 20 * 21 * Copyright (C) 2012 Lothar Felten <lothar.felten@gmail.com> 22 * Thanks to Jan Volkering 23 */ 24 25 #include <linux/bitfield.h> 26 #include <linux/bits.h> 27 #include <linux/delay.h> 28 #include <linux/device.h> 29 #include <linux/err.h> 30 #include <linux/hwmon.h> 31 #include <linux/i2c.h> 32 #include <linux/init.h> 33 #include <linux/kernel.h> 34 #include <linux/module.h> 35 #include <linux/property.h> 36 #include <linux/regmap.h> 37 #include <linux/slab.h> 38 #include <linux/sysfs.h> 39 #include <linux/util_macros.h> 40 41 /* common register definitions */ 42 #define INA2XX_CONFIG 0x00 43 #define INA2XX_SHUNT_VOLTAGE 0x01 /* readonly */ 44 #define INA2XX_BUS_VOLTAGE 0x02 /* readonly */ 45 #define INA2XX_POWER 0x03 /* readonly */ 46 #define INA2XX_CURRENT 0x04 /* readonly */ 47 #define INA2XX_CALIBRATION 0x05 48 49 /* INA226 register definitions */ 50 #define INA226_MASK_ENABLE 0x06 51 #define INA226_ALERT_LIMIT 0x07 52 #define INA226_DIE_ID 0xFF 53 54 /* SY24655 register definitions */ 55 #define SY24655_EIN 0x0A 56 #define SY24655_ACCUM_CONFIG 0x0D 57 #define INA2XX_MAX_REGISTERS 0x0D 58 59 /* settings - depend on use case */ 60 #define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */ 61 #define INA226_CONFIG_DEFAULT 0x4527 /* averages=16 */ 62 #define INA260_CONFIG_DEFAULT 0x6527 /* averages=16 */ 63 #define SY24655_CONFIG_DEFAULT 0x4527 /* averages=16 */ 64 65 /* (only for sy24655) */ 66 #define SY24655_ACCUM_CONFIG_DEFAULT 0x044C /* continuous mode, clear after read*/ 67 68 /* worst case is 68.10 ms (~14.6Hz, ina219) */ 69 #define INA2XX_CONVERSION_RATE 15 70 #define INA2XX_MAX_DELAY 69 /* worst case delay in ms */ 71 72 #define INA2XX_RSHUNT_DEFAULT 10000 73 #define INA260_RSHUNT 2000 74 75 /* bit mask for reading the averaging setting in the configuration register */ 76 #define INA226_AVG_RD_MASK GENMASK(11, 9) 77 78 #define INA226_READ_AVG(reg) FIELD_GET(INA226_AVG_RD_MASK, reg) 79 80 #define INA226_ALERT_LATCH_ENABLE BIT(0) 81 #define INA226_ALERT_POLARITY BIT(1) 82 83 /* bit number of alert functions in Mask/Enable Register */ 84 #define INA226_SHUNT_OVER_VOLTAGE_MASK BIT(15) 85 #define INA226_SHUNT_UNDER_VOLTAGE_MASK BIT(14) 86 #define INA226_BUS_OVER_VOLTAGE_MASK BIT(13) 87 #define INA226_BUS_UNDER_VOLTAGE_MASK BIT(12) 88 #define INA226_POWER_OVER_LIMIT_MASK BIT(11) 89 90 /* bit mask for alert config bits of Mask/Enable Register */ 91 #define INA226_ALERT_CONFIG_MASK GENMASK(15, 10) 92 #define INA226_ALERT_FUNCTION_FLAG BIT(4) 93 94 /* 95 * Both bus voltage and shunt voltage conversion times for ina226 are set 96 * to 0b0100 on POR, which translates to 2200 microseconds in total. 97 */ 98 #define INA226_TOTAL_CONV_TIME_DEFAULT 2200 99 100 static bool ina2xx_writeable_reg(struct device *dev, unsigned int reg) 101 { 102 switch (reg) { 103 case INA2XX_CONFIG: 104 case INA2XX_CALIBRATION: 105 case INA226_MASK_ENABLE: 106 case INA226_ALERT_LIMIT: 107 case SY24655_ACCUM_CONFIG: 108 return true; 109 default: 110 return false; 111 } 112 } 113 114 static bool ina2xx_volatile_reg(struct device *dev, unsigned int reg) 115 { 116 switch (reg) { 117 case INA2XX_SHUNT_VOLTAGE: 118 case INA2XX_BUS_VOLTAGE: 119 case INA2XX_POWER: 120 case INA2XX_CURRENT: 121 return true; 122 default: 123 return false; 124 } 125 } 126 127 static const struct regmap_config ina2xx_regmap_config = { 128 .reg_bits = 8, 129 .val_bits = 16, 130 .use_single_write = true, 131 .use_single_read = true, 132 .max_register = INA2XX_MAX_REGISTERS, 133 .cache_type = REGCACHE_MAPLE, 134 .volatile_reg = ina2xx_volatile_reg, 135 .writeable_reg = ina2xx_writeable_reg, 136 }; 137 138 enum ina2xx_ids { ina219, ina226, ina260, sy24655 }; 139 140 struct ina2xx_config { 141 u16 config_default; 142 bool has_alerts; /* chip supports alerts and limits */ 143 bool has_ishunt; /* chip has internal shunt resistor */ 144 bool has_power_average; /* chip has internal shunt resistor */ 145 int calibration_value; 146 int shunt_div; 147 int bus_voltage_shift; 148 int bus_voltage_lsb; /* uV */ 149 int power_lsb_factor; 150 }; 151 152 struct ina2xx_data { 153 const struct ina2xx_config *config; 154 enum ina2xx_ids chip; 155 156 long rshunt; 157 long current_lsb_uA; 158 long power_lsb_uW; 159 struct mutex config_lock; 160 struct regmap *regmap; 161 struct i2c_client *client; 162 }; 163 164 static const struct ina2xx_config ina2xx_config[] = { 165 [ina219] = { 166 .config_default = INA219_CONFIG_DEFAULT, 167 .calibration_value = 4096, 168 .shunt_div = 100, 169 .bus_voltage_shift = 3, 170 .bus_voltage_lsb = 4000, 171 .power_lsb_factor = 20, 172 .has_alerts = false, 173 .has_ishunt = false, 174 .has_power_average = false, 175 }, 176 [ina226] = { 177 .config_default = INA226_CONFIG_DEFAULT, 178 .calibration_value = 2048, 179 .shunt_div = 400, 180 .bus_voltage_shift = 0, 181 .bus_voltage_lsb = 1250, 182 .power_lsb_factor = 25, 183 .has_alerts = true, 184 .has_ishunt = false, 185 .has_power_average = false, 186 }, 187 [ina260] = { 188 .config_default = INA260_CONFIG_DEFAULT, 189 .shunt_div = 400, 190 .bus_voltage_shift = 0, 191 .bus_voltage_lsb = 1250, 192 .power_lsb_factor = 8, 193 .has_alerts = true, 194 .has_ishunt = true, 195 .has_power_average = false, 196 }, 197 [sy24655] = { 198 .config_default = SY24655_CONFIG_DEFAULT, 199 .calibration_value = 4096, 200 .shunt_div = 400, 201 .bus_voltage_shift = 0, 202 .bus_voltage_lsb = 1250, 203 .power_lsb_factor = 25, 204 .has_alerts = true, 205 .has_ishunt = false, 206 .has_power_average = true, 207 }, 208 }; 209 210 /* 211 * Available averaging rates for ina226. The indices correspond with 212 * the bit values expected by the chip (according to the ina226 datasheet, 213 * table 3 AVG bit settings, found at 214 * https://www.ti.com/lit/ds/symlink/ina226.pdf. 215 */ 216 static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 }; 217 218 static int ina226_reg_to_interval(u16 config) 219 { 220 int avg = ina226_avg_tab[INA226_READ_AVG(config)]; 221 222 /* 223 * Multiply the total conversion time by the number of averages. 224 * Return the result in milliseconds. 225 */ 226 return DIV_ROUND_CLOSEST(avg * INA226_TOTAL_CONV_TIME_DEFAULT, 1000); 227 } 228 229 /* 230 * Return the new, shifted AVG field value of CONFIG register, 231 * to use with regmap_update_bits 232 */ 233 static u16 ina226_interval_to_reg(long interval) 234 { 235 int avg, avg_bits; 236 237 /* 238 * The maximum supported interval is 1,024 * (2 * 8.244ms) ~= 16.8s. 239 * Clamp to 32 seconds before calculations to avoid overflows. 240 */ 241 interval = clamp_val(interval, 0, 32000); 242 243 avg = DIV_ROUND_CLOSEST(interval * 1000, 244 INA226_TOTAL_CONV_TIME_DEFAULT); 245 avg_bits = find_closest(avg, ina226_avg_tab, 246 ARRAY_SIZE(ina226_avg_tab)); 247 248 return FIELD_PREP(INA226_AVG_RD_MASK, avg_bits); 249 } 250 251 static int ina2xx_get_value(struct ina2xx_data *data, u8 reg, 252 unsigned int regval) 253 { 254 int val; 255 256 switch (reg) { 257 case INA2XX_SHUNT_VOLTAGE: 258 /* signed register */ 259 val = DIV_ROUND_CLOSEST((s16)regval, data->config->shunt_div); 260 break; 261 case INA2XX_BUS_VOLTAGE: 262 val = (regval >> data->config->bus_voltage_shift) * 263 data->config->bus_voltage_lsb; 264 val = DIV_ROUND_CLOSEST(val, 1000); 265 break; 266 case INA2XX_POWER: 267 val = regval * data->power_lsb_uW; 268 break; 269 case INA2XX_CURRENT: 270 /* signed register, result in mA */ 271 val = (s16)regval * data->current_lsb_uA; 272 val = DIV_ROUND_CLOSEST(val, 1000); 273 break; 274 case INA2XX_CALIBRATION: 275 val = regval; 276 break; 277 default: 278 /* programmer goofed */ 279 WARN_ON_ONCE(1); 280 val = 0; 281 break; 282 } 283 284 return val; 285 } 286 287 /* 288 * Read and convert register value from chip. If the register value is 0, 289 * check if the chip has been power cycled or reset. If so, re-initialize it. 290 */ 291 static int ina2xx_read_init(struct device *dev, int reg, long *val) 292 { 293 struct ina2xx_data *data = dev_get_drvdata(dev); 294 struct regmap *regmap = data->regmap; 295 unsigned int regval; 296 int ret, retry; 297 298 if (data->config->has_ishunt) { 299 /* No calibration needed */ 300 ret = regmap_read(regmap, reg, ®val); 301 if (ret < 0) 302 return ret; 303 *val = ina2xx_get_value(data, reg, regval); 304 return 0; 305 } 306 307 for (retry = 5; retry; retry--) { 308 ret = regmap_read(regmap, reg, ®val); 309 if (ret < 0) 310 return ret; 311 312 /* 313 * If the current value in the calibration register is 0, the 314 * power and current registers will also remain at 0. In case 315 * the chip has been reset let's check the calibration 316 * register and reinitialize if needed. 317 * We do that extra read of the calibration register if there 318 * is some hint of a chip reset. 319 */ 320 if (regval == 0) { 321 unsigned int cal; 322 323 ret = regmap_read_bypassed(regmap, INA2XX_CALIBRATION, &cal); 324 if (ret < 0) 325 return ret; 326 327 if (cal == 0) { 328 dev_warn(dev, "chip not calibrated, reinitializing\n"); 329 330 regcache_mark_dirty(regmap); 331 regcache_sync(regmap); 332 333 /* 334 * Let's make sure the power and current 335 * registers have been updated before trying 336 * again. 337 */ 338 msleep(INA2XX_MAX_DELAY); 339 continue; 340 } 341 } 342 *val = ina2xx_get_value(data, reg, regval); 343 return 0; 344 } 345 346 /* 347 * If we're here then although all write operations succeeded, the 348 * chip still returns 0 in the calibration register. Nothing more we 349 * can do here. 350 */ 351 dev_err(dev, "unable to reinitialize the chip\n"); 352 return -ENODEV; 353 } 354 355 /* 356 * Turns alert limit values into register values. 357 * Opposite of the formula in ina2xx_get_value(). 358 */ 359 static u16 ina226_alert_to_reg(struct ina2xx_data *data, int reg, long val) 360 { 361 switch (reg) { 362 case INA2XX_SHUNT_VOLTAGE: 363 val = clamp_val(val, 0, SHRT_MAX * data->config->shunt_div); 364 val *= data->config->shunt_div; 365 return clamp_val(val, 0, SHRT_MAX); 366 case INA2XX_BUS_VOLTAGE: 367 val = clamp_val(val, 0, 200000); 368 val = (val * 1000) << data->config->bus_voltage_shift; 369 val = DIV_ROUND_CLOSEST(val, data->config->bus_voltage_lsb); 370 return clamp_val(val, 0, USHRT_MAX); 371 case INA2XX_POWER: 372 val = clamp_val(val, 0, UINT_MAX - data->power_lsb_uW); 373 val = DIV_ROUND_CLOSEST(val, data->power_lsb_uW); 374 return clamp_val(val, 0, USHRT_MAX); 375 case INA2XX_CURRENT: 376 val = clamp_val(val, INT_MIN / 1000, INT_MAX / 1000); 377 /* signed register, result in mA */ 378 val = DIV_ROUND_CLOSEST(val * 1000, data->current_lsb_uA); 379 return clamp_val(val, SHRT_MIN, SHRT_MAX); 380 default: 381 /* programmer goofed */ 382 WARN_ON_ONCE(1); 383 return 0; 384 } 385 } 386 387 static int ina226_alert_limit_read(struct ina2xx_data *data, u32 mask, int reg, long *val) 388 { 389 struct regmap *regmap = data->regmap; 390 int regval; 391 int ret; 392 393 mutex_lock(&data->config_lock); 394 ret = regmap_read(regmap, INA226_MASK_ENABLE, ®val); 395 if (ret) 396 goto abort; 397 398 if (regval & mask) { 399 ret = regmap_read(regmap, INA226_ALERT_LIMIT, ®val); 400 if (ret) 401 goto abort; 402 *val = ina2xx_get_value(data, reg, regval); 403 } else { 404 *val = 0; 405 } 406 abort: 407 mutex_unlock(&data->config_lock); 408 return ret; 409 } 410 411 static int ina226_alert_limit_write(struct ina2xx_data *data, u32 mask, int reg, long val) 412 { 413 struct regmap *regmap = data->regmap; 414 int ret; 415 416 if (val < 0) 417 return -EINVAL; 418 419 /* 420 * Clear all alerts first to avoid accidentally triggering ALERT pin 421 * due to register write sequence. Then, only enable the alert 422 * if the value is non-zero. 423 */ 424 mutex_lock(&data->config_lock); 425 ret = regmap_update_bits(regmap, INA226_MASK_ENABLE, 426 INA226_ALERT_CONFIG_MASK, 0); 427 if (ret < 0) 428 goto abort; 429 430 ret = regmap_write(regmap, INA226_ALERT_LIMIT, 431 ina226_alert_to_reg(data, reg, val)); 432 if (ret < 0) 433 goto abort; 434 435 if (val) 436 ret = regmap_update_bits(regmap, INA226_MASK_ENABLE, 437 INA226_ALERT_CONFIG_MASK, mask); 438 abort: 439 mutex_unlock(&data->config_lock); 440 return ret; 441 } 442 443 static int ina2xx_chip_read(struct device *dev, u32 attr, long *val) 444 { 445 struct ina2xx_data *data = dev_get_drvdata(dev); 446 u32 regval; 447 int ret; 448 449 switch (attr) { 450 case hwmon_chip_update_interval: 451 ret = regmap_read(data->regmap, INA2XX_CONFIG, ®val); 452 if (ret) 453 return ret; 454 455 *val = ina226_reg_to_interval(regval); 456 break; 457 default: 458 return -EOPNOTSUPP; 459 } 460 return 0; 461 } 462 463 static int ina226_alert_read(struct regmap *regmap, u32 mask, long *val) 464 { 465 unsigned int regval; 466 int ret; 467 468 ret = regmap_read_bypassed(regmap, INA226_MASK_ENABLE, ®val); 469 if (ret) 470 return ret; 471 472 *val = (regval & mask) && (regval & INA226_ALERT_FUNCTION_FLAG); 473 474 return 0; 475 } 476 477 static int ina2xx_in_read(struct device *dev, u32 attr, int channel, long *val) 478 { 479 int voltage_reg = channel ? INA2XX_BUS_VOLTAGE : INA2XX_SHUNT_VOLTAGE; 480 u32 under_voltage_mask = channel ? INA226_BUS_UNDER_VOLTAGE_MASK 481 : INA226_SHUNT_UNDER_VOLTAGE_MASK; 482 u32 over_voltage_mask = channel ? INA226_BUS_OVER_VOLTAGE_MASK 483 : INA226_SHUNT_OVER_VOLTAGE_MASK; 484 struct ina2xx_data *data = dev_get_drvdata(dev); 485 struct regmap *regmap = data->regmap; 486 unsigned int regval; 487 int ret; 488 489 switch (attr) { 490 case hwmon_in_input: 491 ret = regmap_read(regmap, voltage_reg, ®val); 492 if (ret) 493 return ret; 494 *val = ina2xx_get_value(data, voltage_reg, regval); 495 break; 496 case hwmon_in_lcrit: 497 return ina226_alert_limit_read(data, under_voltage_mask, 498 voltage_reg, val); 499 case hwmon_in_crit: 500 return ina226_alert_limit_read(data, over_voltage_mask, 501 voltage_reg, val); 502 case hwmon_in_lcrit_alarm: 503 return ina226_alert_read(regmap, under_voltage_mask, val); 504 case hwmon_in_crit_alarm: 505 return ina226_alert_read(regmap, over_voltage_mask, val); 506 default: 507 return -EOPNOTSUPP; 508 } 509 return 0; 510 } 511 512 /* 513 * Configuring the READ_EIN (bit 10) of the ACCUM_CONFIG register to 1 514 * can clear accumulator and sample_count after reading the EIN register. 515 * This way, the average power between the last read and the current 516 * read can be obtained. By combining with accurate time data from 517 * outside, the energy consumption during that period can be calculated. 518 */ 519 static int sy24655_average_power_read(struct ina2xx_data *data, u8 reg, long *val) 520 { 521 u8 template[6]; 522 int ret; 523 long accumulator_24, sample_count; 524 525 /* 48-bit register read */ 526 ret = i2c_smbus_read_i2c_block_data(data->client, reg, 6, template); 527 if (ret < 0) 528 return ret; 529 if (ret != 6) 530 return -EIO; 531 accumulator_24 = ((template[3] << 16) | 532 (template[4] << 8) | 533 template[5]); 534 sample_count = ((template[0] << 16) | 535 (template[1] << 8) | 536 template[2]); 537 if (sample_count <= 0) { 538 *val = 0; 539 return 0; 540 } 541 542 *val = DIV_ROUND_CLOSEST(accumulator_24, sample_count) * data->power_lsb_uW; 543 544 return 0; 545 } 546 547 static int ina2xx_power_read(struct device *dev, u32 attr, long *val) 548 { 549 struct ina2xx_data *data = dev_get_drvdata(dev); 550 551 switch (attr) { 552 case hwmon_power_input: 553 return ina2xx_read_init(dev, INA2XX_POWER, val); 554 case hwmon_power_average: 555 return sy24655_average_power_read(data, SY24655_EIN, val); 556 case hwmon_power_crit: 557 return ina226_alert_limit_read(data, INA226_POWER_OVER_LIMIT_MASK, 558 INA2XX_POWER, val); 559 case hwmon_power_crit_alarm: 560 return ina226_alert_read(data->regmap, INA226_POWER_OVER_LIMIT_MASK, val); 561 default: 562 return -EOPNOTSUPP; 563 } 564 } 565 566 static int ina2xx_curr_read(struct device *dev, u32 attr, long *val) 567 { 568 struct ina2xx_data *data = dev_get_drvdata(dev); 569 struct regmap *regmap = data->regmap; 570 unsigned int regval; 571 int ret; 572 573 /* 574 * While the chips supported by this driver do not directly support 575 * current limits, they do support setting shunt voltage limits. 576 * The shunt voltage divided by the shunt resistor value is the current. 577 * On top of that, calibration values are set such that in the shunt 578 * voltage register and the current register report the same values. 579 * That means we can report and configure current limits based on shunt 580 * voltage limits. 581 */ 582 switch (attr) { 583 case hwmon_curr_input: 584 /* 585 * Since the shunt voltage and the current register report the 586 * same values when the chip is calibrated, we can calculate 587 * the current directly from the shunt voltage without relying 588 * on chip calibration. 589 */ 590 ret = regmap_read(regmap, INA2XX_SHUNT_VOLTAGE, ®val); 591 if (ret) 592 return ret; 593 *val = ina2xx_get_value(data, INA2XX_CURRENT, regval); 594 return 0; 595 case hwmon_curr_lcrit: 596 return ina226_alert_limit_read(data, INA226_SHUNT_UNDER_VOLTAGE_MASK, 597 INA2XX_CURRENT, val); 598 case hwmon_curr_crit: 599 return ina226_alert_limit_read(data, INA226_SHUNT_OVER_VOLTAGE_MASK, 600 INA2XX_CURRENT, val); 601 case hwmon_curr_lcrit_alarm: 602 return ina226_alert_read(regmap, INA226_SHUNT_UNDER_VOLTAGE_MASK, val); 603 case hwmon_curr_crit_alarm: 604 return ina226_alert_read(regmap, INA226_SHUNT_OVER_VOLTAGE_MASK, val); 605 default: 606 return -EOPNOTSUPP; 607 } 608 } 609 610 static int ina2xx_read(struct device *dev, enum hwmon_sensor_types type, 611 u32 attr, int channel, long *val) 612 { 613 switch (type) { 614 case hwmon_chip: 615 return ina2xx_chip_read(dev, attr, val); 616 case hwmon_in: 617 return ina2xx_in_read(dev, attr, channel, val); 618 case hwmon_power: 619 return ina2xx_power_read(dev, attr, val); 620 case hwmon_curr: 621 return ina2xx_curr_read(dev, attr, val); 622 default: 623 return -EOPNOTSUPP; 624 } 625 } 626 627 static int ina2xx_chip_write(struct device *dev, u32 attr, long val) 628 { 629 struct ina2xx_data *data = dev_get_drvdata(dev); 630 631 switch (attr) { 632 case hwmon_chip_update_interval: 633 return regmap_update_bits(data->regmap, INA2XX_CONFIG, 634 INA226_AVG_RD_MASK, 635 ina226_interval_to_reg(val)); 636 default: 637 return -EOPNOTSUPP; 638 } 639 } 640 641 static int ina2xx_in_write(struct device *dev, u32 attr, int channel, long val) 642 { 643 struct ina2xx_data *data = dev_get_drvdata(dev); 644 645 switch (attr) { 646 case hwmon_in_lcrit: 647 return ina226_alert_limit_write(data, 648 channel ? INA226_BUS_UNDER_VOLTAGE_MASK : INA226_SHUNT_UNDER_VOLTAGE_MASK, 649 channel ? INA2XX_BUS_VOLTAGE : INA2XX_SHUNT_VOLTAGE, 650 val); 651 case hwmon_in_crit: 652 return ina226_alert_limit_write(data, 653 channel ? INA226_BUS_OVER_VOLTAGE_MASK : INA226_SHUNT_OVER_VOLTAGE_MASK, 654 channel ? INA2XX_BUS_VOLTAGE : INA2XX_SHUNT_VOLTAGE, 655 val); 656 default: 657 return -EOPNOTSUPP; 658 } 659 return 0; 660 } 661 662 static int ina2xx_power_write(struct device *dev, u32 attr, long val) 663 { 664 struct ina2xx_data *data = dev_get_drvdata(dev); 665 666 switch (attr) { 667 case hwmon_power_crit: 668 return ina226_alert_limit_write(data, INA226_POWER_OVER_LIMIT_MASK, 669 INA2XX_POWER, val); 670 default: 671 return -EOPNOTSUPP; 672 } 673 return 0; 674 } 675 676 static int ina2xx_curr_write(struct device *dev, u32 attr, long val) 677 { 678 struct ina2xx_data *data = dev_get_drvdata(dev); 679 680 switch (attr) { 681 case hwmon_curr_lcrit: 682 return ina226_alert_limit_write(data, INA226_SHUNT_UNDER_VOLTAGE_MASK, 683 INA2XX_CURRENT, val); 684 case hwmon_curr_crit: 685 return ina226_alert_limit_write(data, INA226_SHUNT_OVER_VOLTAGE_MASK, 686 INA2XX_CURRENT, val); 687 default: 688 return -EOPNOTSUPP; 689 } 690 return 0; 691 } 692 693 static int ina2xx_write(struct device *dev, enum hwmon_sensor_types type, 694 u32 attr, int channel, long val) 695 { 696 switch (type) { 697 case hwmon_chip: 698 return ina2xx_chip_write(dev, attr, val); 699 case hwmon_in: 700 return ina2xx_in_write(dev, attr, channel, val); 701 case hwmon_power: 702 return ina2xx_power_write(dev, attr, val); 703 case hwmon_curr: 704 return ina2xx_curr_write(dev, attr, val); 705 default: 706 return -EOPNOTSUPP; 707 } 708 } 709 710 static umode_t ina2xx_is_visible(const void *_data, enum hwmon_sensor_types type, 711 u32 attr, int channel) 712 { 713 const struct ina2xx_data *data = _data; 714 bool has_alerts = data->config->has_alerts; 715 bool has_power_average = data->config->has_power_average; 716 enum ina2xx_ids chip = data->chip; 717 718 switch (type) { 719 case hwmon_in: 720 switch (attr) { 721 case hwmon_in_input: 722 return 0444; 723 case hwmon_in_lcrit: 724 case hwmon_in_crit: 725 if (has_alerts) 726 return 0644; 727 break; 728 case hwmon_in_lcrit_alarm: 729 case hwmon_in_crit_alarm: 730 if (has_alerts) 731 return 0444; 732 break; 733 default: 734 break; 735 } 736 break; 737 case hwmon_curr: 738 switch (attr) { 739 case hwmon_curr_input: 740 return 0444; 741 case hwmon_curr_lcrit: 742 case hwmon_curr_crit: 743 if (has_alerts) 744 return 0644; 745 break; 746 case hwmon_curr_lcrit_alarm: 747 case hwmon_curr_crit_alarm: 748 if (has_alerts) 749 return 0444; 750 break; 751 default: 752 break; 753 } 754 break; 755 case hwmon_power: 756 switch (attr) { 757 case hwmon_power_input: 758 return 0444; 759 case hwmon_power_crit: 760 if (has_alerts) 761 return 0644; 762 break; 763 case hwmon_power_crit_alarm: 764 if (has_alerts) 765 return 0444; 766 break; 767 case hwmon_power_average: 768 if (has_power_average) 769 return 0444; 770 break; 771 default: 772 break; 773 } 774 break; 775 case hwmon_chip: 776 switch (attr) { 777 case hwmon_chip_update_interval: 778 if (chip == ina226 || chip == ina260) 779 return 0644; 780 break; 781 default: 782 break; 783 } 784 break; 785 default: 786 break; 787 } 788 return 0; 789 } 790 791 static const struct hwmon_channel_info * const ina2xx_info[] = { 792 HWMON_CHANNEL_INFO(chip, 793 HWMON_C_UPDATE_INTERVAL), 794 HWMON_CHANNEL_INFO(in, 795 HWMON_I_INPUT | HWMON_I_CRIT | HWMON_I_CRIT_ALARM | 796 HWMON_I_LCRIT | HWMON_I_LCRIT_ALARM, 797 HWMON_I_INPUT | HWMON_I_CRIT | HWMON_I_CRIT_ALARM | 798 HWMON_I_LCRIT | HWMON_I_LCRIT_ALARM 799 ), 800 HWMON_CHANNEL_INFO(curr, HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM | 801 HWMON_C_LCRIT | HWMON_C_LCRIT_ALARM), 802 HWMON_CHANNEL_INFO(power, 803 HWMON_P_INPUT | HWMON_P_CRIT | HWMON_P_CRIT_ALARM | 804 HWMON_P_AVERAGE), 805 NULL 806 }; 807 808 static const struct hwmon_ops ina2xx_hwmon_ops = { 809 .is_visible = ina2xx_is_visible, 810 .read = ina2xx_read, 811 .write = ina2xx_write, 812 }; 813 814 static const struct hwmon_chip_info ina2xx_chip_info = { 815 .ops = &ina2xx_hwmon_ops, 816 .info = ina2xx_info, 817 }; 818 819 /* shunt resistance */ 820 821 /* 822 * In order to keep calibration register value fixed, the product 823 * of current_lsb and shunt_resistor should also be fixed and equal 824 * to shunt_voltage_lsb = 1 / shunt_div multiplied by 10^9 in order 825 * to keep the scale. 826 */ 827 static int ina2xx_set_shunt(struct ina2xx_data *data, unsigned long val) 828 { 829 unsigned int dividend = DIV_ROUND_CLOSEST(1000000000, 830 data->config->shunt_div); 831 if (!val || val > dividend) 832 return -EINVAL; 833 834 data->rshunt = val; 835 data->current_lsb_uA = DIV_ROUND_CLOSEST(dividend, val); 836 data->power_lsb_uW = data->config->power_lsb_factor * 837 data->current_lsb_uA; 838 839 return 0; 840 } 841 842 static ssize_t shunt_resistor_show(struct device *dev, 843 struct device_attribute *da, char *buf) 844 { 845 struct ina2xx_data *data = dev_get_drvdata(dev); 846 847 return sysfs_emit(buf, "%li\n", data->rshunt); 848 } 849 850 static ssize_t shunt_resistor_store(struct device *dev, 851 struct device_attribute *da, 852 const char *buf, size_t count) 853 { 854 struct ina2xx_data *data = dev_get_drvdata(dev); 855 unsigned long val; 856 int status; 857 858 status = kstrtoul(buf, 10, &val); 859 if (status < 0) 860 return status; 861 862 mutex_lock(&data->config_lock); 863 status = ina2xx_set_shunt(data, val); 864 mutex_unlock(&data->config_lock); 865 if (status < 0) 866 return status; 867 return count; 868 } 869 870 static DEVICE_ATTR_RW(shunt_resistor); 871 872 /* pointers to created device attributes */ 873 static struct attribute *ina2xx_attrs[] = { 874 &dev_attr_shunt_resistor.attr, 875 NULL, 876 }; 877 ATTRIBUTE_GROUPS(ina2xx); 878 879 /* 880 * Initialize chip 881 */ 882 static int ina2xx_init(struct device *dev, struct ina2xx_data *data) 883 { 884 struct regmap *regmap = data->regmap; 885 u32 shunt; 886 int ret; 887 888 if (data->config->has_ishunt) 889 shunt = INA260_RSHUNT; 890 else if (device_property_read_u32(dev, "shunt-resistor", &shunt) < 0) 891 shunt = INA2XX_RSHUNT_DEFAULT; 892 893 ret = ina2xx_set_shunt(data, shunt); 894 if (ret < 0) 895 return ret; 896 897 ret = regmap_write(regmap, INA2XX_CONFIG, data->config->config_default); 898 if (ret < 0) 899 return ret; 900 901 if (data->config->has_alerts) { 902 bool active_high = device_property_read_bool(dev, "ti,alert-polarity-active-high"); 903 904 regmap_update_bits(regmap, INA226_MASK_ENABLE, 905 INA226_ALERT_LATCH_ENABLE | INA226_ALERT_POLARITY, 906 INA226_ALERT_LATCH_ENABLE | 907 FIELD_PREP(INA226_ALERT_POLARITY, active_high)); 908 } 909 if (data->config->has_power_average) { 910 if (data->chip == sy24655) { 911 /* 912 * Initialize the power accumulation method to continuous 913 * mode and clear the EIN register after each read of the 914 * EIN register 915 */ 916 ret = regmap_write(regmap, SY24655_ACCUM_CONFIG, 917 SY24655_ACCUM_CONFIG_DEFAULT); 918 if (ret < 0) 919 return ret; 920 } 921 } 922 923 if (data->config->has_ishunt) 924 return 0; 925 926 /* 927 * Calibration register is set to the best value, which eliminates 928 * truncation errors on calculating current register in hardware. 929 * According to datasheet (eq. 3) the best values are 2048 for 930 * ina226 and 4096 for ina219. They are hardcoded as calibration_value. 931 */ 932 return regmap_write(regmap, INA2XX_CALIBRATION, 933 data->config->calibration_value); 934 } 935 936 static int ina2xx_probe(struct i2c_client *client) 937 { 938 struct device *dev = &client->dev; 939 struct ina2xx_data *data; 940 struct device *hwmon_dev; 941 enum ina2xx_ids chip; 942 int ret; 943 944 chip = (uintptr_t)i2c_get_match_data(client); 945 946 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); 947 if (!data) 948 return -ENOMEM; 949 950 /* set the device type */ 951 data->client = client; 952 data->config = &ina2xx_config[chip]; 953 data->chip = chip; 954 mutex_init(&data->config_lock); 955 956 data->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config); 957 if (IS_ERR(data->regmap)) { 958 dev_err(dev, "failed to allocate register map\n"); 959 return PTR_ERR(data->regmap); 960 } 961 962 ret = devm_regulator_get_enable(dev, "vs"); 963 if (ret) 964 return dev_err_probe(dev, ret, "failed to enable vs regulator\n"); 965 966 ret = ina2xx_init(dev, data); 967 if (ret < 0) 968 return dev_err_probe(dev, ret, "failed to configure device\n"); 969 970 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 971 data, &ina2xx_chip_info, 972 data->config->has_ishunt ? 973 NULL : ina2xx_groups); 974 if (IS_ERR(hwmon_dev)) 975 return PTR_ERR(hwmon_dev); 976 977 dev_info(dev, "power monitor %s (Rshunt = %li uOhm)\n", 978 client->name, data->rshunt); 979 980 return 0; 981 } 982 983 static const struct i2c_device_id ina2xx_id[] = { 984 { "ina219", ina219 }, 985 { "ina220", ina219 }, 986 { "ina226", ina226 }, 987 { "ina230", ina226 }, 988 { "ina231", ina226 }, 989 { "ina260", ina260 }, 990 { "sy24655", sy24655 }, 991 { } 992 }; 993 MODULE_DEVICE_TABLE(i2c, ina2xx_id); 994 995 static const struct of_device_id __maybe_unused ina2xx_of_match[] = { 996 { 997 .compatible = "silergy,sy24655", 998 .data = (void *)sy24655 999 }, 1000 { 1001 .compatible = "ti,ina219", 1002 .data = (void *)ina219 1003 }, 1004 { 1005 .compatible = "ti,ina220", 1006 .data = (void *)ina219 1007 }, 1008 { 1009 .compatible = "ti,ina226", 1010 .data = (void *)ina226 1011 }, 1012 { 1013 .compatible = "ti,ina230", 1014 .data = (void *)ina226 1015 }, 1016 { 1017 .compatible = "ti,ina231", 1018 .data = (void *)ina226 1019 }, 1020 { 1021 .compatible = "ti,ina260", 1022 .data = (void *)ina260 1023 }, 1024 { } 1025 }; 1026 MODULE_DEVICE_TABLE(of, ina2xx_of_match); 1027 1028 static struct i2c_driver ina2xx_driver = { 1029 .driver = { 1030 .name = "ina2xx", 1031 .of_match_table = of_match_ptr(ina2xx_of_match), 1032 }, 1033 .probe = ina2xx_probe, 1034 .id_table = ina2xx_id, 1035 }; 1036 1037 module_i2c_driver(ina2xx_driver); 1038 1039 MODULE_AUTHOR("Lothar Felten <l-felten@ti.com>"); 1040 MODULE_DESCRIPTION("ina2xx driver"); 1041 MODULE_LICENSE("GPL"); 1042