1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for Texas Instruments INA219, INA226 power monitor chips 4 * 5 * INA219: 6 * Zero Drift Bi-Directional Current/Power Monitor with I2C Interface 7 * Datasheet: https://www.ti.com/product/ina219 8 * 9 * INA220: 10 * Bi-Directional Current/Power Monitor with I2C Interface 11 * Datasheet: https://www.ti.com/product/ina220 12 * 13 * INA226: 14 * Bi-Directional Current/Power Monitor with I2C Interface 15 * Datasheet: https://www.ti.com/product/ina226 16 * 17 * INA230: 18 * Bi-directional Current/Power Monitor with I2C Interface 19 * Datasheet: https://www.ti.com/product/ina230 20 * 21 * Copyright (C) 2012 Lothar Felten <lothar.felten@gmail.com> 22 * Thanks to Jan Volkering 23 */ 24 25 #include <linux/bitfield.h> 26 #include <linux/bits.h> 27 #include <linux/delay.h> 28 #include <linux/device.h> 29 #include <linux/err.h> 30 #include <linux/hwmon.h> 31 #include <linux/i2c.h> 32 #include <linux/init.h> 33 #include <linux/kernel.h> 34 #include <linux/module.h> 35 #include <linux/property.h> 36 #include <linux/regmap.h> 37 #include <linux/slab.h> 38 #include <linux/sysfs.h> 39 #include <linux/util_macros.h> 40 41 /* common register definitions */ 42 #define INA2XX_CONFIG 0x00 43 #define INA2XX_SHUNT_VOLTAGE 0x01 /* readonly */ 44 #define INA2XX_BUS_VOLTAGE 0x02 /* readonly */ 45 #define INA2XX_POWER 0x03 /* readonly */ 46 #define INA2XX_CURRENT 0x04 /* readonly */ 47 #define INA2XX_CALIBRATION 0x05 48 49 /* INA226 register definitions */ 50 #define INA226_MASK_ENABLE 0x06 51 #define INA226_ALERT_LIMIT 0x07 52 #define INA226_DIE_ID 0xFF 53 54 #define INA2XX_MAX_REGISTERS 8 55 56 /* settings - depend on use case */ 57 #define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */ 58 #define INA226_CONFIG_DEFAULT 0x4527 /* averages=16 */ 59 60 /* worst case is 68.10 ms (~14.6Hz, ina219) */ 61 #define INA2XX_CONVERSION_RATE 15 62 #define INA2XX_MAX_DELAY 69 /* worst case delay in ms */ 63 64 #define INA2XX_RSHUNT_DEFAULT 10000 65 66 /* bit mask for reading the averaging setting in the configuration register */ 67 #define INA226_AVG_RD_MASK GENMASK(11, 9) 68 69 #define INA226_READ_AVG(reg) FIELD_GET(INA226_AVG_RD_MASK, reg) 70 71 #define INA226_ALERT_LATCH_ENABLE BIT(0) 72 #define INA226_ALERT_POLARITY BIT(1) 73 74 /* bit number of alert functions in Mask/Enable Register */ 75 #define INA226_SHUNT_OVER_VOLTAGE_MASK BIT(15) 76 #define INA226_SHUNT_UNDER_VOLTAGE_MASK BIT(14) 77 #define INA226_BUS_OVER_VOLTAGE_MASK BIT(13) 78 #define INA226_BUS_UNDER_VOLTAGE_MASK BIT(12) 79 #define INA226_POWER_OVER_LIMIT_MASK BIT(11) 80 81 /* bit mask for alert config bits of Mask/Enable Register */ 82 #define INA226_ALERT_CONFIG_MASK GENMASK(15, 10) 83 #define INA226_ALERT_FUNCTION_FLAG BIT(4) 84 85 /* 86 * Both bus voltage and shunt voltage conversion times for ina226 are set 87 * to 0b0100 on POR, which translates to 2200 microseconds in total. 88 */ 89 #define INA226_TOTAL_CONV_TIME_DEFAULT 2200 90 91 static bool ina2xx_writeable_reg(struct device *dev, unsigned int reg) 92 { 93 switch (reg) { 94 case INA2XX_CONFIG: 95 case INA2XX_CALIBRATION: 96 case INA226_MASK_ENABLE: 97 case INA226_ALERT_LIMIT: 98 return true; 99 default: 100 return false; 101 } 102 } 103 104 static bool ina2xx_volatile_reg(struct device *dev, unsigned int reg) 105 { 106 switch (reg) { 107 case INA2XX_SHUNT_VOLTAGE: 108 case INA2XX_BUS_VOLTAGE: 109 case INA2XX_POWER: 110 case INA2XX_CURRENT: 111 return true; 112 default: 113 return false; 114 } 115 } 116 117 static const struct regmap_config ina2xx_regmap_config = { 118 .reg_bits = 8, 119 .val_bits = 16, 120 .use_single_write = true, 121 .use_single_read = true, 122 .max_register = INA2XX_MAX_REGISTERS, 123 .cache_type = REGCACHE_MAPLE, 124 .volatile_reg = ina2xx_volatile_reg, 125 .writeable_reg = ina2xx_writeable_reg, 126 }; 127 128 enum ina2xx_ids { ina219, ina226 }; 129 130 struct ina2xx_config { 131 u16 config_default; 132 int calibration_value; 133 int shunt_div; 134 int bus_voltage_shift; 135 int bus_voltage_lsb; /* uV */ 136 int power_lsb_factor; 137 }; 138 139 struct ina2xx_data { 140 const struct ina2xx_config *config; 141 enum ina2xx_ids chip; 142 143 long rshunt; 144 long current_lsb_uA; 145 long power_lsb_uW; 146 struct mutex config_lock; 147 struct regmap *regmap; 148 }; 149 150 static const struct ina2xx_config ina2xx_config[] = { 151 [ina219] = { 152 .config_default = INA219_CONFIG_DEFAULT, 153 .calibration_value = 4096, 154 .shunt_div = 100, 155 .bus_voltage_shift = 3, 156 .bus_voltage_lsb = 4000, 157 .power_lsb_factor = 20, 158 }, 159 [ina226] = { 160 .config_default = INA226_CONFIG_DEFAULT, 161 .calibration_value = 2048, 162 .shunt_div = 400, 163 .bus_voltage_shift = 0, 164 .bus_voltage_lsb = 1250, 165 .power_lsb_factor = 25, 166 }, 167 }; 168 169 /* 170 * Available averaging rates for ina226. The indices correspond with 171 * the bit values expected by the chip (according to the ina226 datasheet, 172 * table 3 AVG bit settings, found at 173 * https://www.ti.com/lit/ds/symlink/ina226.pdf. 174 */ 175 static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 }; 176 177 static int ina226_reg_to_interval(u16 config) 178 { 179 int avg = ina226_avg_tab[INA226_READ_AVG(config)]; 180 181 /* 182 * Multiply the total conversion time by the number of averages. 183 * Return the result in milliseconds. 184 */ 185 return DIV_ROUND_CLOSEST(avg * INA226_TOTAL_CONV_TIME_DEFAULT, 1000); 186 } 187 188 /* 189 * Return the new, shifted AVG field value of CONFIG register, 190 * to use with regmap_update_bits 191 */ 192 static u16 ina226_interval_to_reg(long interval) 193 { 194 int avg, avg_bits; 195 196 /* 197 * The maximum supported interval is 1,024 * (2 * 8.244ms) ~= 16.8s. 198 * Clamp to 32 seconds before calculations to avoid overflows. 199 */ 200 interval = clamp_val(interval, 0, 32000); 201 202 avg = DIV_ROUND_CLOSEST(interval * 1000, 203 INA226_TOTAL_CONV_TIME_DEFAULT); 204 avg_bits = find_closest(avg, ina226_avg_tab, 205 ARRAY_SIZE(ina226_avg_tab)); 206 207 return FIELD_PREP(INA226_AVG_RD_MASK, avg_bits); 208 } 209 210 static int ina2xx_get_value(struct ina2xx_data *data, u8 reg, 211 unsigned int regval) 212 { 213 int val; 214 215 switch (reg) { 216 case INA2XX_SHUNT_VOLTAGE: 217 /* signed register */ 218 val = DIV_ROUND_CLOSEST((s16)regval, data->config->shunt_div); 219 break; 220 case INA2XX_BUS_VOLTAGE: 221 val = (regval >> data->config->bus_voltage_shift) * 222 data->config->bus_voltage_lsb; 223 val = DIV_ROUND_CLOSEST(val, 1000); 224 break; 225 case INA2XX_POWER: 226 val = regval * data->power_lsb_uW; 227 break; 228 case INA2XX_CURRENT: 229 /* signed register, result in mA */ 230 val = (s16)regval * data->current_lsb_uA; 231 val = DIV_ROUND_CLOSEST(val, 1000); 232 break; 233 case INA2XX_CALIBRATION: 234 val = regval; 235 break; 236 default: 237 /* programmer goofed */ 238 WARN_ON_ONCE(1); 239 val = 0; 240 break; 241 } 242 243 return val; 244 } 245 246 /* 247 * Read and convert register value from chip. If the register value is 0, 248 * check if the chip has been power cycled or reset. If so, re-initialize it. 249 */ 250 static int ina2xx_read_init(struct device *dev, int reg, long *val) 251 { 252 struct ina2xx_data *data = dev_get_drvdata(dev); 253 struct regmap *regmap = data->regmap; 254 unsigned int regval; 255 int ret, retry; 256 257 for (retry = 5; retry; retry--) { 258 ret = regmap_read(regmap, reg, ®val); 259 if (ret < 0) 260 return ret; 261 262 /* 263 * If the current value in the calibration register is 0, the 264 * power and current registers will also remain at 0. In case 265 * the chip has been reset let's check the calibration 266 * register and reinitialize if needed. 267 * We do that extra read of the calibration register if there 268 * is some hint of a chip reset. 269 */ 270 if (regval == 0) { 271 unsigned int cal; 272 273 ret = regmap_read_bypassed(regmap, INA2XX_CALIBRATION, &cal); 274 if (ret < 0) 275 return ret; 276 277 if (cal == 0) { 278 dev_warn(dev, "chip not calibrated, reinitializing\n"); 279 280 regcache_mark_dirty(regmap); 281 regcache_sync(regmap); 282 283 /* 284 * Let's make sure the power and current 285 * registers have been updated before trying 286 * again. 287 */ 288 msleep(INA2XX_MAX_DELAY); 289 continue; 290 } 291 } 292 *val = ina2xx_get_value(data, reg, regval); 293 return 0; 294 } 295 296 /* 297 * If we're here then although all write operations succeeded, the 298 * chip still returns 0 in the calibration register. Nothing more we 299 * can do here. 300 */ 301 dev_err(dev, "unable to reinitialize the chip\n"); 302 return -ENODEV; 303 } 304 305 /* 306 * Turns alert limit values into register values. 307 * Opposite of the formula in ina2xx_get_value(). 308 */ 309 static u16 ina226_alert_to_reg(struct ina2xx_data *data, int reg, long val) 310 { 311 switch (reg) { 312 case INA2XX_SHUNT_VOLTAGE: 313 val = clamp_val(val, 0, SHRT_MAX * data->config->shunt_div); 314 val *= data->config->shunt_div; 315 return clamp_val(val, 0, SHRT_MAX); 316 case INA2XX_BUS_VOLTAGE: 317 val = clamp_val(val, 0, 200000); 318 val = (val * 1000) << data->config->bus_voltage_shift; 319 val = DIV_ROUND_CLOSEST(val, data->config->bus_voltage_lsb); 320 return clamp_val(val, 0, USHRT_MAX); 321 case INA2XX_POWER: 322 val = clamp_val(val, 0, UINT_MAX - data->power_lsb_uW); 323 val = DIV_ROUND_CLOSEST(val, data->power_lsb_uW); 324 return clamp_val(val, 0, USHRT_MAX); 325 case INA2XX_CURRENT: 326 val = clamp_val(val, INT_MIN / 1000, INT_MAX / 1000); 327 /* signed register, result in mA */ 328 val = DIV_ROUND_CLOSEST(val * 1000, data->current_lsb_uA); 329 return clamp_val(val, SHRT_MIN, SHRT_MAX); 330 default: 331 /* programmer goofed */ 332 WARN_ON_ONCE(1); 333 return 0; 334 } 335 } 336 337 static int ina226_alert_limit_read(struct ina2xx_data *data, u32 mask, int reg, long *val) 338 { 339 struct regmap *regmap = data->regmap; 340 int regval; 341 int ret; 342 343 mutex_lock(&data->config_lock); 344 ret = regmap_read(regmap, INA226_MASK_ENABLE, ®val); 345 if (ret) 346 goto abort; 347 348 if (regval & mask) { 349 ret = regmap_read(regmap, INA226_ALERT_LIMIT, ®val); 350 if (ret) 351 goto abort; 352 *val = ina2xx_get_value(data, reg, regval); 353 } else { 354 *val = 0; 355 } 356 abort: 357 mutex_unlock(&data->config_lock); 358 return ret; 359 } 360 361 static int ina226_alert_limit_write(struct ina2xx_data *data, u32 mask, int reg, long val) 362 { 363 struct regmap *regmap = data->regmap; 364 int ret; 365 366 if (val < 0) 367 return -EINVAL; 368 369 /* 370 * Clear all alerts first to avoid accidentally triggering ALERT pin 371 * due to register write sequence. Then, only enable the alert 372 * if the value is non-zero. 373 */ 374 mutex_lock(&data->config_lock); 375 ret = regmap_update_bits(regmap, INA226_MASK_ENABLE, 376 INA226_ALERT_CONFIG_MASK, 0); 377 if (ret < 0) 378 goto abort; 379 380 ret = regmap_write(regmap, INA226_ALERT_LIMIT, 381 ina226_alert_to_reg(data, reg, val)); 382 if (ret < 0) 383 goto abort; 384 385 if (val) 386 ret = regmap_update_bits(regmap, INA226_MASK_ENABLE, 387 INA226_ALERT_CONFIG_MASK, mask); 388 abort: 389 mutex_unlock(&data->config_lock); 390 return ret; 391 } 392 393 static int ina2xx_chip_read(struct device *dev, u32 attr, long *val) 394 { 395 struct ina2xx_data *data = dev_get_drvdata(dev); 396 u32 regval; 397 int ret; 398 399 switch (attr) { 400 case hwmon_chip_update_interval: 401 ret = regmap_read(data->regmap, INA2XX_CONFIG, ®val); 402 if (ret) 403 return ret; 404 405 *val = ina226_reg_to_interval(regval); 406 break; 407 default: 408 return -EOPNOTSUPP; 409 } 410 return 0; 411 } 412 413 static int ina226_alert_read(struct regmap *regmap, u32 mask, long *val) 414 { 415 unsigned int regval; 416 int ret; 417 418 ret = regmap_read_bypassed(regmap, INA226_MASK_ENABLE, ®val); 419 if (ret) 420 return ret; 421 422 *val = (regval & mask) && (regval & INA226_ALERT_FUNCTION_FLAG); 423 424 return 0; 425 } 426 427 static int ina2xx_in_read(struct device *dev, u32 attr, int channel, long *val) 428 { 429 int voltage_reg = channel ? INA2XX_BUS_VOLTAGE : INA2XX_SHUNT_VOLTAGE; 430 u32 under_voltage_mask = channel ? INA226_BUS_UNDER_VOLTAGE_MASK 431 : INA226_SHUNT_UNDER_VOLTAGE_MASK; 432 u32 over_voltage_mask = channel ? INA226_BUS_OVER_VOLTAGE_MASK 433 : INA226_SHUNT_OVER_VOLTAGE_MASK; 434 struct ina2xx_data *data = dev_get_drvdata(dev); 435 struct regmap *regmap = data->regmap; 436 unsigned int regval; 437 int ret; 438 439 switch (attr) { 440 case hwmon_in_input: 441 ret = regmap_read(regmap, voltage_reg, ®val); 442 if (ret) 443 return ret; 444 *val = ina2xx_get_value(data, voltage_reg, regval); 445 break; 446 case hwmon_in_lcrit: 447 return ina226_alert_limit_read(data, under_voltage_mask, 448 voltage_reg, val); 449 case hwmon_in_crit: 450 return ina226_alert_limit_read(data, over_voltage_mask, 451 voltage_reg, val); 452 case hwmon_in_lcrit_alarm: 453 return ina226_alert_read(regmap, under_voltage_mask, val); 454 case hwmon_in_crit_alarm: 455 return ina226_alert_read(regmap, over_voltage_mask, val); 456 default: 457 return -EOPNOTSUPP; 458 } 459 return 0; 460 } 461 462 static int ina2xx_power_read(struct device *dev, u32 attr, long *val) 463 { 464 struct ina2xx_data *data = dev_get_drvdata(dev); 465 466 switch (attr) { 467 case hwmon_power_input: 468 return ina2xx_read_init(dev, INA2XX_POWER, val); 469 case hwmon_power_crit: 470 return ina226_alert_limit_read(data, INA226_POWER_OVER_LIMIT_MASK, 471 INA2XX_POWER, val); 472 case hwmon_power_crit_alarm: 473 return ina226_alert_read(data->regmap, INA226_POWER_OVER_LIMIT_MASK, val); 474 default: 475 return -EOPNOTSUPP; 476 } 477 } 478 479 static int ina2xx_curr_read(struct device *dev, u32 attr, long *val) 480 { 481 struct ina2xx_data *data = dev_get_drvdata(dev); 482 struct regmap *regmap = data->regmap; 483 unsigned int regval; 484 int ret; 485 486 /* 487 * While the chips supported by this driver do not directly support 488 * current limits, they do support setting shunt voltage limits. 489 * The shunt voltage divided by the shunt resistor value is the current. 490 * On top of that, calibration values are set such that in the shunt 491 * voltage register and the current register report the same values. 492 * That means we can report and configure current limits based on shunt 493 * voltage limits. 494 */ 495 switch (attr) { 496 case hwmon_curr_input: 497 /* 498 * Since the shunt voltage and the current register report the 499 * same values when the chip is calibrated, we can calculate 500 * the current directly from the shunt voltage without relying 501 * on chip calibration. 502 */ 503 ret = regmap_read(regmap, INA2XX_SHUNT_VOLTAGE, ®val); 504 if (ret) 505 return ret; 506 *val = ina2xx_get_value(data, INA2XX_CURRENT, regval); 507 return 0; 508 case hwmon_curr_lcrit: 509 return ina226_alert_limit_read(data, INA226_SHUNT_UNDER_VOLTAGE_MASK, 510 INA2XX_CURRENT, val); 511 case hwmon_curr_crit: 512 return ina226_alert_limit_read(data, INA226_SHUNT_OVER_VOLTAGE_MASK, 513 INA2XX_CURRENT, val); 514 case hwmon_curr_lcrit_alarm: 515 return ina226_alert_read(regmap, INA226_SHUNT_UNDER_VOLTAGE_MASK, val); 516 case hwmon_curr_crit_alarm: 517 return ina226_alert_read(regmap, INA226_SHUNT_OVER_VOLTAGE_MASK, val); 518 default: 519 return -EOPNOTSUPP; 520 } 521 } 522 523 static int ina2xx_read(struct device *dev, enum hwmon_sensor_types type, 524 u32 attr, int channel, long *val) 525 { 526 switch (type) { 527 case hwmon_chip: 528 return ina2xx_chip_read(dev, attr, val); 529 case hwmon_in: 530 return ina2xx_in_read(dev, attr, channel, val); 531 case hwmon_power: 532 return ina2xx_power_read(dev, attr, val); 533 case hwmon_curr: 534 return ina2xx_curr_read(dev, attr, val); 535 default: 536 return -EOPNOTSUPP; 537 } 538 } 539 540 static int ina2xx_chip_write(struct device *dev, u32 attr, long val) 541 { 542 struct ina2xx_data *data = dev_get_drvdata(dev); 543 544 switch (attr) { 545 case hwmon_chip_update_interval: 546 return regmap_update_bits(data->regmap, INA2XX_CONFIG, 547 INA226_AVG_RD_MASK, 548 ina226_interval_to_reg(val)); 549 default: 550 return -EOPNOTSUPP; 551 } 552 } 553 554 static int ina2xx_in_write(struct device *dev, u32 attr, int channel, long val) 555 { 556 struct ina2xx_data *data = dev_get_drvdata(dev); 557 558 switch (attr) { 559 case hwmon_in_lcrit: 560 return ina226_alert_limit_write(data, 561 channel ? INA226_BUS_UNDER_VOLTAGE_MASK : INA226_SHUNT_UNDER_VOLTAGE_MASK, 562 channel ? INA2XX_BUS_VOLTAGE : INA2XX_SHUNT_VOLTAGE, 563 val); 564 case hwmon_in_crit: 565 return ina226_alert_limit_write(data, 566 channel ? INA226_BUS_OVER_VOLTAGE_MASK : INA226_SHUNT_OVER_VOLTAGE_MASK, 567 channel ? INA2XX_BUS_VOLTAGE : INA2XX_SHUNT_VOLTAGE, 568 val); 569 default: 570 return -EOPNOTSUPP; 571 } 572 return 0; 573 } 574 575 static int ina2xx_power_write(struct device *dev, u32 attr, long val) 576 { 577 struct ina2xx_data *data = dev_get_drvdata(dev); 578 579 switch (attr) { 580 case hwmon_power_crit: 581 return ina226_alert_limit_write(data, INA226_POWER_OVER_LIMIT_MASK, 582 INA2XX_POWER, val); 583 default: 584 return -EOPNOTSUPP; 585 } 586 return 0; 587 } 588 589 static int ina2xx_curr_write(struct device *dev, u32 attr, long val) 590 { 591 struct ina2xx_data *data = dev_get_drvdata(dev); 592 593 switch (attr) { 594 case hwmon_curr_lcrit: 595 return ina226_alert_limit_write(data, INA226_SHUNT_UNDER_VOLTAGE_MASK, 596 INA2XX_CURRENT, val); 597 case hwmon_curr_crit: 598 return ina226_alert_limit_write(data, INA226_SHUNT_OVER_VOLTAGE_MASK, 599 INA2XX_CURRENT, val); 600 default: 601 return -EOPNOTSUPP; 602 } 603 return 0; 604 } 605 606 static int ina2xx_write(struct device *dev, enum hwmon_sensor_types type, 607 u32 attr, int channel, long val) 608 { 609 switch (type) { 610 case hwmon_chip: 611 return ina2xx_chip_write(dev, attr, val); 612 case hwmon_in: 613 return ina2xx_in_write(dev, attr, channel, val); 614 case hwmon_power: 615 return ina2xx_power_write(dev, attr, val); 616 case hwmon_curr: 617 return ina2xx_curr_write(dev, attr, val); 618 default: 619 return -EOPNOTSUPP; 620 } 621 } 622 623 static umode_t ina2xx_is_visible(const void *_data, enum hwmon_sensor_types type, 624 u32 attr, int channel) 625 { 626 const struct ina2xx_data *data = _data; 627 enum ina2xx_ids chip = data->chip; 628 629 switch (type) { 630 case hwmon_in: 631 switch (attr) { 632 case hwmon_in_input: 633 return 0444; 634 case hwmon_in_lcrit: 635 case hwmon_in_crit: 636 if (chip == ina226) 637 return 0644; 638 break; 639 case hwmon_in_lcrit_alarm: 640 case hwmon_in_crit_alarm: 641 if (chip == ina226) 642 return 0444; 643 break; 644 default: 645 break; 646 } 647 break; 648 case hwmon_curr: 649 switch (attr) { 650 case hwmon_curr_input: 651 return 0444; 652 case hwmon_curr_lcrit: 653 case hwmon_curr_crit: 654 if (chip == ina226) 655 return 0644; 656 break; 657 case hwmon_curr_lcrit_alarm: 658 case hwmon_curr_crit_alarm: 659 if (chip == ina226) 660 return 0444; 661 break; 662 default: 663 break; 664 } 665 break; 666 case hwmon_power: 667 switch (attr) { 668 case hwmon_power_input: 669 return 0444; 670 case hwmon_power_crit: 671 if (chip == ina226) 672 return 0644; 673 break; 674 case hwmon_power_crit_alarm: 675 if (chip == ina226) 676 return 0444; 677 break; 678 default: 679 break; 680 } 681 break; 682 case hwmon_chip: 683 switch (attr) { 684 case hwmon_chip_update_interval: 685 if (chip == ina226) 686 return 0644; 687 break; 688 default: 689 break; 690 } 691 break; 692 default: 693 break; 694 } 695 return 0; 696 } 697 698 static const struct hwmon_channel_info * const ina2xx_info[] = { 699 HWMON_CHANNEL_INFO(chip, 700 HWMON_C_UPDATE_INTERVAL), 701 HWMON_CHANNEL_INFO(in, 702 HWMON_I_INPUT | HWMON_I_CRIT | HWMON_I_CRIT_ALARM | 703 HWMON_I_LCRIT | HWMON_I_LCRIT_ALARM, 704 HWMON_I_INPUT | HWMON_I_CRIT | HWMON_I_CRIT_ALARM | 705 HWMON_I_LCRIT | HWMON_I_LCRIT_ALARM 706 ), 707 HWMON_CHANNEL_INFO(curr, HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM | 708 HWMON_C_LCRIT | HWMON_C_LCRIT_ALARM), 709 HWMON_CHANNEL_INFO(power, 710 HWMON_P_INPUT | HWMON_P_CRIT | HWMON_P_CRIT_ALARM), 711 NULL 712 }; 713 714 static const struct hwmon_ops ina2xx_hwmon_ops = { 715 .is_visible = ina2xx_is_visible, 716 .read = ina2xx_read, 717 .write = ina2xx_write, 718 }; 719 720 static const struct hwmon_chip_info ina2xx_chip_info = { 721 .ops = &ina2xx_hwmon_ops, 722 .info = ina2xx_info, 723 }; 724 725 /* shunt resistance */ 726 727 /* 728 * In order to keep calibration register value fixed, the product 729 * of current_lsb and shunt_resistor should also be fixed and equal 730 * to shunt_voltage_lsb = 1 / shunt_div multiplied by 10^9 in order 731 * to keep the scale. 732 */ 733 static int ina2xx_set_shunt(struct ina2xx_data *data, unsigned long val) 734 { 735 unsigned int dividend = DIV_ROUND_CLOSEST(1000000000, 736 data->config->shunt_div); 737 if (!val || val > dividend) 738 return -EINVAL; 739 740 data->rshunt = val; 741 data->current_lsb_uA = DIV_ROUND_CLOSEST(dividend, val); 742 data->power_lsb_uW = data->config->power_lsb_factor * 743 data->current_lsb_uA; 744 745 return 0; 746 } 747 748 static ssize_t shunt_resistor_show(struct device *dev, 749 struct device_attribute *da, char *buf) 750 { 751 struct ina2xx_data *data = dev_get_drvdata(dev); 752 753 return sysfs_emit(buf, "%li\n", data->rshunt); 754 } 755 756 static ssize_t shunt_resistor_store(struct device *dev, 757 struct device_attribute *da, 758 const char *buf, size_t count) 759 { 760 struct ina2xx_data *data = dev_get_drvdata(dev); 761 unsigned long val; 762 int status; 763 764 status = kstrtoul(buf, 10, &val); 765 if (status < 0) 766 return status; 767 768 mutex_lock(&data->config_lock); 769 status = ina2xx_set_shunt(data, val); 770 mutex_unlock(&data->config_lock); 771 if (status < 0) 772 return status; 773 return count; 774 } 775 776 static DEVICE_ATTR_RW(shunt_resistor); 777 778 /* pointers to created device attributes */ 779 static struct attribute *ina2xx_attrs[] = { 780 &dev_attr_shunt_resistor.attr, 781 NULL, 782 }; 783 ATTRIBUTE_GROUPS(ina2xx); 784 785 /* 786 * Initialize chip 787 */ 788 static int ina2xx_init(struct device *dev, struct ina2xx_data *data) 789 { 790 struct regmap *regmap = data->regmap; 791 u32 shunt; 792 int ret; 793 794 if (device_property_read_u32(dev, "shunt-resistor", &shunt) < 0) 795 shunt = INA2XX_RSHUNT_DEFAULT; 796 797 ret = ina2xx_set_shunt(data, shunt); 798 if (ret < 0) 799 return ret; 800 801 ret = regmap_write(regmap, INA2XX_CONFIG, data->config->config_default); 802 if (ret < 0) 803 return ret; 804 805 if (data->chip == ina226) { 806 bool active_high = device_property_read_bool(dev, "ti,alert-polarity-active-high"); 807 808 regmap_update_bits(regmap, INA226_MASK_ENABLE, 809 INA226_ALERT_LATCH_ENABLE | INA226_ALERT_POLARITY, 810 INA226_ALERT_LATCH_ENABLE | 811 FIELD_PREP(INA226_ALERT_POLARITY, active_high)); 812 } 813 814 /* 815 * Calibration register is set to the best value, which eliminates 816 * truncation errors on calculating current register in hardware. 817 * According to datasheet (eq. 3) the best values are 2048 for 818 * ina226 and 4096 for ina219. They are hardcoded as calibration_value. 819 */ 820 return regmap_write(regmap, INA2XX_CALIBRATION, 821 data->config->calibration_value); 822 } 823 824 static int ina2xx_probe(struct i2c_client *client) 825 { 826 struct device *dev = &client->dev; 827 struct ina2xx_data *data; 828 struct device *hwmon_dev; 829 enum ina2xx_ids chip; 830 int ret; 831 832 chip = (uintptr_t)i2c_get_match_data(client); 833 834 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); 835 if (!data) 836 return -ENOMEM; 837 838 /* set the device type */ 839 data->config = &ina2xx_config[chip]; 840 data->chip = chip; 841 mutex_init(&data->config_lock); 842 843 data->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config); 844 if (IS_ERR(data->regmap)) { 845 dev_err(dev, "failed to allocate register map\n"); 846 return PTR_ERR(data->regmap); 847 } 848 849 ret = devm_regulator_get_enable(dev, "vs"); 850 if (ret) 851 return dev_err_probe(dev, ret, "failed to enable vs regulator\n"); 852 853 ret = ina2xx_init(dev, data); 854 if (ret < 0) 855 return dev_err_probe(dev, ret, "failed to configure device\n"); 856 857 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 858 data, &ina2xx_chip_info, 859 ina2xx_groups); 860 if (IS_ERR(hwmon_dev)) 861 return PTR_ERR(hwmon_dev); 862 863 dev_info(dev, "power monitor %s (Rshunt = %li uOhm)\n", 864 client->name, data->rshunt); 865 866 return 0; 867 } 868 869 static const struct i2c_device_id ina2xx_id[] = { 870 { "ina219", ina219 }, 871 { "ina220", ina219 }, 872 { "ina226", ina226 }, 873 { "ina230", ina226 }, 874 { "ina231", ina226 }, 875 { } 876 }; 877 MODULE_DEVICE_TABLE(i2c, ina2xx_id); 878 879 static const struct of_device_id __maybe_unused ina2xx_of_match[] = { 880 { 881 .compatible = "ti,ina219", 882 .data = (void *)ina219 883 }, 884 { 885 .compatible = "ti,ina220", 886 .data = (void *)ina219 887 }, 888 { 889 .compatible = "ti,ina226", 890 .data = (void *)ina226 891 }, 892 { 893 .compatible = "ti,ina230", 894 .data = (void *)ina226 895 }, 896 { 897 .compatible = "ti,ina231", 898 .data = (void *)ina226 899 }, 900 { }, 901 }; 902 MODULE_DEVICE_TABLE(of, ina2xx_of_match); 903 904 static struct i2c_driver ina2xx_driver = { 905 .driver = { 906 .name = "ina2xx", 907 .of_match_table = of_match_ptr(ina2xx_of_match), 908 }, 909 .probe = ina2xx_probe, 910 .id_table = ina2xx_id, 911 }; 912 913 module_i2c_driver(ina2xx_driver); 914 915 MODULE_AUTHOR("Lothar Felten <l-felten@ti.com>"); 916 MODULE_DESCRIPTION("ina2xx driver"); 917 MODULE_LICENSE("GPL"); 918