xref: /linux/drivers/hwmon/fam15h_power.c (revision ca55b2fef3a9373fcfc30f82fd26bc7fccbda732)
1 /*
2  * fam15h_power.c - AMD Family 15h processor power monitoring
3  *
4  * Copyright (c) 2011 Advanced Micro Devices, Inc.
5  * Author: Andreas Herrmann <herrmann.der.user@googlemail.com>
6  *
7  *
8  * This driver is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License; either
10  * version 2 of the License, or (at your option) any later version.
11  *
12  * This driver is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
15  * See the GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this driver; if not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 #include <linux/err.h>
22 #include <linux/hwmon.h>
23 #include <linux/hwmon-sysfs.h>
24 #include <linux/init.h>
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/bitops.h>
28 #include <asm/processor.h>
29 
30 MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor");
31 MODULE_AUTHOR("Andreas Herrmann <herrmann.der.user@googlemail.com>");
32 MODULE_LICENSE("GPL");
33 
34 /* D18F3 */
35 #define REG_NORTHBRIDGE_CAP		0xe8
36 
37 /* D18F4 */
38 #define REG_PROCESSOR_TDP		0x1b8
39 
40 /* D18F5 */
41 #define REG_TDP_RUNNING_AVERAGE		0xe0
42 #define REG_TDP_LIMIT3			0xe8
43 
44 struct fam15h_power_data {
45 	struct pci_dev *pdev;
46 	unsigned int tdp_to_watts;
47 	unsigned int base_tdp;
48 	unsigned int processor_pwr_watts;
49 	unsigned int cpu_pwr_sample_ratio;
50 };
51 
52 static ssize_t show_power(struct device *dev,
53 			  struct device_attribute *attr, char *buf)
54 {
55 	u32 val, tdp_limit, running_avg_range;
56 	s32 running_avg_capture;
57 	u64 curr_pwr_watts;
58 	struct fam15h_power_data *data = dev_get_drvdata(dev);
59 	struct pci_dev *f4 = data->pdev;
60 
61 	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
62 				  REG_TDP_RUNNING_AVERAGE, &val);
63 
64 	/*
65 	 * On Carrizo and later platforms, TdpRunAvgAccCap bit field
66 	 * is extended to 4:31 from 4:25.
67 	 */
68 	if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model >= 0x60) {
69 		running_avg_capture = val >> 4;
70 		running_avg_capture = sign_extend32(running_avg_capture, 27);
71 	} else {
72 		running_avg_capture = (val >> 4) & 0x3fffff;
73 		running_avg_capture = sign_extend32(running_avg_capture, 21);
74 	}
75 
76 	running_avg_range = (val & 0xf) + 1;
77 
78 	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
79 				  REG_TDP_LIMIT3, &val);
80 
81 	tdp_limit = val >> 16;
82 	curr_pwr_watts = ((u64)(tdp_limit +
83 				data->base_tdp)) << running_avg_range;
84 	curr_pwr_watts -= running_avg_capture;
85 	curr_pwr_watts *= data->tdp_to_watts;
86 
87 	/*
88 	 * Convert to microWatt
89 	 *
90 	 * power is in Watt provided as fixed point integer with
91 	 * scaling factor 1/(2^16).  For conversion we use
92 	 * (10^6)/(2^16) = 15625/(2^10)
93 	 */
94 	curr_pwr_watts = (curr_pwr_watts * 15625) >> (10 + running_avg_range);
95 	return sprintf(buf, "%u\n", (unsigned int) curr_pwr_watts);
96 }
97 static DEVICE_ATTR(power1_input, S_IRUGO, show_power, NULL);
98 
99 static ssize_t show_power_crit(struct device *dev,
100 			       struct device_attribute *attr, char *buf)
101 {
102 	struct fam15h_power_data *data = dev_get_drvdata(dev);
103 
104 	return sprintf(buf, "%u\n", data->processor_pwr_watts);
105 }
106 static DEVICE_ATTR(power1_crit, S_IRUGO, show_power_crit, NULL);
107 
108 static umode_t fam15h_power_is_visible(struct kobject *kobj,
109 				       struct attribute *attr,
110 				       int index)
111 {
112 	/* power1_input is only reported for Fam15h, Models 00h-0fh */
113 	if (attr == &dev_attr_power1_input.attr &&
114 	   (boot_cpu_data.x86 != 0x15 || boot_cpu_data.x86_model > 0xf))
115 		return 0;
116 
117 	return attr->mode;
118 }
119 
120 static struct attribute *fam15h_power_attrs[] = {
121 	&dev_attr_power1_input.attr,
122 	&dev_attr_power1_crit.attr,
123 	NULL
124 };
125 
126 static const struct attribute_group fam15h_power_group = {
127 	.attrs = fam15h_power_attrs,
128 	.is_visible = fam15h_power_is_visible,
129 };
130 __ATTRIBUTE_GROUPS(fam15h_power);
131 
132 static bool should_load_on_this_node(struct pci_dev *f4)
133 {
134 	u32 val;
135 
136 	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3),
137 				  REG_NORTHBRIDGE_CAP, &val);
138 	if ((val & BIT(29)) && ((val >> 30) & 3))
139 		return false;
140 
141 	return true;
142 }
143 
144 /*
145  * Newer BKDG versions have an updated recommendation on how to properly
146  * initialize the running average range (was: 0xE, now: 0x9). This avoids
147  * counter saturations resulting in bogus power readings.
148  * We correct this value ourselves to cope with older BIOSes.
149  */
150 static const struct pci_device_id affected_device[] = {
151 	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
152 	{ 0 }
153 };
154 
155 static void tweak_runavg_range(struct pci_dev *pdev)
156 {
157 	u32 val;
158 
159 	/*
160 	 * let this quirk apply only to the current version of the
161 	 * northbridge, since future versions may change the behavior
162 	 */
163 	if (!pci_match_id(affected_device, pdev))
164 		return;
165 
166 	pci_bus_read_config_dword(pdev->bus,
167 		PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
168 		REG_TDP_RUNNING_AVERAGE, &val);
169 	if ((val & 0xf) != 0xe)
170 		return;
171 
172 	val &= ~0xf;
173 	val |=  0x9;
174 	pci_bus_write_config_dword(pdev->bus,
175 		PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
176 		REG_TDP_RUNNING_AVERAGE, val);
177 }
178 
179 #ifdef CONFIG_PM
180 static int fam15h_power_resume(struct pci_dev *pdev)
181 {
182 	tweak_runavg_range(pdev);
183 	return 0;
184 }
185 #else
186 #define fam15h_power_resume NULL
187 #endif
188 
189 static void fam15h_power_init_data(struct pci_dev *f4,
190 					     struct fam15h_power_data *data)
191 {
192 	u32 val, eax, ebx, ecx, edx;
193 	u64 tmp;
194 
195 	pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val);
196 	data->base_tdp = val >> 16;
197 	tmp = val & 0xffff;
198 
199 	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
200 				  REG_TDP_LIMIT3, &val);
201 
202 	data->tdp_to_watts = ((val & 0x3ff) << 6) | ((val >> 10) & 0x3f);
203 	tmp *= data->tdp_to_watts;
204 
205 	/* result not allowed to be >= 256W */
206 	if ((tmp >> 16) >= 256)
207 		dev_warn(&f4->dev,
208 			 "Bogus value for ProcessorPwrWatts (processor_pwr_watts>=%u)\n",
209 			 (unsigned int) (tmp >> 16));
210 
211 	/* convert to microWatt */
212 	data->processor_pwr_watts = (tmp * 15625) >> 10;
213 
214 	cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
215 
216 	/* CPUID Fn8000_0007:EDX[12] indicates to support accumulated power */
217 	if (!(edx & BIT(12)))
218 		return;
219 
220 	/*
221 	 * determine the ratio of the compute unit power accumulator
222 	 * sample period to the PTSC counter period by executing CPUID
223 	 * Fn8000_0007:ECX
224 	 */
225 	data->cpu_pwr_sample_ratio = ecx;
226 }
227 
228 static int fam15h_power_probe(struct pci_dev *pdev,
229 					const struct pci_device_id *id)
230 {
231 	struct fam15h_power_data *data;
232 	struct device *dev = &pdev->dev;
233 	struct device *hwmon_dev;
234 
235 	/*
236 	 * though we ignore every other northbridge, we still have to
237 	 * do the tweaking on _each_ node in MCM processors as the counters
238 	 * are working hand-in-hand
239 	 */
240 	tweak_runavg_range(pdev);
241 
242 	if (!should_load_on_this_node(pdev))
243 		return -ENODEV;
244 
245 	data = devm_kzalloc(dev, sizeof(struct fam15h_power_data), GFP_KERNEL);
246 	if (!data)
247 		return -ENOMEM;
248 
249 	fam15h_power_init_data(pdev, data);
250 	data->pdev = pdev;
251 
252 	hwmon_dev = devm_hwmon_device_register_with_groups(dev, "fam15h_power",
253 							   data,
254 							   fam15h_power_groups);
255 	return PTR_ERR_OR_ZERO(hwmon_dev);
256 }
257 
258 static const struct pci_device_id fam15h_power_id_table[] = {
259 	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
260 	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F4) },
261 	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F4) },
262 	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
263 	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
264 	{}
265 };
266 MODULE_DEVICE_TABLE(pci, fam15h_power_id_table);
267 
268 static struct pci_driver fam15h_power_driver = {
269 	.name = "fam15h_power",
270 	.id_table = fam15h_power_id_table,
271 	.probe = fam15h_power_probe,
272 	.resume = fam15h_power_resume,
273 };
274 
275 module_pci_driver(fam15h_power_driver);
276