1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /*************************************************************************** 3 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> * 4 * Copyright (C) 2007-2011 Hans de Goede <hdegoede@redhat.com> * 5 * * 6 ***************************************************************************/ 7 8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 9 10 #include <linux/module.h> 11 #include <linux/init.h> 12 #include <linux/slab.h> 13 #include <linux/jiffies.h> 14 #include <linux/platform_device.h> 15 #include <linux/hwmon.h> 16 #include <linux/hwmon-sysfs.h> 17 #include <linux/err.h> 18 #include <linux/mutex.h> 19 #include <linux/io.h> 20 #include <linux/acpi.h> 21 22 #define DRVNAME "f71882fg" 23 24 #define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */ 25 #define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */ 26 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */ 27 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */ 28 29 #define SIO_REG_LDSEL 0x07 /* Logical device select */ 30 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ 31 #define SIO_REG_DEVREV 0x22 /* Device revision */ 32 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ 33 #define SIO_REG_ENABLE 0x30 /* Logical device enable */ 34 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ 35 36 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */ 37 #define SIO_F71808E_ID 0x0901 /* Chipset ID */ 38 #define SIO_F71808A_ID 0x1001 /* Chipset ID */ 39 #define SIO_F71858_ID 0x0507 /* Chipset ID */ 40 #define SIO_F71862_ID 0x0601 /* Chipset ID */ 41 #define SIO_F71868_ID 0x1106 /* Chipset ID */ 42 #define SIO_F71869_ID 0x0814 /* Chipset ID */ 43 #define SIO_F71869A_ID 0x1007 /* Chipset ID */ 44 #define SIO_F71882_ID 0x0541 /* Chipset ID */ 45 #define SIO_F71889_ID 0x0723 /* Chipset ID */ 46 #define SIO_F71889E_ID 0x0909 /* Chipset ID */ 47 #define SIO_F71889A_ID 0x1005 /* Chipset ID */ 48 #define SIO_F8000_ID 0x0581 /* Chipset ID */ 49 #define SIO_F81768D_ID 0x1210 /* Chipset ID */ 50 #define SIO_F81865_ID 0x0704 /* Chipset ID */ 51 #define SIO_F81866_ID 0x1010 /* Chipset ID */ 52 #define SIO_F81966_ID 0x1502 /* Chipset ID */ 53 54 #define REGION_LENGTH 8 55 #define ADDR_REG_OFFSET 5 56 #define DATA_REG_OFFSET 6 57 58 #define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */ 59 #define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */ 60 #define F71882FG_REG_IN(nr) (0x20 + (nr)) 61 #define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */ 62 63 #define F81866_REG_IN_STATUS 0x16 /* F81866 only */ 64 #define F81866_REG_IN_BEEP 0x17 /* F81866 only */ 65 #define F81866_REG_IN1_HIGH 0x3a /* F81866 only */ 66 67 #define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr))) 68 #define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr))) 69 #define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr))) 70 #define F71882FG_REG_FAN_STATUS 0x92 71 #define F71882FG_REG_FAN_BEEP 0x93 72 73 #define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr)) 74 #define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr)) 75 #define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr)) 76 #define F71882FG_REG_TEMP_STATUS 0x62 77 #define F71882FG_REG_TEMP_BEEP 0x63 78 #define F71882FG_REG_TEMP_CONFIG 0x69 79 #define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr)) 80 #define F71882FG_REG_TEMP_TYPE 0x6B 81 #define F71882FG_REG_TEMP_DIODE_OPEN 0x6F 82 83 #define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr))) 84 #define F71882FG_REG_PWM_TYPE 0x94 85 #define F71882FG_REG_PWM_ENABLE 0x96 86 87 #define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr)) 88 89 #define F71882FG_REG_FAN_FAULT_T 0x9F 90 #define F71882FG_FAN_NEG_TEMP_EN 0x20 91 #define F71882FG_FAN_PROG_SEL 0x80 92 93 #define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm))) 94 #define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm))) 95 #define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr)) 96 97 #define F71882FG_REG_START 0x01 98 99 #define F71882FG_MAX_INS 11 100 101 #define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */ 102 103 static unsigned short force_id; 104 module_param(force_id, ushort, 0); 105 MODULE_PARM_DESC(force_id, "Override the detected device ID"); 106 107 enum chips { f71808e, f71808a, f71858fg, f71862fg, f71868a, f71869, f71869a, 108 f71882fg, f71889fg, f71889ed, f71889a, f8000, f81768d, f81865f, 109 f81866a}; 110 111 static const char *const f71882fg_names[] = { 112 "f71808e", 113 "f71808a", 114 "f71858fg", 115 "f71862fg", 116 "f71868a", 117 "f71869", /* Both f71869f and f71869e, reg. compatible and same id */ 118 "f71869a", 119 "f71882fg", 120 "f71889fg", /* f81801u too, same id */ 121 "f71889ed", 122 "f71889a", 123 "f8000", 124 "f81768d", 125 "f81865f", 126 "f81866a", 127 }; 128 129 static const char f71882fg_has_in[][F71882FG_MAX_INS] = { 130 [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0 }, 131 [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0 }, 132 [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, 133 [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 134 [f71868a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0 }, 135 [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 136 [f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 137 [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 138 [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 139 [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 140 [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 }, 141 [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }, 142 [f81768d] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }, 143 [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 }, 144 [f81866a] = { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0 }, 145 }; 146 147 static const char f71882fg_has_in1_alarm[] = { 148 [f71808e] = 0, 149 [f71808a] = 0, 150 [f71858fg] = 0, 151 [f71862fg] = 0, 152 [f71868a] = 0, 153 [f71869] = 0, 154 [f71869a] = 0, 155 [f71882fg] = 1, 156 [f71889fg] = 1, 157 [f71889ed] = 1, 158 [f71889a] = 1, 159 [f8000] = 0, 160 [f81768d] = 1, 161 [f81865f] = 1, 162 [f81866a] = 1, 163 }; 164 165 static const char f71882fg_fan_has_beep[] = { 166 [f71808e] = 0, 167 [f71808a] = 0, 168 [f71858fg] = 0, 169 [f71862fg] = 1, 170 [f71868a] = 1, 171 [f71869] = 1, 172 [f71869a] = 1, 173 [f71882fg] = 1, 174 [f71889fg] = 1, 175 [f71889ed] = 1, 176 [f71889a] = 1, 177 [f8000] = 0, 178 [f81768d] = 1, 179 [f81865f] = 1, 180 [f81866a] = 1, 181 }; 182 183 static const char f71882fg_nr_fans[] = { 184 [f71808e] = 3, 185 [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */ 186 [f71858fg] = 3, 187 [f71862fg] = 3, 188 [f71868a] = 3, 189 [f71869] = 3, 190 [f71869a] = 3, 191 [f71882fg] = 4, 192 [f71889fg] = 3, 193 [f71889ed] = 3, 194 [f71889a] = 3, 195 [f8000] = 3, /* +1 fan which is monitor only */ 196 [f81768d] = 3, 197 [f81865f] = 2, 198 [f81866a] = 3, 199 }; 200 201 static const char f71882fg_temp_has_beep[] = { 202 [f71808e] = 0, 203 [f71808a] = 1, 204 [f71858fg] = 0, 205 [f71862fg] = 1, 206 [f71868a] = 1, 207 [f71869] = 1, 208 [f71869a] = 1, 209 [f71882fg] = 1, 210 [f71889fg] = 1, 211 [f71889ed] = 1, 212 [f71889a] = 1, 213 [f8000] = 0, 214 [f81768d] = 1, 215 [f81865f] = 1, 216 [f81866a] = 1, 217 }; 218 219 static const char f71882fg_nr_temps[] = { 220 [f71808e] = 2, 221 [f71808a] = 2, 222 [f71858fg] = 3, 223 [f71862fg] = 3, 224 [f71868a] = 3, 225 [f71869] = 3, 226 [f71869a] = 3, 227 [f71882fg] = 3, 228 [f71889fg] = 3, 229 [f71889ed] = 3, 230 [f71889a] = 3, 231 [f8000] = 3, 232 [f81768d] = 3, 233 [f81865f] = 2, 234 [f81866a] = 3, 235 }; 236 237 static struct platform_device *f71882fg_pdev; 238 239 /* Super-I/O Function prototypes */ 240 static inline int superio_inb(int base, int reg); 241 static inline int superio_inw(int base, int reg); 242 static inline int superio_enter(int base); 243 static inline void superio_select(int base, int ld); 244 static inline void superio_exit(int base); 245 246 struct f71882fg_sio_data { 247 enum chips type; 248 }; 249 250 struct f71882fg_data { 251 unsigned short addr; 252 enum chips type; 253 struct device *hwmon_dev; 254 255 struct mutex update_lock; 256 int temp_start; /* temp numbering start (0 or 1) */ 257 bool valid; /* true if following fields are valid */ 258 char auto_point_temp_signed; 259 unsigned long last_updated; /* In jiffies */ 260 unsigned long last_limits; /* In jiffies */ 261 262 /* Register Values */ 263 u8 in[F71882FG_MAX_INS]; 264 u8 in1_max; 265 u8 in_status; 266 u8 in_beep; 267 u16 fan[4]; 268 u16 fan_target[4]; 269 u16 fan_full_speed[4]; 270 u8 fan_status; 271 u8 fan_beep; 272 /* 273 * Note: all models have max 3 temperature channels, but on some 274 * they are addressed as 0-2 and on others as 1-3, so for coding 275 * convenience we reserve space for 4 channels 276 */ 277 u16 temp[4]; 278 u8 temp_ovt[4]; 279 u8 temp_high[4]; 280 u8 temp_hyst[2]; /* 2 hysts stored per reg */ 281 u8 temp_type[4]; 282 u8 temp_status; 283 u8 temp_beep; 284 u8 temp_diode_open; 285 u8 temp_config; 286 u8 pwm[4]; 287 u8 pwm_enable; 288 u8 pwm_auto_point_hyst[2]; 289 u8 pwm_auto_point_mapping[4]; 290 u8 pwm_auto_point_pwm[4][5]; 291 s8 pwm_auto_point_temp[4][4]; 292 }; 293 294 /* Sysfs in */ 295 static ssize_t show_in(struct device *dev, struct device_attribute *devattr, 296 char *buf); 297 static ssize_t show_in_max(struct device *dev, struct device_attribute 298 *devattr, char *buf); 299 static ssize_t store_in_max(struct device *dev, struct device_attribute 300 *devattr, const char *buf, size_t count); 301 static ssize_t show_in_beep(struct device *dev, struct device_attribute 302 *devattr, char *buf); 303 static ssize_t store_in_beep(struct device *dev, struct device_attribute 304 *devattr, const char *buf, size_t count); 305 static ssize_t show_in_alarm(struct device *dev, struct device_attribute 306 *devattr, char *buf); 307 /* Sysfs Fan */ 308 static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, 309 char *buf); 310 static ssize_t show_fan_full_speed(struct device *dev, 311 struct device_attribute *devattr, char *buf); 312 static ssize_t store_fan_full_speed(struct device *dev, 313 struct device_attribute *devattr, const char *buf, size_t count); 314 static ssize_t show_fan_beep(struct device *dev, struct device_attribute 315 *devattr, char *buf); 316 static ssize_t store_fan_beep(struct device *dev, struct device_attribute 317 *devattr, const char *buf, size_t count); 318 static ssize_t show_fan_alarm(struct device *dev, struct device_attribute 319 *devattr, char *buf); 320 /* Sysfs Temp */ 321 static ssize_t show_temp(struct device *dev, struct device_attribute 322 *devattr, char *buf); 323 static ssize_t show_temp_max(struct device *dev, struct device_attribute 324 *devattr, char *buf); 325 static ssize_t store_temp_max(struct device *dev, struct device_attribute 326 *devattr, const char *buf, size_t count); 327 static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute 328 *devattr, char *buf); 329 static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute 330 *devattr, const char *buf, size_t count); 331 static ssize_t show_temp_crit(struct device *dev, struct device_attribute 332 *devattr, char *buf); 333 static ssize_t store_temp_crit(struct device *dev, struct device_attribute 334 *devattr, const char *buf, size_t count); 335 static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute 336 *devattr, char *buf); 337 static ssize_t show_temp_type(struct device *dev, struct device_attribute 338 *devattr, char *buf); 339 static ssize_t show_temp_beep(struct device *dev, struct device_attribute 340 *devattr, char *buf); 341 static ssize_t store_temp_beep(struct device *dev, struct device_attribute 342 *devattr, const char *buf, size_t count); 343 static ssize_t show_temp_alarm(struct device *dev, struct device_attribute 344 *devattr, char *buf); 345 static ssize_t show_temp_fault(struct device *dev, struct device_attribute 346 *devattr, char *buf); 347 /* PWM and Auto point control */ 348 static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, 349 char *buf); 350 static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr, 351 const char *buf, size_t count); 352 static ssize_t show_simple_pwm(struct device *dev, 353 struct device_attribute *devattr, char *buf); 354 static ssize_t store_simple_pwm(struct device *dev, 355 struct device_attribute *devattr, const char *buf, size_t count); 356 static ssize_t show_pwm_enable(struct device *dev, 357 struct device_attribute *devattr, char *buf); 358 static ssize_t store_pwm_enable(struct device *dev, 359 struct device_attribute *devattr, const char *buf, size_t count); 360 static ssize_t show_pwm_interpolate(struct device *dev, 361 struct device_attribute *devattr, char *buf); 362 static ssize_t store_pwm_interpolate(struct device *dev, 363 struct device_attribute *devattr, const char *buf, size_t count); 364 static ssize_t show_pwm_auto_point_channel(struct device *dev, 365 struct device_attribute *devattr, char *buf); 366 static ssize_t store_pwm_auto_point_channel(struct device *dev, 367 struct device_attribute *devattr, const char *buf, size_t count); 368 static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev, 369 struct device_attribute *devattr, char *buf); 370 static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev, 371 struct device_attribute *devattr, const char *buf, size_t count); 372 static ssize_t show_pwm_auto_point_pwm(struct device *dev, 373 struct device_attribute *devattr, char *buf); 374 static ssize_t store_pwm_auto_point_pwm(struct device *dev, 375 struct device_attribute *devattr, const char *buf, size_t count); 376 static ssize_t show_pwm_auto_point_temp(struct device *dev, 377 struct device_attribute *devattr, char *buf); 378 static ssize_t store_pwm_auto_point_temp(struct device *dev, 379 struct device_attribute *devattr, const char *buf, size_t count); 380 /* Sysfs misc */ 381 static ssize_t name_show(struct device *dev, struct device_attribute *devattr, 382 char *buf); 383 384 static int f71882fg_probe(struct platform_device *pdev); 385 static int f71882fg_remove(struct platform_device *pdev); 386 387 static struct platform_driver f71882fg_driver = { 388 .driver = { 389 .name = DRVNAME, 390 }, 391 .probe = f71882fg_probe, 392 .remove = f71882fg_remove, 393 }; 394 395 static DEVICE_ATTR_RO(name); 396 397 /* 398 * Temp attr for the f71858fg, the f71858fg is special as it has its 399 * temperature indexes start at 0 (the others start at 1) 400 */ 401 static struct sensor_device_attribute_2 f71858fg_temp_attr[] = { 402 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0), 403 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max, 404 store_temp_max, 0, 0), 405 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 406 store_temp_max_hyst, 0, 0), 407 SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0), 408 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit, 409 store_temp_crit, 0, 0), 410 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 411 0, 0), 412 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4), 413 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0), 414 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1), 415 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max, 416 store_temp_max, 0, 1), 417 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 418 store_temp_max_hyst, 0, 1), 419 SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1), 420 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit, 421 store_temp_crit, 0, 1), 422 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 423 0, 1), 424 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5), 425 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1), 426 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2), 427 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max, 428 store_temp_max, 0, 2), 429 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 430 store_temp_max_hyst, 0, 2), 431 SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2), 432 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit, 433 store_temp_crit, 0, 2), 434 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 435 0, 2), 436 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6), 437 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2), 438 }; 439 440 /* Temp attr for the standard models */ 441 static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { { 442 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1), 443 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max, 444 store_temp_max, 0, 1), 445 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 446 store_temp_max_hyst, 0, 1), 447 /* 448 * Should really be temp1_max_alarm, but older versions did not handle 449 * the max and crit alarms separately and lm_sensors v2 depends on the 450 * presence of temp#_alarm files. The same goes for temp2/3 _alarm. 451 */ 452 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1), 453 SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit, 454 store_temp_crit, 0, 1), 455 SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 456 0, 1), 457 SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5), 458 SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1), 459 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1), 460 }, { 461 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2), 462 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max, 463 store_temp_max, 0, 2), 464 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 465 store_temp_max_hyst, 0, 2), 466 /* Should be temp2_max_alarm, see temp1_alarm note */ 467 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2), 468 SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit, 469 store_temp_crit, 0, 2), 470 SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 471 0, 2), 472 SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6), 473 SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2), 474 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2), 475 }, { 476 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3), 477 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max, 478 store_temp_max, 0, 3), 479 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst, 480 store_temp_max_hyst, 0, 3), 481 /* Should be temp3_max_alarm, see temp1_alarm note */ 482 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3), 483 SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit, 484 store_temp_crit, 0, 3), 485 SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL, 486 0, 3), 487 SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7), 488 SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3), 489 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3), 490 } }; 491 492 /* Temp attr for models which can beep on temp alarm */ 493 static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { { 494 SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 495 store_temp_beep, 0, 1), 496 SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 497 store_temp_beep, 0, 5), 498 }, { 499 SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 500 store_temp_beep, 0, 2), 501 SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 502 store_temp_beep, 0, 6), 503 }, { 504 SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 505 store_temp_beep, 0, 3), 506 SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 507 store_temp_beep, 0, 7), 508 } }; 509 510 static struct sensor_device_attribute_2 f81866_temp_beep_attr[3][2] = { { 511 SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 512 store_temp_beep, 0, 0), 513 SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 514 store_temp_beep, 0, 4), 515 }, { 516 SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 517 store_temp_beep, 0, 1), 518 SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 519 store_temp_beep, 0, 5), 520 }, { 521 SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep, 522 store_temp_beep, 0, 2), 523 SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep, 524 store_temp_beep, 0, 6), 525 } }; 526 527 /* 528 * Temp attr for the f8000 529 * Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max) 530 * is used as hysteresis value to clear alarms 531 * Also like the f71858fg its temperature indexes start at 0 532 */ 533 static struct sensor_device_attribute_2 f8000_temp_attr[] = { 534 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0), 535 SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit, 536 store_temp_crit, 0, 0), 537 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max, 538 store_temp_max, 0, 0), 539 SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4), 540 SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0), 541 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1), 542 SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit, 543 store_temp_crit, 0, 1), 544 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max, 545 store_temp_max, 0, 1), 546 SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5), 547 SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1), 548 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2), 549 SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit, 550 store_temp_crit, 0, 2), 551 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max, 552 store_temp_max, 0, 2), 553 SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6), 554 SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2), 555 }; 556 557 /* in attr for all models */ 558 static struct sensor_device_attribute_2 fxxxx_in_attr[] = { 559 SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0), 560 SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1), 561 SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2), 562 SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3), 563 SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4), 564 SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5), 565 SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6), 566 SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7), 567 SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8), 568 SENSOR_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 0, 9), 569 SENSOR_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 0, 10), 570 }; 571 572 /* For models with in1 alarm capability */ 573 static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = { 574 SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max, 575 0, 1), 576 SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep, 577 0, 1), 578 SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1), 579 }; 580 581 /* Fan / PWM attr common to all models */ 582 static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { { 583 SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0), 584 SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR, 585 show_fan_full_speed, 586 store_fan_full_speed, 0, 0), 587 SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0), 588 SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0), 589 SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 590 store_pwm_enable, 0, 0), 591 SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR, 592 show_pwm_interpolate, store_pwm_interpolate, 0, 0), 593 }, { 594 SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1), 595 SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR, 596 show_fan_full_speed, 597 store_fan_full_speed, 0, 1), 598 SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1), 599 SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1), 600 SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 601 store_pwm_enable, 0, 1), 602 SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR, 603 show_pwm_interpolate, store_pwm_interpolate, 0, 1), 604 }, { 605 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2), 606 SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR, 607 show_fan_full_speed, 608 store_fan_full_speed, 0, 2), 609 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2), 610 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2), 611 SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 612 store_pwm_enable, 0, 2), 613 SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR, 614 show_pwm_interpolate, store_pwm_interpolate, 0, 2), 615 }, { 616 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3), 617 SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR, 618 show_fan_full_speed, 619 store_fan_full_speed, 0, 3), 620 SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3), 621 SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3), 622 SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable, 623 store_pwm_enable, 0, 3), 624 SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR, 625 show_pwm_interpolate, store_pwm_interpolate, 0, 3), 626 } }; 627 628 /* Attr for the third fan of the f71808a, which only has manual pwm */ 629 static struct sensor_device_attribute_2 f71808a_fan3_attr[] = { 630 SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2), 631 SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2), 632 SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, 633 show_simple_pwm, store_simple_pwm, 0, 2), 634 }; 635 636 /* Attr for models which can beep on Fan alarm */ 637 static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = { 638 SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep, 639 store_fan_beep, 0, 0), 640 SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep, 641 store_fan_beep, 0, 1), 642 SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep, 643 store_fan_beep, 0, 2), 644 SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep, 645 store_fan_beep, 0, 3), 646 }; 647 648 /* 649 * PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the 650 * standard models 651 */ 652 static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[3][7] = { { 653 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR, 654 show_pwm_auto_point_channel, 655 store_pwm_auto_point_channel, 0, 0), 656 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR, 657 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 658 1, 0), 659 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR, 660 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 661 4, 0), 662 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR, 663 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 664 0, 0), 665 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR, 666 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 667 3, 0), 668 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 669 show_pwm_auto_point_temp_hyst, 670 store_pwm_auto_point_temp_hyst, 671 0, 0), 672 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO, 673 show_pwm_auto_point_temp_hyst, NULL, 3, 0), 674 }, { 675 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR, 676 show_pwm_auto_point_channel, 677 store_pwm_auto_point_channel, 0, 1), 678 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR, 679 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 680 1, 1), 681 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR, 682 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 683 4, 1), 684 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR, 685 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 686 0, 1), 687 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR, 688 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 689 3, 1), 690 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 691 show_pwm_auto_point_temp_hyst, 692 store_pwm_auto_point_temp_hyst, 693 0, 1), 694 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO, 695 show_pwm_auto_point_temp_hyst, NULL, 3, 1), 696 }, { 697 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR, 698 show_pwm_auto_point_channel, 699 store_pwm_auto_point_channel, 0, 2), 700 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR, 701 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 702 1, 2), 703 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR, 704 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 705 4, 2), 706 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR, 707 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 708 0, 2), 709 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR, 710 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 711 3, 2), 712 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 713 show_pwm_auto_point_temp_hyst, 714 store_pwm_auto_point_temp_hyst, 715 0, 2), 716 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO, 717 show_pwm_auto_point_temp_hyst, NULL, 3, 2), 718 } }; 719 720 /* 721 * PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the 722 * pwm setting when the temperature is above the pwmX_auto_point1_temp can be 723 * programmed instead of being hardcoded to 0xff 724 */ 725 static struct sensor_device_attribute_2 f71869_auto_pwm_attr[3][8] = { { 726 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR, 727 show_pwm_auto_point_channel, 728 store_pwm_auto_point_channel, 0, 0), 729 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR, 730 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 731 0, 0), 732 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR, 733 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 734 1, 0), 735 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR, 736 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 737 4, 0), 738 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR, 739 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 740 0, 0), 741 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR, 742 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 743 3, 0), 744 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 745 show_pwm_auto_point_temp_hyst, 746 store_pwm_auto_point_temp_hyst, 747 0, 0), 748 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO, 749 show_pwm_auto_point_temp_hyst, NULL, 3, 0), 750 }, { 751 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR, 752 show_pwm_auto_point_channel, 753 store_pwm_auto_point_channel, 0, 1), 754 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR, 755 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 756 0, 1), 757 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR, 758 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 759 1, 1), 760 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR, 761 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 762 4, 1), 763 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR, 764 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 765 0, 1), 766 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR, 767 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 768 3, 1), 769 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 770 show_pwm_auto_point_temp_hyst, 771 store_pwm_auto_point_temp_hyst, 772 0, 1), 773 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO, 774 show_pwm_auto_point_temp_hyst, NULL, 3, 1), 775 }, { 776 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR, 777 show_pwm_auto_point_channel, 778 store_pwm_auto_point_channel, 0, 2), 779 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR, 780 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 781 0, 2), 782 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR, 783 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 784 1, 2), 785 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR, 786 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 787 4, 2), 788 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR, 789 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 790 0, 2), 791 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR, 792 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 793 3, 2), 794 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 795 show_pwm_auto_point_temp_hyst, 796 store_pwm_auto_point_temp_hyst, 797 0, 2), 798 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO, 799 show_pwm_auto_point_temp_hyst, NULL, 3, 2), 800 } }; 801 802 /* PWM attr for the standard models */ 803 static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { { 804 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR, 805 show_pwm_auto_point_channel, 806 store_pwm_auto_point_channel, 0, 0), 807 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR, 808 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 809 0, 0), 810 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR, 811 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 812 1, 0), 813 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR, 814 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 815 2, 0), 816 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR, 817 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 818 3, 0), 819 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR, 820 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 821 4, 0), 822 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR, 823 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 824 0, 0), 825 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR, 826 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 827 1, 0), 828 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR, 829 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 830 2, 0), 831 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR, 832 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 833 3, 0), 834 SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 835 show_pwm_auto_point_temp_hyst, 836 store_pwm_auto_point_temp_hyst, 837 0, 0), 838 SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO, 839 show_pwm_auto_point_temp_hyst, NULL, 1, 0), 840 SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO, 841 show_pwm_auto_point_temp_hyst, NULL, 2, 0), 842 SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO, 843 show_pwm_auto_point_temp_hyst, NULL, 3, 0), 844 }, { 845 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR, 846 show_pwm_auto_point_channel, 847 store_pwm_auto_point_channel, 0, 1), 848 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR, 849 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 850 0, 1), 851 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR, 852 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 853 1, 1), 854 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR, 855 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 856 2, 1), 857 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR, 858 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 859 3, 1), 860 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR, 861 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 862 4, 1), 863 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR, 864 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 865 0, 1), 866 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR, 867 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 868 1, 1), 869 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR, 870 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 871 2, 1), 872 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR, 873 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 874 3, 1), 875 SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 876 show_pwm_auto_point_temp_hyst, 877 store_pwm_auto_point_temp_hyst, 878 0, 1), 879 SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO, 880 show_pwm_auto_point_temp_hyst, NULL, 1, 1), 881 SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO, 882 show_pwm_auto_point_temp_hyst, NULL, 2, 1), 883 SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO, 884 show_pwm_auto_point_temp_hyst, NULL, 3, 1), 885 }, { 886 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR, 887 show_pwm_auto_point_channel, 888 store_pwm_auto_point_channel, 0, 2), 889 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR, 890 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 891 0, 2), 892 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR, 893 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 894 1, 2), 895 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR, 896 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 897 2, 2), 898 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR, 899 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 900 3, 2), 901 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR, 902 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 903 4, 2), 904 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR, 905 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 906 0, 2), 907 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR, 908 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 909 1, 2), 910 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR, 911 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 912 2, 2), 913 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR, 914 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 915 3, 2), 916 SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 917 show_pwm_auto_point_temp_hyst, 918 store_pwm_auto_point_temp_hyst, 919 0, 2), 920 SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO, 921 show_pwm_auto_point_temp_hyst, NULL, 1, 2), 922 SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO, 923 show_pwm_auto_point_temp_hyst, NULL, 2, 2), 924 SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO, 925 show_pwm_auto_point_temp_hyst, NULL, 3, 2), 926 }, { 927 SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR, 928 show_pwm_auto_point_channel, 929 store_pwm_auto_point_channel, 0, 3), 930 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR, 931 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 932 0, 3), 933 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR, 934 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 935 1, 3), 936 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR, 937 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 938 2, 3), 939 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR, 940 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 941 3, 3), 942 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR, 943 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 944 4, 3), 945 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR, 946 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 947 0, 3), 948 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR, 949 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 950 1, 3), 951 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR, 952 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 953 2, 3), 954 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR, 955 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 956 3, 3), 957 SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 958 show_pwm_auto_point_temp_hyst, 959 store_pwm_auto_point_temp_hyst, 960 0, 3), 961 SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO, 962 show_pwm_auto_point_temp_hyst, NULL, 1, 3), 963 SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO, 964 show_pwm_auto_point_temp_hyst, NULL, 2, 3), 965 SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO, 966 show_pwm_auto_point_temp_hyst, NULL, 3, 3), 967 } }; 968 969 /* Fan attr specific to the f8000 (4th fan input can only measure speed) */ 970 static struct sensor_device_attribute_2 f8000_fan_attr[] = { 971 SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3), 972 }; 973 974 /* 975 * PWM attr for the f8000, zones mapped to temp instead of to pwm! 976 * Also the register block at offset A0 maps to TEMP1 (so our temp2, as the 977 * F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0 978 */ 979 static struct sensor_device_attribute_2 f8000_auto_pwm_attr[3][14] = { { 980 SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR, 981 show_pwm_auto_point_channel, 982 store_pwm_auto_point_channel, 0, 0), 983 SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR, 984 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 985 0, 2), 986 SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR, 987 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 988 1, 2), 989 SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR, 990 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 991 2, 2), 992 SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR, 993 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 994 3, 2), 995 SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR, 996 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 997 4, 2), 998 SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR, 999 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1000 0, 2), 1001 SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR, 1002 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1003 1, 2), 1004 SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR, 1005 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1006 2, 2), 1007 SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR, 1008 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1009 3, 2), 1010 SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 1011 show_pwm_auto_point_temp_hyst, 1012 store_pwm_auto_point_temp_hyst, 1013 0, 2), 1014 SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO, 1015 show_pwm_auto_point_temp_hyst, NULL, 1, 2), 1016 SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO, 1017 show_pwm_auto_point_temp_hyst, NULL, 2, 2), 1018 SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO, 1019 show_pwm_auto_point_temp_hyst, NULL, 3, 2), 1020 }, { 1021 SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR, 1022 show_pwm_auto_point_channel, 1023 store_pwm_auto_point_channel, 0, 1), 1024 SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR, 1025 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1026 0, 0), 1027 SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR, 1028 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1029 1, 0), 1030 SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR, 1031 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1032 2, 0), 1033 SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR, 1034 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1035 3, 0), 1036 SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR, 1037 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1038 4, 0), 1039 SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR, 1040 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1041 0, 0), 1042 SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR, 1043 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1044 1, 0), 1045 SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR, 1046 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1047 2, 0), 1048 SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR, 1049 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1050 3, 0), 1051 SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 1052 show_pwm_auto_point_temp_hyst, 1053 store_pwm_auto_point_temp_hyst, 1054 0, 0), 1055 SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO, 1056 show_pwm_auto_point_temp_hyst, NULL, 1, 0), 1057 SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO, 1058 show_pwm_auto_point_temp_hyst, NULL, 2, 0), 1059 SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO, 1060 show_pwm_auto_point_temp_hyst, NULL, 3, 0), 1061 }, { 1062 SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR, 1063 show_pwm_auto_point_channel, 1064 store_pwm_auto_point_channel, 0, 2), 1065 SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR, 1066 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1067 0, 1), 1068 SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR, 1069 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1070 1, 1), 1071 SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR, 1072 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1073 2, 1), 1074 SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR, 1075 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1076 3, 1), 1077 SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR, 1078 show_pwm_auto_point_pwm, store_pwm_auto_point_pwm, 1079 4, 1), 1080 SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR, 1081 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1082 0, 1), 1083 SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR, 1084 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1085 1, 1), 1086 SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR, 1087 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1088 2, 1), 1089 SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR, 1090 show_pwm_auto_point_temp, store_pwm_auto_point_temp, 1091 3, 1), 1092 SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR, 1093 show_pwm_auto_point_temp_hyst, 1094 store_pwm_auto_point_temp_hyst, 1095 0, 1), 1096 SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO, 1097 show_pwm_auto_point_temp_hyst, NULL, 1, 1), 1098 SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO, 1099 show_pwm_auto_point_temp_hyst, NULL, 2, 1), 1100 SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO, 1101 show_pwm_auto_point_temp_hyst, NULL, 3, 1), 1102 } }; 1103 1104 /* Super I/O functions */ 1105 static inline int superio_inb(int base, int reg) 1106 { 1107 outb(reg, base); 1108 return inb(base + 1); 1109 } 1110 1111 static int superio_inw(int base, int reg) 1112 { 1113 int val; 1114 val = superio_inb(base, reg) << 8; 1115 val |= superio_inb(base, reg + 1); 1116 return val; 1117 } 1118 1119 static inline int superio_enter(int base) 1120 { 1121 /* Don't step on other drivers' I/O space by accident */ 1122 if (!request_muxed_region(base, 2, DRVNAME)) { 1123 pr_err("I/O address 0x%04x already in use\n", base); 1124 return -EBUSY; 1125 } 1126 1127 /* according to the datasheet the key must be send twice! */ 1128 outb(SIO_UNLOCK_KEY, base); 1129 outb(SIO_UNLOCK_KEY, base); 1130 1131 return 0; 1132 } 1133 1134 static inline void superio_select(int base, int ld) 1135 { 1136 outb(SIO_REG_LDSEL, base); 1137 outb(ld, base + 1); 1138 } 1139 1140 static inline void superio_exit(int base) 1141 { 1142 outb(SIO_LOCK_KEY, base); 1143 release_region(base, 2); 1144 } 1145 1146 static inline int fan_from_reg(u16 reg) 1147 { 1148 return reg ? (1500000 / reg) : 0; 1149 } 1150 1151 static inline u16 fan_to_reg(int fan) 1152 { 1153 return fan ? (1500000 / fan) : 0; 1154 } 1155 1156 static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg) 1157 { 1158 u8 val; 1159 1160 outb(reg, data->addr + ADDR_REG_OFFSET); 1161 val = inb(data->addr + DATA_REG_OFFSET); 1162 1163 return val; 1164 } 1165 1166 static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg) 1167 { 1168 u16 val; 1169 1170 val = f71882fg_read8(data, reg) << 8; 1171 val |= f71882fg_read8(data, reg + 1); 1172 1173 return val; 1174 } 1175 1176 static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val) 1177 { 1178 outb(reg, data->addr + ADDR_REG_OFFSET); 1179 outb(val, data->addr + DATA_REG_OFFSET); 1180 } 1181 1182 static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val) 1183 { 1184 f71882fg_write8(data, reg, val >> 8); 1185 f71882fg_write8(data, reg + 1, val & 0xff); 1186 } 1187 1188 static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr) 1189 { 1190 if (data->type == f71858fg) 1191 return f71882fg_read16(data, F71882FG_REG_TEMP(nr)); 1192 else 1193 return f71882fg_read8(data, F71882FG_REG_TEMP(nr)); 1194 } 1195 1196 static struct f71882fg_data *f71882fg_update_device(struct device *dev) 1197 { 1198 struct f71882fg_data *data = dev_get_drvdata(dev); 1199 int nr_fans = f71882fg_nr_fans[data->type]; 1200 int nr_temps = f71882fg_nr_temps[data->type]; 1201 int nr, reg, point; 1202 1203 mutex_lock(&data->update_lock); 1204 1205 /* Update once every 60 seconds */ 1206 if (time_after(jiffies, data->last_limits + 60 * HZ) || 1207 !data->valid) { 1208 if (f71882fg_has_in1_alarm[data->type]) { 1209 if (data->type == f81866a) { 1210 data->in1_max = 1211 f71882fg_read8(data, 1212 F81866_REG_IN1_HIGH); 1213 data->in_beep = 1214 f71882fg_read8(data, 1215 F81866_REG_IN_BEEP); 1216 } else { 1217 data->in1_max = 1218 f71882fg_read8(data, 1219 F71882FG_REG_IN1_HIGH); 1220 data->in_beep = 1221 f71882fg_read8(data, 1222 F71882FG_REG_IN_BEEP); 1223 } 1224 } 1225 1226 /* Get High & boundary temps*/ 1227 for (nr = data->temp_start; nr < nr_temps + data->temp_start; 1228 nr++) { 1229 data->temp_ovt[nr] = f71882fg_read8(data, 1230 F71882FG_REG_TEMP_OVT(nr)); 1231 data->temp_high[nr] = f71882fg_read8(data, 1232 F71882FG_REG_TEMP_HIGH(nr)); 1233 } 1234 1235 if (data->type != f8000) { 1236 data->temp_hyst[0] = f71882fg_read8(data, 1237 F71882FG_REG_TEMP_HYST(0)); 1238 data->temp_hyst[1] = f71882fg_read8(data, 1239 F71882FG_REG_TEMP_HYST(1)); 1240 } 1241 /* All but the f71858fg / f8000 have this register */ 1242 if ((data->type != f71858fg) && (data->type != f8000)) { 1243 reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE); 1244 data->temp_type[1] = (reg & 0x02) ? 2 : 4; 1245 data->temp_type[2] = (reg & 0x04) ? 2 : 4; 1246 data->temp_type[3] = (reg & 0x08) ? 2 : 4; 1247 } 1248 1249 if (f71882fg_fan_has_beep[data->type]) 1250 data->fan_beep = f71882fg_read8(data, 1251 F71882FG_REG_FAN_BEEP); 1252 1253 if (f71882fg_temp_has_beep[data->type]) 1254 data->temp_beep = f71882fg_read8(data, 1255 F71882FG_REG_TEMP_BEEP); 1256 1257 data->pwm_enable = f71882fg_read8(data, 1258 F71882FG_REG_PWM_ENABLE); 1259 data->pwm_auto_point_hyst[0] = 1260 f71882fg_read8(data, F71882FG_REG_FAN_HYST(0)); 1261 data->pwm_auto_point_hyst[1] = 1262 f71882fg_read8(data, F71882FG_REG_FAN_HYST(1)); 1263 1264 for (nr = 0; nr < nr_fans; nr++) { 1265 data->pwm_auto_point_mapping[nr] = 1266 f71882fg_read8(data, 1267 F71882FG_REG_POINT_MAPPING(nr)); 1268 1269 switch (data->type) { 1270 default: 1271 for (point = 0; point < 5; point++) { 1272 data->pwm_auto_point_pwm[nr][point] = 1273 f71882fg_read8(data, 1274 F71882FG_REG_POINT_PWM 1275 (nr, point)); 1276 } 1277 for (point = 0; point < 4; point++) { 1278 data->pwm_auto_point_temp[nr][point] = 1279 f71882fg_read8(data, 1280 F71882FG_REG_POINT_TEMP 1281 (nr, point)); 1282 } 1283 break; 1284 case f71808e: 1285 case f71869: 1286 data->pwm_auto_point_pwm[nr][0] = 1287 f71882fg_read8(data, 1288 F71882FG_REG_POINT_PWM(nr, 0)); 1289 fallthrough; 1290 case f71862fg: 1291 data->pwm_auto_point_pwm[nr][1] = 1292 f71882fg_read8(data, 1293 F71882FG_REG_POINT_PWM 1294 (nr, 1)); 1295 data->pwm_auto_point_pwm[nr][4] = 1296 f71882fg_read8(data, 1297 F71882FG_REG_POINT_PWM 1298 (nr, 4)); 1299 data->pwm_auto_point_temp[nr][0] = 1300 f71882fg_read8(data, 1301 F71882FG_REG_POINT_TEMP 1302 (nr, 0)); 1303 data->pwm_auto_point_temp[nr][3] = 1304 f71882fg_read8(data, 1305 F71882FG_REG_POINT_TEMP 1306 (nr, 3)); 1307 break; 1308 } 1309 } 1310 data->last_limits = jiffies; 1311 } 1312 1313 /* Update every second */ 1314 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { 1315 data->temp_status = f71882fg_read8(data, 1316 F71882FG_REG_TEMP_STATUS); 1317 data->temp_diode_open = f71882fg_read8(data, 1318 F71882FG_REG_TEMP_DIODE_OPEN); 1319 for (nr = data->temp_start; nr < nr_temps + data->temp_start; 1320 nr++) 1321 data->temp[nr] = f71882fg_read_temp(data, nr); 1322 1323 data->fan_status = f71882fg_read8(data, 1324 F71882FG_REG_FAN_STATUS); 1325 for (nr = 0; nr < nr_fans; nr++) { 1326 data->fan[nr] = f71882fg_read16(data, 1327 F71882FG_REG_FAN(nr)); 1328 data->fan_target[nr] = 1329 f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr)); 1330 data->fan_full_speed[nr] = 1331 f71882fg_read16(data, 1332 F71882FG_REG_FAN_FULL_SPEED(nr)); 1333 data->pwm[nr] = 1334 f71882fg_read8(data, F71882FG_REG_PWM(nr)); 1335 } 1336 /* Some models have 1 more fan with limited capabilities */ 1337 if (data->type == f71808a) { 1338 data->fan[2] = f71882fg_read16(data, 1339 F71882FG_REG_FAN(2)); 1340 data->pwm[2] = f71882fg_read8(data, 1341 F71882FG_REG_PWM(2)); 1342 } 1343 if (data->type == f8000) 1344 data->fan[3] = f71882fg_read16(data, 1345 F71882FG_REG_FAN(3)); 1346 1347 if (f71882fg_has_in1_alarm[data->type]) { 1348 if (data->type == f81866a) 1349 data->in_status = f71882fg_read8(data, 1350 F81866_REG_IN_STATUS); 1351 1352 else 1353 data->in_status = f71882fg_read8(data, 1354 F71882FG_REG_IN_STATUS); 1355 } 1356 1357 for (nr = 0; nr < F71882FG_MAX_INS; nr++) 1358 if (f71882fg_has_in[data->type][nr]) 1359 data->in[nr] = f71882fg_read8(data, 1360 F71882FG_REG_IN(nr)); 1361 1362 data->last_updated = jiffies; 1363 data->valid = true; 1364 } 1365 1366 mutex_unlock(&data->update_lock); 1367 1368 return data; 1369 } 1370 1371 /* Sysfs Interface */ 1372 static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, 1373 char *buf) 1374 { 1375 struct f71882fg_data *data = f71882fg_update_device(dev); 1376 int nr = to_sensor_dev_attr_2(devattr)->index; 1377 int speed = fan_from_reg(data->fan[nr]); 1378 1379 if (speed == FAN_MIN_DETECT) 1380 speed = 0; 1381 1382 return sprintf(buf, "%d\n", speed); 1383 } 1384 1385 static ssize_t show_fan_full_speed(struct device *dev, 1386 struct device_attribute *devattr, char *buf) 1387 { 1388 struct f71882fg_data *data = f71882fg_update_device(dev); 1389 int nr = to_sensor_dev_attr_2(devattr)->index; 1390 int speed = fan_from_reg(data->fan_full_speed[nr]); 1391 return sprintf(buf, "%d\n", speed); 1392 } 1393 1394 static ssize_t store_fan_full_speed(struct device *dev, 1395 struct device_attribute *devattr, 1396 const char *buf, size_t count) 1397 { 1398 struct f71882fg_data *data = dev_get_drvdata(dev); 1399 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1400 long val; 1401 1402 err = kstrtol(buf, 10, &val); 1403 if (err) 1404 return err; 1405 1406 val = clamp_val(val, 23, 1500000); 1407 val = fan_to_reg(val); 1408 1409 mutex_lock(&data->update_lock); 1410 f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val); 1411 data->fan_full_speed[nr] = val; 1412 mutex_unlock(&data->update_lock); 1413 1414 return count; 1415 } 1416 1417 static ssize_t show_fan_beep(struct device *dev, struct device_attribute 1418 *devattr, char *buf) 1419 { 1420 struct f71882fg_data *data = f71882fg_update_device(dev); 1421 int nr = to_sensor_dev_attr_2(devattr)->index; 1422 1423 if (data->fan_beep & (1 << nr)) 1424 return sprintf(buf, "1\n"); 1425 else 1426 return sprintf(buf, "0\n"); 1427 } 1428 1429 static ssize_t store_fan_beep(struct device *dev, struct device_attribute 1430 *devattr, const char *buf, size_t count) 1431 { 1432 struct f71882fg_data *data = dev_get_drvdata(dev); 1433 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1434 unsigned long val; 1435 1436 err = kstrtoul(buf, 10, &val); 1437 if (err) 1438 return err; 1439 1440 mutex_lock(&data->update_lock); 1441 data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP); 1442 if (val) 1443 data->fan_beep |= 1 << nr; 1444 else 1445 data->fan_beep &= ~(1 << nr); 1446 1447 f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep); 1448 mutex_unlock(&data->update_lock); 1449 1450 return count; 1451 } 1452 1453 static ssize_t show_fan_alarm(struct device *dev, struct device_attribute 1454 *devattr, char *buf) 1455 { 1456 struct f71882fg_data *data = f71882fg_update_device(dev); 1457 int nr = to_sensor_dev_attr_2(devattr)->index; 1458 1459 if (data->fan_status & (1 << nr)) 1460 return sprintf(buf, "1\n"); 1461 else 1462 return sprintf(buf, "0\n"); 1463 } 1464 1465 static ssize_t show_in(struct device *dev, struct device_attribute *devattr, 1466 char *buf) 1467 { 1468 struct f71882fg_data *data = f71882fg_update_device(dev); 1469 int nr = to_sensor_dev_attr_2(devattr)->index; 1470 1471 return sprintf(buf, "%d\n", data->in[nr] * 8); 1472 } 1473 1474 static ssize_t show_in_max(struct device *dev, struct device_attribute 1475 *devattr, char *buf) 1476 { 1477 struct f71882fg_data *data = f71882fg_update_device(dev); 1478 1479 return sprintf(buf, "%d\n", data->in1_max * 8); 1480 } 1481 1482 static ssize_t store_in_max(struct device *dev, struct device_attribute 1483 *devattr, const char *buf, size_t count) 1484 { 1485 struct f71882fg_data *data = dev_get_drvdata(dev); 1486 int err; 1487 long val; 1488 1489 err = kstrtol(buf, 10, &val); 1490 if (err) 1491 return err; 1492 1493 val /= 8; 1494 val = clamp_val(val, 0, 255); 1495 1496 mutex_lock(&data->update_lock); 1497 if (data->type == f81866a) 1498 f71882fg_write8(data, F81866_REG_IN1_HIGH, val); 1499 else 1500 f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val); 1501 data->in1_max = val; 1502 mutex_unlock(&data->update_lock); 1503 1504 return count; 1505 } 1506 1507 static ssize_t show_in_beep(struct device *dev, struct device_attribute 1508 *devattr, char *buf) 1509 { 1510 struct f71882fg_data *data = f71882fg_update_device(dev); 1511 int nr = to_sensor_dev_attr_2(devattr)->index; 1512 1513 if (data->in_beep & (1 << nr)) 1514 return sprintf(buf, "1\n"); 1515 else 1516 return sprintf(buf, "0\n"); 1517 } 1518 1519 static ssize_t store_in_beep(struct device *dev, struct device_attribute 1520 *devattr, const char *buf, size_t count) 1521 { 1522 struct f71882fg_data *data = dev_get_drvdata(dev); 1523 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1524 unsigned long val; 1525 1526 err = kstrtoul(buf, 10, &val); 1527 if (err) 1528 return err; 1529 1530 mutex_lock(&data->update_lock); 1531 if (data->type == f81866a) 1532 data->in_beep = f71882fg_read8(data, F81866_REG_IN_BEEP); 1533 else 1534 data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP); 1535 1536 if (val) 1537 data->in_beep |= 1 << nr; 1538 else 1539 data->in_beep &= ~(1 << nr); 1540 1541 if (data->type == f81866a) 1542 f71882fg_write8(data, F81866_REG_IN_BEEP, data->in_beep); 1543 else 1544 f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep); 1545 mutex_unlock(&data->update_lock); 1546 1547 return count; 1548 } 1549 1550 static ssize_t show_in_alarm(struct device *dev, struct device_attribute 1551 *devattr, char *buf) 1552 { 1553 struct f71882fg_data *data = f71882fg_update_device(dev); 1554 int nr = to_sensor_dev_attr_2(devattr)->index; 1555 1556 if (data->in_status & (1 << nr)) 1557 return sprintf(buf, "1\n"); 1558 else 1559 return sprintf(buf, "0\n"); 1560 } 1561 1562 static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, 1563 char *buf) 1564 { 1565 struct f71882fg_data *data = f71882fg_update_device(dev); 1566 int nr = to_sensor_dev_attr_2(devattr)->index; 1567 int sign, temp; 1568 1569 if (data->type == f71858fg) { 1570 /* TEMP_TABLE_SEL 1 or 3 ? */ 1571 if (data->temp_config & 1) { 1572 sign = data->temp[nr] & 0x0001; 1573 temp = (data->temp[nr] >> 5) & 0x7ff; 1574 } else { 1575 sign = data->temp[nr] & 0x8000; 1576 temp = (data->temp[nr] >> 5) & 0x3ff; 1577 } 1578 temp *= 125; 1579 if (sign) 1580 temp -= 128000; 1581 } else 1582 temp = data->temp[nr] * 1000; 1583 1584 return sprintf(buf, "%d\n", temp); 1585 } 1586 1587 static ssize_t show_temp_max(struct device *dev, struct device_attribute 1588 *devattr, char *buf) 1589 { 1590 struct f71882fg_data *data = f71882fg_update_device(dev); 1591 int nr = to_sensor_dev_attr_2(devattr)->index; 1592 1593 return sprintf(buf, "%d\n", data->temp_high[nr] * 1000); 1594 } 1595 1596 static ssize_t store_temp_max(struct device *dev, struct device_attribute 1597 *devattr, const char *buf, size_t count) 1598 { 1599 struct f71882fg_data *data = dev_get_drvdata(dev); 1600 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1601 long val; 1602 1603 err = kstrtol(buf, 10, &val); 1604 if (err) 1605 return err; 1606 1607 val /= 1000; 1608 val = clamp_val(val, 0, 255); 1609 1610 mutex_lock(&data->update_lock); 1611 f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val); 1612 data->temp_high[nr] = val; 1613 mutex_unlock(&data->update_lock); 1614 1615 return count; 1616 } 1617 1618 static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute 1619 *devattr, char *buf) 1620 { 1621 struct f71882fg_data *data = f71882fg_update_device(dev); 1622 int nr = to_sensor_dev_attr_2(devattr)->index; 1623 int temp_max_hyst; 1624 1625 mutex_lock(&data->update_lock); 1626 if (nr & 1) 1627 temp_max_hyst = data->temp_hyst[nr / 2] >> 4; 1628 else 1629 temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f; 1630 temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000; 1631 mutex_unlock(&data->update_lock); 1632 1633 return sprintf(buf, "%d\n", temp_max_hyst); 1634 } 1635 1636 static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute 1637 *devattr, const char *buf, size_t count) 1638 { 1639 struct f71882fg_data *data = dev_get_drvdata(dev); 1640 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1641 ssize_t ret = count; 1642 u8 reg; 1643 long val; 1644 1645 err = kstrtol(buf, 10, &val); 1646 if (err) 1647 return err; 1648 1649 val /= 1000; 1650 1651 mutex_lock(&data->update_lock); 1652 1653 /* convert abs to relative and check */ 1654 data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr)); 1655 val = clamp_val(val, data->temp_high[nr] - 15, data->temp_high[nr]); 1656 val = data->temp_high[nr] - val; 1657 1658 /* convert value to register contents */ 1659 reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2)); 1660 if (nr & 1) 1661 reg = (reg & 0x0f) | (val << 4); 1662 else 1663 reg = (reg & 0xf0) | val; 1664 f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg); 1665 data->temp_hyst[nr / 2] = reg; 1666 1667 mutex_unlock(&data->update_lock); 1668 return ret; 1669 } 1670 1671 static ssize_t show_temp_crit(struct device *dev, struct device_attribute 1672 *devattr, char *buf) 1673 { 1674 struct f71882fg_data *data = f71882fg_update_device(dev); 1675 int nr = to_sensor_dev_attr_2(devattr)->index; 1676 1677 return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000); 1678 } 1679 1680 static ssize_t store_temp_crit(struct device *dev, struct device_attribute 1681 *devattr, const char *buf, size_t count) 1682 { 1683 struct f71882fg_data *data = dev_get_drvdata(dev); 1684 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1685 long val; 1686 1687 err = kstrtol(buf, 10, &val); 1688 if (err) 1689 return err; 1690 1691 val /= 1000; 1692 val = clamp_val(val, 0, 255); 1693 1694 mutex_lock(&data->update_lock); 1695 f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val); 1696 data->temp_ovt[nr] = val; 1697 mutex_unlock(&data->update_lock); 1698 1699 return count; 1700 } 1701 1702 static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute 1703 *devattr, char *buf) 1704 { 1705 struct f71882fg_data *data = f71882fg_update_device(dev); 1706 int nr = to_sensor_dev_attr_2(devattr)->index; 1707 int temp_crit_hyst; 1708 1709 mutex_lock(&data->update_lock); 1710 if (nr & 1) 1711 temp_crit_hyst = data->temp_hyst[nr / 2] >> 4; 1712 else 1713 temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f; 1714 temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000; 1715 mutex_unlock(&data->update_lock); 1716 1717 return sprintf(buf, "%d\n", temp_crit_hyst); 1718 } 1719 1720 static ssize_t show_temp_type(struct device *dev, struct device_attribute 1721 *devattr, char *buf) 1722 { 1723 struct f71882fg_data *data = f71882fg_update_device(dev); 1724 int nr = to_sensor_dev_attr_2(devattr)->index; 1725 1726 return sprintf(buf, "%d\n", data->temp_type[nr]); 1727 } 1728 1729 static ssize_t show_temp_beep(struct device *dev, struct device_attribute 1730 *devattr, char *buf) 1731 { 1732 struct f71882fg_data *data = f71882fg_update_device(dev); 1733 int nr = to_sensor_dev_attr_2(devattr)->index; 1734 1735 if (data->temp_beep & (1 << nr)) 1736 return sprintf(buf, "1\n"); 1737 else 1738 return sprintf(buf, "0\n"); 1739 } 1740 1741 static ssize_t store_temp_beep(struct device *dev, struct device_attribute 1742 *devattr, const char *buf, size_t count) 1743 { 1744 struct f71882fg_data *data = dev_get_drvdata(dev); 1745 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1746 unsigned long val; 1747 1748 err = kstrtoul(buf, 10, &val); 1749 if (err) 1750 return err; 1751 1752 mutex_lock(&data->update_lock); 1753 data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP); 1754 if (val) 1755 data->temp_beep |= 1 << nr; 1756 else 1757 data->temp_beep &= ~(1 << nr); 1758 1759 f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep); 1760 mutex_unlock(&data->update_lock); 1761 1762 return count; 1763 } 1764 1765 static ssize_t show_temp_alarm(struct device *dev, struct device_attribute 1766 *devattr, char *buf) 1767 { 1768 struct f71882fg_data *data = f71882fg_update_device(dev); 1769 int nr = to_sensor_dev_attr_2(devattr)->index; 1770 1771 if (data->temp_status & (1 << nr)) 1772 return sprintf(buf, "1\n"); 1773 else 1774 return sprintf(buf, "0\n"); 1775 } 1776 1777 static ssize_t show_temp_fault(struct device *dev, struct device_attribute 1778 *devattr, char *buf) 1779 { 1780 struct f71882fg_data *data = f71882fg_update_device(dev); 1781 int nr = to_sensor_dev_attr_2(devattr)->index; 1782 1783 if (data->temp_diode_open & (1 << nr)) 1784 return sprintf(buf, "1\n"); 1785 else 1786 return sprintf(buf, "0\n"); 1787 } 1788 1789 static ssize_t show_pwm(struct device *dev, 1790 struct device_attribute *devattr, char *buf) 1791 { 1792 struct f71882fg_data *data = f71882fg_update_device(dev); 1793 int val, nr = to_sensor_dev_attr_2(devattr)->index; 1794 mutex_lock(&data->update_lock); 1795 if (data->pwm_enable & (1 << (2 * nr))) 1796 /* PWM mode */ 1797 val = data->pwm[nr]; 1798 else { 1799 /* RPM mode */ 1800 val = 255 * fan_from_reg(data->fan_target[nr]) 1801 / fan_from_reg(data->fan_full_speed[nr]); 1802 } 1803 mutex_unlock(&data->update_lock); 1804 return sprintf(buf, "%d\n", val); 1805 } 1806 1807 static ssize_t store_pwm(struct device *dev, 1808 struct device_attribute *devattr, const char *buf, 1809 size_t count) 1810 { 1811 struct f71882fg_data *data = dev_get_drvdata(dev); 1812 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1813 long val; 1814 1815 err = kstrtol(buf, 10, &val); 1816 if (err) 1817 return err; 1818 1819 val = clamp_val(val, 0, 255); 1820 1821 mutex_lock(&data->update_lock); 1822 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE); 1823 if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) || 1824 (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) { 1825 count = -EROFS; 1826 goto leave; 1827 } 1828 if (data->pwm_enable & (1 << (2 * nr))) { 1829 /* PWM mode */ 1830 f71882fg_write8(data, F71882FG_REG_PWM(nr), val); 1831 data->pwm[nr] = val; 1832 } else { 1833 /* RPM mode */ 1834 int target, full_speed; 1835 full_speed = f71882fg_read16(data, 1836 F71882FG_REG_FAN_FULL_SPEED(nr)); 1837 target = fan_to_reg(val * fan_from_reg(full_speed) / 255); 1838 f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target); 1839 data->fan_target[nr] = target; 1840 data->fan_full_speed[nr] = full_speed; 1841 } 1842 leave: 1843 mutex_unlock(&data->update_lock); 1844 1845 return count; 1846 } 1847 1848 static ssize_t show_simple_pwm(struct device *dev, 1849 struct device_attribute *devattr, char *buf) 1850 { 1851 struct f71882fg_data *data = f71882fg_update_device(dev); 1852 int val, nr = to_sensor_dev_attr_2(devattr)->index; 1853 1854 val = data->pwm[nr]; 1855 return sprintf(buf, "%d\n", val); 1856 } 1857 1858 static ssize_t store_simple_pwm(struct device *dev, 1859 struct device_attribute *devattr, 1860 const char *buf, size_t count) 1861 { 1862 struct f71882fg_data *data = dev_get_drvdata(dev); 1863 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1864 long val; 1865 1866 err = kstrtol(buf, 10, &val); 1867 if (err) 1868 return err; 1869 1870 val = clamp_val(val, 0, 255); 1871 1872 mutex_lock(&data->update_lock); 1873 f71882fg_write8(data, F71882FG_REG_PWM(nr), val); 1874 data->pwm[nr] = val; 1875 mutex_unlock(&data->update_lock); 1876 1877 return count; 1878 } 1879 1880 static ssize_t show_pwm_enable(struct device *dev, 1881 struct device_attribute *devattr, char *buf) 1882 { 1883 int result = 0; 1884 struct f71882fg_data *data = f71882fg_update_device(dev); 1885 int nr = to_sensor_dev_attr_2(devattr)->index; 1886 1887 switch ((data->pwm_enable >> 2 * nr) & 3) { 1888 case 0: 1889 case 1: 1890 result = 2; /* Normal auto mode */ 1891 break; 1892 case 2: 1893 result = 1; /* Manual mode */ 1894 break; 1895 case 3: 1896 if (data->type == f8000) 1897 result = 3; /* Thermostat mode */ 1898 else 1899 result = 1; /* Manual mode */ 1900 break; 1901 } 1902 1903 return sprintf(buf, "%d\n", result); 1904 } 1905 1906 static ssize_t store_pwm_enable(struct device *dev, struct device_attribute 1907 *devattr, const char *buf, size_t count) 1908 { 1909 struct f71882fg_data *data = dev_get_drvdata(dev); 1910 int err, nr = to_sensor_dev_attr_2(devattr)->index; 1911 long val; 1912 1913 err = kstrtol(buf, 10, &val); 1914 if (err) 1915 return err; 1916 1917 /* Special case for F8000 pwm channel 3 which only does auto mode */ 1918 if (data->type == f8000 && nr == 2 && val != 2) 1919 return -EINVAL; 1920 1921 mutex_lock(&data->update_lock); 1922 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE); 1923 /* Special case for F8000 auto PWM mode / Thermostat mode */ 1924 if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) { 1925 switch (val) { 1926 case 2: 1927 data->pwm_enable &= ~(2 << (2 * nr)); 1928 break; /* Normal auto mode */ 1929 case 3: 1930 data->pwm_enable |= 2 << (2 * nr); 1931 break; /* Thermostat mode */ 1932 default: 1933 count = -EINVAL; 1934 goto leave; 1935 } 1936 } else { 1937 switch (val) { 1938 case 1: 1939 /* The f71858fg does not support manual RPM mode */ 1940 if (data->type == f71858fg && 1941 ((data->pwm_enable >> (2 * nr)) & 1)) { 1942 count = -EINVAL; 1943 goto leave; 1944 } 1945 data->pwm_enable |= 2 << (2 * nr); 1946 break; /* Manual */ 1947 case 2: 1948 data->pwm_enable &= ~(2 << (2 * nr)); 1949 break; /* Normal auto mode */ 1950 default: 1951 count = -EINVAL; 1952 goto leave; 1953 } 1954 } 1955 f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable); 1956 leave: 1957 mutex_unlock(&data->update_lock); 1958 1959 return count; 1960 } 1961 1962 static ssize_t show_pwm_auto_point_pwm(struct device *dev, 1963 struct device_attribute *devattr, 1964 char *buf) 1965 { 1966 int result; 1967 struct f71882fg_data *data = f71882fg_update_device(dev); 1968 int pwm = to_sensor_dev_attr_2(devattr)->index; 1969 int point = to_sensor_dev_attr_2(devattr)->nr; 1970 1971 mutex_lock(&data->update_lock); 1972 if (data->pwm_enable & (1 << (2 * pwm))) { 1973 /* PWM mode */ 1974 result = data->pwm_auto_point_pwm[pwm][point]; 1975 } else { 1976 /* RPM mode */ 1977 result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]); 1978 } 1979 mutex_unlock(&data->update_lock); 1980 1981 return sprintf(buf, "%d\n", result); 1982 } 1983 1984 static ssize_t store_pwm_auto_point_pwm(struct device *dev, 1985 struct device_attribute *devattr, 1986 const char *buf, size_t count) 1987 { 1988 struct f71882fg_data *data = dev_get_drvdata(dev); 1989 int err, pwm = to_sensor_dev_attr_2(devattr)->index; 1990 int point = to_sensor_dev_attr_2(devattr)->nr; 1991 long val; 1992 1993 err = kstrtol(buf, 10, &val); 1994 if (err) 1995 return err; 1996 1997 val = clamp_val(val, 0, 255); 1998 1999 mutex_lock(&data->update_lock); 2000 data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE); 2001 if (data->pwm_enable & (1 << (2 * pwm))) { 2002 /* PWM mode */ 2003 } else { 2004 /* RPM mode */ 2005 if (val < 29) /* Prevent negative numbers */ 2006 val = 255; 2007 else 2008 val = (255 - val) * 32 / val; 2009 } 2010 f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val); 2011 data->pwm_auto_point_pwm[pwm][point] = val; 2012 mutex_unlock(&data->update_lock); 2013 2014 return count; 2015 } 2016 2017 static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev, 2018 struct device_attribute *devattr, 2019 char *buf) 2020 { 2021 int result = 0; 2022 struct f71882fg_data *data = f71882fg_update_device(dev); 2023 int nr = to_sensor_dev_attr_2(devattr)->index; 2024 int point = to_sensor_dev_attr_2(devattr)->nr; 2025 2026 mutex_lock(&data->update_lock); 2027 if (nr & 1) 2028 result = data->pwm_auto_point_hyst[nr / 2] >> 4; 2029 else 2030 result = data->pwm_auto_point_hyst[nr / 2] & 0x0f; 2031 result = 1000 * (data->pwm_auto_point_temp[nr][point] - result); 2032 mutex_unlock(&data->update_lock); 2033 2034 return sprintf(buf, "%d\n", result); 2035 } 2036 2037 static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev, 2038 struct device_attribute *devattr, 2039 const char *buf, size_t count) 2040 { 2041 struct f71882fg_data *data = dev_get_drvdata(dev); 2042 int err, nr = to_sensor_dev_attr_2(devattr)->index; 2043 int point = to_sensor_dev_attr_2(devattr)->nr; 2044 u8 reg; 2045 long val; 2046 2047 err = kstrtol(buf, 10, &val); 2048 if (err) 2049 return err; 2050 2051 val /= 1000; 2052 2053 mutex_lock(&data->update_lock); 2054 data->pwm_auto_point_temp[nr][point] = 2055 f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point)); 2056 val = clamp_val(val, data->pwm_auto_point_temp[nr][point] - 15, 2057 data->pwm_auto_point_temp[nr][point]); 2058 val = data->pwm_auto_point_temp[nr][point] - val; 2059 2060 reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2)); 2061 if (nr & 1) 2062 reg = (reg & 0x0f) | (val << 4); 2063 else 2064 reg = (reg & 0xf0) | val; 2065 2066 f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg); 2067 data->pwm_auto_point_hyst[nr / 2] = reg; 2068 mutex_unlock(&data->update_lock); 2069 2070 return count; 2071 } 2072 2073 static ssize_t show_pwm_interpolate(struct device *dev, 2074 struct device_attribute *devattr, char *buf) 2075 { 2076 int result; 2077 struct f71882fg_data *data = f71882fg_update_device(dev); 2078 int nr = to_sensor_dev_attr_2(devattr)->index; 2079 2080 result = (data->pwm_auto_point_mapping[nr] >> 4) & 1; 2081 2082 return sprintf(buf, "%d\n", result); 2083 } 2084 2085 static ssize_t store_pwm_interpolate(struct device *dev, 2086 struct device_attribute *devattr, 2087 const char *buf, size_t count) 2088 { 2089 struct f71882fg_data *data = dev_get_drvdata(dev); 2090 int err, nr = to_sensor_dev_attr_2(devattr)->index; 2091 unsigned long val; 2092 2093 err = kstrtoul(buf, 10, &val); 2094 if (err) 2095 return err; 2096 2097 mutex_lock(&data->update_lock); 2098 data->pwm_auto_point_mapping[nr] = 2099 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr)); 2100 if (val) 2101 val = data->pwm_auto_point_mapping[nr] | (1 << 4); 2102 else 2103 val = data->pwm_auto_point_mapping[nr] & (~(1 << 4)); 2104 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val); 2105 data->pwm_auto_point_mapping[nr] = val; 2106 mutex_unlock(&data->update_lock); 2107 2108 return count; 2109 } 2110 2111 static ssize_t show_pwm_auto_point_channel(struct device *dev, 2112 struct device_attribute *devattr, 2113 char *buf) 2114 { 2115 int result; 2116 struct f71882fg_data *data = f71882fg_update_device(dev); 2117 int nr = to_sensor_dev_attr_2(devattr)->index; 2118 2119 result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) - 2120 data->temp_start); 2121 2122 return sprintf(buf, "%d\n", result); 2123 } 2124 2125 static ssize_t store_pwm_auto_point_channel(struct device *dev, 2126 struct device_attribute *devattr, 2127 const char *buf, size_t count) 2128 { 2129 struct f71882fg_data *data = dev_get_drvdata(dev); 2130 int err, nr = to_sensor_dev_attr_2(devattr)->index; 2131 long val; 2132 2133 err = kstrtol(buf, 10, &val); 2134 if (err) 2135 return err; 2136 2137 switch (val) { 2138 case 1: 2139 val = 0; 2140 break; 2141 case 2: 2142 val = 1; 2143 break; 2144 case 4: 2145 val = 2; 2146 break; 2147 default: 2148 return -EINVAL; 2149 } 2150 val += data->temp_start; 2151 mutex_lock(&data->update_lock); 2152 data->pwm_auto_point_mapping[nr] = 2153 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr)); 2154 val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val; 2155 f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val); 2156 data->pwm_auto_point_mapping[nr] = val; 2157 mutex_unlock(&data->update_lock); 2158 2159 return count; 2160 } 2161 2162 static ssize_t show_pwm_auto_point_temp(struct device *dev, 2163 struct device_attribute *devattr, 2164 char *buf) 2165 { 2166 int result; 2167 struct f71882fg_data *data = f71882fg_update_device(dev); 2168 int pwm = to_sensor_dev_attr_2(devattr)->index; 2169 int point = to_sensor_dev_attr_2(devattr)->nr; 2170 2171 result = data->pwm_auto_point_temp[pwm][point]; 2172 return sprintf(buf, "%d\n", 1000 * result); 2173 } 2174 2175 static ssize_t store_pwm_auto_point_temp(struct device *dev, 2176 struct device_attribute *devattr, 2177 const char *buf, size_t count) 2178 { 2179 struct f71882fg_data *data = dev_get_drvdata(dev); 2180 int err, pwm = to_sensor_dev_attr_2(devattr)->index; 2181 int point = to_sensor_dev_attr_2(devattr)->nr; 2182 long val; 2183 2184 err = kstrtol(buf, 10, &val); 2185 if (err) 2186 return err; 2187 2188 val /= 1000; 2189 2190 if (data->auto_point_temp_signed) 2191 val = clamp_val(val, -128, 127); 2192 else 2193 val = clamp_val(val, 0, 127); 2194 2195 mutex_lock(&data->update_lock); 2196 f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val); 2197 data->pwm_auto_point_temp[pwm][point] = val; 2198 mutex_unlock(&data->update_lock); 2199 2200 return count; 2201 } 2202 2203 static ssize_t name_show(struct device *dev, struct device_attribute *devattr, 2204 char *buf) 2205 { 2206 struct f71882fg_data *data = dev_get_drvdata(dev); 2207 return sprintf(buf, "%s\n", f71882fg_names[data->type]); 2208 } 2209 2210 static int f71882fg_create_sysfs_files(struct platform_device *pdev, 2211 struct sensor_device_attribute_2 *attr, int count) 2212 { 2213 int err, i; 2214 2215 for (i = 0; i < count; i++) { 2216 err = device_create_file(&pdev->dev, &attr[i].dev_attr); 2217 if (err) 2218 return err; 2219 } 2220 return 0; 2221 } 2222 2223 static void f71882fg_remove_sysfs_files(struct platform_device *pdev, 2224 struct sensor_device_attribute_2 *attr, int count) 2225 { 2226 int i; 2227 2228 for (i = 0; i < count; i++) 2229 device_remove_file(&pdev->dev, &attr[i].dev_attr); 2230 } 2231 2232 static int f71882fg_create_fan_sysfs_files( 2233 struct platform_device *pdev, int idx) 2234 { 2235 struct f71882fg_data *data = platform_get_drvdata(pdev); 2236 int err; 2237 2238 /* Sanity check the pwm setting */ 2239 err = 0; 2240 switch (data->type) { 2241 case f71858fg: 2242 if (((data->pwm_enable >> (idx * 2)) & 3) == 3) 2243 err = 1; 2244 break; 2245 case f71862fg: 2246 if (((data->pwm_enable >> (idx * 2)) & 1) != 1) 2247 err = 1; 2248 break; 2249 case f8000: 2250 if (idx == 2) 2251 err = data->pwm_enable & 0x20; 2252 break; 2253 default: 2254 break; 2255 } 2256 if (err) { 2257 dev_err(&pdev->dev, 2258 "Invalid (reserved) pwm settings: 0x%02x, " 2259 "skipping fan %d\n", 2260 (data->pwm_enable >> (idx * 2)) & 3, idx + 1); 2261 return 0; /* This is a non fatal condition */ 2262 } 2263 2264 err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[idx][0], 2265 ARRAY_SIZE(fxxxx_fan_attr[0])); 2266 if (err) 2267 return err; 2268 2269 if (f71882fg_fan_has_beep[data->type]) { 2270 err = f71882fg_create_sysfs_files(pdev, 2271 &fxxxx_fan_beep_attr[idx], 2272 1); 2273 if (err) 2274 return err; 2275 } 2276 2277 dev_info(&pdev->dev, "Fan: %d is in %s mode\n", idx + 1, 2278 (data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM"); 2279 2280 /* Check for unsupported auto pwm settings */ 2281 switch (data->type) { 2282 case f71808e: 2283 case f71808a: 2284 case f71869: 2285 case f71869a: 2286 case f71889fg: 2287 case f71889ed: 2288 case f71889a: 2289 data->pwm_auto_point_mapping[idx] = 2290 f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(idx)); 2291 if ((data->pwm_auto_point_mapping[idx] & 0x80) || 2292 (data->pwm_auto_point_mapping[idx] & 3) == 0) { 2293 dev_warn(&pdev->dev, 2294 "Auto pwm controlled by raw digital " 2295 "data, disabling pwm auto_point " 2296 "sysfs attributes for fan %d\n", idx + 1); 2297 return 0; /* This is a non fatal condition */ 2298 } 2299 break; 2300 default: 2301 break; 2302 } 2303 2304 switch (data->type) { 2305 case f71862fg: 2306 err = f71882fg_create_sysfs_files(pdev, 2307 &f71862fg_auto_pwm_attr[idx][0], 2308 ARRAY_SIZE(f71862fg_auto_pwm_attr[0])); 2309 break; 2310 case f71808e: 2311 case f71869: 2312 err = f71882fg_create_sysfs_files(pdev, 2313 &f71869_auto_pwm_attr[idx][0], 2314 ARRAY_SIZE(f71869_auto_pwm_attr[0])); 2315 break; 2316 case f8000: 2317 err = f71882fg_create_sysfs_files(pdev, 2318 &f8000_auto_pwm_attr[idx][0], 2319 ARRAY_SIZE(f8000_auto_pwm_attr[0])); 2320 break; 2321 default: 2322 err = f71882fg_create_sysfs_files(pdev, 2323 &fxxxx_auto_pwm_attr[idx][0], 2324 ARRAY_SIZE(fxxxx_auto_pwm_attr[0])); 2325 } 2326 2327 return err; 2328 } 2329 2330 static int f71882fg_probe(struct platform_device *pdev) 2331 { 2332 struct f71882fg_data *data; 2333 struct f71882fg_sio_data *sio_data = dev_get_platdata(&pdev->dev); 2334 int nr_fans = f71882fg_nr_fans[sio_data->type]; 2335 int nr_temps = f71882fg_nr_temps[sio_data->type]; 2336 int err, i; 2337 int size; 2338 u8 start_reg, reg; 2339 2340 data = devm_kzalloc(&pdev->dev, sizeof(struct f71882fg_data), 2341 GFP_KERNEL); 2342 if (!data) 2343 return -ENOMEM; 2344 2345 data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start; 2346 data->type = sio_data->type; 2347 data->temp_start = 2348 (data->type == f71858fg || data->type == f8000 || 2349 data->type == f81866a) ? 0 : 1; 2350 mutex_init(&data->update_lock); 2351 platform_set_drvdata(pdev, data); 2352 2353 start_reg = f71882fg_read8(data, F71882FG_REG_START); 2354 if (start_reg & 0x04) { 2355 dev_warn(&pdev->dev, "Hardware monitor is powered down\n"); 2356 return -ENODEV; 2357 } 2358 if (!(start_reg & 0x03)) { 2359 dev_warn(&pdev->dev, "Hardware monitoring not activated\n"); 2360 return -ENODEV; 2361 } 2362 2363 /* Register sysfs interface files */ 2364 err = device_create_file(&pdev->dev, &dev_attr_name); 2365 if (err) 2366 goto exit_unregister_sysfs; 2367 2368 if (start_reg & 0x01) { 2369 switch (data->type) { 2370 case f71858fg: 2371 data->temp_config = 2372 f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG); 2373 if (data->temp_config & 0x10) 2374 /* 2375 * The f71858fg temperature alarms behave as 2376 * the f8000 alarms in this mode 2377 */ 2378 err = f71882fg_create_sysfs_files(pdev, 2379 f8000_temp_attr, 2380 ARRAY_SIZE(f8000_temp_attr)); 2381 else 2382 err = f71882fg_create_sysfs_files(pdev, 2383 f71858fg_temp_attr, 2384 ARRAY_SIZE(f71858fg_temp_attr)); 2385 break; 2386 case f8000: 2387 err = f71882fg_create_sysfs_files(pdev, 2388 f8000_temp_attr, 2389 ARRAY_SIZE(f8000_temp_attr)); 2390 break; 2391 case f81866a: 2392 err = f71882fg_create_sysfs_files(pdev, 2393 f71858fg_temp_attr, 2394 ARRAY_SIZE(f71858fg_temp_attr)); 2395 break; 2396 default: 2397 err = f71882fg_create_sysfs_files(pdev, 2398 &fxxxx_temp_attr[0][0], 2399 ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps); 2400 } 2401 if (err) 2402 goto exit_unregister_sysfs; 2403 2404 if (f71882fg_temp_has_beep[data->type]) { 2405 if (data->type == f81866a) { 2406 size = ARRAY_SIZE(f81866_temp_beep_attr[0]); 2407 err = f71882fg_create_sysfs_files(pdev, 2408 &f81866_temp_beep_attr[0][0], 2409 size * nr_temps); 2410 2411 } else { 2412 size = ARRAY_SIZE(fxxxx_temp_beep_attr[0]); 2413 err = f71882fg_create_sysfs_files(pdev, 2414 &fxxxx_temp_beep_attr[0][0], 2415 size * nr_temps); 2416 } 2417 if (err) 2418 goto exit_unregister_sysfs; 2419 } 2420 2421 for (i = 0; i < F71882FG_MAX_INS; i++) { 2422 if (f71882fg_has_in[data->type][i]) { 2423 err = device_create_file(&pdev->dev, 2424 &fxxxx_in_attr[i].dev_attr); 2425 if (err) 2426 goto exit_unregister_sysfs; 2427 } 2428 } 2429 if (f71882fg_has_in1_alarm[data->type]) { 2430 err = f71882fg_create_sysfs_files(pdev, 2431 fxxxx_in1_alarm_attr, 2432 ARRAY_SIZE(fxxxx_in1_alarm_attr)); 2433 if (err) 2434 goto exit_unregister_sysfs; 2435 } 2436 } 2437 2438 if (start_reg & 0x02) { 2439 switch (data->type) { 2440 case f71808e: 2441 case f71808a: 2442 case f71869: 2443 case f71869a: 2444 /* These always have signed auto point temps */ 2445 data->auto_point_temp_signed = 1; 2446 fallthrough; /* to select correct fan/pwm reg bank! */ 2447 case f71889fg: 2448 case f71889ed: 2449 case f71889a: 2450 reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T); 2451 if (reg & F71882FG_FAN_NEG_TEMP_EN) 2452 data->auto_point_temp_signed = 1; 2453 /* Ensure banked pwm registers point to right bank */ 2454 reg &= ~F71882FG_FAN_PROG_SEL; 2455 f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg); 2456 break; 2457 default: 2458 break; 2459 } 2460 2461 data->pwm_enable = 2462 f71882fg_read8(data, F71882FG_REG_PWM_ENABLE); 2463 2464 for (i = 0; i < nr_fans; i++) { 2465 err = f71882fg_create_fan_sysfs_files(pdev, i); 2466 if (err) 2467 goto exit_unregister_sysfs; 2468 } 2469 2470 /* Some types have 1 extra fan with limited functionality */ 2471 switch (data->type) { 2472 case f71808a: 2473 err = f71882fg_create_sysfs_files(pdev, 2474 f71808a_fan3_attr, 2475 ARRAY_SIZE(f71808a_fan3_attr)); 2476 break; 2477 case f8000: 2478 err = f71882fg_create_sysfs_files(pdev, 2479 f8000_fan_attr, 2480 ARRAY_SIZE(f8000_fan_attr)); 2481 break; 2482 default: 2483 break; 2484 } 2485 if (err) 2486 goto exit_unregister_sysfs; 2487 } 2488 2489 data->hwmon_dev = hwmon_device_register(&pdev->dev); 2490 if (IS_ERR(data->hwmon_dev)) { 2491 err = PTR_ERR(data->hwmon_dev); 2492 data->hwmon_dev = NULL; 2493 goto exit_unregister_sysfs; 2494 } 2495 2496 return 0; 2497 2498 exit_unregister_sysfs: 2499 f71882fg_remove(pdev); /* Will unregister the sysfs files for us */ 2500 return err; /* f71882fg_remove() also frees our data */ 2501 } 2502 2503 static int f71882fg_remove(struct platform_device *pdev) 2504 { 2505 struct f71882fg_data *data = platform_get_drvdata(pdev); 2506 int nr_fans = f71882fg_nr_fans[data->type]; 2507 int nr_temps = f71882fg_nr_temps[data->type]; 2508 int i; 2509 u8 start_reg = f71882fg_read8(data, F71882FG_REG_START); 2510 2511 if (data->hwmon_dev) 2512 hwmon_device_unregister(data->hwmon_dev); 2513 2514 device_remove_file(&pdev->dev, &dev_attr_name); 2515 2516 if (start_reg & 0x01) { 2517 switch (data->type) { 2518 case f71858fg: 2519 if (data->temp_config & 0x10) 2520 f71882fg_remove_sysfs_files(pdev, 2521 f8000_temp_attr, 2522 ARRAY_SIZE(f8000_temp_attr)); 2523 else 2524 f71882fg_remove_sysfs_files(pdev, 2525 f71858fg_temp_attr, 2526 ARRAY_SIZE(f71858fg_temp_attr)); 2527 break; 2528 case f8000: 2529 f71882fg_remove_sysfs_files(pdev, 2530 f8000_temp_attr, 2531 ARRAY_SIZE(f8000_temp_attr)); 2532 break; 2533 case f81866a: 2534 f71882fg_remove_sysfs_files(pdev, 2535 f71858fg_temp_attr, 2536 ARRAY_SIZE(f71858fg_temp_attr)); 2537 break; 2538 default: 2539 f71882fg_remove_sysfs_files(pdev, 2540 &fxxxx_temp_attr[0][0], 2541 ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps); 2542 } 2543 if (f71882fg_temp_has_beep[data->type]) { 2544 if (data->type == f81866a) 2545 f71882fg_remove_sysfs_files(pdev, 2546 &f81866_temp_beep_attr[0][0], 2547 ARRAY_SIZE(f81866_temp_beep_attr[0]) 2548 * nr_temps); 2549 else 2550 f71882fg_remove_sysfs_files(pdev, 2551 &fxxxx_temp_beep_attr[0][0], 2552 ARRAY_SIZE(fxxxx_temp_beep_attr[0]) 2553 * nr_temps); 2554 } 2555 2556 for (i = 0; i < F71882FG_MAX_INS; i++) { 2557 if (f71882fg_has_in[data->type][i]) { 2558 device_remove_file(&pdev->dev, 2559 &fxxxx_in_attr[i].dev_attr); 2560 } 2561 } 2562 if (f71882fg_has_in1_alarm[data->type]) { 2563 f71882fg_remove_sysfs_files(pdev, 2564 fxxxx_in1_alarm_attr, 2565 ARRAY_SIZE(fxxxx_in1_alarm_attr)); 2566 } 2567 } 2568 2569 if (start_reg & 0x02) { 2570 f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0], 2571 ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans); 2572 2573 if (f71882fg_fan_has_beep[data->type]) { 2574 f71882fg_remove_sysfs_files(pdev, 2575 fxxxx_fan_beep_attr, nr_fans); 2576 } 2577 2578 switch (data->type) { 2579 case f71808a: 2580 f71882fg_remove_sysfs_files(pdev, 2581 &fxxxx_auto_pwm_attr[0][0], 2582 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans); 2583 f71882fg_remove_sysfs_files(pdev, 2584 f71808a_fan3_attr, 2585 ARRAY_SIZE(f71808a_fan3_attr)); 2586 break; 2587 case f71862fg: 2588 f71882fg_remove_sysfs_files(pdev, 2589 &f71862fg_auto_pwm_attr[0][0], 2590 ARRAY_SIZE(f71862fg_auto_pwm_attr[0]) * 2591 nr_fans); 2592 break; 2593 case f71808e: 2594 case f71869: 2595 f71882fg_remove_sysfs_files(pdev, 2596 &f71869_auto_pwm_attr[0][0], 2597 ARRAY_SIZE(f71869_auto_pwm_attr[0]) * nr_fans); 2598 break; 2599 case f8000: 2600 f71882fg_remove_sysfs_files(pdev, 2601 f8000_fan_attr, 2602 ARRAY_SIZE(f8000_fan_attr)); 2603 f71882fg_remove_sysfs_files(pdev, 2604 &f8000_auto_pwm_attr[0][0], 2605 ARRAY_SIZE(f8000_auto_pwm_attr[0]) * nr_fans); 2606 break; 2607 default: 2608 f71882fg_remove_sysfs_files(pdev, 2609 &fxxxx_auto_pwm_attr[0][0], 2610 ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans); 2611 } 2612 } 2613 return 0; 2614 } 2615 2616 static int __init f71882fg_find(int sioaddr, struct f71882fg_sio_data *sio_data) 2617 { 2618 u16 devid; 2619 unsigned short address; 2620 int err = superio_enter(sioaddr); 2621 if (err) 2622 return err; 2623 2624 devid = superio_inw(sioaddr, SIO_REG_MANID); 2625 if (devid != SIO_FINTEK_ID) { 2626 pr_debug("Not a Fintek device\n"); 2627 err = -ENODEV; 2628 goto exit; 2629 } 2630 2631 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID); 2632 switch (devid) { 2633 case SIO_F71808E_ID: 2634 sio_data->type = f71808e; 2635 break; 2636 case SIO_F71808A_ID: 2637 sio_data->type = f71808a; 2638 break; 2639 case SIO_F71858_ID: 2640 sio_data->type = f71858fg; 2641 break; 2642 case SIO_F71862_ID: 2643 sio_data->type = f71862fg; 2644 break; 2645 case SIO_F71868_ID: 2646 sio_data->type = f71868a; 2647 break; 2648 case SIO_F71869_ID: 2649 sio_data->type = f71869; 2650 break; 2651 case SIO_F71869A_ID: 2652 sio_data->type = f71869a; 2653 break; 2654 case SIO_F71882_ID: 2655 sio_data->type = f71882fg; 2656 break; 2657 case SIO_F71889_ID: 2658 sio_data->type = f71889fg; 2659 break; 2660 case SIO_F71889E_ID: 2661 sio_data->type = f71889ed; 2662 break; 2663 case SIO_F71889A_ID: 2664 sio_data->type = f71889a; 2665 break; 2666 case SIO_F8000_ID: 2667 sio_data->type = f8000; 2668 break; 2669 case SIO_F81768D_ID: 2670 sio_data->type = f81768d; 2671 break; 2672 case SIO_F81865_ID: 2673 sio_data->type = f81865f; 2674 break; 2675 case SIO_F81866_ID: 2676 case SIO_F81966_ID: 2677 sio_data->type = f81866a; 2678 break; 2679 default: 2680 pr_info("Unsupported Fintek device: %04x\n", 2681 (unsigned int)devid); 2682 err = -ENODEV; 2683 goto exit; 2684 } 2685 2686 if (sio_data->type == f71858fg) 2687 superio_select(sioaddr, SIO_F71858FG_LD_HWM); 2688 else 2689 superio_select(sioaddr, SIO_F71882FG_LD_HWM); 2690 2691 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) { 2692 pr_warn("Device not activated\n"); 2693 err = -ENODEV; 2694 goto exit; 2695 } 2696 2697 address = superio_inw(sioaddr, SIO_REG_ADDR); 2698 if (address == 0) { 2699 pr_warn("Base address not set\n"); 2700 err = -ENODEV; 2701 goto exit; 2702 } 2703 address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */ 2704 2705 err = address; 2706 pr_info("Found %s chip at %#x, revision %d\n", 2707 f71882fg_names[sio_data->type], (unsigned int)address, 2708 (int)superio_inb(sioaddr, SIO_REG_DEVREV)); 2709 exit: 2710 superio_exit(sioaddr); 2711 return err; 2712 } 2713 2714 static int __init f71882fg_device_add(int address, 2715 const struct f71882fg_sio_data *sio_data) 2716 { 2717 struct resource res = { 2718 .start = address, 2719 .end = address + REGION_LENGTH - 1, 2720 .flags = IORESOURCE_IO, 2721 }; 2722 int err; 2723 2724 f71882fg_pdev = platform_device_alloc(DRVNAME, address); 2725 if (!f71882fg_pdev) 2726 return -ENOMEM; 2727 2728 res.name = f71882fg_pdev->name; 2729 err = acpi_check_resource_conflict(&res); 2730 if (err) 2731 goto exit_device_put; 2732 2733 err = platform_device_add_resources(f71882fg_pdev, &res, 1); 2734 if (err) { 2735 pr_err("Device resource addition failed\n"); 2736 goto exit_device_put; 2737 } 2738 2739 err = platform_device_add_data(f71882fg_pdev, sio_data, 2740 sizeof(struct f71882fg_sio_data)); 2741 if (err) { 2742 pr_err("Platform data allocation failed\n"); 2743 goto exit_device_put; 2744 } 2745 2746 err = platform_device_add(f71882fg_pdev); 2747 if (err) { 2748 pr_err("Device addition failed\n"); 2749 goto exit_device_put; 2750 } 2751 2752 return 0; 2753 2754 exit_device_put: 2755 platform_device_put(f71882fg_pdev); 2756 2757 return err; 2758 } 2759 2760 static int __init f71882fg_init(void) 2761 { 2762 int err; 2763 int address; 2764 struct f71882fg_sio_data sio_data; 2765 2766 memset(&sio_data, 0, sizeof(sio_data)); 2767 2768 address = f71882fg_find(0x2e, &sio_data); 2769 if (address < 0) 2770 address = f71882fg_find(0x4e, &sio_data); 2771 if (address < 0) 2772 return address; 2773 2774 err = platform_driver_register(&f71882fg_driver); 2775 if (err) 2776 return err; 2777 2778 err = f71882fg_device_add(address, &sio_data); 2779 if (err) 2780 goto exit_driver; 2781 2782 return 0; 2783 2784 exit_driver: 2785 platform_driver_unregister(&f71882fg_driver); 2786 return err; 2787 } 2788 2789 static void __exit f71882fg_exit(void) 2790 { 2791 platform_device_unregister(f71882fg_pdev); 2792 platform_driver_unregister(&f71882fg_driver); 2793 } 2794 2795 MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver"); 2796 MODULE_AUTHOR("Hans Edgington, Hans de Goede <hdegoede@redhat.com>"); 2797 MODULE_LICENSE("GPL"); 2798 2799 module_init(f71882fg_init); 2800 module_exit(f71882fg_exit); 2801