1 /* 2 * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O 3 * chips integrated hardware monitoring features 4 * Copyright (C) 2005-2006 Jean Delvare <khali@linux-fr.org> 5 * 6 * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates 7 * complete hardware monitoring features: voltage, fan and temperature 8 * sensors, and manual and automatic fan speed control. 9 * 10 * The F71872F/FG is almost the same, with two more voltages monitored, 11 * and 6 VID inputs. 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2 of the License, or 16 * (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License 24 * along with this program; if not, write to the Free Software 25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 26 */ 27 28 #include <linux/module.h> 29 #include <linux/init.h> 30 #include <linux/slab.h> 31 #include <linux/jiffies.h> 32 #include <linux/platform_device.h> 33 #include <linux/hwmon.h> 34 #include <linux/hwmon-sysfs.h> 35 #include <linux/err.h> 36 #include <linux/mutex.h> 37 #include <linux/sysfs.h> 38 #include <linux/ioport.h> 39 #include <asm/io.h> 40 41 static struct platform_device *pdev; 42 43 #define DRVNAME "f71805f" 44 enum kinds { f71805f, f71872f }; 45 46 /* 47 * Super-I/O constants and functions 48 */ 49 50 #define F71805F_LD_HWM 0x04 51 52 #define SIO_REG_LDSEL 0x07 /* Logical device select */ 53 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ 54 #define SIO_REG_DEVREV 0x22 /* Device revision */ 55 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ 56 #define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */ 57 #define SIO_REG_ENABLE 0x30 /* Logical device enable */ 58 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ 59 60 #define SIO_FINTEK_ID 0x1934 61 #define SIO_F71805F_ID 0x0406 62 #define SIO_F71872F_ID 0x0341 63 64 static inline int 65 superio_inb(int base, int reg) 66 { 67 outb(reg, base); 68 return inb(base + 1); 69 } 70 71 static int 72 superio_inw(int base, int reg) 73 { 74 int val; 75 outb(reg++, base); 76 val = inb(base + 1) << 8; 77 outb(reg, base); 78 val |= inb(base + 1); 79 return val; 80 } 81 82 static inline void 83 superio_select(int base, int ld) 84 { 85 outb(SIO_REG_LDSEL, base); 86 outb(ld, base + 1); 87 } 88 89 static inline void 90 superio_enter(int base) 91 { 92 outb(0x87, base); 93 outb(0x87, base); 94 } 95 96 static inline void 97 superio_exit(int base) 98 { 99 outb(0xaa, base); 100 } 101 102 /* 103 * ISA constants 104 */ 105 106 #define REGION_LENGTH 8 107 #define ADDR_REG_OFFSET 5 108 #define DATA_REG_OFFSET 6 109 110 /* 111 * Registers 112 */ 113 114 /* in nr from 0 to 10 (8-bit values) */ 115 #define F71805F_REG_IN(nr) (0x10 + (nr)) 116 #define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E) 117 #define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F) 118 /* fan nr from 0 to 2 (12-bit values, two registers) */ 119 #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr)) 120 #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr)) 121 #define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr)) 122 #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr)) 123 #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr)) 124 #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr)) 125 /* temp nr from 0 to 2 (8-bit values) */ 126 #define F71805F_REG_TEMP(nr) (0x1B + (nr)) 127 #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr)) 128 #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr)) 129 #define F71805F_REG_TEMP_MODE 0x01 130 /* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */ 131 /* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */ 132 #define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \ 133 (0xA0 + 0x10 * (pwmnr) + (2 - (apnr))) 134 #define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \ 135 (0xA4 + 0x10 * (pwmnr) + \ 136 2 * (2 - (apnr))) 137 138 #define F71805F_REG_START 0x00 139 /* status nr from 0 to 2 */ 140 #define F71805F_REG_STATUS(nr) (0x36 + (nr)) 141 142 /* individual register bits */ 143 #define FAN_CTRL_DC_MODE 0x10 144 #define FAN_CTRL_LATCH_FULL 0x08 145 #define FAN_CTRL_MODE_MASK 0x03 146 #define FAN_CTRL_MODE_SPEED 0x00 147 #define FAN_CTRL_MODE_TEMPERATURE 0x01 148 #define FAN_CTRL_MODE_MANUAL 0x02 149 150 /* 151 * Data structures and manipulation thereof 152 */ 153 154 struct f71805f_auto_point { 155 u8 temp[3]; 156 u16 fan[3]; 157 }; 158 159 struct f71805f_data { 160 unsigned short addr; 161 const char *name; 162 struct class_device *class_dev; 163 164 struct mutex update_lock; 165 char valid; /* !=0 if following fields are valid */ 166 unsigned long last_updated; /* In jiffies */ 167 unsigned long last_limits; /* In jiffies */ 168 169 /* Register values */ 170 u8 in[11]; 171 u8 in_high[11]; 172 u8 in_low[11]; 173 u16 has_in; 174 u16 fan[3]; 175 u16 fan_low[3]; 176 u16 fan_target[3]; 177 u8 fan_ctrl[3]; 178 u8 pwm[3]; 179 u8 pwm_freq[3]; 180 u8 temp[3]; 181 u8 temp_high[3]; 182 u8 temp_hyst[3]; 183 u8 temp_mode; 184 unsigned long alarms; 185 struct f71805f_auto_point auto_points[3]; 186 }; 187 188 struct f71805f_sio_data { 189 enum kinds kind; 190 u8 fnsel1; 191 }; 192 193 static inline long in_from_reg(u8 reg) 194 { 195 return (reg * 8); 196 } 197 198 /* The 2 least significant bits are not used */ 199 static inline u8 in_to_reg(long val) 200 { 201 if (val <= 0) 202 return 0; 203 if (val >= 2016) 204 return 0xfc; 205 return (((val + 16) / 32) << 2); 206 } 207 208 /* in0 is downscaled by a factor 2 internally */ 209 static inline long in0_from_reg(u8 reg) 210 { 211 return (reg * 16); 212 } 213 214 static inline u8 in0_to_reg(long val) 215 { 216 if (val <= 0) 217 return 0; 218 if (val >= 4032) 219 return 0xfc; 220 return (((val + 32) / 64) << 2); 221 } 222 223 /* The 4 most significant bits are not used */ 224 static inline long fan_from_reg(u16 reg) 225 { 226 reg &= 0xfff; 227 if (!reg || reg == 0xfff) 228 return 0; 229 return (1500000 / reg); 230 } 231 232 static inline u16 fan_to_reg(long rpm) 233 { 234 /* If the low limit is set below what the chip can measure, 235 store the largest possible 12-bit value in the registers, 236 so that no alarm will ever trigger. */ 237 if (rpm < 367) 238 return 0xfff; 239 return (1500000 / rpm); 240 } 241 242 static inline unsigned long pwm_freq_from_reg(u8 reg) 243 { 244 unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL; 245 246 reg &= 0x7f; 247 if (reg == 0) 248 reg++; 249 return clock / (reg << 8); 250 } 251 252 static inline u8 pwm_freq_to_reg(unsigned long val) 253 { 254 if (val >= 187500) /* The highest we can do */ 255 return 0x80; 256 if (val >= 1475) /* Use 48 MHz clock */ 257 return 0x80 | (48000000UL / (val << 8)); 258 if (val < 31) /* The lowest we can do */ 259 return 0x7f; 260 else /* Use 1 MHz clock */ 261 return 1000000UL / (val << 8); 262 } 263 264 static inline int pwm_mode_from_reg(u8 reg) 265 { 266 return !(reg & FAN_CTRL_DC_MODE); 267 } 268 269 static inline long temp_from_reg(u8 reg) 270 { 271 return (reg * 1000); 272 } 273 274 static inline u8 temp_to_reg(long val) 275 { 276 if (val < 0) 277 val = 0; 278 else if (val > 1000 * 0xff) 279 val = 0xff; 280 return ((val + 500) / 1000); 281 } 282 283 /* 284 * Device I/O access 285 */ 286 287 /* Must be called with data->update_lock held, except during initialization */ 288 static u8 f71805f_read8(struct f71805f_data *data, u8 reg) 289 { 290 outb(reg, data->addr + ADDR_REG_OFFSET); 291 return inb(data->addr + DATA_REG_OFFSET); 292 } 293 294 /* Must be called with data->update_lock held, except during initialization */ 295 static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val) 296 { 297 outb(reg, data->addr + ADDR_REG_OFFSET); 298 outb(val, data->addr + DATA_REG_OFFSET); 299 } 300 301 /* It is important to read the MSB first, because doing so latches the 302 value of the LSB, so we are sure both bytes belong to the same value. 303 Must be called with data->update_lock held, except during initialization */ 304 static u16 f71805f_read16(struct f71805f_data *data, u8 reg) 305 { 306 u16 val; 307 308 outb(reg, data->addr + ADDR_REG_OFFSET); 309 val = inb(data->addr + DATA_REG_OFFSET) << 8; 310 outb(++reg, data->addr + ADDR_REG_OFFSET); 311 val |= inb(data->addr + DATA_REG_OFFSET); 312 313 return val; 314 } 315 316 /* Must be called with data->update_lock held, except during initialization */ 317 static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val) 318 { 319 outb(reg, data->addr + ADDR_REG_OFFSET); 320 outb(val >> 8, data->addr + DATA_REG_OFFSET); 321 outb(++reg, data->addr + ADDR_REG_OFFSET); 322 outb(val & 0xff, data->addr + DATA_REG_OFFSET); 323 } 324 325 static struct f71805f_data *f71805f_update_device(struct device *dev) 326 { 327 struct f71805f_data *data = dev_get_drvdata(dev); 328 int nr, apnr; 329 330 mutex_lock(&data->update_lock); 331 332 /* Limit registers cache is refreshed after 60 seconds */ 333 if (time_after(jiffies, data->last_updated + 60 * HZ) 334 || !data->valid) { 335 for (nr = 0; nr < 11; nr++) { 336 if (!(data->has_in & (1 << nr))) 337 continue; 338 data->in_high[nr] = f71805f_read8(data, 339 F71805F_REG_IN_HIGH(nr)); 340 data->in_low[nr] = f71805f_read8(data, 341 F71805F_REG_IN_LOW(nr)); 342 } 343 for (nr = 0; nr < 3; nr++) { 344 data->fan_low[nr] = f71805f_read16(data, 345 F71805F_REG_FAN_LOW(nr)); 346 data->fan_target[nr] = f71805f_read16(data, 347 F71805F_REG_FAN_TARGET(nr)); 348 data->pwm_freq[nr] = f71805f_read8(data, 349 F71805F_REG_PWM_FREQ(nr)); 350 } 351 for (nr = 0; nr < 3; nr++) { 352 data->temp_high[nr] = f71805f_read8(data, 353 F71805F_REG_TEMP_HIGH(nr)); 354 data->temp_hyst[nr] = f71805f_read8(data, 355 F71805F_REG_TEMP_HYST(nr)); 356 } 357 data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE); 358 for (nr = 0; nr < 3; nr++) { 359 for (apnr = 0; apnr < 3; apnr++) { 360 data->auto_points[nr].temp[apnr] = 361 f71805f_read8(data, 362 F71805F_REG_PWM_AUTO_POINT_TEMP(nr, 363 apnr)); 364 data->auto_points[nr].fan[apnr] = 365 f71805f_read16(data, 366 F71805F_REG_PWM_AUTO_POINT_FAN(nr, 367 apnr)); 368 } 369 } 370 371 data->last_limits = jiffies; 372 } 373 374 /* Measurement registers cache is refreshed after 1 second */ 375 if (time_after(jiffies, data->last_updated + HZ) 376 || !data->valid) { 377 for (nr = 0; nr < 11; nr++) { 378 if (!(data->has_in & (1 << nr))) 379 continue; 380 data->in[nr] = f71805f_read8(data, 381 F71805F_REG_IN(nr)); 382 } 383 for (nr = 0; nr < 3; nr++) { 384 data->fan[nr] = f71805f_read16(data, 385 F71805F_REG_FAN(nr)); 386 data->fan_ctrl[nr] = f71805f_read8(data, 387 F71805F_REG_FAN_CTRL(nr)); 388 data->pwm[nr] = f71805f_read8(data, 389 F71805F_REG_PWM_DUTY(nr)); 390 } 391 for (nr = 0; nr < 3; nr++) { 392 data->temp[nr] = f71805f_read8(data, 393 F71805F_REG_TEMP(nr)); 394 } 395 data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0)) 396 + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8) 397 + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16); 398 399 data->last_updated = jiffies; 400 data->valid = 1; 401 } 402 403 mutex_unlock(&data->update_lock); 404 405 return data; 406 } 407 408 /* 409 * Sysfs interface 410 */ 411 412 static ssize_t show_in0(struct device *dev, struct device_attribute *devattr, 413 char *buf) 414 { 415 struct f71805f_data *data = f71805f_update_device(dev); 416 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 417 int nr = attr->index; 418 419 return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr])); 420 } 421 422 static ssize_t show_in0_max(struct device *dev, struct device_attribute 423 *devattr, char *buf) 424 { 425 struct f71805f_data *data = f71805f_update_device(dev); 426 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 427 int nr = attr->index; 428 429 return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr])); 430 } 431 432 static ssize_t show_in0_min(struct device *dev, struct device_attribute 433 *devattr, char *buf) 434 { 435 struct f71805f_data *data = f71805f_update_device(dev); 436 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 437 int nr = attr->index; 438 439 return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr])); 440 } 441 442 static ssize_t set_in0_max(struct device *dev, struct device_attribute 443 *devattr, const char *buf, size_t count) 444 { 445 struct f71805f_data *data = dev_get_drvdata(dev); 446 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 447 int nr = attr->index; 448 long val = simple_strtol(buf, NULL, 10); 449 450 mutex_lock(&data->update_lock); 451 data->in_high[nr] = in0_to_reg(val); 452 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); 453 mutex_unlock(&data->update_lock); 454 455 return count; 456 } 457 458 static ssize_t set_in0_min(struct device *dev, struct device_attribute 459 *devattr, const char *buf, size_t count) 460 { 461 struct f71805f_data *data = dev_get_drvdata(dev); 462 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 463 int nr = attr->index; 464 long val = simple_strtol(buf, NULL, 10); 465 466 mutex_lock(&data->update_lock); 467 data->in_low[nr] = in0_to_reg(val); 468 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); 469 mutex_unlock(&data->update_lock); 470 471 return count; 472 } 473 474 static ssize_t show_in(struct device *dev, struct device_attribute *devattr, 475 char *buf) 476 { 477 struct f71805f_data *data = f71805f_update_device(dev); 478 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 479 int nr = attr->index; 480 481 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr])); 482 } 483 484 static ssize_t show_in_max(struct device *dev, struct device_attribute 485 *devattr, char *buf) 486 { 487 struct f71805f_data *data = f71805f_update_device(dev); 488 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 489 int nr = attr->index; 490 491 return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr])); 492 } 493 494 static ssize_t show_in_min(struct device *dev, struct device_attribute 495 *devattr, char *buf) 496 { 497 struct f71805f_data *data = f71805f_update_device(dev); 498 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 499 int nr = attr->index; 500 501 return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr])); 502 } 503 504 static ssize_t set_in_max(struct device *dev, struct device_attribute 505 *devattr, const char *buf, size_t count) 506 { 507 struct f71805f_data *data = dev_get_drvdata(dev); 508 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 509 int nr = attr->index; 510 long val = simple_strtol(buf, NULL, 10); 511 512 mutex_lock(&data->update_lock); 513 data->in_high[nr] = in_to_reg(val); 514 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]); 515 mutex_unlock(&data->update_lock); 516 517 return count; 518 } 519 520 static ssize_t set_in_min(struct device *dev, struct device_attribute 521 *devattr, const char *buf, size_t count) 522 { 523 struct f71805f_data *data = dev_get_drvdata(dev); 524 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 525 int nr = attr->index; 526 long val = simple_strtol(buf, NULL, 10); 527 528 mutex_lock(&data->update_lock); 529 data->in_low[nr] = in_to_reg(val); 530 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]); 531 mutex_unlock(&data->update_lock); 532 533 return count; 534 } 535 536 static ssize_t show_fan(struct device *dev, struct device_attribute *devattr, 537 char *buf) 538 { 539 struct f71805f_data *data = f71805f_update_device(dev); 540 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 541 int nr = attr->index; 542 543 return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr])); 544 } 545 546 static ssize_t show_fan_min(struct device *dev, struct device_attribute 547 *devattr, char *buf) 548 { 549 struct f71805f_data *data = f71805f_update_device(dev); 550 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 551 int nr = attr->index; 552 553 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr])); 554 } 555 556 static ssize_t show_fan_target(struct device *dev, struct device_attribute 557 *devattr, char *buf) 558 { 559 struct f71805f_data *data = f71805f_update_device(dev); 560 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 561 int nr = attr->index; 562 563 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr])); 564 } 565 566 static ssize_t set_fan_min(struct device *dev, struct device_attribute 567 *devattr, const char *buf, size_t count) 568 { 569 struct f71805f_data *data = dev_get_drvdata(dev); 570 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 571 int nr = attr->index; 572 long val = simple_strtol(buf, NULL, 10); 573 574 mutex_lock(&data->update_lock); 575 data->fan_low[nr] = fan_to_reg(val); 576 f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]); 577 mutex_unlock(&data->update_lock); 578 579 return count; 580 } 581 582 static ssize_t set_fan_target(struct device *dev, struct device_attribute 583 *devattr, const char *buf, size_t count) 584 { 585 struct f71805f_data *data = dev_get_drvdata(dev); 586 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 587 int nr = attr->index; 588 long val = simple_strtol(buf, NULL, 10); 589 590 mutex_lock(&data->update_lock); 591 data->fan_target[nr] = fan_to_reg(val); 592 f71805f_write16(data, F71805F_REG_FAN_TARGET(nr), 593 data->fan_target[nr]); 594 mutex_unlock(&data->update_lock); 595 596 return count; 597 } 598 599 static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr, 600 char *buf) 601 { 602 struct f71805f_data *data = f71805f_update_device(dev); 603 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 604 int nr = attr->index; 605 606 return sprintf(buf, "%d\n", (int)data->pwm[nr]); 607 } 608 609 static ssize_t show_pwm_enable(struct device *dev, struct device_attribute 610 *devattr, char *buf) 611 { 612 struct f71805f_data *data = f71805f_update_device(dev); 613 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 614 int nr = attr->index; 615 int mode; 616 617 switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) { 618 case FAN_CTRL_MODE_SPEED: 619 mode = 3; 620 break; 621 case FAN_CTRL_MODE_TEMPERATURE: 622 mode = 2; 623 break; 624 default: /* MANUAL */ 625 mode = 1; 626 } 627 628 return sprintf(buf, "%d\n", mode); 629 } 630 631 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute 632 *devattr, char *buf) 633 { 634 struct f71805f_data *data = f71805f_update_device(dev); 635 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 636 int nr = attr->index; 637 638 return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr])); 639 } 640 641 static ssize_t show_pwm_mode(struct device *dev, struct device_attribute 642 *devattr, char *buf) 643 { 644 struct f71805f_data *data = f71805f_update_device(dev); 645 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 646 int nr = attr->index; 647 648 return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr])); 649 } 650 651 static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, 652 const char *buf, size_t count) 653 { 654 struct f71805f_data *data = dev_get_drvdata(dev); 655 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 656 int nr = attr->index; 657 unsigned long val = simple_strtoul(buf, NULL, 10); 658 659 if (val > 255) 660 return -EINVAL; 661 662 mutex_lock(&data->update_lock); 663 data->pwm[nr] = val; 664 f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]); 665 mutex_unlock(&data->update_lock); 666 667 return count; 668 } 669 670 static struct attribute *f71805f_attr_pwm[]; 671 672 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute 673 *devattr, const char *buf, size_t count) 674 { 675 struct f71805f_data *data = dev_get_drvdata(dev); 676 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 677 int nr = attr->index; 678 unsigned long val = simple_strtoul(buf, NULL, 10); 679 u8 reg; 680 681 if (val < 1 || val > 3) 682 return -EINVAL; 683 684 if (val > 1) { /* Automatic mode, user can't set PWM value */ 685 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr], 686 S_IRUGO)) 687 dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1); 688 } 689 690 mutex_lock(&data->update_lock); 691 reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr)) 692 & ~FAN_CTRL_MODE_MASK; 693 switch (val) { 694 case 1: 695 reg |= FAN_CTRL_MODE_MANUAL; 696 break; 697 case 2: 698 reg |= FAN_CTRL_MODE_TEMPERATURE; 699 break; 700 case 3: 701 reg |= FAN_CTRL_MODE_SPEED; 702 break; 703 } 704 data->fan_ctrl[nr] = reg; 705 f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg); 706 mutex_unlock(&data->update_lock); 707 708 if (val == 1) { /* Manual mode, user can set PWM value */ 709 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr], 710 S_IRUGO | S_IWUSR)) 711 dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1); 712 } 713 714 return count; 715 } 716 717 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute 718 *devattr, const char *buf, size_t count) 719 { 720 struct f71805f_data *data = dev_get_drvdata(dev); 721 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 722 int nr = attr->index; 723 unsigned long val = simple_strtoul(buf, NULL, 10); 724 725 mutex_lock(&data->update_lock); 726 data->pwm_freq[nr] = pwm_freq_to_reg(val); 727 f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]); 728 mutex_unlock(&data->update_lock); 729 730 return count; 731 } 732 733 static ssize_t show_pwm_auto_point_temp(struct device *dev, 734 struct device_attribute *devattr, 735 char* buf) 736 { 737 struct f71805f_data *data = dev_get_drvdata(dev); 738 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); 739 int pwmnr = attr->nr; 740 int apnr = attr->index; 741 742 return sprintf(buf, "%ld\n", 743 temp_from_reg(data->auto_points[pwmnr].temp[apnr])); 744 } 745 746 static ssize_t set_pwm_auto_point_temp(struct device *dev, 747 struct device_attribute *devattr, 748 const char* buf, size_t count) 749 { 750 struct f71805f_data *data = dev_get_drvdata(dev); 751 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); 752 int pwmnr = attr->nr; 753 int apnr = attr->index; 754 unsigned long val = simple_strtol(buf, NULL, 10); 755 756 mutex_lock(&data->update_lock); 757 data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val); 758 f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr), 759 data->auto_points[pwmnr].temp[apnr]); 760 mutex_unlock(&data->update_lock); 761 762 return count; 763 } 764 765 static ssize_t show_pwm_auto_point_fan(struct device *dev, 766 struct device_attribute *devattr, 767 char* buf) 768 { 769 struct f71805f_data *data = dev_get_drvdata(dev); 770 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); 771 int pwmnr = attr->nr; 772 int apnr = attr->index; 773 774 return sprintf(buf, "%ld\n", 775 fan_from_reg(data->auto_points[pwmnr].fan[apnr])); 776 } 777 778 static ssize_t set_pwm_auto_point_fan(struct device *dev, 779 struct device_attribute *devattr, 780 const char* buf, size_t count) 781 { 782 struct f71805f_data *data = dev_get_drvdata(dev); 783 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); 784 int pwmnr = attr->nr; 785 int apnr = attr->index; 786 unsigned long val = simple_strtoul(buf, NULL, 10); 787 788 mutex_lock(&data->update_lock); 789 data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val); 790 f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr), 791 data->auto_points[pwmnr].fan[apnr]); 792 mutex_unlock(&data->update_lock); 793 794 return count; 795 } 796 797 static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, 798 char *buf) 799 { 800 struct f71805f_data *data = f71805f_update_device(dev); 801 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 802 int nr = attr->index; 803 804 return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr])); 805 } 806 807 static ssize_t show_temp_max(struct device *dev, struct device_attribute 808 *devattr, char *buf) 809 { 810 struct f71805f_data *data = f71805f_update_device(dev); 811 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 812 int nr = attr->index; 813 814 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr])); 815 } 816 817 static ssize_t show_temp_hyst(struct device *dev, struct device_attribute 818 *devattr, char *buf) 819 { 820 struct f71805f_data *data = f71805f_update_device(dev); 821 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 822 int nr = attr->index; 823 824 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr])); 825 } 826 827 static ssize_t show_temp_type(struct device *dev, struct device_attribute 828 *devattr, char *buf) 829 { 830 struct f71805f_data *data = f71805f_update_device(dev); 831 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 832 int nr = attr->index; 833 834 /* 3 is diode, 4 is thermistor */ 835 return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4); 836 } 837 838 static ssize_t set_temp_max(struct device *dev, struct device_attribute 839 *devattr, const char *buf, size_t count) 840 { 841 struct f71805f_data *data = dev_get_drvdata(dev); 842 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 843 int nr = attr->index; 844 long val = simple_strtol(buf, NULL, 10); 845 846 mutex_lock(&data->update_lock); 847 data->temp_high[nr] = temp_to_reg(val); 848 f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]); 849 mutex_unlock(&data->update_lock); 850 851 return count; 852 } 853 854 static ssize_t set_temp_hyst(struct device *dev, struct device_attribute 855 *devattr, const char *buf, size_t count) 856 { 857 struct f71805f_data *data = dev_get_drvdata(dev); 858 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 859 int nr = attr->index; 860 long val = simple_strtol(buf, NULL, 10); 861 862 mutex_lock(&data->update_lock); 863 data->temp_hyst[nr] = temp_to_reg(val); 864 f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]); 865 mutex_unlock(&data->update_lock); 866 867 return count; 868 } 869 870 static ssize_t show_alarms_in(struct device *dev, struct device_attribute 871 *devattr, char *buf) 872 { 873 struct f71805f_data *data = f71805f_update_device(dev); 874 875 return sprintf(buf, "%lu\n", data->alarms & 0x7ff); 876 } 877 878 static ssize_t show_alarms_fan(struct device *dev, struct device_attribute 879 *devattr, char *buf) 880 { 881 struct f71805f_data *data = f71805f_update_device(dev); 882 883 return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07); 884 } 885 886 static ssize_t show_alarms_temp(struct device *dev, struct device_attribute 887 *devattr, char *buf) 888 { 889 struct f71805f_data *data = f71805f_update_device(dev); 890 891 return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07); 892 } 893 894 static ssize_t show_alarm(struct device *dev, struct device_attribute 895 *devattr, char *buf) 896 { 897 struct f71805f_data *data = f71805f_update_device(dev); 898 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 899 int bitnr = attr->index; 900 901 return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1); 902 } 903 904 static ssize_t show_name(struct device *dev, struct device_attribute 905 *devattr, char *buf) 906 { 907 struct f71805f_data *data = dev_get_drvdata(dev); 908 909 return sprintf(buf, "%s\n", data->name); 910 } 911 912 static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0); 913 static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO| S_IWUSR, 914 show_in0_max, set_in0_max, 0); 915 static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO| S_IWUSR, 916 show_in0_min, set_in0_min, 0); 917 static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1); 918 static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR, 919 show_in_max, set_in_max, 1); 920 static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR, 921 show_in_min, set_in_min, 1); 922 static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2); 923 static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR, 924 show_in_max, set_in_max, 2); 925 static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR, 926 show_in_min, set_in_min, 2); 927 static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3); 928 static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR, 929 show_in_max, set_in_max, 3); 930 static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR, 931 show_in_min, set_in_min, 3); 932 static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4); 933 static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR, 934 show_in_max, set_in_max, 4); 935 static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR, 936 show_in_min, set_in_min, 4); 937 static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5); 938 static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR, 939 show_in_max, set_in_max, 5); 940 static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR, 941 show_in_min, set_in_min, 5); 942 static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6); 943 static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR, 944 show_in_max, set_in_max, 6); 945 static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR, 946 show_in_min, set_in_min, 6); 947 static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7); 948 static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR, 949 show_in_max, set_in_max, 7); 950 static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR, 951 show_in_min, set_in_min, 7); 952 static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8); 953 static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR, 954 show_in_max, set_in_max, 8); 955 static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR, 956 show_in_min, set_in_min, 8); 957 static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9); 958 static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR, 959 show_in0_max, set_in0_max, 9); 960 static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR, 961 show_in0_min, set_in0_min, 9); 962 static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10); 963 static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR, 964 show_in0_max, set_in0_max, 10); 965 static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR, 966 show_in0_min, set_in0_min, 10); 967 968 static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0); 969 static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR, 970 show_fan_min, set_fan_min, 0); 971 static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR, 972 show_fan_target, set_fan_target, 0); 973 static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1); 974 static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR, 975 show_fan_min, set_fan_min, 1); 976 static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR, 977 show_fan_target, set_fan_target, 1); 978 static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2); 979 static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR, 980 show_fan_min, set_fan_min, 2); 981 static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR, 982 show_fan_target, set_fan_target, 2); 983 984 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0); 985 static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, 986 show_temp_max, set_temp_max, 0); 987 static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, 988 show_temp_hyst, set_temp_hyst, 0); 989 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0); 990 static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1); 991 static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR, 992 show_temp_max, set_temp_max, 1); 993 static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, 994 show_temp_hyst, set_temp_hyst, 1); 995 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1); 996 static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2); 997 static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR, 998 show_temp_max, set_temp_max, 2); 999 static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, 1000 show_temp_hyst, set_temp_hyst, 2); 1001 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2); 1002 1003 /* pwm (value) files are created read-only, write permission is 1004 then added or removed dynamically as needed */ 1005 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0); 1006 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, 1007 show_pwm_enable, set_pwm_enable, 0); 1008 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, 1009 show_pwm_freq, set_pwm_freq, 0); 1010 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0); 1011 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1); 1012 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR, 1013 show_pwm_enable, set_pwm_enable, 1); 1014 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR, 1015 show_pwm_freq, set_pwm_freq, 1); 1016 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1); 1017 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2); 1018 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR, 1019 show_pwm_enable, set_pwm_enable, 2); 1020 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR, 1021 show_pwm_freq, set_pwm_freq, 2); 1022 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2); 1023 1024 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR, 1025 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1026 0, 0); 1027 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR, 1028 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1029 0, 0); 1030 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR, 1031 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1032 0, 1); 1033 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR, 1034 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1035 0, 1); 1036 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR, 1037 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1038 0, 2); 1039 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR, 1040 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1041 0, 2); 1042 1043 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR, 1044 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1045 1, 0); 1046 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR, 1047 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1048 1, 0); 1049 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR, 1050 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1051 1, 1); 1052 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR, 1053 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1054 1, 1); 1055 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR, 1056 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1057 1, 2); 1058 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR, 1059 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1060 1, 2); 1061 1062 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR, 1063 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1064 2, 0); 1065 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR, 1066 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1067 2, 0); 1068 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR, 1069 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1070 2, 1); 1071 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR, 1072 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1073 2, 1); 1074 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR, 1075 show_pwm_auto_point_temp, set_pwm_auto_point_temp, 1076 2, 2); 1077 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR, 1078 show_pwm_auto_point_fan, set_pwm_auto_point_fan, 1079 2, 2); 1080 1081 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); 1082 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); 1083 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); 1084 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3); 1085 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4); 1086 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5); 1087 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6); 1088 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7); 1089 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8); 1090 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9); 1091 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10); 1092 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11); 1093 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12); 1094 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13); 1095 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16); 1096 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17); 1097 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18); 1098 static DEVICE_ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL); 1099 static DEVICE_ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL); 1100 static DEVICE_ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL); 1101 1102 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); 1103 1104 static struct attribute *f71805f_attributes[] = { 1105 &sensor_dev_attr_in0_input.dev_attr.attr, 1106 &sensor_dev_attr_in0_max.dev_attr.attr, 1107 &sensor_dev_attr_in0_min.dev_attr.attr, 1108 &sensor_dev_attr_in1_input.dev_attr.attr, 1109 &sensor_dev_attr_in1_max.dev_attr.attr, 1110 &sensor_dev_attr_in1_min.dev_attr.attr, 1111 &sensor_dev_attr_in2_input.dev_attr.attr, 1112 &sensor_dev_attr_in2_max.dev_attr.attr, 1113 &sensor_dev_attr_in2_min.dev_attr.attr, 1114 &sensor_dev_attr_in3_input.dev_attr.attr, 1115 &sensor_dev_attr_in3_max.dev_attr.attr, 1116 &sensor_dev_attr_in3_min.dev_attr.attr, 1117 &sensor_dev_attr_in5_input.dev_attr.attr, 1118 &sensor_dev_attr_in5_max.dev_attr.attr, 1119 &sensor_dev_attr_in5_min.dev_attr.attr, 1120 &sensor_dev_attr_in6_input.dev_attr.attr, 1121 &sensor_dev_attr_in6_max.dev_attr.attr, 1122 &sensor_dev_attr_in6_min.dev_attr.attr, 1123 &sensor_dev_attr_in7_input.dev_attr.attr, 1124 &sensor_dev_attr_in7_max.dev_attr.attr, 1125 &sensor_dev_attr_in7_min.dev_attr.attr, 1126 1127 &sensor_dev_attr_fan1_input.dev_attr.attr, 1128 &sensor_dev_attr_fan1_min.dev_attr.attr, 1129 &sensor_dev_attr_fan1_alarm.dev_attr.attr, 1130 &sensor_dev_attr_fan1_target.dev_attr.attr, 1131 &sensor_dev_attr_fan2_input.dev_attr.attr, 1132 &sensor_dev_attr_fan2_min.dev_attr.attr, 1133 &sensor_dev_attr_fan2_alarm.dev_attr.attr, 1134 &sensor_dev_attr_fan2_target.dev_attr.attr, 1135 &sensor_dev_attr_fan3_input.dev_attr.attr, 1136 &sensor_dev_attr_fan3_min.dev_attr.attr, 1137 &sensor_dev_attr_fan3_alarm.dev_attr.attr, 1138 &sensor_dev_attr_fan3_target.dev_attr.attr, 1139 1140 &sensor_dev_attr_pwm1.dev_attr.attr, 1141 &sensor_dev_attr_pwm1_enable.dev_attr.attr, 1142 &sensor_dev_attr_pwm1_mode.dev_attr.attr, 1143 &sensor_dev_attr_pwm2.dev_attr.attr, 1144 &sensor_dev_attr_pwm2_enable.dev_attr.attr, 1145 &sensor_dev_attr_pwm2_mode.dev_attr.attr, 1146 &sensor_dev_attr_pwm3.dev_attr.attr, 1147 &sensor_dev_attr_pwm3_enable.dev_attr.attr, 1148 &sensor_dev_attr_pwm3_mode.dev_attr.attr, 1149 1150 &sensor_dev_attr_temp1_input.dev_attr.attr, 1151 &sensor_dev_attr_temp1_max.dev_attr.attr, 1152 &sensor_dev_attr_temp1_max_hyst.dev_attr.attr, 1153 &sensor_dev_attr_temp1_type.dev_attr.attr, 1154 &sensor_dev_attr_temp2_input.dev_attr.attr, 1155 &sensor_dev_attr_temp2_max.dev_attr.attr, 1156 &sensor_dev_attr_temp2_max_hyst.dev_attr.attr, 1157 &sensor_dev_attr_temp2_type.dev_attr.attr, 1158 &sensor_dev_attr_temp3_input.dev_attr.attr, 1159 &sensor_dev_attr_temp3_max.dev_attr.attr, 1160 &sensor_dev_attr_temp3_max_hyst.dev_attr.attr, 1161 &sensor_dev_attr_temp3_type.dev_attr.attr, 1162 1163 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr, 1164 &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr, 1165 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr, 1166 &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr, 1167 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr, 1168 &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr, 1169 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr, 1170 &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr, 1171 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr, 1172 &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr, 1173 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr, 1174 &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr, 1175 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr, 1176 &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr, 1177 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr, 1178 &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr, 1179 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr, 1180 &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr, 1181 1182 &sensor_dev_attr_in0_alarm.dev_attr.attr, 1183 &sensor_dev_attr_in1_alarm.dev_attr.attr, 1184 &sensor_dev_attr_in2_alarm.dev_attr.attr, 1185 &sensor_dev_attr_in3_alarm.dev_attr.attr, 1186 &sensor_dev_attr_in5_alarm.dev_attr.attr, 1187 &sensor_dev_attr_in6_alarm.dev_attr.attr, 1188 &sensor_dev_attr_in7_alarm.dev_attr.attr, 1189 &dev_attr_alarms_in.attr, 1190 &sensor_dev_attr_temp1_alarm.dev_attr.attr, 1191 &sensor_dev_attr_temp2_alarm.dev_attr.attr, 1192 &sensor_dev_attr_temp3_alarm.dev_attr.attr, 1193 &dev_attr_alarms_temp.attr, 1194 &dev_attr_alarms_fan.attr, 1195 1196 &dev_attr_name.attr, 1197 NULL 1198 }; 1199 1200 static const struct attribute_group f71805f_group = { 1201 .attrs = f71805f_attributes, 1202 }; 1203 1204 static struct attribute *f71805f_attributes_optin[4][5] = { 1205 { 1206 &sensor_dev_attr_in4_input.dev_attr.attr, 1207 &sensor_dev_attr_in4_max.dev_attr.attr, 1208 &sensor_dev_attr_in4_min.dev_attr.attr, 1209 &sensor_dev_attr_in4_alarm.dev_attr.attr, 1210 NULL 1211 }, { 1212 &sensor_dev_attr_in8_input.dev_attr.attr, 1213 &sensor_dev_attr_in8_max.dev_attr.attr, 1214 &sensor_dev_attr_in8_min.dev_attr.attr, 1215 &sensor_dev_attr_in8_alarm.dev_attr.attr, 1216 NULL 1217 }, { 1218 &sensor_dev_attr_in9_input.dev_attr.attr, 1219 &sensor_dev_attr_in9_max.dev_attr.attr, 1220 &sensor_dev_attr_in9_min.dev_attr.attr, 1221 &sensor_dev_attr_in9_alarm.dev_attr.attr, 1222 NULL 1223 }, { 1224 &sensor_dev_attr_in10_input.dev_attr.attr, 1225 &sensor_dev_attr_in10_max.dev_attr.attr, 1226 &sensor_dev_attr_in10_min.dev_attr.attr, 1227 &sensor_dev_attr_in10_alarm.dev_attr.attr, 1228 NULL 1229 } 1230 }; 1231 1232 static const struct attribute_group f71805f_group_optin[4] = { 1233 { .attrs = f71805f_attributes_optin[0] }, 1234 { .attrs = f71805f_attributes_optin[1] }, 1235 { .attrs = f71805f_attributes_optin[2] }, 1236 { .attrs = f71805f_attributes_optin[3] }, 1237 }; 1238 1239 /* We don't include pwm_freq files in the arrays above, because they must be 1240 created conditionally (only if pwm_mode is 1 == PWM) */ 1241 static struct attribute *f71805f_attributes_pwm_freq[] = { 1242 &sensor_dev_attr_pwm1_freq.dev_attr.attr, 1243 &sensor_dev_attr_pwm2_freq.dev_attr.attr, 1244 &sensor_dev_attr_pwm3_freq.dev_attr.attr, 1245 NULL 1246 }; 1247 1248 static const struct attribute_group f71805f_group_pwm_freq = { 1249 .attrs = f71805f_attributes_pwm_freq, 1250 }; 1251 1252 /* We also need an indexed access to pwmN files to toggle writability */ 1253 static struct attribute *f71805f_attr_pwm[] = { 1254 &sensor_dev_attr_pwm1.dev_attr.attr, 1255 &sensor_dev_attr_pwm2.dev_attr.attr, 1256 &sensor_dev_attr_pwm3.dev_attr.attr, 1257 }; 1258 1259 /* 1260 * Device registration and initialization 1261 */ 1262 1263 static void __devinit f71805f_init_device(struct f71805f_data *data) 1264 { 1265 u8 reg; 1266 int i; 1267 1268 reg = f71805f_read8(data, F71805F_REG_START); 1269 if ((reg & 0x41) != 0x01) { 1270 printk(KERN_DEBUG DRVNAME ": Starting monitoring " 1271 "operations\n"); 1272 f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40); 1273 } 1274 1275 /* Fan monitoring can be disabled. If it is, we won't be polling 1276 the register values, and won't create the related sysfs files. */ 1277 for (i = 0; i < 3; i++) { 1278 data->fan_ctrl[i] = f71805f_read8(data, 1279 F71805F_REG_FAN_CTRL(i)); 1280 /* Clear latch full bit, else "speed mode" fan speed control 1281 doesn't work */ 1282 if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) { 1283 data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL; 1284 f71805f_write8(data, F71805F_REG_FAN_CTRL(i), 1285 data->fan_ctrl[i]); 1286 } 1287 } 1288 } 1289 1290 static int __devinit f71805f_probe(struct platform_device *pdev) 1291 { 1292 struct f71805f_sio_data *sio_data = pdev->dev.platform_data; 1293 struct f71805f_data *data; 1294 struct resource *res; 1295 int i, err; 1296 1297 static const char *names[] = { 1298 "f71805f", 1299 "f71872f", 1300 }; 1301 1302 if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) { 1303 err = -ENOMEM; 1304 printk(KERN_ERR DRVNAME ": Out of memory\n"); 1305 goto exit; 1306 } 1307 1308 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 1309 if (!request_region(res->start + ADDR_REG_OFFSET, 2, DRVNAME)) { 1310 err = -EBUSY; 1311 dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n", 1312 (unsigned long)(res->start + ADDR_REG_OFFSET), 1313 (unsigned long)(res->start + ADDR_REG_OFFSET + 1)); 1314 goto exit_free; 1315 } 1316 data->addr = res->start; 1317 data->name = names[sio_data->kind]; 1318 mutex_init(&data->update_lock); 1319 1320 platform_set_drvdata(pdev, data); 1321 1322 /* Some voltage inputs depend on chip model and configuration */ 1323 switch (sio_data->kind) { 1324 case f71805f: 1325 data->has_in = 0x1ff; 1326 break; 1327 case f71872f: 1328 data->has_in = 0x6ef; 1329 if (sio_data->fnsel1 & 0x01) 1330 data->has_in |= (1 << 4); /* in4 */ 1331 if (sio_data->fnsel1 & 0x02) 1332 data->has_in |= (1 << 8); /* in8 */ 1333 break; 1334 } 1335 1336 /* Initialize the F71805F chip */ 1337 f71805f_init_device(data); 1338 1339 /* Register sysfs interface files */ 1340 if ((err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group))) 1341 goto exit_release_region; 1342 if (data->has_in & (1 << 4)) { /* in4 */ 1343 if ((err = sysfs_create_group(&pdev->dev.kobj, 1344 &f71805f_group_optin[0]))) 1345 goto exit_remove_files; 1346 } 1347 if (data->has_in & (1 << 8)) { /* in8 */ 1348 if ((err = sysfs_create_group(&pdev->dev.kobj, 1349 &f71805f_group_optin[1]))) 1350 goto exit_remove_files; 1351 } 1352 if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */ 1353 if ((err = sysfs_create_group(&pdev->dev.kobj, 1354 &f71805f_group_optin[2]))) 1355 goto exit_remove_files; 1356 } 1357 if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */ 1358 if ((err = sysfs_create_group(&pdev->dev.kobj, 1359 &f71805f_group_optin[3]))) 1360 goto exit_remove_files; 1361 } 1362 for (i = 0; i < 3; i++) { 1363 /* If control mode is PWM, create pwm_freq file */ 1364 if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) { 1365 if ((err = sysfs_create_file(&pdev->dev.kobj, 1366 f71805f_attributes_pwm_freq[i]))) 1367 goto exit_remove_files; 1368 } 1369 /* If PWM is in manual mode, add write permission */ 1370 if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) { 1371 if ((err = sysfs_chmod_file(&pdev->dev.kobj, 1372 f71805f_attr_pwm[i], 1373 S_IRUGO | S_IWUSR))) { 1374 dev_err(&pdev->dev, "chmod +w pwm%d failed\n", 1375 i + 1); 1376 goto exit_remove_files; 1377 } 1378 } 1379 } 1380 1381 data->class_dev = hwmon_device_register(&pdev->dev); 1382 if (IS_ERR(data->class_dev)) { 1383 err = PTR_ERR(data->class_dev); 1384 dev_err(&pdev->dev, "Class registration failed (%d)\n", err); 1385 goto exit_remove_files; 1386 } 1387 1388 return 0; 1389 1390 exit_remove_files: 1391 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group); 1392 for (i = 0; i < 4; i++) 1393 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]); 1394 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq); 1395 exit_release_region: 1396 release_region(res->start + ADDR_REG_OFFSET, 2); 1397 exit_free: 1398 platform_set_drvdata(pdev, NULL); 1399 kfree(data); 1400 exit: 1401 return err; 1402 } 1403 1404 static int __devexit f71805f_remove(struct platform_device *pdev) 1405 { 1406 struct f71805f_data *data = platform_get_drvdata(pdev); 1407 struct resource *res; 1408 int i; 1409 1410 hwmon_device_unregister(data->class_dev); 1411 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group); 1412 for (i = 0; i < 4; i++) 1413 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]); 1414 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq); 1415 platform_set_drvdata(pdev, NULL); 1416 kfree(data); 1417 1418 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 1419 release_region(res->start + ADDR_REG_OFFSET, 2); 1420 1421 return 0; 1422 } 1423 1424 static struct platform_driver f71805f_driver = { 1425 .driver = { 1426 .owner = THIS_MODULE, 1427 .name = DRVNAME, 1428 }, 1429 .probe = f71805f_probe, 1430 .remove = __devexit_p(f71805f_remove), 1431 }; 1432 1433 static int __init f71805f_device_add(unsigned short address, 1434 const struct f71805f_sio_data *sio_data) 1435 { 1436 struct resource res = { 1437 .start = address, 1438 .end = address + REGION_LENGTH - 1, 1439 .flags = IORESOURCE_IO, 1440 }; 1441 int err; 1442 1443 pdev = platform_device_alloc(DRVNAME, address); 1444 if (!pdev) { 1445 err = -ENOMEM; 1446 printk(KERN_ERR DRVNAME ": Device allocation failed\n"); 1447 goto exit; 1448 } 1449 1450 res.name = pdev->name; 1451 err = platform_device_add_resources(pdev, &res, 1); 1452 if (err) { 1453 printk(KERN_ERR DRVNAME ": Device resource addition failed " 1454 "(%d)\n", err); 1455 goto exit_device_put; 1456 } 1457 1458 err = platform_device_add_data(pdev, sio_data, 1459 sizeof(struct f71805f_sio_data)); 1460 if (err) { 1461 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n"); 1462 goto exit_device_put; 1463 } 1464 1465 err = platform_device_add(pdev); 1466 if (err) { 1467 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n", 1468 err); 1469 goto exit_device_put; 1470 } 1471 1472 return 0; 1473 1474 exit_device_put: 1475 platform_device_put(pdev); 1476 exit: 1477 return err; 1478 } 1479 1480 static int __init f71805f_find(int sioaddr, unsigned short *address, 1481 struct f71805f_sio_data *sio_data) 1482 { 1483 int err = -ENODEV; 1484 u16 devid; 1485 1486 static const char *names[] = { 1487 "F71805F/FG", 1488 "F71872F/FG", 1489 }; 1490 1491 superio_enter(sioaddr); 1492 1493 devid = superio_inw(sioaddr, SIO_REG_MANID); 1494 if (devid != SIO_FINTEK_ID) 1495 goto exit; 1496 1497 devid = superio_inw(sioaddr, SIO_REG_DEVID); 1498 switch (devid) { 1499 case SIO_F71805F_ID: 1500 sio_data->kind = f71805f; 1501 break; 1502 case SIO_F71872F_ID: 1503 sio_data->kind = f71872f; 1504 sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1); 1505 break; 1506 default: 1507 printk(KERN_INFO DRVNAME ": Unsupported Fintek device, " 1508 "skipping\n"); 1509 goto exit; 1510 } 1511 1512 superio_select(sioaddr, F71805F_LD_HWM); 1513 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) { 1514 printk(KERN_WARNING DRVNAME ": Device not activated, " 1515 "skipping\n"); 1516 goto exit; 1517 } 1518 1519 *address = superio_inw(sioaddr, SIO_REG_ADDR); 1520 if (*address == 0) { 1521 printk(KERN_WARNING DRVNAME ": Base address not set, " 1522 "skipping\n"); 1523 goto exit; 1524 } 1525 *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */ 1526 1527 err = 0; 1528 printk(KERN_INFO DRVNAME ": Found %s chip at %#x, revision %u\n", 1529 names[sio_data->kind], *address, 1530 superio_inb(sioaddr, SIO_REG_DEVREV)); 1531 1532 exit: 1533 superio_exit(sioaddr); 1534 return err; 1535 } 1536 1537 static int __init f71805f_init(void) 1538 { 1539 int err; 1540 unsigned short address; 1541 struct f71805f_sio_data sio_data; 1542 1543 if (f71805f_find(0x2e, &address, &sio_data) 1544 && f71805f_find(0x4e, &address, &sio_data)) 1545 return -ENODEV; 1546 1547 err = platform_driver_register(&f71805f_driver); 1548 if (err) 1549 goto exit; 1550 1551 /* Sets global pdev as a side effect */ 1552 err = f71805f_device_add(address, &sio_data); 1553 if (err) 1554 goto exit_driver; 1555 1556 return 0; 1557 1558 exit_driver: 1559 platform_driver_unregister(&f71805f_driver); 1560 exit: 1561 return err; 1562 } 1563 1564 static void __exit f71805f_exit(void) 1565 { 1566 platform_device_unregister(pdev); 1567 platform_driver_unregister(&f71805f_driver); 1568 } 1569 1570 MODULE_AUTHOR("Jean Delvare <khali@linux-fr>"); 1571 MODULE_LICENSE("GPL"); 1572 MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver"); 1573 1574 module_init(f71805f_init); 1575 module_exit(f71805f_exit); 1576