1 /* 2 * dme1737.c - Driver for the SMSC DME1737, Asus A8000, SMSC SCH311x and 3 * SCH5027 Super-I/O chips integrated hardware monitoring features. 4 * Copyright (c) 2007, 2008 Juerg Haefliger <juergh@gmail.com> 5 * 6 * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access 7 * the chip registers if a DME1737, A8000, or SCH5027 is found and the ISA bus 8 * if a SCH311x chip is found. Both types of chips have very similar hardware 9 * monitoring capabilities but differ in the way they can be accessed. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24 */ 25 26 #include <linux/module.h> 27 #include <linux/init.h> 28 #include <linux/slab.h> 29 #include <linux/jiffies.h> 30 #include <linux/i2c.h> 31 #include <linux/platform_device.h> 32 #include <linux/hwmon.h> 33 #include <linux/hwmon-sysfs.h> 34 #include <linux/hwmon-vid.h> 35 #include <linux/err.h> 36 #include <linux/mutex.h> 37 #include <asm/io.h> 38 39 /* ISA device, if found */ 40 static struct platform_device *pdev; 41 42 /* Module load parameters */ 43 static int force_start; 44 module_param(force_start, bool, 0); 45 MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs"); 46 47 static unsigned short force_id; 48 module_param(force_id, ushort, 0); 49 MODULE_PARM_DESC(force_id, "Override the detected device ID"); 50 51 static int probe_all_addr; 52 module_param(probe_all_addr, bool, 0); 53 MODULE_PARM_DESC(probe_all_addr, "Include probing of non-standard LPC " 54 "addresses"); 55 56 /* Addresses to scan */ 57 static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END}; 58 59 /* Insmod parameters */ 60 I2C_CLIENT_INSMOD_2(dme1737, sch5027); 61 62 /* ISA chip types */ 63 enum isa_chips { sch311x = sch5027 + 1 }; 64 65 /* --------------------------------------------------------------------- 66 * Registers 67 * 68 * The sensors are defined as follows: 69 * 70 * Voltages Temperatures 71 * -------- ------------ 72 * in0 +5VTR (+5V stdby) temp1 Remote diode 1 73 * in1 Vccp (proc core) temp2 Internal temp 74 * in2 VCC (internal +3.3V) temp3 Remote diode 2 75 * in3 +5V 76 * in4 +12V 77 * in5 VTR (+3.3V stby) 78 * in6 Vbat 79 * 80 * --------------------------------------------------------------------- */ 81 82 /* Voltages (in) numbered 0-6 (ix) */ 83 #define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) \ 84 : 0x94 + (ix)) 85 #define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \ 86 : 0x91 + (ix) * 2) 87 #define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \ 88 : 0x92 + (ix) * 2) 89 90 /* Temperatures (temp) numbered 0-2 (ix) */ 91 #define DME1737_REG_TEMP(ix) (0x25 + (ix)) 92 #define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2) 93 #define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2) 94 #define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \ 95 : 0x1c + (ix)) 96 97 /* Voltage and temperature LSBs 98 * The LSBs (4 bits each) are stored in 5 registers with the following layouts: 99 * IN_TEMP_LSB(0) = [in5, in6] 100 * IN_TEMP_LSB(1) = [temp3, temp1] 101 * IN_TEMP_LSB(2) = [in4, temp2] 102 * IN_TEMP_LSB(3) = [in3, in0] 103 * IN_TEMP_LSB(4) = [in2, in1] */ 104 #define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix)) 105 static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0}; 106 static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4}; 107 static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1}; 108 static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0}; 109 110 /* Fans numbered 0-5 (ix) */ 111 #define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \ 112 : 0xa1 + (ix) * 2) 113 #define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \ 114 : 0xa5 + (ix) * 2) 115 #define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \ 116 : 0xb2 + (ix)) 117 #define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */ 118 119 /* PWMs numbered 0-2, 4-5 (ix) */ 120 #define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \ 121 : 0xa1 + (ix)) 122 #define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */ 123 #define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */ 124 #define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \ 125 : 0xa3 + (ix)) 126 /* The layout of the ramp rate registers is different from the other pwm 127 * registers. The bits for the 3 PWMs are stored in 2 registers: 128 * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0] 129 * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */ 130 #define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */ 131 132 /* Thermal zones 0-2 */ 133 #define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix)) 134 #define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix)) 135 /* The layout of the hysteresis registers is different from the other zone 136 * registers. The bits for the 3 zones are stored in 2 registers: 137 * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] 138 * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */ 139 #define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix)) 140 141 /* Alarm registers and bit mapping 142 * The 3 8-bit alarm registers will be concatenated to a single 32-bit 143 * alarm value [0, ALARM3, ALARM2, ALARM1]. */ 144 #define DME1737_REG_ALARM1 0x41 145 #define DME1737_REG_ALARM2 0x42 146 #define DME1737_REG_ALARM3 0x83 147 static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17}; 148 static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6}; 149 static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23}; 150 151 /* Miscellaneous registers */ 152 #define DME1737_REG_DEVICE 0x3d 153 #define DME1737_REG_COMPANY 0x3e 154 #define DME1737_REG_VERSTEP 0x3f 155 #define DME1737_REG_CONFIG 0x40 156 #define DME1737_REG_CONFIG2 0x7f 157 #define DME1737_REG_VID 0x43 158 #define DME1737_REG_TACH_PWM 0x81 159 160 /* --------------------------------------------------------------------- 161 * Misc defines 162 * --------------------------------------------------------------------- */ 163 164 /* Chip identification */ 165 #define DME1737_COMPANY_SMSC 0x5c 166 #define DME1737_VERSTEP 0x88 167 #define DME1737_VERSTEP_MASK 0xf8 168 #define SCH311X_DEVICE 0x8c 169 #define SCH5027_VERSTEP 0x69 170 171 /* Length of ISA address segment */ 172 #define DME1737_EXTENT 2 173 174 /* --------------------------------------------------------------------- 175 * Data structures and manipulation thereof 176 * --------------------------------------------------------------------- */ 177 178 struct dme1737_data { 179 struct i2c_client *client; /* for I2C devices only */ 180 struct device *hwmon_dev; 181 const char *name; 182 unsigned int addr; /* for ISA devices only */ 183 184 struct mutex update_lock; 185 int valid; /* !=0 if following fields are valid */ 186 unsigned long last_update; /* in jiffies */ 187 unsigned long last_vbat; /* in jiffies */ 188 enum chips type; 189 const int *in_nominal; /* pointer to IN_NOMINAL array */ 190 191 u8 vid; 192 u8 pwm_rr_en; 193 u8 has_pwm; 194 u8 has_fan; 195 196 /* Register values */ 197 u16 in[7]; 198 u8 in_min[7]; 199 u8 in_max[7]; 200 s16 temp[3]; 201 s8 temp_min[3]; 202 s8 temp_max[3]; 203 s8 temp_offset[3]; 204 u8 config; 205 u8 config2; 206 u8 vrm; 207 u16 fan[6]; 208 u16 fan_min[6]; 209 u8 fan_max[2]; 210 u8 fan_opt[6]; 211 u8 pwm[6]; 212 u8 pwm_min[3]; 213 u8 pwm_config[3]; 214 u8 pwm_acz[3]; 215 u8 pwm_freq[6]; 216 u8 pwm_rr[2]; 217 u8 zone_low[3]; 218 u8 zone_abs[3]; 219 u8 zone_hyst[2]; 220 u32 alarms; 221 }; 222 223 /* Nominal voltage values */ 224 static const int IN_NOMINAL_DME1737[] = {5000, 2250, 3300, 5000, 12000, 3300, 225 3300}; 226 static const int IN_NOMINAL_SCH311x[] = {2500, 1500, 3300, 5000, 12000, 3300, 227 3300}; 228 static const int IN_NOMINAL_SCH5027[] = {5000, 2250, 3300, 1125, 1125, 3300, 229 3300}; 230 #define IN_NOMINAL(type) ((type) == sch311x ? IN_NOMINAL_SCH311x : \ 231 (type) == sch5027 ? IN_NOMINAL_SCH5027 : \ 232 IN_NOMINAL_DME1737) 233 234 /* Voltage input 235 * Voltage inputs have 16 bits resolution, limit values have 8 bits 236 * resolution. */ 237 static inline int IN_FROM_REG(int reg, int nominal, int res) 238 { 239 return (reg * nominal + (3 << (res - 3))) / (3 << (res - 2)); 240 } 241 242 static inline int IN_TO_REG(int val, int nominal) 243 { 244 return SENSORS_LIMIT((val * 192 + nominal / 2) / nominal, 0, 255); 245 } 246 247 /* Temperature input 248 * The register values represent temperatures in 2's complement notation from 249 * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit 250 * values have 8 bits resolution. */ 251 static inline int TEMP_FROM_REG(int reg, int res) 252 { 253 return (reg * 1000) >> (res - 8); 254 } 255 256 static inline int TEMP_TO_REG(int val) 257 { 258 return SENSORS_LIMIT((val < 0 ? val - 500 : val + 500) / 1000, 259 -128, 127); 260 } 261 262 /* Temperature range */ 263 static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000, 264 10000, 13333, 16000, 20000, 26666, 32000, 265 40000, 53333, 80000}; 266 267 static inline int TEMP_RANGE_FROM_REG(int reg) 268 { 269 return TEMP_RANGE[(reg >> 4) & 0x0f]; 270 } 271 272 static int TEMP_RANGE_TO_REG(int val, int reg) 273 { 274 int i; 275 276 for (i = 15; i > 0; i--) { 277 if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) { 278 break; 279 } 280 } 281 282 return (reg & 0x0f) | (i << 4); 283 } 284 285 /* Temperature hysteresis 286 * Register layout: 287 * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0] 288 * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */ 289 static inline int TEMP_HYST_FROM_REG(int reg, int ix) 290 { 291 return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000; 292 } 293 294 static inline int TEMP_HYST_TO_REG(int val, int ix, int reg) 295 { 296 int hyst = SENSORS_LIMIT((val + 500) / 1000, 0, 15); 297 298 return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4); 299 } 300 301 /* Fan input RPM */ 302 static inline int FAN_FROM_REG(int reg, int tpc) 303 { 304 if (tpc) { 305 return tpc * reg; 306 } else { 307 return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg; 308 } 309 } 310 311 static inline int FAN_TO_REG(int val, int tpc) 312 { 313 if (tpc) { 314 return SENSORS_LIMIT(val / tpc, 0, 0xffff); 315 } else { 316 return (val <= 0) ? 0xffff : 317 SENSORS_LIMIT(90000 * 60 / val, 0, 0xfffe); 318 } 319 } 320 321 /* Fan TPC (tach pulse count) 322 * Converts a register value to a TPC multiplier or returns 0 if the tachometer 323 * is configured in legacy (non-tpc) mode */ 324 static inline int FAN_TPC_FROM_REG(int reg) 325 { 326 return (reg & 0x20) ? 0 : 60 >> (reg & 0x03); 327 } 328 329 /* Fan type 330 * The type of a fan is expressed in number of pulses-per-revolution that it 331 * emits */ 332 static inline int FAN_TYPE_FROM_REG(int reg) 333 { 334 int edge = (reg >> 1) & 0x03; 335 336 return (edge > 0) ? 1 << (edge - 1) : 0; 337 } 338 339 static inline int FAN_TYPE_TO_REG(int val, int reg) 340 { 341 int edge = (val == 4) ? 3 : val; 342 343 return (reg & 0xf9) | (edge << 1); 344 } 345 346 /* Fan max RPM */ 347 static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12, 348 0x11, 0x0f, 0x0e}; 349 350 static int FAN_MAX_FROM_REG(int reg) 351 { 352 int i; 353 354 for (i = 10; i > 0; i--) { 355 if (reg == FAN_MAX[i]) { 356 break; 357 } 358 } 359 360 return 1000 + i * 500; 361 } 362 363 static int FAN_MAX_TO_REG(int val) 364 { 365 int i; 366 367 for (i = 10; i > 0; i--) { 368 if (val > (1000 + (i - 1) * 500)) { 369 break; 370 } 371 } 372 373 return FAN_MAX[i]; 374 } 375 376 /* PWM enable 377 * Register to enable mapping: 378 * 000: 2 fan on zone 1 auto 379 * 001: 2 fan on zone 2 auto 380 * 010: 2 fan on zone 3 auto 381 * 011: 0 fan full on 382 * 100: -1 fan disabled 383 * 101: 2 fan on hottest of zones 2,3 auto 384 * 110: 2 fan on hottest of zones 1,2,3 auto 385 * 111: 1 fan in manual mode */ 386 static inline int PWM_EN_FROM_REG(int reg) 387 { 388 static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1}; 389 390 return en[(reg >> 5) & 0x07]; 391 } 392 393 static inline int PWM_EN_TO_REG(int val, int reg) 394 { 395 int en = (val == 1) ? 7 : 3; 396 397 return (reg & 0x1f) | ((en & 0x07) << 5); 398 } 399 400 /* PWM auto channels zone 401 * Register to auto channels zone mapping (ACZ is a bitfield with bit x 402 * corresponding to zone x+1): 403 * 000: 001 fan on zone 1 auto 404 * 001: 010 fan on zone 2 auto 405 * 010: 100 fan on zone 3 auto 406 * 011: 000 fan full on 407 * 100: 000 fan disabled 408 * 101: 110 fan on hottest of zones 2,3 auto 409 * 110: 111 fan on hottest of zones 1,2,3 auto 410 * 111: 000 fan in manual mode */ 411 static inline int PWM_ACZ_FROM_REG(int reg) 412 { 413 static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0}; 414 415 return acz[(reg >> 5) & 0x07]; 416 } 417 418 static inline int PWM_ACZ_TO_REG(int val, int reg) 419 { 420 int acz = (val == 4) ? 2 : val - 1; 421 422 return (reg & 0x1f) | ((acz & 0x07) << 5); 423 } 424 425 /* PWM frequency */ 426 static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88, 427 15000, 20000, 30000, 25000, 0, 0, 0, 0}; 428 429 static inline int PWM_FREQ_FROM_REG(int reg) 430 { 431 return PWM_FREQ[reg & 0x0f]; 432 } 433 434 static int PWM_FREQ_TO_REG(int val, int reg) 435 { 436 int i; 437 438 /* the first two cases are special - stupid chip design! */ 439 if (val > 27500) { 440 i = 10; 441 } else if (val > 22500) { 442 i = 11; 443 } else { 444 for (i = 9; i > 0; i--) { 445 if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) { 446 break; 447 } 448 } 449 } 450 451 return (reg & 0xf0) | i; 452 } 453 454 /* PWM ramp rate 455 * Register layout: 456 * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0] 457 * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */ 458 static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5}; 459 460 static inline int PWM_RR_FROM_REG(int reg, int ix) 461 { 462 int rr = (ix == 1) ? reg >> 4 : reg; 463 464 return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0; 465 } 466 467 static int PWM_RR_TO_REG(int val, int ix, int reg) 468 { 469 int i; 470 471 for (i = 0; i < 7; i++) { 472 if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) { 473 break; 474 } 475 } 476 477 return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i; 478 } 479 480 /* PWM ramp rate enable */ 481 static inline int PWM_RR_EN_FROM_REG(int reg, int ix) 482 { 483 return PWM_RR_FROM_REG(reg, ix) ? 1 : 0; 484 } 485 486 static inline int PWM_RR_EN_TO_REG(int val, int ix, int reg) 487 { 488 int en = (ix == 1) ? 0x80 : 0x08; 489 490 return val ? reg | en : reg & ~en; 491 } 492 493 /* PWM min/off 494 * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for 495 * the register layout). */ 496 static inline int PWM_OFF_FROM_REG(int reg, int ix) 497 { 498 return (reg >> (ix + 5)) & 0x01; 499 } 500 501 static inline int PWM_OFF_TO_REG(int val, int ix, int reg) 502 { 503 return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5)); 504 } 505 506 /* --------------------------------------------------------------------- 507 * Device I/O access 508 * 509 * ISA access is performed through an index/data register pair and needs to 510 * be protected by a mutex during runtime (not required for initialization). 511 * We use data->update_lock for this and need to ensure that we acquire it 512 * before calling dme1737_read or dme1737_write. 513 * --------------------------------------------------------------------- */ 514 515 static u8 dme1737_read(const struct dme1737_data *data, u8 reg) 516 { 517 struct i2c_client *client = data->client; 518 s32 val; 519 520 if (client) { /* I2C device */ 521 val = i2c_smbus_read_byte_data(client, reg); 522 523 if (val < 0) { 524 dev_warn(&client->dev, "Read from register " 525 "0x%02x failed! Please report to the driver " 526 "maintainer.\n", reg); 527 } 528 } else { /* ISA device */ 529 outb(reg, data->addr); 530 val = inb(data->addr + 1); 531 } 532 533 return val; 534 } 535 536 static s32 dme1737_write(const struct dme1737_data *data, u8 reg, u8 val) 537 { 538 struct i2c_client *client = data->client; 539 s32 res = 0; 540 541 if (client) { /* I2C device */ 542 res = i2c_smbus_write_byte_data(client, reg, val); 543 544 if (res < 0) { 545 dev_warn(&client->dev, "Write to register " 546 "0x%02x failed! Please report to the driver " 547 "maintainer.\n", reg); 548 } 549 } else { /* ISA device */ 550 outb(reg, data->addr); 551 outb(val, data->addr + 1); 552 } 553 554 return res; 555 } 556 557 static struct dme1737_data *dme1737_update_device(struct device *dev) 558 { 559 struct dme1737_data *data = dev_get_drvdata(dev); 560 int ix; 561 u8 lsb[5]; 562 563 mutex_lock(&data->update_lock); 564 565 /* Enable a Vbat monitoring cycle every 10 mins */ 566 if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) { 567 dme1737_write(data, DME1737_REG_CONFIG, dme1737_read(data, 568 DME1737_REG_CONFIG) | 0x10); 569 data->last_vbat = jiffies; 570 } 571 572 /* Sample register contents every 1 sec */ 573 if (time_after(jiffies, data->last_update + HZ) || !data->valid) { 574 if (data->type != sch5027) { 575 data->vid = dme1737_read(data, DME1737_REG_VID) & 576 0x3f; 577 } 578 579 /* In (voltage) registers */ 580 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { 581 /* Voltage inputs are stored as 16 bit values even 582 * though they have only 12 bits resolution. This is 583 * to make it consistent with the temp inputs. */ 584 data->in[ix] = dme1737_read(data, 585 DME1737_REG_IN(ix)) << 8; 586 data->in_min[ix] = dme1737_read(data, 587 DME1737_REG_IN_MIN(ix)); 588 data->in_max[ix] = dme1737_read(data, 589 DME1737_REG_IN_MAX(ix)); 590 } 591 592 /* Temp registers */ 593 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { 594 /* Temp inputs are stored as 16 bit values even 595 * though they have only 12 bits resolution. This is 596 * to take advantage of implicit conversions between 597 * register values (2's complement) and temp values 598 * (signed decimal). */ 599 data->temp[ix] = dme1737_read(data, 600 DME1737_REG_TEMP(ix)) << 8; 601 data->temp_min[ix] = dme1737_read(data, 602 DME1737_REG_TEMP_MIN(ix)); 603 data->temp_max[ix] = dme1737_read(data, 604 DME1737_REG_TEMP_MAX(ix)); 605 if (data->type != sch5027) { 606 data->temp_offset[ix] = dme1737_read(data, 607 DME1737_REG_TEMP_OFFSET(ix)); 608 } 609 } 610 611 /* In and temp LSB registers 612 * The LSBs are latched when the MSBs are read, so the order in 613 * which the registers are read (MSB first, then LSB) is 614 * important! */ 615 for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) { 616 lsb[ix] = dme1737_read(data, 617 DME1737_REG_IN_TEMP_LSB(ix)); 618 } 619 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) { 620 data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] << 621 DME1737_REG_IN_LSB_SHL[ix]) & 0xf0; 622 } 623 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) { 624 data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] << 625 DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0; 626 } 627 628 /* Fan registers */ 629 for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) { 630 /* Skip reading registers if optional fans are not 631 * present */ 632 if (!(data->has_fan & (1 << ix))) { 633 continue; 634 } 635 data->fan[ix] = dme1737_read(data, 636 DME1737_REG_FAN(ix)); 637 data->fan[ix] |= dme1737_read(data, 638 DME1737_REG_FAN(ix) + 1) << 8; 639 data->fan_min[ix] = dme1737_read(data, 640 DME1737_REG_FAN_MIN(ix)); 641 data->fan_min[ix] |= dme1737_read(data, 642 DME1737_REG_FAN_MIN(ix) + 1) << 8; 643 data->fan_opt[ix] = dme1737_read(data, 644 DME1737_REG_FAN_OPT(ix)); 645 /* fan_max exists only for fan[5-6] */ 646 if (ix > 3) { 647 data->fan_max[ix - 4] = dme1737_read(data, 648 DME1737_REG_FAN_MAX(ix)); 649 } 650 } 651 652 /* PWM registers */ 653 for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) { 654 /* Skip reading registers if optional PWMs are not 655 * present */ 656 if (!(data->has_pwm & (1 << ix))) { 657 continue; 658 } 659 data->pwm[ix] = dme1737_read(data, 660 DME1737_REG_PWM(ix)); 661 data->pwm_freq[ix] = dme1737_read(data, 662 DME1737_REG_PWM_FREQ(ix)); 663 /* pwm_config and pwm_min exist only for pwm[1-3] */ 664 if (ix < 3) { 665 data->pwm_config[ix] = dme1737_read(data, 666 DME1737_REG_PWM_CONFIG(ix)); 667 data->pwm_min[ix] = dme1737_read(data, 668 DME1737_REG_PWM_MIN(ix)); 669 } 670 } 671 for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) { 672 data->pwm_rr[ix] = dme1737_read(data, 673 DME1737_REG_PWM_RR(ix)); 674 } 675 676 /* Thermal zone registers */ 677 for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) { 678 data->zone_low[ix] = dme1737_read(data, 679 DME1737_REG_ZONE_LOW(ix)); 680 data->zone_abs[ix] = dme1737_read(data, 681 DME1737_REG_ZONE_ABS(ix)); 682 } 683 if (data->type != sch5027) { 684 for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) { 685 data->zone_hyst[ix] = dme1737_read(data, 686 DME1737_REG_ZONE_HYST(ix)); 687 } 688 } 689 690 /* Alarm registers */ 691 data->alarms = dme1737_read(data, 692 DME1737_REG_ALARM1); 693 /* Bit 7 tells us if the other alarm registers are non-zero and 694 * therefore also need to be read */ 695 if (data->alarms & 0x80) { 696 data->alarms |= dme1737_read(data, 697 DME1737_REG_ALARM2) << 8; 698 data->alarms |= dme1737_read(data, 699 DME1737_REG_ALARM3) << 16; 700 } 701 702 /* The ISA chips require explicit clearing of alarm bits. 703 * Don't worry, an alarm will come back if the condition 704 * that causes it still exists */ 705 if (!data->client) { 706 if (data->alarms & 0xff0000) { 707 dme1737_write(data, DME1737_REG_ALARM3, 708 0xff); 709 } 710 if (data->alarms & 0xff00) { 711 dme1737_write(data, DME1737_REG_ALARM2, 712 0xff); 713 } 714 if (data->alarms & 0xff) { 715 dme1737_write(data, DME1737_REG_ALARM1, 716 0xff); 717 } 718 } 719 720 data->last_update = jiffies; 721 data->valid = 1; 722 } 723 724 mutex_unlock(&data->update_lock); 725 726 return data; 727 } 728 729 /* --------------------------------------------------------------------- 730 * Voltage sysfs attributes 731 * ix = [0-5] 732 * --------------------------------------------------------------------- */ 733 734 #define SYS_IN_INPUT 0 735 #define SYS_IN_MIN 1 736 #define SYS_IN_MAX 2 737 #define SYS_IN_ALARM 3 738 739 static ssize_t show_in(struct device *dev, struct device_attribute *attr, 740 char *buf) 741 { 742 struct dme1737_data *data = dme1737_update_device(dev); 743 struct sensor_device_attribute_2 744 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 745 int ix = sensor_attr_2->index; 746 int fn = sensor_attr_2->nr; 747 int res; 748 749 switch (fn) { 750 case SYS_IN_INPUT: 751 res = IN_FROM_REG(data->in[ix], data->in_nominal[ix], 16); 752 break; 753 case SYS_IN_MIN: 754 res = IN_FROM_REG(data->in_min[ix], data->in_nominal[ix], 8); 755 break; 756 case SYS_IN_MAX: 757 res = IN_FROM_REG(data->in_max[ix], data->in_nominal[ix], 8); 758 break; 759 case SYS_IN_ALARM: 760 res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01; 761 break; 762 default: 763 res = 0; 764 dev_dbg(dev, "Unknown function %d.\n", fn); 765 } 766 767 return sprintf(buf, "%d\n", res); 768 } 769 770 static ssize_t set_in(struct device *dev, struct device_attribute *attr, 771 const char *buf, size_t count) 772 { 773 struct dme1737_data *data = dev_get_drvdata(dev); 774 struct sensor_device_attribute_2 775 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 776 int ix = sensor_attr_2->index; 777 int fn = sensor_attr_2->nr; 778 long val = simple_strtol(buf, NULL, 10); 779 780 mutex_lock(&data->update_lock); 781 switch (fn) { 782 case SYS_IN_MIN: 783 data->in_min[ix] = IN_TO_REG(val, data->in_nominal[ix]); 784 dme1737_write(data, DME1737_REG_IN_MIN(ix), 785 data->in_min[ix]); 786 break; 787 case SYS_IN_MAX: 788 data->in_max[ix] = IN_TO_REG(val, data->in_nominal[ix]); 789 dme1737_write(data, DME1737_REG_IN_MAX(ix), 790 data->in_max[ix]); 791 break; 792 default: 793 dev_dbg(dev, "Unknown function %d.\n", fn); 794 } 795 mutex_unlock(&data->update_lock); 796 797 return count; 798 } 799 800 /* --------------------------------------------------------------------- 801 * Temperature sysfs attributes 802 * ix = [0-2] 803 * --------------------------------------------------------------------- */ 804 805 #define SYS_TEMP_INPUT 0 806 #define SYS_TEMP_MIN 1 807 #define SYS_TEMP_MAX 2 808 #define SYS_TEMP_OFFSET 3 809 #define SYS_TEMP_ALARM 4 810 #define SYS_TEMP_FAULT 5 811 812 static ssize_t show_temp(struct device *dev, struct device_attribute *attr, 813 char *buf) 814 { 815 struct dme1737_data *data = dme1737_update_device(dev); 816 struct sensor_device_attribute_2 817 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 818 int ix = sensor_attr_2->index; 819 int fn = sensor_attr_2->nr; 820 int res; 821 822 switch (fn) { 823 case SYS_TEMP_INPUT: 824 res = TEMP_FROM_REG(data->temp[ix], 16); 825 break; 826 case SYS_TEMP_MIN: 827 res = TEMP_FROM_REG(data->temp_min[ix], 8); 828 break; 829 case SYS_TEMP_MAX: 830 res = TEMP_FROM_REG(data->temp_max[ix], 8); 831 break; 832 case SYS_TEMP_OFFSET: 833 res = TEMP_FROM_REG(data->temp_offset[ix], 8); 834 break; 835 case SYS_TEMP_ALARM: 836 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01; 837 break; 838 case SYS_TEMP_FAULT: 839 res = (((u16)data->temp[ix] & 0xff00) == 0x8000); 840 break; 841 default: 842 res = 0; 843 dev_dbg(dev, "Unknown function %d.\n", fn); 844 } 845 846 return sprintf(buf, "%d\n", res); 847 } 848 849 static ssize_t set_temp(struct device *dev, struct device_attribute *attr, 850 const char *buf, size_t count) 851 { 852 struct dme1737_data *data = dev_get_drvdata(dev); 853 struct sensor_device_attribute_2 854 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 855 int ix = sensor_attr_2->index; 856 int fn = sensor_attr_2->nr; 857 long val = simple_strtol(buf, NULL, 10); 858 859 mutex_lock(&data->update_lock); 860 switch (fn) { 861 case SYS_TEMP_MIN: 862 data->temp_min[ix] = TEMP_TO_REG(val); 863 dme1737_write(data, DME1737_REG_TEMP_MIN(ix), 864 data->temp_min[ix]); 865 break; 866 case SYS_TEMP_MAX: 867 data->temp_max[ix] = TEMP_TO_REG(val); 868 dme1737_write(data, DME1737_REG_TEMP_MAX(ix), 869 data->temp_max[ix]); 870 break; 871 case SYS_TEMP_OFFSET: 872 data->temp_offset[ix] = TEMP_TO_REG(val); 873 dme1737_write(data, DME1737_REG_TEMP_OFFSET(ix), 874 data->temp_offset[ix]); 875 break; 876 default: 877 dev_dbg(dev, "Unknown function %d.\n", fn); 878 } 879 mutex_unlock(&data->update_lock); 880 881 return count; 882 } 883 884 /* --------------------------------------------------------------------- 885 * Zone sysfs attributes 886 * ix = [0-2] 887 * --------------------------------------------------------------------- */ 888 889 #define SYS_ZONE_AUTO_CHANNELS_TEMP 0 890 #define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1 891 #define SYS_ZONE_AUTO_POINT1_TEMP 2 892 #define SYS_ZONE_AUTO_POINT2_TEMP 3 893 #define SYS_ZONE_AUTO_POINT3_TEMP 4 894 895 static ssize_t show_zone(struct device *dev, struct device_attribute *attr, 896 char *buf) 897 { 898 struct dme1737_data *data = dme1737_update_device(dev); 899 struct sensor_device_attribute_2 900 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 901 int ix = sensor_attr_2->index; 902 int fn = sensor_attr_2->nr; 903 int res; 904 905 switch (fn) { 906 case SYS_ZONE_AUTO_CHANNELS_TEMP: 907 /* check config2 for non-standard temp-to-zone mapping */ 908 if ((ix == 1) && (data->config2 & 0x02)) { 909 res = 4; 910 } else { 911 res = 1 << ix; 912 } 913 break; 914 case SYS_ZONE_AUTO_POINT1_TEMP_HYST: 915 res = TEMP_FROM_REG(data->zone_low[ix], 8) - 916 TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix); 917 break; 918 case SYS_ZONE_AUTO_POINT1_TEMP: 919 res = TEMP_FROM_REG(data->zone_low[ix], 8); 920 break; 921 case SYS_ZONE_AUTO_POINT2_TEMP: 922 /* pwm_freq holds the temp range bits in the upper nibble */ 923 res = TEMP_FROM_REG(data->zone_low[ix], 8) + 924 TEMP_RANGE_FROM_REG(data->pwm_freq[ix]); 925 break; 926 case SYS_ZONE_AUTO_POINT3_TEMP: 927 res = TEMP_FROM_REG(data->zone_abs[ix], 8); 928 break; 929 default: 930 res = 0; 931 dev_dbg(dev, "Unknown function %d.\n", fn); 932 } 933 934 return sprintf(buf, "%d\n", res); 935 } 936 937 static ssize_t set_zone(struct device *dev, struct device_attribute *attr, 938 const char *buf, size_t count) 939 { 940 struct dme1737_data *data = dev_get_drvdata(dev); 941 struct sensor_device_attribute_2 942 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 943 int ix = sensor_attr_2->index; 944 int fn = sensor_attr_2->nr; 945 long val = simple_strtol(buf, NULL, 10); 946 947 mutex_lock(&data->update_lock); 948 switch (fn) { 949 case SYS_ZONE_AUTO_POINT1_TEMP_HYST: 950 /* Refresh the cache */ 951 data->zone_low[ix] = dme1737_read(data, 952 DME1737_REG_ZONE_LOW(ix)); 953 /* Modify the temp hyst value */ 954 data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG( 955 TEMP_FROM_REG(data->zone_low[ix], 8) - 956 val, ix, dme1737_read(data, 957 DME1737_REG_ZONE_HYST(ix == 2))); 958 dme1737_write(data, DME1737_REG_ZONE_HYST(ix == 2), 959 data->zone_hyst[ix == 2]); 960 break; 961 case SYS_ZONE_AUTO_POINT1_TEMP: 962 data->zone_low[ix] = TEMP_TO_REG(val); 963 dme1737_write(data, DME1737_REG_ZONE_LOW(ix), 964 data->zone_low[ix]); 965 break; 966 case SYS_ZONE_AUTO_POINT2_TEMP: 967 /* Refresh the cache */ 968 data->zone_low[ix] = dme1737_read(data, 969 DME1737_REG_ZONE_LOW(ix)); 970 /* Modify the temp range value (which is stored in the upper 971 * nibble of the pwm_freq register) */ 972 data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val - 973 TEMP_FROM_REG(data->zone_low[ix], 8), 974 dme1737_read(data, 975 DME1737_REG_PWM_FREQ(ix))); 976 dme1737_write(data, DME1737_REG_PWM_FREQ(ix), 977 data->pwm_freq[ix]); 978 break; 979 case SYS_ZONE_AUTO_POINT3_TEMP: 980 data->zone_abs[ix] = TEMP_TO_REG(val); 981 dme1737_write(data, DME1737_REG_ZONE_ABS(ix), 982 data->zone_abs[ix]); 983 break; 984 default: 985 dev_dbg(dev, "Unknown function %d.\n", fn); 986 } 987 mutex_unlock(&data->update_lock); 988 989 return count; 990 } 991 992 /* --------------------------------------------------------------------- 993 * Fan sysfs attributes 994 * ix = [0-5] 995 * --------------------------------------------------------------------- */ 996 997 #define SYS_FAN_INPUT 0 998 #define SYS_FAN_MIN 1 999 #define SYS_FAN_MAX 2 1000 #define SYS_FAN_ALARM 3 1001 #define SYS_FAN_TYPE 4 1002 1003 static ssize_t show_fan(struct device *dev, struct device_attribute *attr, 1004 char *buf) 1005 { 1006 struct dme1737_data *data = dme1737_update_device(dev); 1007 struct sensor_device_attribute_2 1008 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 1009 int ix = sensor_attr_2->index; 1010 int fn = sensor_attr_2->nr; 1011 int res; 1012 1013 switch (fn) { 1014 case SYS_FAN_INPUT: 1015 res = FAN_FROM_REG(data->fan[ix], 1016 ix < 4 ? 0 : 1017 FAN_TPC_FROM_REG(data->fan_opt[ix])); 1018 break; 1019 case SYS_FAN_MIN: 1020 res = FAN_FROM_REG(data->fan_min[ix], 1021 ix < 4 ? 0 : 1022 FAN_TPC_FROM_REG(data->fan_opt[ix])); 1023 break; 1024 case SYS_FAN_MAX: 1025 /* only valid for fan[5-6] */ 1026 res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]); 1027 break; 1028 case SYS_FAN_ALARM: 1029 res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01; 1030 break; 1031 case SYS_FAN_TYPE: 1032 /* only valid for fan[1-4] */ 1033 res = FAN_TYPE_FROM_REG(data->fan_opt[ix]); 1034 break; 1035 default: 1036 res = 0; 1037 dev_dbg(dev, "Unknown function %d.\n", fn); 1038 } 1039 1040 return sprintf(buf, "%d\n", res); 1041 } 1042 1043 static ssize_t set_fan(struct device *dev, struct device_attribute *attr, 1044 const char *buf, size_t count) 1045 { 1046 struct dme1737_data *data = dev_get_drvdata(dev); 1047 struct sensor_device_attribute_2 1048 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 1049 int ix = sensor_attr_2->index; 1050 int fn = sensor_attr_2->nr; 1051 long val = simple_strtol(buf, NULL, 10); 1052 1053 mutex_lock(&data->update_lock); 1054 switch (fn) { 1055 case SYS_FAN_MIN: 1056 if (ix < 4) { 1057 data->fan_min[ix] = FAN_TO_REG(val, 0); 1058 } else { 1059 /* Refresh the cache */ 1060 data->fan_opt[ix] = dme1737_read(data, 1061 DME1737_REG_FAN_OPT(ix)); 1062 /* Modify the fan min value */ 1063 data->fan_min[ix] = FAN_TO_REG(val, 1064 FAN_TPC_FROM_REG(data->fan_opt[ix])); 1065 } 1066 dme1737_write(data, DME1737_REG_FAN_MIN(ix), 1067 data->fan_min[ix] & 0xff); 1068 dme1737_write(data, DME1737_REG_FAN_MIN(ix) + 1, 1069 data->fan_min[ix] >> 8); 1070 break; 1071 case SYS_FAN_MAX: 1072 /* Only valid for fan[5-6] */ 1073 data->fan_max[ix - 4] = FAN_MAX_TO_REG(val); 1074 dme1737_write(data, DME1737_REG_FAN_MAX(ix), 1075 data->fan_max[ix - 4]); 1076 break; 1077 case SYS_FAN_TYPE: 1078 /* Only valid for fan[1-4] */ 1079 if (!(val == 1 || val == 2 || val == 4)) { 1080 count = -EINVAL; 1081 dev_warn(dev, "Fan type value %ld not " 1082 "supported. Choose one of 1, 2, or 4.\n", 1083 val); 1084 goto exit; 1085 } 1086 data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(data, 1087 DME1737_REG_FAN_OPT(ix))); 1088 dme1737_write(data, DME1737_REG_FAN_OPT(ix), 1089 data->fan_opt[ix]); 1090 break; 1091 default: 1092 dev_dbg(dev, "Unknown function %d.\n", fn); 1093 } 1094 exit: 1095 mutex_unlock(&data->update_lock); 1096 1097 return count; 1098 } 1099 1100 /* --------------------------------------------------------------------- 1101 * PWM sysfs attributes 1102 * ix = [0-4] 1103 * --------------------------------------------------------------------- */ 1104 1105 #define SYS_PWM 0 1106 #define SYS_PWM_FREQ 1 1107 #define SYS_PWM_ENABLE 2 1108 #define SYS_PWM_RAMP_RATE 3 1109 #define SYS_PWM_AUTO_CHANNELS_ZONE 4 1110 #define SYS_PWM_AUTO_PWM_MIN 5 1111 #define SYS_PWM_AUTO_POINT1_PWM 6 1112 #define SYS_PWM_AUTO_POINT2_PWM 7 1113 1114 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr, 1115 char *buf) 1116 { 1117 struct dme1737_data *data = dme1737_update_device(dev); 1118 struct sensor_device_attribute_2 1119 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 1120 int ix = sensor_attr_2->index; 1121 int fn = sensor_attr_2->nr; 1122 int res; 1123 1124 switch (fn) { 1125 case SYS_PWM: 1126 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) { 1127 res = 255; 1128 } else { 1129 res = data->pwm[ix]; 1130 } 1131 break; 1132 case SYS_PWM_FREQ: 1133 res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]); 1134 break; 1135 case SYS_PWM_ENABLE: 1136 if (ix > 3) { 1137 res = 1; /* pwm[5-6] hard-wired to manual mode */ 1138 } else { 1139 res = PWM_EN_FROM_REG(data->pwm_config[ix]); 1140 } 1141 break; 1142 case SYS_PWM_RAMP_RATE: 1143 /* Only valid for pwm[1-3] */ 1144 res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix); 1145 break; 1146 case SYS_PWM_AUTO_CHANNELS_ZONE: 1147 /* Only valid for pwm[1-3] */ 1148 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { 1149 res = PWM_ACZ_FROM_REG(data->pwm_config[ix]); 1150 } else { 1151 res = data->pwm_acz[ix]; 1152 } 1153 break; 1154 case SYS_PWM_AUTO_PWM_MIN: 1155 /* Only valid for pwm[1-3] */ 1156 if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) { 1157 res = data->pwm_min[ix]; 1158 } else { 1159 res = 0; 1160 } 1161 break; 1162 case SYS_PWM_AUTO_POINT1_PWM: 1163 /* Only valid for pwm[1-3] */ 1164 res = data->pwm_min[ix]; 1165 break; 1166 case SYS_PWM_AUTO_POINT2_PWM: 1167 /* Only valid for pwm[1-3] */ 1168 res = 255; /* hard-wired */ 1169 break; 1170 default: 1171 res = 0; 1172 dev_dbg(dev, "Unknown function %d.\n", fn); 1173 } 1174 1175 return sprintf(buf, "%d\n", res); 1176 } 1177 1178 static struct attribute *dme1737_pwm_chmod_attr[]; 1179 static void dme1737_chmod_file(struct device*, struct attribute*, mode_t); 1180 1181 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, 1182 const char *buf, size_t count) 1183 { 1184 struct dme1737_data *data = dev_get_drvdata(dev); 1185 struct sensor_device_attribute_2 1186 *sensor_attr_2 = to_sensor_dev_attr_2(attr); 1187 int ix = sensor_attr_2->index; 1188 int fn = sensor_attr_2->nr; 1189 long val = simple_strtol(buf, NULL, 10); 1190 1191 mutex_lock(&data->update_lock); 1192 switch (fn) { 1193 case SYS_PWM: 1194 data->pwm[ix] = SENSORS_LIMIT(val, 0, 255); 1195 dme1737_write(data, DME1737_REG_PWM(ix), data->pwm[ix]); 1196 break; 1197 case SYS_PWM_FREQ: 1198 data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(data, 1199 DME1737_REG_PWM_FREQ(ix))); 1200 dme1737_write(data, DME1737_REG_PWM_FREQ(ix), 1201 data->pwm_freq[ix]); 1202 break; 1203 case SYS_PWM_ENABLE: 1204 /* Only valid for pwm[1-3] */ 1205 if (val < 0 || val > 2) { 1206 count = -EINVAL; 1207 dev_warn(dev, "PWM enable %ld not " 1208 "supported. Choose one of 0, 1, or 2.\n", 1209 val); 1210 goto exit; 1211 } 1212 /* Refresh the cache */ 1213 data->pwm_config[ix] = dme1737_read(data, 1214 DME1737_REG_PWM_CONFIG(ix)); 1215 if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) { 1216 /* Bail out if no change */ 1217 goto exit; 1218 } 1219 /* Do some housekeeping if we are currently in auto mode */ 1220 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { 1221 /* Save the current zone channel assignment */ 1222 data->pwm_acz[ix] = PWM_ACZ_FROM_REG( 1223 data->pwm_config[ix]); 1224 /* Save the current ramp rate state and disable it */ 1225 data->pwm_rr[ix > 0] = dme1737_read(data, 1226 DME1737_REG_PWM_RR(ix > 0)); 1227 data->pwm_rr_en &= ~(1 << ix); 1228 if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) { 1229 data->pwm_rr_en |= (1 << ix); 1230 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix, 1231 data->pwm_rr[ix > 0]); 1232 dme1737_write(data, 1233 DME1737_REG_PWM_RR(ix > 0), 1234 data->pwm_rr[ix > 0]); 1235 } 1236 } 1237 /* Set the new PWM mode */ 1238 switch (val) { 1239 case 0: 1240 /* Change permissions of pwm[ix] to read-only */ 1241 dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], 1242 S_IRUGO); 1243 /* Turn fan fully on */ 1244 data->pwm_config[ix] = PWM_EN_TO_REG(0, 1245 data->pwm_config[ix]); 1246 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), 1247 data->pwm_config[ix]); 1248 break; 1249 case 1: 1250 /* Turn on manual mode */ 1251 data->pwm_config[ix] = PWM_EN_TO_REG(1, 1252 data->pwm_config[ix]); 1253 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), 1254 data->pwm_config[ix]); 1255 /* Change permissions of pwm[ix] to read-writeable */ 1256 dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], 1257 S_IRUGO | S_IWUSR); 1258 break; 1259 case 2: 1260 /* Change permissions of pwm[ix] to read-only */ 1261 dme1737_chmod_file(dev, dme1737_pwm_chmod_attr[ix], 1262 S_IRUGO); 1263 /* Turn on auto mode using the saved zone channel 1264 * assignment */ 1265 data->pwm_config[ix] = PWM_ACZ_TO_REG( 1266 data->pwm_acz[ix], 1267 data->pwm_config[ix]); 1268 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), 1269 data->pwm_config[ix]); 1270 /* Enable PWM ramp rate if previously enabled */ 1271 if (data->pwm_rr_en & (1 << ix)) { 1272 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix, 1273 dme1737_read(data, 1274 DME1737_REG_PWM_RR(ix > 0))); 1275 dme1737_write(data, 1276 DME1737_REG_PWM_RR(ix > 0), 1277 data->pwm_rr[ix > 0]); 1278 } 1279 break; 1280 } 1281 break; 1282 case SYS_PWM_RAMP_RATE: 1283 /* Only valid for pwm[1-3] */ 1284 /* Refresh the cache */ 1285 data->pwm_config[ix] = dme1737_read(data, 1286 DME1737_REG_PWM_CONFIG(ix)); 1287 data->pwm_rr[ix > 0] = dme1737_read(data, 1288 DME1737_REG_PWM_RR(ix > 0)); 1289 /* Set the ramp rate value */ 1290 if (val > 0) { 1291 data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix, 1292 data->pwm_rr[ix > 0]); 1293 } 1294 /* Enable/disable the feature only if the associated PWM 1295 * output is in automatic mode. */ 1296 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { 1297 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix, 1298 data->pwm_rr[ix > 0]); 1299 } 1300 dme1737_write(data, DME1737_REG_PWM_RR(ix > 0), 1301 data->pwm_rr[ix > 0]); 1302 break; 1303 case SYS_PWM_AUTO_CHANNELS_ZONE: 1304 /* Only valid for pwm[1-3] */ 1305 if (!(val == 1 || val == 2 || val == 4 || 1306 val == 6 || val == 7)) { 1307 count = -EINVAL; 1308 dev_warn(dev, "PWM auto channels zone %ld " 1309 "not supported. Choose one of 1, 2, 4, 6, " 1310 "or 7.\n", val); 1311 goto exit; 1312 } 1313 /* Refresh the cache */ 1314 data->pwm_config[ix] = dme1737_read(data, 1315 DME1737_REG_PWM_CONFIG(ix)); 1316 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) { 1317 /* PWM is already in auto mode so update the temp 1318 * channel assignment */ 1319 data->pwm_config[ix] = PWM_ACZ_TO_REG(val, 1320 data->pwm_config[ix]); 1321 dme1737_write(data, DME1737_REG_PWM_CONFIG(ix), 1322 data->pwm_config[ix]); 1323 } else { 1324 /* PWM is not in auto mode so we save the temp 1325 * channel assignment for later use */ 1326 data->pwm_acz[ix] = val; 1327 } 1328 break; 1329 case SYS_PWM_AUTO_PWM_MIN: 1330 /* Only valid for pwm[1-3] */ 1331 /* Refresh the cache */ 1332 data->pwm_min[ix] = dme1737_read(data, 1333 DME1737_REG_PWM_MIN(ix)); 1334 /* There are only 2 values supported for the auto_pwm_min 1335 * value: 0 or auto_point1_pwm. So if the temperature drops 1336 * below the auto_point1_temp_hyst value, the fan either turns 1337 * off or runs at auto_point1_pwm duty-cycle. */ 1338 if (val > ((data->pwm_min[ix] + 1) / 2)) { 1339 data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix, 1340 dme1737_read(data, 1341 DME1737_REG_PWM_RR(0))); 1342 } else { 1343 data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix, 1344 dme1737_read(data, 1345 DME1737_REG_PWM_RR(0))); 1346 } 1347 dme1737_write(data, DME1737_REG_PWM_RR(0), 1348 data->pwm_rr[0]); 1349 break; 1350 case SYS_PWM_AUTO_POINT1_PWM: 1351 /* Only valid for pwm[1-3] */ 1352 data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255); 1353 dme1737_write(data, DME1737_REG_PWM_MIN(ix), 1354 data->pwm_min[ix]); 1355 break; 1356 default: 1357 dev_dbg(dev, "Unknown function %d.\n", fn); 1358 } 1359 exit: 1360 mutex_unlock(&data->update_lock); 1361 1362 return count; 1363 } 1364 1365 /* --------------------------------------------------------------------- 1366 * Miscellaneous sysfs attributes 1367 * --------------------------------------------------------------------- */ 1368 1369 static ssize_t show_vrm(struct device *dev, struct device_attribute *attr, 1370 char *buf) 1371 { 1372 struct i2c_client *client = to_i2c_client(dev); 1373 struct dme1737_data *data = i2c_get_clientdata(client); 1374 1375 return sprintf(buf, "%d\n", data->vrm); 1376 } 1377 1378 static ssize_t set_vrm(struct device *dev, struct device_attribute *attr, 1379 const char *buf, size_t count) 1380 { 1381 struct dme1737_data *data = dev_get_drvdata(dev); 1382 long val = simple_strtol(buf, NULL, 10); 1383 1384 data->vrm = val; 1385 return count; 1386 } 1387 1388 static ssize_t show_vid(struct device *dev, struct device_attribute *attr, 1389 char *buf) 1390 { 1391 struct dme1737_data *data = dme1737_update_device(dev); 1392 1393 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); 1394 } 1395 1396 static ssize_t show_name(struct device *dev, struct device_attribute *attr, 1397 char *buf) 1398 { 1399 struct dme1737_data *data = dev_get_drvdata(dev); 1400 1401 return sprintf(buf, "%s\n", data->name); 1402 } 1403 1404 /* --------------------------------------------------------------------- 1405 * Sysfs device attribute defines and structs 1406 * --------------------------------------------------------------------- */ 1407 1408 /* Voltages 0-6 */ 1409 1410 #define SENSOR_DEVICE_ATTR_IN(ix) \ 1411 static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \ 1412 show_in, NULL, SYS_IN_INPUT, ix); \ 1413 static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \ 1414 show_in, set_in, SYS_IN_MIN, ix); \ 1415 static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \ 1416 show_in, set_in, SYS_IN_MAX, ix); \ 1417 static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \ 1418 show_in, NULL, SYS_IN_ALARM, ix) 1419 1420 SENSOR_DEVICE_ATTR_IN(0); 1421 SENSOR_DEVICE_ATTR_IN(1); 1422 SENSOR_DEVICE_ATTR_IN(2); 1423 SENSOR_DEVICE_ATTR_IN(3); 1424 SENSOR_DEVICE_ATTR_IN(4); 1425 SENSOR_DEVICE_ATTR_IN(5); 1426 SENSOR_DEVICE_ATTR_IN(6); 1427 1428 /* Temperatures 1-3 */ 1429 1430 #define SENSOR_DEVICE_ATTR_TEMP(ix) \ 1431 static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \ 1432 show_temp, NULL, SYS_TEMP_INPUT, ix-1); \ 1433 static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \ 1434 show_temp, set_temp, SYS_TEMP_MIN, ix-1); \ 1435 static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \ 1436 show_temp, set_temp, SYS_TEMP_MAX, ix-1); \ 1437 static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \ 1438 show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \ 1439 static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \ 1440 show_temp, NULL, SYS_TEMP_ALARM, ix-1); \ 1441 static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \ 1442 show_temp, NULL, SYS_TEMP_FAULT, ix-1) 1443 1444 SENSOR_DEVICE_ATTR_TEMP(1); 1445 SENSOR_DEVICE_ATTR_TEMP(2); 1446 SENSOR_DEVICE_ATTR_TEMP(3); 1447 1448 /* Zones 1-3 */ 1449 1450 #define SENSOR_DEVICE_ATTR_ZONE(ix) \ 1451 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \ 1452 show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \ 1453 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \ 1454 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \ 1455 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \ 1456 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \ 1457 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \ 1458 show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \ 1459 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \ 1460 show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1) 1461 1462 SENSOR_DEVICE_ATTR_ZONE(1); 1463 SENSOR_DEVICE_ATTR_ZONE(2); 1464 SENSOR_DEVICE_ATTR_ZONE(3); 1465 1466 /* Fans 1-4 */ 1467 1468 #define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \ 1469 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ 1470 show_fan, NULL, SYS_FAN_INPUT, ix-1); \ 1471 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ 1472 show_fan, set_fan, SYS_FAN_MIN, ix-1); \ 1473 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ 1474 show_fan, NULL, SYS_FAN_ALARM, ix-1); \ 1475 static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \ 1476 show_fan, set_fan, SYS_FAN_TYPE, ix-1) 1477 1478 SENSOR_DEVICE_ATTR_FAN_1TO4(1); 1479 SENSOR_DEVICE_ATTR_FAN_1TO4(2); 1480 SENSOR_DEVICE_ATTR_FAN_1TO4(3); 1481 SENSOR_DEVICE_ATTR_FAN_1TO4(4); 1482 1483 /* Fans 5-6 */ 1484 1485 #define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \ 1486 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \ 1487 show_fan, NULL, SYS_FAN_INPUT, ix-1); \ 1488 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \ 1489 show_fan, set_fan, SYS_FAN_MIN, ix-1); \ 1490 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \ 1491 show_fan, NULL, SYS_FAN_ALARM, ix-1); \ 1492 static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \ 1493 show_fan, set_fan, SYS_FAN_MAX, ix-1) 1494 1495 SENSOR_DEVICE_ATTR_FAN_5TO6(5); 1496 SENSOR_DEVICE_ATTR_FAN_5TO6(6); 1497 1498 /* PWMs 1-3 */ 1499 1500 #define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \ 1501 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \ 1502 show_pwm, set_pwm, SYS_PWM, ix-1); \ 1503 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \ 1504 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ 1505 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ 1506 show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \ 1507 static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \ 1508 show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \ 1509 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \ 1510 show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \ 1511 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \ 1512 show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \ 1513 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \ 1514 show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \ 1515 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \ 1516 show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1) 1517 1518 SENSOR_DEVICE_ATTR_PWM_1TO3(1); 1519 SENSOR_DEVICE_ATTR_PWM_1TO3(2); 1520 SENSOR_DEVICE_ATTR_PWM_1TO3(3); 1521 1522 /* PWMs 5-6 */ 1523 1524 #define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \ 1525 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \ 1526 show_pwm, set_pwm, SYS_PWM, ix-1); \ 1527 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \ 1528 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \ 1529 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \ 1530 show_pwm, NULL, SYS_PWM_ENABLE, ix-1) 1531 1532 SENSOR_DEVICE_ATTR_PWM_5TO6(5); 1533 SENSOR_DEVICE_ATTR_PWM_5TO6(6); 1534 1535 /* Misc */ 1536 1537 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm); 1538 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL); 1539 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */ 1540 1541 /* This struct holds all the attributes that are always present and need to be 1542 * created unconditionally. The attributes that need modification of their 1543 * permissions are created read-only and write permissions are added or removed 1544 * on the fly when required */ 1545 static struct attribute *dme1737_attr[] ={ 1546 /* Voltages */ 1547 &sensor_dev_attr_in0_input.dev_attr.attr, 1548 &sensor_dev_attr_in0_min.dev_attr.attr, 1549 &sensor_dev_attr_in0_max.dev_attr.attr, 1550 &sensor_dev_attr_in0_alarm.dev_attr.attr, 1551 &sensor_dev_attr_in1_input.dev_attr.attr, 1552 &sensor_dev_attr_in1_min.dev_attr.attr, 1553 &sensor_dev_attr_in1_max.dev_attr.attr, 1554 &sensor_dev_attr_in1_alarm.dev_attr.attr, 1555 &sensor_dev_attr_in2_input.dev_attr.attr, 1556 &sensor_dev_attr_in2_min.dev_attr.attr, 1557 &sensor_dev_attr_in2_max.dev_attr.attr, 1558 &sensor_dev_attr_in2_alarm.dev_attr.attr, 1559 &sensor_dev_attr_in3_input.dev_attr.attr, 1560 &sensor_dev_attr_in3_min.dev_attr.attr, 1561 &sensor_dev_attr_in3_max.dev_attr.attr, 1562 &sensor_dev_attr_in3_alarm.dev_attr.attr, 1563 &sensor_dev_attr_in4_input.dev_attr.attr, 1564 &sensor_dev_attr_in4_min.dev_attr.attr, 1565 &sensor_dev_attr_in4_max.dev_attr.attr, 1566 &sensor_dev_attr_in4_alarm.dev_attr.attr, 1567 &sensor_dev_attr_in5_input.dev_attr.attr, 1568 &sensor_dev_attr_in5_min.dev_attr.attr, 1569 &sensor_dev_attr_in5_max.dev_attr.attr, 1570 &sensor_dev_attr_in5_alarm.dev_attr.attr, 1571 &sensor_dev_attr_in6_input.dev_attr.attr, 1572 &sensor_dev_attr_in6_min.dev_attr.attr, 1573 &sensor_dev_attr_in6_max.dev_attr.attr, 1574 &sensor_dev_attr_in6_alarm.dev_attr.attr, 1575 /* Temperatures */ 1576 &sensor_dev_attr_temp1_input.dev_attr.attr, 1577 &sensor_dev_attr_temp1_min.dev_attr.attr, 1578 &sensor_dev_attr_temp1_max.dev_attr.attr, 1579 &sensor_dev_attr_temp1_alarm.dev_attr.attr, 1580 &sensor_dev_attr_temp1_fault.dev_attr.attr, 1581 &sensor_dev_attr_temp2_input.dev_attr.attr, 1582 &sensor_dev_attr_temp2_min.dev_attr.attr, 1583 &sensor_dev_attr_temp2_max.dev_attr.attr, 1584 &sensor_dev_attr_temp2_alarm.dev_attr.attr, 1585 &sensor_dev_attr_temp2_fault.dev_attr.attr, 1586 &sensor_dev_attr_temp3_input.dev_attr.attr, 1587 &sensor_dev_attr_temp3_min.dev_attr.attr, 1588 &sensor_dev_attr_temp3_max.dev_attr.attr, 1589 &sensor_dev_attr_temp3_alarm.dev_attr.attr, 1590 &sensor_dev_attr_temp3_fault.dev_attr.attr, 1591 /* Zones */ 1592 &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr, 1593 &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr, 1594 &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr, 1595 &sensor_dev_attr_zone1_auto_channels_temp.dev_attr.attr, 1596 &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr, 1597 &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr, 1598 &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr, 1599 &sensor_dev_attr_zone2_auto_channels_temp.dev_attr.attr, 1600 &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, 1601 &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, 1602 &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr, 1603 &sensor_dev_attr_zone3_auto_channels_temp.dev_attr.attr, 1604 NULL 1605 }; 1606 1607 static const struct attribute_group dme1737_group = { 1608 .attrs = dme1737_attr, 1609 }; 1610 1611 /* The following struct holds misc attributes, which are not available in all 1612 * chips. Their creation depends on the chip type which is determined during 1613 * module load. */ 1614 static struct attribute *dme1737_misc_attr[] = { 1615 /* Temperatures */ 1616 &sensor_dev_attr_temp1_offset.dev_attr.attr, 1617 &sensor_dev_attr_temp2_offset.dev_attr.attr, 1618 &sensor_dev_attr_temp3_offset.dev_attr.attr, 1619 /* Zones */ 1620 &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr, 1621 &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr, 1622 &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr, 1623 /* Misc */ 1624 &dev_attr_vrm.attr, 1625 &dev_attr_cpu0_vid.attr, 1626 NULL 1627 }; 1628 1629 static const struct attribute_group dme1737_misc_group = { 1630 .attrs = dme1737_misc_attr, 1631 }; 1632 1633 /* The following structs hold the PWM attributes, some of which are optional. 1634 * Their creation depends on the chip configuration which is determined during 1635 * module load. */ 1636 static struct attribute *dme1737_pwm1_attr[] = { 1637 &sensor_dev_attr_pwm1.dev_attr.attr, 1638 &sensor_dev_attr_pwm1_freq.dev_attr.attr, 1639 &sensor_dev_attr_pwm1_enable.dev_attr.attr, 1640 &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr, 1641 &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr, 1642 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, 1643 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, 1644 NULL 1645 }; 1646 static struct attribute *dme1737_pwm2_attr[] = { 1647 &sensor_dev_attr_pwm2.dev_attr.attr, 1648 &sensor_dev_attr_pwm2_freq.dev_attr.attr, 1649 &sensor_dev_attr_pwm2_enable.dev_attr.attr, 1650 &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr, 1651 &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr, 1652 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, 1653 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, 1654 NULL 1655 }; 1656 static struct attribute *dme1737_pwm3_attr[] = { 1657 &sensor_dev_attr_pwm3.dev_attr.attr, 1658 &sensor_dev_attr_pwm3_freq.dev_attr.attr, 1659 &sensor_dev_attr_pwm3_enable.dev_attr.attr, 1660 &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr, 1661 &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr, 1662 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, 1663 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, 1664 NULL 1665 }; 1666 static struct attribute *dme1737_pwm5_attr[] = { 1667 &sensor_dev_attr_pwm5.dev_attr.attr, 1668 &sensor_dev_attr_pwm5_freq.dev_attr.attr, 1669 &sensor_dev_attr_pwm5_enable.dev_attr.attr, 1670 NULL 1671 }; 1672 static struct attribute *dme1737_pwm6_attr[] = { 1673 &sensor_dev_attr_pwm6.dev_attr.attr, 1674 &sensor_dev_attr_pwm6_freq.dev_attr.attr, 1675 &sensor_dev_attr_pwm6_enable.dev_attr.attr, 1676 NULL 1677 }; 1678 1679 static const struct attribute_group dme1737_pwm_group[] = { 1680 { .attrs = dme1737_pwm1_attr }, 1681 { .attrs = dme1737_pwm2_attr }, 1682 { .attrs = dme1737_pwm3_attr }, 1683 { .attrs = NULL }, 1684 { .attrs = dme1737_pwm5_attr }, 1685 { .attrs = dme1737_pwm6_attr }, 1686 }; 1687 1688 /* The following struct holds misc PWM attributes, which are not available in 1689 * all chips. Their creation depends on the chip type which is determined 1690 * during module load. */ 1691 static struct attribute *dme1737_pwm_misc_attr[] = { 1692 &sensor_dev_attr_pwm1_auto_pwm_min.dev_attr.attr, 1693 &sensor_dev_attr_pwm2_auto_pwm_min.dev_attr.attr, 1694 &sensor_dev_attr_pwm3_auto_pwm_min.dev_attr.attr, 1695 }; 1696 1697 /* The following structs hold the fan attributes, some of which are optional. 1698 * Their creation depends on the chip configuration which is determined during 1699 * module load. */ 1700 static struct attribute *dme1737_fan1_attr[] = { 1701 &sensor_dev_attr_fan1_input.dev_attr.attr, 1702 &sensor_dev_attr_fan1_min.dev_attr.attr, 1703 &sensor_dev_attr_fan1_alarm.dev_attr.attr, 1704 &sensor_dev_attr_fan1_type.dev_attr.attr, 1705 NULL 1706 }; 1707 static struct attribute *dme1737_fan2_attr[] = { 1708 &sensor_dev_attr_fan2_input.dev_attr.attr, 1709 &sensor_dev_attr_fan2_min.dev_attr.attr, 1710 &sensor_dev_attr_fan2_alarm.dev_attr.attr, 1711 &sensor_dev_attr_fan2_type.dev_attr.attr, 1712 NULL 1713 }; 1714 static struct attribute *dme1737_fan3_attr[] = { 1715 &sensor_dev_attr_fan3_input.dev_attr.attr, 1716 &sensor_dev_attr_fan3_min.dev_attr.attr, 1717 &sensor_dev_attr_fan3_alarm.dev_attr.attr, 1718 &sensor_dev_attr_fan3_type.dev_attr.attr, 1719 NULL 1720 }; 1721 static struct attribute *dme1737_fan4_attr[] = { 1722 &sensor_dev_attr_fan4_input.dev_attr.attr, 1723 &sensor_dev_attr_fan4_min.dev_attr.attr, 1724 &sensor_dev_attr_fan4_alarm.dev_attr.attr, 1725 &sensor_dev_attr_fan4_type.dev_attr.attr, 1726 NULL 1727 }; 1728 static struct attribute *dme1737_fan5_attr[] = { 1729 &sensor_dev_attr_fan5_input.dev_attr.attr, 1730 &sensor_dev_attr_fan5_min.dev_attr.attr, 1731 &sensor_dev_attr_fan5_alarm.dev_attr.attr, 1732 &sensor_dev_attr_fan5_max.dev_attr.attr, 1733 NULL 1734 }; 1735 static struct attribute *dme1737_fan6_attr[] = { 1736 &sensor_dev_attr_fan6_input.dev_attr.attr, 1737 &sensor_dev_attr_fan6_min.dev_attr.attr, 1738 &sensor_dev_attr_fan6_alarm.dev_attr.attr, 1739 &sensor_dev_attr_fan6_max.dev_attr.attr, 1740 NULL 1741 }; 1742 1743 static const struct attribute_group dme1737_fan_group[] = { 1744 { .attrs = dme1737_fan1_attr }, 1745 { .attrs = dme1737_fan2_attr }, 1746 { .attrs = dme1737_fan3_attr }, 1747 { .attrs = dme1737_fan4_attr }, 1748 { .attrs = dme1737_fan5_attr }, 1749 { .attrs = dme1737_fan6_attr }, 1750 }; 1751 1752 /* The permissions of the following zone attributes are changed to read- 1753 * writeable if the chip is *not* locked. Otherwise they stay read-only. */ 1754 static struct attribute *dme1737_zone_chmod_attr[] = { 1755 &sensor_dev_attr_zone1_auto_point1_temp.dev_attr.attr, 1756 &sensor_dev_attr_zone1_auto_point2_temp.dev_attr.attr, 1757 &sensor_dev_attr_zone1_auto_point3_temp.dev_attr.attr, 1758 &sensor_dev_attr_zone2_auto_point1_temp.dev_attr.attr, 1759 &sensor_dev_attr_zone2_auto_point2_temp.dev_attr.attr, 1760 &sensor_dev_attr_zone2_auto_point3_temp.dev_attr.attr, 1761 &sensor_dev_attr_zone3_auto_point1_temp.dev_attr.attr, 1762 &sensor_dev_attr_zone3_auto_point2_temp.dev_attr.attr, 1763 &sensor_dev_attr_zone3_auto_point3_temp.dev_attr.attr, 1764 NULL 1765 }; 1766 1767 static const struct attribute_group dme1737_zone_chmod_group = { 1768 .attrs = dme1737_zone_chmod_attr, 1769 }; 1770 1771 /* The permissions of the following PWM attributes are changed to read- 1772 * writeable if the chip is *not* locked and the respective PWM is available. 1773 * Otherwise they stay read-only. */ 1774 static struct attribute *dme1737_pwm1_chmod_attr[] = { 1775 &sensor_dev_attr_pwm1_freq.dev_attr.attr, 1776 &sensor_dev_attr_pwm1_enable.dev_attr.attr, 1777 &sensor_dev_attr_pwm1_ramp_rate.dev_attr.attr, 1778 &sensor_dev_attr_pwm1_auto_channels_zone.dev_attr.attr, 1779 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, 1780 NULL 1781 }; 1782 static struct attribute *dme1737_pwm2_chmod_attr[] = { 1783 &sensor_dev_attr_pwm2_freq.dev_attr.attr, 1784 &sensor_dev_attr_pwm2_enable.dev_attr.attr, 1785 &sensor_dev_attr_pwm2_ramp_rate.dev_attr.attr, 1786 &sensor_dev_attr_pwm2_auto_channels_zone.dev_attr.attr, 1787 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, 1788 NULL 1789 }; 1790 static struct attribute *dme1737_pwm3_chmod_attr[] = { 1791 &sensor_dev_attr_pwm3_freq.dev_attr.attr, 1792 &sensor_dev_attr_pwm3_enable.dev_attr.attr, 1793 &sensor_dev_attr_pwm3_ramp_rate.dev_attr.attr, 1794 &sensor_dev_attr_pwm3_auto_channels_zone.dev_attr.attr, 1795 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, 1796 NULL 1797 }; 1798 static struct attribute *dme1737_pwm5_chmod_attr[] = { 1799 &sensor_dev_attr_pwm5.dev_attr.attr, 1800 &sensor_dev_attr_pwm5_freq.dev_attr.attr, 1801 NULL 1802 }; 1803 static struct attribute *dme1737_pwm6_chmod_attr[] = { 1804 &sensor_dev_attr_pwm6.dev_attr.attr, 1805 &sensor_dev_attr_pwm6_freq.dev_attr.attr, 1806 NULL 1807 }; 1808 1809 static const struct attribute_group dme1737_pwm_chmod_group[] = { 1810 { .attrs = dme1737_pwm1_chmod_attr }, 1811 { .attrs = dme1737_pwm2_chmod_attr }, 1812 { .attrs = dme1737_pwm3_chmod_attr }, 1813 { .attrs = NULL }, 1814 { .attrs = dme1737_pwm5_chmod_attr }, 1815 { .attrs = dme1737_pwm6_chmod_attr }, 1816 }; 1817 1818 /* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the 1819 * chip is not locked. Otherwise they are read-only. */ 1820 static struct attribute *dme1737_pwm_chmod_attr[] = { 1821 &sensor_dev_attr_pwm1.dev_attr.attr, 1822 &sensor_dev_attr_pwm2.dev_attr.attr, 1823 &sensor_dev_attr_pwm3.dev_attr.attr, 1824 }; 1825 1826 /* --------------------------------------------------------------------- 1827 * Super-IO functions 1828 * --------------------------------------------------------------------- */ 1829 1830 static inline void dme1737_sio_enter(int sio_cip) 1831 { 1832 outb(0x55, sio_cip); 1833 } 1834 1835 static inline void dme1737_sio_exit(int sio_cip) 1836 { 1837 outb(0xaa, sio_cip); 1838 } 1839 1840 static inline int dme1737_sio_inb(int sio_cip, int reg) 1841 { 1842 outb(reg, sio_cip); 1843 return inb(sio_cip + 1); 1844 } 1845 1846 static inline void dme1737_sio_outb(int sio_cip, int reg, int val) 1847 { 1848 outb(reg, sio_cip); 1849 outb(val, sio_cip + 1); 1850 } 1851 1852 /* --------------------------------------------------------------------- 1853 * Device initialization 1854 * --------------------------------------------------------------------- */ 1855 1856 static int dme1737_i2c_get_features(int, struct dme1737_data*); 1857 1858 static void dme1737_chmod_file(struct device *dev, 1859 struct attribute *attr, mode_t mode) 1860 { 1861 if (sysfs_chmod_file(&dev->kobj, attr, mode)) { 1862 dev_warn(dev, "Failed to change permissions of %s.\n", 1863 attr->name); 1864 } 1865 } 1866 1867 static void dme1737_chmod_group(struct device *dev, 1868 const struct attribute_group *group, 1869 mode_t mode) 1870 { 1871 struct attribute **attr; 1872 1873 for (attr = group->attrs; *attr; attr++) { 1874 dme1737_chmod_file(dev, *attr, mode); 1875 } 1876 } 1877 1878 static void dme1737_remove_files(struct device *dev) 1879 { 1880 struct dme1737_data *data = dev_get_drvdata(dev); 1881 int ix; 1882 1883 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { 1884 if (data->has_fan & (1 << ix)) { 1885 sysfs_remove_group(&dev->kobj, 1886 &dme1737_fan_group[ix]); 1887 } 1888 } 1889 1890 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { 1891 if (data->has_pwm & (1 << ix)) { 1892 sysfs_remove_group(&dev->kobj, 1893 &dme1737_pwm_group[ix]); 1894 if (data->type != sch5027 && ix < 3) { 1895 sysfs_remove_file(&dev->kobj, 1896 dme1737_pwm_misc_attr[ix]); 1897 } 1898 } 1899 } 1900 1901 if (data->type != sch5027) { 1902 sysfs_remove_group(&dev->kobj, &dme1737_misc_group); 1903 } 1904 1905 sysfs_remove_group(&dev->kobj, &dme1737_group); 1906 1907 if (!data->client) { 1908 sysfs_remove_file(&dev->kobj, &dev_attr_name.attr); 1909 } 1910 } 1911 1912 static int dme1737_create_files(struct device *dev) 1913 { 1914 struct dme1737_data *data = dev_get_drvdata(dev); 1915 int err, ix; 1916 1917 /* Create a name attribute for ISA devices */ 1918 if (!data->client && 1919 (err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr))) { 1920 goto exit; 1921 } 1922 1923 /* Create standard sysfs attributes */ 1924 if ((err = sysfs_create_group(&dev->kobj, &dme1737_group))) { 1925 goto exit_remove; 1926 } 1927 1928 /* Create misc sysfs attributes */ 1929 if ((data->type != sch5027) && 1930 (err = sysfs_create_group(&dev->kobj, 1931 &dme1737_misc_group))) { 1932 goto exit_remove; 1933 } 1934 1935 /* Create fan sysfs attributes */ 1936 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { 1937 if (data->has_fan & (1 << ix)) { 1938 if ((err = sysfs_create_group(&dev->kobj, 1939 &dme1737_fan_group[ix]))) { 1940 goto exit_remove; 1941 } 1942 } 1943 } 1944 1945 /* Create PWM sysfs attributes */ 1946 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) { 1947 if (data->has_pwm & (1 << ix)) { 1948 if ((err = sysfs_create_group(&dev->kobj, 1949 &dme1737_pwm_group[ix]))) { 1950 goto exit_remove; 1951 } 1952 if (data->type != sch5027 && ix < 3 && 1953 (err = sysfs_create_file(&dev->kobj, 1954 dme1737_pwm_misc_attr[ix]))) { 1955 goto exit_remove; 1956 } 1957 } 1958 } 1959 1960 /* Inform if the device is locked. Otherwise change the permissions of 1961 * selected attributes from read-only to read-writeable. */ 1962 if (data->config & 0x02) { 1963 dev_info(dev, "Device is locked. Some attributes " 1964 "will be read-only.\n"); 1965 } else { 1966 /* Change permissions of zone sysfs attributes */ 1967 dme1737_chmod_group(dev, &dme1737_zone_chmod_group, 1968 S_IRUGO | S_IWUSR); 1969 1970 /* Change permissions of misc sysfs attributes */ 1971 if (data->type != sch5027) { 1972 dme1737_chmod_group(dev, &dme1737_misc_group, 1973 S_IRUGO | S_IWUSR); 1974 } 1975 1976 /* Change permissions of PWM sysfs attributes */ 1977 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_chmod_group); ix++) { 1978 if (data->has_pwm & (1 << ix)) { 1979 dme1737_chmod_group(dev, 1980 &dme1737_pwm_chmod_group[ix], 1981 S_IRUGO | S_IWUSR); 1982 if (data->type != sch5027 && ix < 3) { 1983 dme1737_chmod_file(dev, 1984 dme1737_pwm_misc_attr[ix], 1985 S_IRUGO | S_IWUSR); 1986 } 1987 } 1988 } 1989 1990 /* Change permissions of pwm[1-3] if in manual mode */ 1991 for (ix = 0; ix < 3; ix++) { 1992 if ((data->has_pwm & (1 << ix)) && 1993 (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) { 1994 dme1737_chmod_file(dev, 1995 dme1737_pwm_chmod_attr[ix], 1996 S_IRUGO | S_IWUSR); 1997 } 1998 } 1999 } 2000 2001 return 0; 2002 2003 exit_remove: 2004 dme1737_remove_files(dev); 2005 exit: 2006 return err; 2007 } 2008 2009 static int dme1737_init_device(struct device *dev) 2010 { 2011 struct dme1737_data *data = dev_get_drvdata(dev); 2012 struct i2c_client *client = data->client; 2013 int ix; 2014 u8 reg; 2015 2016 /* Point to the right nominal voltages array */ 2017 data->in_nominal = IN_NOMINAL(data->type); 2018 2019 data->config = dme1737_read(data, DME1737_REG_CONFIG); 2020 /* Inform if part is not monitoring/started */ 2021 if (!(data->config & 0x01)) { 2022 if (!force_start) { 2023 dev_err(dev, "Device is not monitoring. " 2024 "Use the force_start load parameter to " 2025 "override.\n"); 2026 return -EFAULT; 2027 } 2028 2029 /* Force monitoring */ 2030 data->config |= 0x01; 2031 dme1737_write(data, DME1737_REG_CONFIG, data->config); 2032 } 2033 /* Inform if part is not ready */ 2034 if (!(data->config & 0x04)) { 2035 dev_err(dev, "Device is not ready.\n"); 2036 return -EFAULT; 2037 } 2038 2039 /* Determine which optional fan and pwm features are enabled/present */ 2040 if (client) { /* I2C chip */ 2041 data->config2 = dme1737_read(data, DME1737_REG_CONFIG2); 2042 /* Check if optional fan3 input is enabled */ 2043 if (data->config2 & 0x04) { 2044 data->has_fan |= (1 << 2); 2045 } 2046 2047 /* Fan4 and pwm3 are only available if the client's I2C address 2048 * is the default 0x2e. Otherwise the I/Os associated with 2049 * these functions are used for addr enable/select. */ 2050 if (client->addr == 0x2e) { 2051 data->has_fan |= (1 << 3); 2052 data->has_pwm |= (1 << 2); 2053 } 2054 2055 /* Determine which of the optional fan[5-6] and pwm[5-6] 2056 * features are enabled. For this, we need to query the runtime 2057 * registers through the Super-IO LPC interface. Try both 2058 * config ports 0x2e and 0x4e. */ 2059 if (dme1737_i2c_get_features(0x2e, data) && 2060 dme1737_i2c_get_features(0x4e, data)) { 2061 dev_warn(dev, "Failed to query Super-IO for optional " 2062 "features.\n"); 2063 } 2064 } else { /* ISA chip */ 2065 /* Fan3 and pwm3 are always available. Fan[4-5] and pwm[5-6] 2066 * don't exist in the ISA chip. */ 2067 data->has_fan |= (1 << 2); 2068 data->has_pwm |= (1 << 2); 2069 } 2070 2071 /* Fan1, fan2, pwm1, and pwm2 are always present */ 2072 data->has_fan |= 0x03; 2073 data->has_pwm |= 0x03; 2074 2075 dev_info(dev, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, " 2076 "fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n", 2077 (data->has_pwm & (1 << 2)) ? "yes" : "no", 2078 (data->has_pwm & (1 << 4)) ? "yes" : "no", 2079 (data->has_pwm & (1 << 5)) ? "yes" : "no", 2080 (data->has_fan & (1 << 2)) ? "yes" : "no", 2081 (data->has_fan & (1 << 3)) ? "yes" : "no", 2082 (data->has_fan & (1 << 4)) ? "yes" : "no", 2083 (data->has_fan & (1 << 5)) ? "yes" : "no"); 2084 2085 reg = dme1737_read(data, DME1737_REG_TACH_PWM); 2086 /* Inform if fan-to-pwm mapping differs from the default */ 2087 if (client && reg != 0xa4) { /* I2C chip */ 2088 dev_warn(dev, "Non-standard fan to pwm mapping: " 2089 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, " 2090 "fan4->pwm%d. Please report to the driver " 2091 "maintainer.\n", 2092 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, 2093 ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1); 2094 } else if (!client && reg != 0x24) { /* ISA chip */ 2095 dev_warn(dev, "Non-standard fan to pwm mapping: " 2096 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. " 2097 "Please report to the driver maintainer.\n", 2098 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1, 2099 ((reg >> 4) & 0x03) + 1); 2100 } 2101 2102 /* Switch pwm[1-3] to manual mode if they are currently disabled and 2103 * set the duty-cycles to 0% (which is identical to the PWMs being 2104 * disabled). */ 2105 if (!(data->config & 0x02)) { 2106 for (ix = 0; ix < 3; ix++) { 2107 data->pwm_config[ix] = dme1737_read(data, 2108 DME1737_REG_PWM_CONFIG(ix)); 2109 if ((data->has_pwm & (1 << ix)) && 2110 (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) { 2111 dev_info(dev, "Switching pwm%d to " 2112 "manual mode.\n", ix + 1); 2113 data->pwm_config[ix] = PWM_EN_TO_REG(1, 2114 data->pwm_config[ix]); 2115 dme1737_write(data, DME1737_REG_PWM(ix), 0); 2116 dme1737_write(data, 2117 DME1737_REG_PWM_CONFIG(ix), 2118 data->pwm_config[ix]); 2119 } 2120 } 2121 } 2122 2123 /* Initialize the default PWM auto channels zone (acz) assignments */ 2124 data->pwm_acz[0] = 1; /* pwm1 -> zone1 */ 2125 data->pwm_acz[1] = 2; /* pwm2 -> zone2 */ 2126 data->pwm_acz[2] = 4; /* pwm3 -> zone3 */ 2127 2128 /* Set VRM */ 2129 if (data->type != sch5027) { 2130 data->vrm = vid_which_vrm(); 2131 } 2132 2133 return 0; 2134 } 2135 2136 /* --------------------------------------------------------------------- 2137 * I2C device detection and registration 2138 * --------------------------------------------------------------------- */ 2139 2140 static struct i2c_driver dme1737_i2c_driver; 2141 2142 static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data) 2143 { 2144 int err = 0, reg; 2145 u16 addr; 2146 2147 dme1737_sio_enter(sio_cip); 2148 2149 /* Check device ID 2150 * The DME1737 can return either 0x78 or 0x77 as its device ID. 2151 * The SCH5027 returns 0x89 as its device ID. */ 2152 reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); 2153 if (!(reg == 0x77 || reg == 0x78 || reg == 0x89)) { 2154 err = -ENODEV; 2155 goto exit; 2156 } 2157 2158 /* Select logical device A (runtime registers) */ 2159 dme1737_sio_outb(sio_cip, 0x07, 0x0a); 2160 2161 /* Get the base address of the runtime registers */ 2162 if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) | 2163 dme1737_sio_inb(sio_cip, 0x61))) { 2164 err = -ENODEV; 2165 goto exit; 2166 } 2167 2168 /* Read the runtime registers to determine which optional features 2169 * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set 2170 * to '10' if the respective feature is enabled. */ 2171 if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */ 2172 data->has_fan |= (1 << 5); 2173 } 2174 if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */ 2175 data->has_pwm |= (1 << 5); 2176 } 2177 if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */ 2178 data->has_fan |= (1 << 4); 2179 } 2180 if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */ 2181 data->has_pwm |= (1 << 4); 2182 } 2183 2184 exit: 2185 dme1737_sio_exit(sio_cip); 2186 2187 return err; 2188 } 2189 2190 /* Return 0 if detection is successful, -ENODEV otherwise */ 2191 static int dme1737_i2c_detect(struct i2c_client *client, int kind, 2192 struct i2c_board_info *info) 2193 { 2194 struct i2c_adapter *adapter = client->adapter; 2195 struct device *dev = &adapter->dev; 2196 u8 company, verstep = 0; 2197 const char *name; 2198 2199 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { 2200 return -ENODEV; 2201 } 2202 2203 /* A negative kind means that the driver was loaded with no force 2204 * parameter (default), so we must identify the chip. */ 2205 if (kind < 0) { 2206 company = i2c_smbus_read_byte_data(client, DME1737_REG_COMPANY); 2207 verstep = i2c_smbus_read_byte_data(client, DME1737_REG_VERSTEP); 2208 2209 if (company == DME1737_COMPANY_SMSC && 2210 (verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP) { 2211 kind = dme1737; 2212 } else if (company == DME1737_COMPANY_SMSC && 2213 verstep == SCH5027_VERSTEP) { 2214 kind = sch5027; 2215 } else { 2216 return -ENODEV; 2217 } 2218 } 2219 2220 if (kind == sch5027) { 2221 name = "sch5027"; 2222 } else { 2223 kind = dme1737; 2224 name = "dme1737"; 2225 } 2226 2227 dev_info(dev, "Found a %s chip at 0x%02x (rev 0x%02x).\n", 2228 kind == sch5027 ? "SCH5027" : "DME1737", client->addr, 2229 verstep); 2230 strlcpy(info->type, name, I2C_NAME_SIZE); 2231 2232 return 0; 2233 } 2234 2235 static int dme1737_i2c_probe(struct i2c_client *client, 2236 const struct i2c_device_id *id) 2237 { 2238 struct dme1737_data *data; 2239 struct device *dev = &client->dev; 2240 int err; 2241 2242 data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL); 2243 if (!data) { 2244 err = -ENOMEM; 2245 goto exit; 2246 } 2247 2248 i2c_set_clientdata(client, data); 2249 data->type = id->driver_data; 2250 data->client = client; 2251 data->name = client->name; 2252 mutex_init(&data->update_lock); 2253 2254 /* Initialize the DME1737 chip */ 2255 if ((err = dme1737_init_device(dev))) { 2256 dev_err(dev, "Failed to initialize device.\n"); 2257 goto exit_kfree; 2258 } 2259 2260 /* Create sysfs files */ 2261 if ((err = dme1737_create_files(dev))) { 2262 dev_err(dev, "Failed to create sysfs files.\n"); 2263 goto exit_kfree; 2264 } 2265 2266 /* Register device */ 2267 data->hwmon_dev = hwmon_device_register(dev); 2268 if (IS_ERR(data->hwmon_dev)) { 2269 dev_err(dev, "Failed to register device.\n"); 2270 err = PTR_ERR(data->hwmon_dev); 2271 goto exit_remove; 2272 } 2273 2274 return 0; 2275 2276 exit_remove: 2277 dme1737_remove_files(dev); 2278 exit_kfree: 2279 kfree(data); 2280 exit: 2281 return err; 2282 } 2283 2284 static int dme1737_i2c_remove(struct i2c_client *client) 2285 { 2286 struct dme1737_data *data = i2c_get_clientdata(client); 2287 2288 hwmon_device_unregister(data->hwmon_dev); 2289 dme1737_remove_files(&client->dev); 2290 2291 kfree(data); 2292 return 0; 2293 } 2294 2295 static const struct i2c_device_id dme1737_id[] = { 2296 { "dme1737", dme1737 }, 2297 { "sch5027", sch5027 }, 2298 { } 2299 }; 2300 MODULE_DEVICE_TABLE(i2c, dme1737_id); 2301 2302 static struct i2c_driver dme1737_i2c_driver = { 2303 .class = I2C_CLASS_HWMON, 2304 .driver = { 2305 .name = "dme1737", 2306 }, 2307 .probe = dme1737_i2c_probe, 2308 .remove = dme1737_i2c_remove, 2309 .id_table = dme1737_id, 2310 .detect = dme1737_i2c_detect, 2311 .address_data = &addr_data, 2312 }; 2313 2314 /* --------------------------------------------------------------------- 2315 * ISA device detection and registration 2316 * --------------------------------------------------------------------- */ 2317 2318 static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr) 2319 { 2320 int err = 0, reg; 2321 unsigned short base_addr; 2322 2323 dme1737_sio_enter(sio_cip); 2324 2325 /* Check device ID 2326 * We currently know about SCH3112 (0x7c), SCH3114 (0x7d), and 2327 * SCH3116 (0x7f). */ 2328 reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20); 2329 if (!(reg == 0x7c || reg == 0x7d || reg == 0x7f)) { 2330 err = -ENODEV; 2331 goto exit; 2332 } 2333 2334 /* Select logical device A (runtime registers) */ 2335 dme1737_sio_outb(sio_cip, 0x07, 0x0a); 2336 2337 /* Get the base address of the runtime registers */ 2338 if (!(base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) | 2339 dme1737_sio_inb(sio_cip, 0x61))) { 2340 printk(KERN_ERR "dme1737: Base address not set.\n"); 2341 err = -ENODEV; 2342 goto exit; 2343 } 2344 2345 /* Access to the hwmon registers is through an index/data register 2346 * pair located at offset 0x70/0x71. */ 2347 *addr = base_addr + 0x70; 2348 2349 exit: 2350 dme1737_sio_exit(sio_cip); 2351 return err; 2352 } 2353 2354 static int __init dme1737_isa_device_add(unsigned short addr) 2355 { 2356 struct resource res = { 2357 .start = addr, 2358 .end = addr + DME1737_EXTENT - 1, 2359 .name = "dme1737", 2360 .flags = IORESOURCE_IO, 2361 }; 2362 int err; 2363 2364 if (!(pdev = platform_device_alloc("dme1737", addr))) { 2365 printk(KERN_ERR "dme1737: Failed to allocate device.\n"); 2366 err = -ENOMEM; 2367 goto exit; 2368 } 2369 2370 if ((err = platform_device_add_resources(pdev, &res, 1))) { 2371 printk(KERN_ERR "dme1737: Failed to add device resource " 2372 "(err = %d).\n", err); 2373 goto exit_device_put; 2374 } 2375 2376 if ((err = platform_device_add(pdev))) { 2377 printk(KERN_ERR "dme1737: Failed to add device (err = %d).\n", 2378 err); 2379 goto exit_device_put; 2380 } 2381 2382 return 0; 2383 2384 exit_device_put: 2385 platform_device_put(pdev); 2386 pdev = NULL; 2387 exit: 2388 return err; 2389 } 2390 2391 static int __devinit dme1737_isa_probe(struct platform_device *pdev) 2392 { 2393 u8 company, device; 2394 struct resource *res; 2395 struct dme1737_data *data; 2396 struct device *dev = &pdev->dev; 2397 int err; 2398 2399 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 2400 if (!request_region(res->start, DME1737_EXTENT, "dme1737")) { 2401 dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n", 2402 (unsigned short)res->start, 2403 (unsigned short)res->start + DME1737_EXTENT - 1); 2404 err = -EBUSY; 2405 goto exit; 2406 } 2407 2408 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) { 2409 err = -ENOMEM; 2410 goto exit_release_region; 2411 } 2412 2413 data->addr = res->start; 2414 platform_set_drvdata(pdev, data); 2415 2416 /* Skip chip detection if module is loaded with force_id parameter */ 2417 if (!force_id) { 2418 company = dme1737_read(data, DME1737_REG_COMPANY); 2419 device = dme1737_read(data, DME1737_REG_DEVICE); 2420 2421 if (!((company == DME1737_COMPANY_SMSC) && 2422 (device == SCH311X_DEVICE))) { 2423 err = -ENODEV; 2424 goto exit_kfree; 2425 } 2426 } 2427 data->type = sch311x; 2428 2429 /* Fill in the remaining client fields and initialize the mutex */ 2430 data->name = "sch311x"; 2431 mutex_init(&data->update_lock); 2432 2433 dev_info(dev, "Found a SCH311x chip at 0x%04x\n", data->addr); 2434 2435 /* Initialize the chip */ 2436 if ((err = dme1737_init_device(dev))) { 2437 dev_err(dev, "Failed to initialize device.\n"); 2438 goto exit_kfree; 2439 } 2440 2441 /* Create sysfs files */ 2442 if ((err = dme1737_create_files(dev))) { 2443 dev_err(dev, "Failed to create sysfs files.\n"); 2444 goto exit_kfree; 2445 } 2446 2447 /* Register device */ 2448 data->hwmon_dev = hwmon_device_register(dev); 2449 if (IS_ERR(data->hwmon_dev)) { 2450 dev_err(dev, "Failed to register device.\n"); 2451 err = PTR_ERR(data->hwmon_dev); 2452 goto exit_remove_files; 2453 } 2454 2455 return 0; 2456 2457 exit_remove_files: 2458 dme1737_remove_files(dev); 2459 exit_kfree: 2460 platform_set_drvdata(pdev, NULL); 2461 kfree(data); 2462 exit_release_region: 2463 release_region(res->start, DME1737_EXTENT); 2464 exit: 2465 return err; 2466 } 2467 2468 static int __devexit dme1737_isa_remove(struct platform_device *pdev) 2469 { 2470 struct dme1737_data *data = platform_get_drvdata(pdev); 2471 2472 hwmon_device_unregister(data->hwmon_dev); 2473 dme1737_remove_files(&pdev->dev); 2474 release_region(data->addr, DME1737_EXTENT); 2475 platform_set_drvdata(pdev, NULL); 2476 kfree(data); 2477 2478 return 0; 2479 } 2480 2481 static struct platform_driver dme1737_isa_driver = { 2482 .driver = { 2483 .owner = THIS_MODULE, 2484 .name = "dme1737", 2485 }, 2486 .probe = dme1737_isa_probe, 2487 .remove = __devexit_p(dme1737_isa_remove), 2488 }; 2489 2490 /* --------------------------------------------------------------------- 2491 * Module initialization and cleanup 2492 * --------------------------------------------------------------------- */ 2493 2494 static int __init dme1737_init(void) 2495 { 2496 int err; 2497 unsigned short addr; 2498 2499 if ((err = i2c_add_driver(&dme1737_i2c_driver))) { 2500 goto exit; 2501 } 2502 2503 if (dme1737_isa_detect(0x2e, &addr) && 2504 dme1737_isa_detect(0x4e, &addr) && 2505 (!probe_all_addr || 2506 (dme1737_isa_detect(0x162e, &addr) && 2507 dme1737_isa_detect(0x164e, &addr)))) { 2508 /* Return 0 if we didn't find an ISA device */ 2509 return 0; 2510 } 2511 2512 if ((err = platform_driver_register(&dme1737_isa_driver))) { 2513 goto exit_del_i2c_driver; 2514 } 2515 2516 /* Sets global pdev as a side effect */ 2517 if ((err = dme1737_isa_device_add(addr))) { 2518 goto exit_del_isa_driver; 2519 } 2520 2521 return 0; 2522 2523 exit_del_isa_driver: 2524 platform_driver_unregister(&dme1737_isa_driver); 2525 exit_del_i2c_driver: 2526 i2c_del_driver(&dme1737_i2c_driver); 2527 exit: 2528 return err; 2529 } 2530 2531 static void __exit dme1737_exit(void) 2532 { 2533 if (pdev) { 2534 platform_device_unregister(pdev); 2535 platform_driver_unregister(&dme1737_isa_driver); 2536 } 2537 2538 i2c_del_driver(&dme1737_i2c_driver); 2539 } 2540 2541 MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>"); 2542 MODULE_DESCRIPTION("DME1737 sensors"); 2543 MODULE_LICENSE("GPL"); 2544 2545 module_init(dme1737_init); 2546 module_exit(dme1737_exit); 2547