xref: /linux/drivers/hwmon/coretemp.c (revision d229807f669ba3dea9f64467ee965051c4366aed)
1 /*
2  * coretemp.c - Linux kernel module for hardware monitoring
3  *
4  * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
5  *
6  * Inspired from many hwmon drivers
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; version 2 of the License.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20  * 02110-1301 USA.
21  */
22 
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/pci.h>
38 #include <linux/smp.h>
39 #include <linux/moduleparam.h>
40 #include <asm/msr.h>
41 #include <asm/processor.h>
42 
43 #define DRVNAME	"coretemp"
44 
45 /*
46  * force_tjmax only matters when TjMax can't be read from the CPU itself.
47  * When set, it replaces the driver's suboptimal heuristic.
48  */
49 static int force_tjmax;
50 module_param_named(tjmax, force_tjmax, int, 0444);
51 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
52 
53 #define BASE_SYSFS_ATTR_NO	2	/* Sysfs Base attr no for coretemp */
54 #define NUM_REAL_CORES		16	/* Number of Real cores per cpu */
55 #define CORETEMP_NAME_LENGTH	17	/* String Length of attrs */
56 #define MAX_CORE_ATTRS		4	/* Maximum no of basic attrs */
57 #define TOTAL_ATTRS		(MAX_CORE_ATTRS + 1)
58 #define MAX_CORE_DATA		(NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
59 
60 #ifdef CONFIG_SMP
61 #define TO_PHYS_ID(cpu)		cpu_data(cpu).phys_proc_id
62 #define TO_CORE_ID(cpu)		cpu_data(cpu).cpu_core_id
63 #define TO_ATTR_NO(cpu)		(TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
64 #define for_each_sibling(i, cpu)	for_each_cpu(i, cpu_sibling_mask(cpu))
65 #else
66 #define TO_PHYS_ID(cpu)		(cpu)
67 #define TO_CORE_ID(cpu)		(cpu)
68 #define TO_ATTR_NO(cpu)		(cpu)
69 #define for_each_sibling(i, cpu)	for (i = 0; false; )
70 #endif
71 
72 /*
73  * Per-Core Temperature Data
74  * @last_updated: The time when the current temperature value was updated
75  *		earlier (in jiffies).
76  * @cpu_core_id: The CPU Core from which temperature values should be read
77  *		This value is passed as "id" field to rdmsr/wrmsr functions.
78  * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
79  *		from where the temperature values should be read.
80  * @attr_size:  Total number of pre-core attrs displayed in the sysfs.
81  * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
82  *		Otherwise, temp_data holds coretemp data.
83  * @valid: If this is 1, the current temperature is valid.
84  */
85 struct temp_data {
86 	int temp;
87 	int ttarget;
88 	int tjmax;
89 	unsigned long last_updated;
90 	unsigned int cpu;
91 	u32 cpu_core_id;
92 	u32 status_reg;
93 	int attr_size;
94 	bool is_pkg_data;
95 	bool valid;
96 	struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
97 	char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
98 	struct mutex update_lock;
99 };
100 
101 /* Platform Data per Physical CPU */
102 struct platform_data {
103 	struct device *hwmon_dev;
104 	u16 phys_proc_id;
105 	struct temp_data *core_data[MAX_CORE_DATA];
106 	struct device_attribute name_attr;
107 };
108 
109 struct pdev_entry {
110 	struct list_head list;
111 	struct platform_device *pdev;
112 	u16 phys_proc_id;
113 };
114 
115 static LIST_HEAD(pdev_list);
116 static DEFINE_MUTEX(pdev_list_mutex);
117 
118 static ssize_t show_name(struct device *dev,
119 			struct device_attribute *devattr, char *buf)
120 {
121 	return sprintf(buf, "%s\n", DRVNAME);
122 }
123 
124 static ssize_t show_label(struct device *dev,
125 				struct device_attribute *devattr, char *buf)
126 {
127 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
128 	struct platform_data *pdata = dev_get_drvdata(dev);
129 	struct temp_data *tdata = pdata->core_data[attr->index];
130 
131 	if (tdata->is_pkg_data)
132 		return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
133 
134 	return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
135 }
136 
137 static ssize_t show_crit_alarm(struct device *dev,
138 				struct device_attribute *devattr, char *buf)
139 {
140 	u32 eax, edx;
141 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
142 	struct platform_data *pdata = dev_get_drvdata(dev);
143 	struct temp_data *tdata = pdata->core_data[attr->index];
144 
145 	rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
146 
147 	return sprintf(buf, "%d\n", (eax >> 5) & 1);
148 }
149 
150 static ssize_t show_tjmax(struct device *dev,
151 			struct device_attribute *devattr, char *buf)
152 {
153 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
154 	struct platform_data *pdata = dev_get_drvdata(dev);
155 
156 	return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
157 }
158 
159 static ssize_t show_ttarget(struct device *dev,
160 				struct device_attribute *devattr, char *buf)
161 {
162 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
163 	struct platform_data *pdata = dev_get_drvdata(dev);
164 
165 	return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
166 }
167 
168 static ssize_t show_temp(struct device *dev,
169 			struct device_attribute *devattr, char *buf)
170 {
171 	u32 eax, edx;
172 	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
173 	struct platform_data *pdata = dev_get_drvdata(dev);
174 	struct temp_data *tdata = pdata->core_data[attr->index];
175 
176 	mutex_lock(&tdata->update_lock);
177 
178 	/* Check whether the time interval has elapsed */
179 	if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
180 		rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
181 		tdata->valid = 0;
182 		/* Check whether the data is valid */
183 		if (eax & 0x80000000) {
184 			tdata->temp = tdata->tjmax -
185 					((eax >> 16) & 0x7f) * 1000;
186 			tdata->valid = 1;
187 		}
188 		tdata->last_updated = jiffies;
189 	}
190 
191 	mutex_unlock(&tdata->update_lock);
192 	return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
193 }
194 
195 static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
196 {
197 	/* The 100C is default for both mobile and non mobile CPUs */
198 
199 	int tjmax = 100000;
200 	int tjmax_ee = 85000;
201 	int usemsr_ee = 1;
202 	int err;
203 	u32 eax, edx;
204 	struct pci_dev *host_bridge;
205 
206 	/* Early chips have no MSR for TjMax */
207 
208 	if (c->x86_model == 0xf && c->x86_mask < 4)
209 		usemsr_ee = 0;
210 
211 	/* Atom CPUs */
212 
213 	if (c->x86_model == 0x1c) {
214 		usemsr_ee = 0;
215 
216 		host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
217 
218 		if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
219 		    && (host_bridge->device == 0xa000	/* NM10 based nettop */
220 		    || host_bridge->device == 0xa010))	/* NM10 based netbook */
221 			tjmax = 100000;
222 		else
223 			tjmax = 90000;
224 
225 		pci_dev_put(host_bridge);
226 	}
227 
228 	if (c->x86_model > 0xe && usemsr_ee) {
229 		u8 platform_id;
230 
231 		/*
232 		 * Now we can detect the mobile CPU using Intel provided table
233 		 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
234 		 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
235 		 */
236 		err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
237 		if (err) {
238 			dev_warn(dev,
239 				 "Unable to access MSR 0x17, assuming desktop"
240 				 " CPU\n");
241 			usemsr_ee = 0;
242 		} else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
243 			/*
244 			 * Trust bit 28 up to Penryn, I could not find any
245 			 * documentation on that; if you happen to know
246 			 * someone at Intel please ask
247 			 */
248 			usemsr_ee = 0;
249 		} else {
250 			/* Platform ID bits 52:50 (EDX starts at bit 32) */
251 			platform_id = (edx >> 18) & 0x7;
252 
253 			/*
254 			 * Mobile Penryn CPU seems to be platform ID 7 or 5
255 			 * (guesswork)
256 			 */
257 			if (c->x86_model == 0x17 &&
258 			    (platform_id == 5 || platform_id == 7)) {
259 				/*
260 				 * If MSR EE bit is set, set it to 90 degrees C,
261 				 * otherwise 105 degrees C
262 				 */
263 				tjmax_ee = 90000;
264 				tjmax = 105000;
265 			}
266 		}
267 	}
268 
269 	if (usemsr_ee) {
270 		err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
271 		if (err) {
272 			dev_warn(dev,
273 				 "Unable to access MSR 0xEE, for Tjmax, left"
274 				 " at default\n");
275 		} else if (eax & 0x40000000) {
276 			tjmax = tjmax_ee;
277 		}
278 	} else if (tjmax == 100000) {
279 		/*
280 		 * If we don't use msr EE it means we are desktop CPU
281 		 * (with exeception of Atom)
282 		 */
283 		dev_warn(dev, "Using relative temperature scale!\n");
284 	}
285 
286 	return tjmax;
287 }
288 
289 static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
290 {
291 	int err;
292 	u32 eax, edx;
293 	u32 val;
294 
295 	/*
296 	 * A new feature of current Intel(R) processors, the
297 	 * IA32_TEMPERATURE_TARGET contains the TjMax value
298 	 */
299 	err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
300 	if (err) {
301 		if (c->x86_model > 0xe && c->x86_model != 0x1c)
302 			dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
303 	} else {
304 		val = (eax >> 16) & 0xff;
305 		/*
306 		 * If the TjMax is not plausible, an assumption
307 		 * will be used
308 		 */
309 		if (val) {
310 			dev_dbg(dev, "TjMax is %d degrees C\n", val);
311 			return val * 1000;
312 		}
313 	}
314 
315 	if (force_tjmax) {
316 		dev_notice(dev, "TjMax forced to %d degrees C by user\n",
317 			   force_tjmax);
318 		return force_tjmax * 1000;
319 	}
320 
321 	/*
322 	 * An assumption is made for early CPUs and unreadable MSR.
323 	 * NOTE: the calculated value may not be correct.
324 	 */
325 	return adjust_tjmax(c, id, dev);
326 }
327 
328 static int create_name_attr(struct platform_data *pdata, struct device *dev)
329 {
330 	sysfs_attr_init(&pdata->name_attr.attr);
331 	pdata->name_attr.attr.name = "name";
332 	pdata->name_attr.attr.mode = S_IRUGO;
333 	pdata->name_attr.show = show_name;
334 	return device_create_file(dev, &pdata->name_attr);
335 }
336 
337 static int create_core_attrs(struct temp_data *tdata, struct device *dev,
338 				int attr_no)
339 {
340 	int err, i;
341 	static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
342 			struct device_attribute *devattr, char *buf) = {
343 			show_label, show_crit_alarm, show_temp, show_tjmax,
344 			show_ttarget };
345 	static const char *const names[TOTAL_ATTRS] = {
346 					"temp%d_label", "temp%d_crit_alarm",
347 					"temp%d_input", "temp%d_crit",
348 					"temp%d_max" };
349 
350 	for (i = 0; i < tdata->attr_size; i++) {
351 		snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
352 			attr_no);
353 		sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
354 		tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
355 		tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
356 		tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
357 		tdata->sd_attrs[i].index = attr_no;
358 		err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
359 		if (err)
360 			goto exit_free;
361 	}
362 	return 0;
363 
364 exit_free:
365 	while (--i >= 0)
366 		device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
367 	return err;
368 }
369 
370 
371 static int __cpuinit chk_ucode_version(unsigned int cpu)
372 {
373 	struct cpuinfo_x86 *c = &cpu_data(cpu);
374 
375 	/*
376 	 * Check if we have problem with errata AE18 of Core processors:
377 	 * Readings might stop update when processor visited too deep sleep,
378 	 * fixed for stepping D0 (6EC).
379 	 */
380 	if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
381 		pr_err("Errata AE18 not fixed, update BIOS or "
382 		       "microcode of the CPU!\n");
383 		return -ENODEV;
384 	}
385 	return 0;
386 }
387 
388 static struct platform_device *coretemp_get_pdev(unsigned int cpu)
389 {
390 	u16 phys_proc_id = TO_PHYS_ID(cpu);
391 	struct pdev_entry *p;
392 
393 	mutex_lock(&pdev_list_mutex);
394 
395 	list_for_each_entry(p, &pdev_list, list)
396 		if (p->phys_proc_id == phys_proc_id) {
397 			mutex_unlock(&pdev_list_mutex);
398 			return p->pdev;
399 		}
400 
401 	mutex_unlock(&pdev_list_mutex);
402 	return NULL;
403 }
404 
405 static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
406 {
407 	struct temp_data *tdata;
408 
409 	tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
410 	if (!tdata)
411 		return NULL;
412 
413 	tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
414 							MSR_IA32_THERM_STATUS;
415 	tdata->is_pkg_data = pkg_flag;
416 	tdata->cpu = cpu;
417 	tdata->cpu_core_id = TO_CORE_ID(cpu);
418 	tdata->attr_size = MAX_CORE_ATTRS;
419 	mutex_init(&tdata->update_lock);
420 	return tdata;
421 }
422 
423 static int create_core_data(struct platform_device *pdev,
424 				unsigned int cpu, int pkg_flag)
425 {
426 	struct temp_data *tdata;
427 	struct platform_data *pdata = platform_get_drvdata(pdev);
428 	struct cpuinfo_x86 *c = &cpu_data(cpu);
429 	u32 eax, edx;
430 	int err, attr_no;
431 
432 	/*
433 	 * Find attr number for sysfs:
434 	 * We map the attr number to core id of the CPU
435 	 * The attr number is always core id + 2
436 	 * The Pkgtemp will always show up as temp1_*, if available
437 	 */
438 	attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
439 
440 	if (attr_no > MAX_CORE_DATA - 1)
441 		return -ERANGE;
442 
443 	/*
444 	 * Provide a single set of attributes for all HT siblings of a core
445 	 * to avoid duplicate sensors (the processor ID and core ID of all
446 	 * HT siblings of a core are the same).
447 	 * Skip if a HT sibling of this core is already registered.
448 	 * This is not an error.
449 	 */
450 	if (pdata->core_data[attr_no] != NULL)
451 		return 0;
452 
453 	tdata = init_temp_data(cpu, pkg_flag);
454 	if (!tdata)
455 		return -ENOMEM;
456 
457 	/* Test if we can access the status register */
458 	err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
459 	if (err)
460 		goto exit_free;
461 
462 	/* We can access status register. Get Critical Temperature */
463 	tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
464 
465 	/*
466 	 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
467 	 * The target temperature is available on older CPUs but not in this
468 	 * register. Atoms don't have the register at all.
469 	 */
470 	if (c->x86_model > 0xe && c->x86_model != 0x1c) {
471 		err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
472 					&eax, &edx);
473 		if (!err) {
474 			tdata->ttarget
475 			  = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
476 			tdata->attr_size++;
477 		}
478 	}
479 
480 	pdata->core_data[attr_no] = tdata;
481 
482 	/* Create sysfs interfaces */
483 	err = create_core_attrs(tdata, &pdev->dev, attr_no);
484 	if (err)
485 		goto exit_free;
486 
487 	return 0;
488 exit_free:
489 	pdata->core_data[attr_no] = NULL;
490 	kfree(tdata);
491 	return err;
492 }
493 
494 static void coretemp_add_core(unsigned int cpu, int pkg_flag)
495 {
496 	struct platform_device *pdev = coretemp_get_pdev(cpu);
497 	int err;
498 
499 	if (!pdev)
500 		return;
501 
502 	err = create_core_data(pdev, cpu, pkg_flag);
503 	if (err)
504 		dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
505 }
506 
507 static void coretemp_remove_core(struct platform_data *pdata,
508 				struct device *dev, int indx)
509 {
510 	int i;
511 	struct temp_data *tdata = pdata->core_data[indx];
512 
513 	/* Remove the sysfs attributes */
514 	for (i = 0; i < tdata->attr_size; i++)
515 		device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
516 
517 	kfree(pdata->core_data[indx]);
518 	pdata->core_data[indx] = NULL;
519 }
520 
521 static int __devinit coretemp_probe(struct platform_device *pdev)
522 {
523 	struct platform_data *pdata;
524 	int err;
525 
526 	/* Initialize the per-package data structures */
527 	pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
528 	if (!pdata)
529 		return -ENOMEM;
530 
531 	err = create_name_attr(pdata, &pdev->dev);
532 	if (err)
533 		goto exit_free;
534 
535 	pdata->phys_proc_id = pdev->id;
536 	platform_set_drvdata(pdev, pdata);
537 
538 	pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
539 	if (IS_ERR(pdata->hwmon_dev)) {
540 		err = PTR_ERR(pdata->hwmon_dev);
541 		dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
542 		goto exit_name;
543 	}
544 	return 0;
545 
546 exit_name:
547 	device_remove_file(&pdev->dev, &pdata->name_attr);
548 	platform_set_drvdata(pdev, NULL);
549 exit_free:
550 	kfree(pdata);
551 	return err;
552 }
553 
554 static int __devexit coretemp_remove(struct platform_device *pdev)
555 {
556 	struct platform_data *pdata = platform_get_drvdata(pdev);
557 	int i;
558 
559 	for (i = MAX_CORE_DATA - 1; i >= 0; --i)
560 		if (pdata->core_data[i])
561 			coretemp_remove_core(pdata, &pdev->dev, i);
562 
563 	device_remove_file(&pdev->dev, &pdata->name_attr);
564 	hwmon_device_unregister(pdata->hwmon_dev);
565 	platform_set_drvdata(pdev, NULL);
566 	kfree(pdata);
567 	return 0;
568 }
569 
570 static struct platform_driver coretemp_driver = {
571 	.driver = {
572 		.owner = THIS_MODULE,
573 		.name = DRVNAME,
574 	},
575 	.probe = coretemp_probe,
576 	.remove = __devexit_p(coretemp_remove),
577 };
578 
579 static int __cpuinit coretemp_device_add(unsigned int cpu)
580 {
581 	int err;
582 	struct platform_device *pdev;
583 	struct pdev_entry *pdev_entry;
584 
585 	mutex_lock(&pdev_list_mutex);
586 
587 	pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
588 	if (!pdev) {
589 		err = -ENOMEM;
590 		pr_err("Device allocation failed\n");
591 		goto exit;
592 	}
593 
594 	pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
595 	if (!pdev_entry) {
596 		err = -ENOMEM;
597 		goto exit_device_put;
598 	}
599 
600 	err = platform_device_add(pdev);
601 	if (err) {
602 		pr_err("Device addition failed (%d)\n", err);
603 		goto exit_device_free;
604 	}
605 
606 	pdev_entry->pdev = pdev;
607 	pdev_entry->phys_proc_id = pdev->id;
608 
609 	list_add_tail(&pdev_entry->list, &pdev_list);
610 	mutex_unlock(&pdev_list_mutex);
611 
612 	return 0;
613 
614 exit_device_free:
615 	kfree(pdev_entry);
616 exit_device_put:
617 	platform_device_put(pdev);
618 exit:
619 	mutex_unlock(&pdev_list_mutex);
620 	return err;
621 }
622 
623 static void coretemp_device_remove(unsigned int cpu)
624 {
625 	struct pdev_entry *p, *n;
626 	u16 phys_proc_id = TO_PHYS_ID(cpu);
627 
628 	mutex_lock(&pdev_list_mutex);
629 	list_for_each_entry_safe(p, n, &pdev_list, list) {
630 		if (p->phys_proc_id != phys_proc_id)
631 			continue;
632 		platform_device_unregister(p->pdev);
633 		list_del(&p->list);
634 		kfree(p);
635 	}
636 	mutex_unlock(&pdev_list_mutex);
637 }
638 
639 static bool is_any_core_online(struct platform_data *pdata)
640 {
641 	int i;
642 
643 	/* Find online cores, except pkgtemp data */
644 	for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
645 		if (pdata->core_data[i] &&
646 			!pdata->core_data[i]->is_pkg_data) {
647 			return true;
648 		}
649 	}
650 	return false;
651 }
652 
653 static void __cpuinit get_core_online(unsigned int cpu)
654 {
655 	struct cpuinfo_x86 *c = &cpu_data(cpu);
656 	struct platform_device *pdev = coretemp_get_pdev(cpu);
657 	int err;
658 
659 	/*
660 	 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
661 	 * sensors. We check this bit only, all the early CPUs
662 	 * without thermal sensors will be filtered out.
663 	 */
664 	if (!cpu_has(c, X86_FEATURE_DTS))
665 		return;
666 
667 	if (!pdev) {
668 		/* Check the microcode version of the CPU */
669 		if (chk_ucode_version(cpu))
670 			return;
671 
672 		/*
673 		 * Alright, we have DTS support.
674 		 * We are bringing the _first_ core in this pkg
675 		 * online. So, initialize per-pkg data structures and
676 		 * then bring this core online.
677 		 */
678 		err = coretemp_device_add(cpu);
679 		if (err)
680 			return;
681 		/*
682 		 * Check whether pkgtemp support is available.
683 		 * If so, add interfaces for pkgtemp.
684 		 */
685 		if (cpu_has(c, X86_FEATURE_PTS))
686 			coretemp_add_core(cpu, 1);
687 	}
688 	/*
689 	 * Physical CPU device already exists.
690 	 * So, just add interfaces for this core.
691 	 */
692 	coretemp_add_core(cpu, 0);
693 }
694 
695 static void __cpuinit put_core_offline(unsigned int cpu)
696 {
697 	int i, indx;
698 	struct platform_data *pdata;
699 	struct platform_device *pdev = coretemp_get_pdev(cpu);
700 
701 	/* If the physical CPU device does not exist, just return */
702 	if (!pdev)
703 		return;
704 
705 	pdata = platform_get_drvdata(pdev);
706 
707 	indx = TO_ATTR_NO(cpu);
708 
709 	if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
710 		coretemp_remove_core(pdata, &pdev->dev, indx);
711 
712 	/*
713 	 * If a HT sibling of a core is taken offline, but another HT sibling
714 	 * of the same core is still online, register the alternate sibling.
715 	 * This ensures that exactly one set of attributes is provided as long
716 	 * as at least one HT sibling of a core is online.
717 	 */
718 	for_each_sibling(i, cpu) {
719 		if (i != cpu) {
720 			get_core_online(i);
721 			/*
722 			 * Display temperature sensor data for one HT sibling
723 			 * per core only, so abort the loop after one such
724 			 * sibling has been found.
725 			 */
726 			break;
727 		}
728 	}
729 	/*
730 	 * If all cores in this pkg are offline, remove the device.
731 	 * coretemp_device_remove calls unregister_platform_device,
732 	 * which in turn calls coretemp_remove. This removes the
733 	 * pkgtemp entry and does other clean ups.
734 	 */
735 	if (!is_any_core_online(pdata))
736 		coretemp_device_remove(cpu);
737 }
738 
739 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
740 				 unsigned long action, void *hcpu)
741 {
742 	unsigned int cpu = (unsigned long) hcpu;
743 
744 	switch (action) {
745 	case CPU_ONLINE:
746 	case CPU_DOWN_FAILED:
747 		get_core_online(cpu);
748 		break;
749 	case CPU_DOWN_PREPARE:
750 		put_core_offline(cpu);
751 		break;
752 	}
753 	return NOTIFY_OK;
754 }
755 
756 static struct notifier_block coretemp_cpu_notifier __refdata = {
757 	.notifier_call = coretemp_cpu_callback,
758 };
759 
760 static int __init coretemp_init(void)
761 {
762 	int i, err = -ENODEV;
763 
764 	/* quick check if we run Intel */
765 	if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL)
766 		goto exit;
767 
768 	err = platform_driver_register(&coretemp_driver);
769 	if (err)
770 		goto exit;
771 
772 	for_each_online_cpu(i)
773 		get_core_online(i);
774 
775 #ifndef CONFIG_HOTPLUG_CPU
776 	if (list_empty(&pdev_list)) {
777 		err = -ENODEV;
778 		goto exit_driver_unreg;
779 	}
780 #endif
781 
782 	register_hotcpu_notifier(&coretemp_cpu_notifier);
783 	return 0;
784 
785 #ifndef CONFIG_HOTPLUG_CPU
786 exit_driver_unreg:
787 	platform_driver_unregister(&coretemp_driver);
788 #endif
789 exit:
790 	return err;
791 }
792 
793 static void __exit coretemp_exit(void)
794 {
795 	struct pdev_entry *p, *n;
796 
797 	unregister_hotcpu_notifier(&coretemp_cpu_notifier);
798 	mutex_lock(&pdev_list_mutex);
799 	list_for_each_entry_safe(p, n, &pdev_list, list) {
800 		platform_device_unregister(p->pdev);
801 		list_del(&p->list);
802 		kfree(p);
803 	}
804 	mutex_unlock(&pdev_list_mutex);
805 	platform_driver_unregister(&coretemp_driver);
806 }
807 
808 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
809 MODULE_DESCRIPTION("Intel Core temperature monitor");
810 MODULE_LICENSE("GPL");
811 
812 module_init(coretemp_init)
813 module_exit(coretemp_exit)
814