1 /* 2 * coretemp.c - Linux kernel module for hardware monitoring 3 * 4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> 5 * 6 * Inspired from many hwmon drivers 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; version 2 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 20 * 02110-1301 USA. 21 */ 22 23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 24 25 #include <linux/module.h> 26 #include <linux/init.h> 27 #include <linux/slab.h> 28 #include <linux/jiffies.h> 29 #include <linux/hwmon.h> 30 #include <linux/sysfs.h> 31 #include <linux/hwmon-sysfs.h> 32 #include <linux/err.h> 33 #include <linux/mutex.h> 34 #include <linux/list.h> 35 #include <linux/platform_device.h> 36 #include <linux/cpu.h> 37 #include <linux/pci.h> 38 #include <linux/smp.h> 39 #include <linux/moduleparam.h> 40 #include <asm/msr.h> 41 #include <asm/processor.h> 42 43 #define DRVNAME "coretemp" 44 45 /* 46 * force_tjmax only matters when TjMax can't be read from the CPU itself. 47 * When set, it replaces the driver's suboptimal heuristic. 48 */ 49 static int force_tjmax; 50 module_param_named(tjmax, force_tjmax, int, 0444); 51 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); 52 53 #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ 54 #define NUM_REAL_CORES 16 /* Number of Real cores per cpu */ 55 #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */ 56 #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ 57 #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) 58 #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) 59 60 #define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id 61 #define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id 62 #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO) 63 64 #ifdef CONFIG_SMP 65 #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu)) 66 #else 67 #define for_each_sibling(i, cpu) for (i = 0; false; ) 68 #endif 69 70 /* 71 * Per-Core Temperature Data 72 * @last_updated: The time when the current temperature value was updated 73 * earlier (in jiffies). 74 * @cpu_core_id: The CPU Core from which temperature values should be read 75 * This value is passed as "id" field to rdmsr/wrmsr functions. 76 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS, 77 * from where the temperature values should be read. 78 * @attr_size: Total number of pre-core attrs displayed in the sysfs. 79 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data. 80 * Otherwise, temp_data holds coretemp data. 81 * @valid: If this is 1, the current temperature is valid. 82 */ 83 struct temp_data { 84 int temp; 85 int ttarget; 86 int tjmax; 87 unsigned long last_updated; 88 unsigned int cpu; 89 u32 cpu_core_id; 90 u32 status_reg; 91 int attr_size; 92 bool is_pkg_data; 93 bool valid; 94 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS]; 95 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH]; 96 struct mutex update_lock; 97 }; 98 99 /* Platform Data per Physical CPU */ 100 struct platform_data { 101 struct device *hwmon_dev; 102 u16 phys_proc_id; 103 struct temp_data *core_data[MAX_CORE_DATA]; 104 struct device_attribute name_attr; 105 }; 106 107 struct pdev_entry { 108 struct list_head list; 109 struct platform_device *pdev; 110 u16 phys_proc_id; 111 }; 112 113 static LIST_HEAD(pdev_list); 114 static DEFINE_MUTEX(pdev_list_mutex); 115 116 static ssize_t show_name(struct device *dev, 117 struct device_attribute *devattr, char *buf) 118 { 119 return sprintf(buf, "%s\n", DRVNAME); 120 } 121 122 static ssize_t show_label(struct device *dev, 123 struct device_attribute *devattr, char *buf) 124 { 125 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 126 struct platform_data *pdata = dev_get_drvdata(dev); 127 struct temp_data *tdata = pdata->core_data[attr->index]; 128 129 if (tdata->is_pkg_data) 130 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id); 131 132 return sprintf(buf, "Core %u\n", tdata->cpu_core_id); 133 } 134 135 static ssize_t show_crit_alarm(struct device *dev, 136 struct device_attribute *devattr, char *buf) 137 { 138 u32 eax, edx; 139 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 140 struct platform_data *pdata = dev_get_drvdata(dev); 141 struct temp_data *tdata = pdata->core_data[attr->index]; 142 143 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); 144 145 return sprintf(buf, "%d\n", (eax >> 5) & 1); 146 } 147 148 static ssize_t show_tjmax(struct device *dev, 149 struct device_attribute *devattr, char *buf) 150 { 151 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 152 struct platform_data *pdata = dev_get_drvdata(dev); 153 154 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax); 155 } 156 157 static ssize_t show_ttarget(struct device *dev, 158 struct device_attribute *devattr, char *buf) 159 { 160 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 161 struct platform_data *pdata = dev_get_drvdata(dev); 162 163 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget); 164 } 165 166 static ssize_t show_temp(struct device *dev, 167 struct device_attribute *devattr, char *buf) 168 { 169 u32 eax, edx; 170 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 171 struct platform_data *pdata = dev_get_drvdata(dev); 172 struct temp_data *tdata = pdata->core_data[attr->index]; 173 174 mutex_lock(&tdata->update_lock); 175 176 /* Check whether the time interval has elapsed */ 177 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) { 178 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); 179 tdata->valid = 0; 180 /* Check whether the data is valid */ 181 if (eax & 0x80000000) { 182 tdata->temp = tdata->tjmax - 183 ((eax >> 16) & 0x7f) * 1000; 184 tdata->valid = 1; 185 } 186 tdata->last_updated = jiffies; 187 } 188 189 mutex_unlock(&tdata->update_lock); 190 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN; 191 } 192 193 static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) 194 { 195 /* The 100C is default for both mobile and non mobile CPUs */ 196 197 int tjmax = 100000; 198 int tjmax_ee = 85000; 199 int usemsr_ee = 1; 200 int err; 201 u32 eax, edx; 202 struct pci_dev *host_bridge; 203 204 /* Early chips have no MSR for TjMax */ 205 206 if (c->x86_model == 0xf && c->x86_mask < 4) 207 usemsr_ee = 0; 208 209 /* Atom CPUs */ 210 211 if (c->x86_model == 0x1c) { 212 usemsr_ee = 0; 213 214 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); 215 216 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL 217 && (host_bridge->device == 0xa000 /* NM10 based nettop */ 218 || host_bridge->device == 0xa010)) /* NM10 based netbook */ 219 tjmax = 100000; 220 else 221 tjmax = 90000; 222 223 pci_dev_put(host_bridge); 224 } 225 226 if (c->x86_model > 0xe && usemsr_ee) { 227 u8 platform_id; 228 229 /* 230 * Now we can detect the mobile CPU using Intel provided table 231 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm 232 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU 233 */ 234 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx); 235 if (err) { 236 dev_warn(dev, 237 "Unable to access MSR 0x17, assuming desktop" 238 " CPU\n"); 239 usemsr_ee = 0; 240 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) { 241 /* 242 * Trust bit 28 up to Penryn, I could not find any 243 * documentation on that; if you happen to know 244 * someone at Intel please ask 245 */ 246 usemsr_ee = 0; 247 } else { 248 /* Platform ID bits 52:50 (EDX starts at bit 32) */ 249 platform_id = (edx >> 18) & 0x7; 250 251 /* 252 * Mobile Penryn CPU seems to be platform ID 7 or 5 253 * (guesswork) 254 */ 255 if (c->x86_model == 0x17 && 256 (platform_id == 5 || platform_id == 7)) { 257 /* 258 * If MSR EE bit is set, set it to 90 degrees C, 259 * otherwise 105 degrees C 260 */ 261 tjmax_ee = 90000; 262 tjmax = 105000; 263 } 264 } 265 } 266 267 if (usemsr_ee) { 268 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); 269 if (err) { 270 dev_warn(dev, 271 "Unable to access MSR 0xEE, for Tjmax, left" 272 " at default\n"); 273 } else if (eax & 0x40000000) { 274 tjmax = tjmax_ee; 275 } 276 } else if (tjmax == 100000) { 277 /* 278 * If we don't use msr EE it means we are desktop CPU 279 * (with exeception of Atom) 280 */ 281 dev_warn(dev, "Using relative temperature scale!\n"); 282 } 283 284 return tjmax; 285 } 286 287 static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) 288 { 289 int err; 290 u32 eax, edx; 291 u32 val; 292 293 /* 294 * A new feature of current Intel(R) processors, the 295 * IA32_TEMPERATURE_TARGET contains the TjMax value 296 */ 297 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); 298 if (err) { 299 if (c->x86_model > 0xe && c->x86_model != 0x1c) 300 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id); 301 } else { 302 val = (eax >> 16) & 0xff; 303 /* 304 * If the TjMax is not plausible, an assumption 305 * will be used 306 */ 307 if (val) { 308 dev_dbg(dev, "TjMax is %d degrees C\n", val); 309 return val * 1000; 310 } 311 } 312 313 if (force_tjmax) { 314 dev_notice(dev, "TjMax forced to %d degrees C by user\n", 315 force_tjmax); 316 return force_tjmax * 1000; 317 } 318 319 /* 320 * An assumption is made for early CPUs and unreadable MSR. 321 * NOTE: the calculated value may not be correct. 322 */ 323 return adjust_tjmax(c, id, dev); 324 } 325 326 static int create_name_attr(struct platform_data *pdata, struct device *dev) 327 { 328 sysfs_attr_init(&pdata->name_attr.attr); 329 pdata->name_attr.attr.name = "name"; 330 pdata->name_attr.attr.mode = S_IRUGO; 331 pdata->name_attr.show = show_name; 332 return device_create_file(dev, &pdata->name_attr); 333 } 334 335 static int create_core_attrs(struct temp_data *tdata, struct device *dev, 336 int attr_no) 337 { 338 int err, i; 339 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev, 340 struct device_attribute *devattr, char *buf) = { 341 show_label, show_crit_alarm, show_temp, show_tjmax, 342 show_ttarget }; 343 static const char *const names[TOTAL_ATTRS] = { 344 "temp%d_label", "temp%d_crit_alarm", 345 "temp%d_input", "temp%d_crit", 346 "temp%d_max" }; 347 348 for (i = 0; i < tdata->attr_size; i++) { 349 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i], 350 attr_no); 351 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr); 352 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i]; 353 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO; 354 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i]; 355 tdata->sd_attrs[i].index = attr_no; 356 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr); 357 if (err) 358 goto exit_free; 359 } 360 return 0; 361 362 exit_free: 363 while (--i >= 0) 364 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); 365 return err; 366 } 367 368 369 static int __cpuinit chk_ucode_version(unsigned int cpu) 370 { 371 struct cpuinfo_x86 *c = &cpu_data(cpu); 372 373 /* 374 * Check if we have problem with errata AE18 of Core processors: 375 * Readings might stop update when processor visited too deep sleep, 376 * fixed for stepping D0 (6EC). 377 */ 378 if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) { 379 pr_err("Errata AE18 not fixed, update BIOS or " 380 "microcode of the CPU!\n"); 381 return -ENODEV; 382 } 383 return 0; 384 } 385 386 static struct platform_device *coretemp_get_pdev(unsigned int cpu) 387 { 388 u16 phys_proc_id = TO_PHYS_ID(cpu); 389 struct pdev_entry *p; 390 391 mutex_lock(&pdev_list_mutex); 392 393 list_for_each_entry(p, &pdev_list, list) 394 if (p->phys_proc_id == phys_proc_id) { 395 mutex_unlock(&pdev_list_mutex); 396 return p->pdev; 397 } 398 399 mutex_unlock(&pdev_list_mutex); 400 return NULL; 401 } 402 403 static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag) 404 { 405 struct temp_data *tdata; 406 407 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL); 408 if (!tdata) 409 return NULL; 410 411 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS : 412 MSR_IA32_THERM_STATUS; 413 tdata->is_pkg_data = pkg_flag; 414 tdata->cpu = cpu; 415 tdata->cpu_core_id = TO_CORE_ID(cpu); 416 tdata->attr_size = MAX_CORE_ATTRS; 417 mutex_init(&tdata->update_lock); 418 return tdata; 419 } 420 421 static int create_core_data(struct platform_device *pdev, 422 unsigned int cpu, int pkg_flag) 423 { 424 struct temp_data *tdata; 425 struct platform_data *pdata = platform_get_drvdata(pdev); 426 struct cpuinfo_x86 *c = &cpu_data(cpu); 427 u32 eax, edx; 428 int err, attr_no; 429 430 /* 431 * Find attr number for sysfs: 432 * We map the attr number to core id of the CPU 433 * The attr number is always core id + 2 434 * The Pkgtemp will always show up as temp1_*, if available 435 */ 436 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu); 437 438 if (attr_no > MAX_CORE_DATA - 1) 439 return -ERANGE; 440 441 /* 442 * Provide a single set of attributes for all HT siblings of a core 443 * to avoid duplicate sensors (the processor ID and core ID of all 444 * HT siblings of a core are the same). 445 * Skip if a HT sibling of this core is already registered. 446 * This is not an error. 447 */ 448 if (pdata->core_data[attr_no] != NULL) 449 return 0; 450 451 tdata = init_temp_data(cpu, pkg_flag); 452 if (!tdata) 453 return -ENOMEM; 454 455 /* Test if we can access the status register */ 456 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx); 457 if (err) 458 goto exit_free; 459 460 /* We can access status register. Get Critical Temperature */ 461 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev); 462 463 /* 464 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET. 465 * The target temperature is available on older CPUs but not in this 466 * register. Atoms don't have the register at all. 467 */ 468 if (c->x86_model > 0xe && c->x86_model != 0x1c) { 469 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, 470 &eax, &edx); 471 if (!err) { 472 tdata->ttarget 473 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000; 474 tdata->attr_size++; 475 } 476 } 477 478 pdata->core_data[attr_no] = tdata; 479 480 /* Create sysfs interfaces */ 481 err = create_core_attrs(tdata, &pdev->dev, attr_no); 482 if (err) 483 goto exit_free; 484 485 return 0; 486 exit_free: 487 pdata->core_data[attr_no] = NULL; 488 kfree(tdata); 489 return err; 490 } 491 492 static void coretemp_add_core(unsigned int cpu, int pkg_flag) 493 { 494 struct platform_device *pdev = coretemp_get_pdev(cpu); 495 int err; 496 497 if (!pdev) 498 return; 499 500 err = create_core_data(pdev, cpu, pkg_flag); 501 if (err) 502 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu); 503 } 504 505 static void coretemp_remove_core(struct platform_data *pdata, 506 struct device *dev, int indx) 507 { 508 int i; 509 struct temp_data *tdata = pdata->core_data[indx]; 510 511 /* Remove the sysfs attributes */ 512 for (i = 0; i < tdata->attr_size; i++) 513 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); 514 515 kfree(pdata->core_data[indx]); 516 pdata->core_data[indx] = NULL; 517 } 518 519 static int __devinit coretemp_probe(struct platform_device *pdev) 520 { 521 struct platform_data *pdata; 522 int err; 523 524 /* Initialize the per-package data structures */ 525 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL); 526 if (!pdata) 527 return -ENOMEM; 528 529 err = create_name_attr(pdata, &pdev->dev); 530 if (err) 531 goto exit_free; 532 533 pdata->phys_proc_id = pdev->id; 534 platform_set_drvdata(pdev, pdata); 535 536 pdata->hwmon_dev = hwmon_device_register(&pdev->dev); 537 if (IS_ERR(pdata->hwmon_dev)) { 538 err = PTR_ERR(pdata->hwmon_dev); 539 dev_err(&pdev->dev, "Class registration failed (%d)\n", err); 540 goto exit_name; 541 } 542 return 0; 543 544 exit_name: 545 device_remove_file(&pdev->dev, &pdata->name_attr); 546 platform_set_drvdata(pdev, NULL); 547 exit_free: 548 kfree(pdata); 549 return err; 550 } 551 552 static int __devexit coretemp_remove(struct platform_device *pdev) 553 { 554 struct platform_data *pdata = platform_get_drvdata(pdev); 555 int i; 556 557 for (i = MAX_CORE_DATA - 1; i >= 0; --i) 558 if (pdata->core_data[i]) 559 coretemp_remove_core(pdata, &pdev->dev, i); 560 561 device_remove_file(&pdev->dev, &pdata->name_attr); 562 hwmon_device_unregister(pdata->hwmon_dev); 563 platform_set_drvdata(pdev, NULL); 564 kfree(pdata); 565 return 0; 566 } 567 568 static struct platform_driver coretemp_driver = { 569 .driver = { 570 .owner = THIS_MODULE, 571 .name = DRVNAME, 572 }, 573 .probe = coretemp_probe, 574 .remove = __devexit_p(coretemp_remove), 575 }; 576 577 static int __cpuinit coretemp_device_add(unsigned int cpu) 578 { 579 int err; 580 struct platform_device *pdev; 581 struct pdev_entry *pdev_entry; 582 583 mutex_lock(&pdev_list_mutex); 584 585 pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu)); 586 if (!pdev) { 587 err = -ENOMEM; 588 pr_err("Device allocation failed\n"); 589 goto exit; 590 } 591 592 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); 593 if (!pdev_entry) { 594 err = -ENOMEM; 595 goto exit_device_put; 596 } 597 598 err = platform_device_add(pdev); 599 if (err) { 600 pr_err("Device addition failed (%d)\n", err); 601 goto exit_device_free; 602 } 603 604 pdev_entry->pdev = pdev; 605 pdev_entry->phys_proc_id = pdev->id; 606 607 list_add_tail(&pdev_entry->list, &pdev_list); 608 mutex_unlock(&pdev_list_mutex); 609 610 return 0; 611 612 exit_device_free: 613 kfree(pdev_entry); 614 exit_device_put: 615 platform_device_put(pdev); 616 exit: 617 mutex_unlock(&pdev_list_mutex); 618 return err; 619 } 620 621 static void coretemp_device_remove(unsigned int cpu) 622 { 623 struct pdev_entry *p, *n; 624 u16 phys_proc_id = TO_PHYS_ID(cpu); 625 626 mutex_lock(&pdev_list_mutex); 627 list_for_each_entry_safe(p, n, &pdev_list, list) { 628 if (p->phys_proc_id != phys_proc_id) 629 continue; 630 platform_device_unregister(p->pdev); 631 list_del(&p->list); 632 kfree(p); 633 } 634 mutex_unlock(&pdev_list_mutex); 635 } 636 637 static bool is_any_core_online(struct platform_data *pdata) 638 { 639 int i; 640 641 /* Find online cores, except pkgtemp data */ 642 for (i = MAX_CORE_DATA - 1; i >= 0; --i) { 643 if (pdata->core_data[i] && 644 !pdata->core_data[i]->is_pkg_data) { 645 return true; 646 } 647 } 648 return false; 649 } 650 651 static void __cpuinit get_core_online(unsigned int cpu) 652 { 653 struct cpuinfo_x86 *c = &cpu_data(cpu); 654 struct platform_device *pdev = coretemp_get_pdev(cpu); 655 int err; 656 657 /* 658 * CPUID.06H.EAX[0] indicates whether the CPU has thermal 659 * sensors. We check this bit only, all the early CPUs 660 * without thermal sensors will be filtered out. 661 */ 662 if (!cpu_has(c, X86_FEATURE_DTS)) 663 return; 664 665 if (!pdev) { 666 /* Check the microcode version of the CPU */ 667 if (chk_ucode_version(cpu)) 668 return; 669 670 /* 671 * Alright, we have DTS support. 672 * We are bringing the _first_ core in this pkg 673 * online. So, initialize per-pkg data structures and 674 * then bring this core online. 675 */ 676 err = coretemp_device_add(cpu); 677 if (err) 678 return; 679 /* 680 * Check whether pkgtemp support is available. 681 * If so, add interfaces for pkgtemp. 682 */ 683 if (cpu_has(c, X86_FEATURE_PTS)) 684 coretemp_add_core(cpu, 1); 685 } 686 /* 687 * Physical CPU device already exists. 688 * So, just add interfaces for this core. 689 */ 690 coretemp_add_core(cpu, 0); 691 } 692 693 static void __cpuinit put_core_offline(unsigned int cpu) 694 { 695 int i, indx; 696 struct platform_data *pdata; 697 struct platform_device *pdev = coretemp_get_pdev(cpu); 698 699 /* If the physical CPU device does not exist, just return */ 700 if (!pdev) 701 return; 702 703 pdata = platform_get_drvdata(pdev); 704 705 indx = TO_ATTR_NO(cpu); 706 707 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu) 708 coretemp_remove_core(pdata, &pdev->dev, indx); 709 710 /* 711 * If a HT sibling of a core is taken offline, but another HT sibling 712 * of the same core is still online, register the alternate sibling. 713 * This ensures that exactly one set of attributes is provided as long 714 * as at least one HT sibling of a core is online. 715 */ 716 for_each_sibling(i, cpu) { 717 if (i != cpu) { 718 get_core_online(i); 719 /* 720 * Display temperature sensor data for one HT sibling 721 * per core only, so abort the loop after one such 722 * sibling has been found. 723 */ 724 break; 725 } 726 } 727 /* 728 * If all cores in this pkg are offline, remove the device. 729 * coretemp_device_remove calls unregister_platform_device, 730 * which in turn calls coretemp_remove. This removes the 731 * pkgtemp entry and does other clean ups. 732 */ 733 if (!is_any_core_online(pdata)) 734 coretemp_device_remove(cpu); 735 } 736 737 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb, 738 unsigned long action, void *hcpu) 739 { 740 unsigned int cpu = (unsigned long) hcpu; 741 742 switch (action) { 743 case CPU_ONLINE: 744 case CPU_DOWN_FAILED: 745 get_core_online(cpu); 746 break; 747 case CPU_DOWN_PREPARE: 748 put_core_offline(cpu); 749 break; 750 } 751 return NOTIFY_OK; 752 } 753 754 static struct notifier_block coretemp_cpu_notifier __refdata = { 755 .notifier_call = coretemp_cpu_callback, 756 }; 757 758 static int __init coretemp_init(void) 759 { 760 int i, err = -ENODEV; 761 762 /* quick check if we run Intel */ 763 if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL) 764 goto exit; 765 766 err = platform_driver_register(&coretemp_driver); 767 if (err) 768 goto exit; 769 770 for_each_online_cpu(i) 771 get_core_online(i); 772 773 #ifndef CONFIG_HOTPLUG_CPU 774 if (list_empty(&pdev_list)) { 775 err = -ENODEV; 776 goto exit_driver_unreg; 777 } 778 #endif 779 780 register_hotcpu_notifier(&coretemp_cpu_notifier); 781 return 0; 782 783 #ifndef CONFIG_HOTPLUG_CPU 784 exit_driver_unreg: 785 platform_driver_unregister(&coretemp_driver); 786 #endif 787 exit: 788 return err; 789 } 790 791 static void __exit coretemp_exit(void) 792 { 793 struct pdev_entry *p, *n; 794 795 unregister_hotcpu_notifier(&coretemp_cpu_notifier); 796 mutex_lock(&pdev_list_mutex); 797 list_for_each_entry_safe(p, n, &pdev_list, list) { 798 platform_device_unregister(p->pdev); 799 list_del(&p->list); 800 kfree(p); 801 } 802 mutex_unlock(&pdev_list_mutex); 803 platform_driver_unregister(&coretemp_driver); 804 } 805 806 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>"); 807 MODULE_DESCRIPTION("Intel Core temperature monitor"); 808 MODULE_LICENSE("GPL"); 809 810 module_init(coretemp_init) 811 module_exit(coretemp_exit) 812