1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * HWMON driver for ASUS motherboards that publish some sensor values 4 * via the embedded controller registers. 5 * 6 * Copyright (C) 2021 Eugene Shalygin <eugene.shalygin@gmail.com> 7 8 * EC provides: 9 * - Chipset temperature 10 * - CPU temperature 11 * - Motherboard temperature 12 * - T_Sensor temperature 13 * - VRM temperature 14 * - Water In temperature 15 * - Water Out temperature 16 * - CPU Optional fan RPM 17 * - Chipset fan RPM 18 * - VRM Heat Sink fan RPM 19 * - Water Flow fan RPM 20 * - CPU current 21 * - CPU core voltage 22 */ 23 24 #include <linux/acpi.h> 25 #include <linux/bitops.h> 26 #include <linux/dev_printk.h> 27 #include <linux/dmi.h> 28 #include <linux/hwmon.h> 29 #include <linux/init.h> 30 #include <linux/jiffies.h> 31 #include <linux/kernel.h> 32 #include <linux/module.h> 33 #include <linux/platform_device.h> 34 #include <linux/sort.h> 35 #include <linux/units.h> 36 37 #include <linux/unaligned.h> 38 39 static char *mutex_path_override; 40 41 /* Writing to this EC register switches EC bank */ 42 #define ASUS_EC_BANK_REGISTER 0xff 43 #define SENSOR_LABEL_LEN 16 44 45 /* 46 * Arbitrary set max. allowed bank number. Required for sorting banks and 47 * currently is overkill with just 2 banks used at max, but for the sake 48 * of alignment let's set it to a higher value. 49 */ 50 #define ASUS_EC_MAX_BANK 3 51 52 #define ACPI_LOCK_DELAY_MS 500 53 54 /* ACPI mutex for locking access to the EC for the firmware */ 55 #define ASUS_HW_ACCESS_MUTEX_ASMX "\\AMW0.ASMX" 56 57 #define ASUS_HW_ACCESS_MUTEX_RMTW_ASMX "\\RMTW.ASMX" 58 59 #define ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0 "\\_SB_.PCI0.SBRG.SIO1.MUT0" 60 61 #define MAX_IDENTICAL_BOARD_VARIATIONS 3 62 63 /* Moniker for the ACPI global lock (':' is not allowed in ASL identifiers) */ 64 #define ACPI_GLOBAL_LOCK_PSEUDO_PATH ":GLOBAL_LOCK" 65 66 typedef union { 67 u32 value; 68 struct { 69 u8 index; 70 u8 bank; 71 u8 size; 72 u8 dummy; 73 } components; 74 } sensor_address; 75 76 #define MAKE_SENSOR_ADDRESS(size, bank, index) { \ 77 .value = (size << 16) + (bank << 8) + index \ 78 } 79 80 static u32 hwmon_attributes[hwmon_max] = { 81 [hwmon_chip] = HWMON_C_REGISTER_TZ, 82 [hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL, 83 [hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL, 84 [hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL, 85 [hwmon_fan] = HWMON_F_INPUT | HWMON_F_LABEL, 86 }; 87 88 struct ec_sensor_info { 89 char label[SENSOR_LABEL_LEN]; 90 enum hwmon_sensor_types type; 91 sensor_address addr; 92 }; 93 94 #define EC_SENSOR(sensor_label, sensor_type, size, bank, index) { \ 95 .label = sensor_label, .type = sensor_type, \ 96 .addr = MAKE_SENSOR_ADDRESS(size, bank, index), \ 97 } 98 99 enum ec_sensors { 100 /* chipset temperature [℃] */ 101 ec_sensor_temp_chipset, 102 /* CPU temperature [℃] */ 103 ec_sensor_temp_cpu, 104 /* CPU package temperature [℃] */ 105 ec_sensor_temp_cpu_package, 106 /* motherboard temperature [℃] */ 107 ec_sensor_temp_mb, 108 /* "T_Sensor" temperature sensor reading [℃] */ 109 ec_sensor_temp_t_sensor, 110 /* VRM temperature [℃] */ 111 ec_sensor_temp_vrm, 112 /* CPU Core voltage [mV] */ 113 ec_sensor_in_cpu_core, 114 /* CPU_Opt fan [RPM] */ 115 ec_sensor_fan_cpu_opt, 116 /* VRM heat sink fan [RPM] */ 117 ec_sensor_fan_vrm_hs, 118 /* Chipset fan [RPM] */ 119 ec_sensor_fan_chipset, 120 /* Water flow sensor reading [RPM] */ 121 ec_sensor_fan_water_flow, 122 /* CPU current [A] */ 123 ec_sensor_curr_cpu, 124 /* "Water_In" temperature sensor reading [℃] */ 125 ec_sensor_temp_water_in, 126 /* "Water_Out" temperature sensor reading [℃] */ 127 ec_sensor_temp_water_out, 128 /* "Water_Block_In" temperature sensor reading [℃] */ 129 ec_sensor_temp_water_block_in, 130 /* "Water_Block_Out" temperature sensor reading [℃] */ 131 ec_sensor_temp_water_block_out, 132 /* "T_sensor_2" temperature sensor reading [℃] */ 133 ec_sensor_temp_t_sensor_2, 134 /* "Extra_1" temperature sensor reading [℃] */ 135 ec_sensor_temp_sensor_extra_1, 136 /* "Extra_2" temperature sensor reading [℃] */ 137 ec_sensor_temp_sensor_extra_2, 138 /* "Extra_3" temperature sensor reading [℃] */ 139 ec_sensor_temp_sensor_extra_3, 140 }; 141 142 #define SENSOR_TEMP_CHIPSET BIT(ec_sensor_temp_chipset) 143 #define SENSOR_TEMP_CPU BIT(ec_sensor_temp_cpu) 144 #define SENSOR_TEMP_CPU_PACKAGE BIT(ec_sensor_temp_cpu_package) 145 #define SENSOR_TEMP_MB BIT(ec_sensor_temp_mb) 146 #define SENSOR_TEMP_T_SENSOR BIT(ec_sensor_temp_t_sensor) 147 #define SENSOR_TEMP_VRM BIT(ec_sensor_temp_vrm) 148 #define SENSOR_IN_CPU_CORE BIT(ec_sensor_in_cpu_core) 149 #define SENSOR_FAN_CPU_OPT BIT(ec_sensor_fan_cpu_opt) 150 #define SENSOR_FAN_VRM_HS BIT(ec_sensor_fan_vrm_hs) 151 #define SENSOR_FAN_CHIPSET BIT(ec_sensor_fan_chipset) 152 #define SENSOR_FAN_WATER_FLOW BIT(ec_sensor_fan_water_flow) 153 #define SENSOR_CURR_CPU BIT(ec_sensor_curr_cpu) 154 #define SENSOR_TEMP_WATER_IN BIT(ec_sensor_temp_water_in) 155 #define SENSOR_TEMP_WATER_OUT BIT(ec_sensor_temp_water_out) 156 #define SENSOR_TEMP_WATER_BLOCK_IN BIT(ec_sensor_temp_water_block_in) 157 #define SENSOR_TEMP_WATER_BLOCK_OUT BIT(ec_sensor_temp_water_block_out) 158 #define SENSOR_TEMP_T_SENSOR_2 BIT(ec_sensor_temp_t_sensor_2) 159 #define SENSOR_TEMP_SENSOR_EXTRA_1 BIT(ec_sensor_temp_sensor_extra_1) 160 #define SENSOR_TEMP_SENSOR_EXTRA_2 BIT(ec_sensor_temp_sensor_extra_2) 161 #define SENSOR_TEMP_SENSOR_EXTRA_3 BIT(ec_sensor_temp_sensor_extra_3) 162 163 enum board_family { 164 family_unknown, 165 family_amd_400_series, 166 family_amd_500_series, 167 family_amd_600_series, 168 family_intel_300_series, 169 family_intel_600_series 170 }; 171 172 /* All the known sensors for ASUS EC controllers */ 173 static const struct ec_sensor_info sensors_family_amd_400[] = { 174 [ec_sensor_temp_chipset] = 175 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 176 [ec_sensor_temp_cpu] = 177 EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 178 [ec_sensor_temp_mb] = 179 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 180 [ec_sensor_temp_t_sensor] = 181 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 182 [ec_sensor_temp_vrm] = 183 EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 184 [ec_sensor_in_cpu_core] = 185 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2), 186 [ec_sensor_fan_cpu_opt] = 187 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xbc), 188 [ec_sensor_fan_vrm_hs] = 189 EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 190 [ec_sensor_fan_chipset] = 191 /* no chipset fans in this generation */ 192 EC_SENSOR("Chipset", hwmon_fan, 0, 0x00, 0x00), 193 [ec_sensor_fan_water_flow] = 194 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xb4), 195 [ec_sensor_curr_cpu] = 196 EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4), 197 [ec_sensor_temp_water_in] = 198 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x0d), 199 [ec_sensor_temp_water_out] = 200 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x0b), 201 }; 202 203 static const struct ec_sensor_info sensors_family_amd_500[] = { 204 [ec_sensor_temp_chipset] = 205 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 206 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 207 [ec_sensor_temp_mb] = 208 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 209 [ec_sensor_temp_t_sensor] = 210 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 211 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 212 [ec_sensor_in_cpu_core] = 213 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2), 214 [ec_sensor_fan_cpu_opt] = 215 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0), 216 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 217 [ec_sensor_fan_chipset] = 218 EC_SENSOR("Chipset", hwmon_fan, 2, 0x00, 0xb4), 219 [ec_sensor_fan_water_flow] = 220 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc), 221 [ec_sensor_curr_cpu] = EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4), 222 [ec_sensor_temp_water_in] = 223 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00), 224 [ec_sensor_temp_water_out] = 225 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01), 226 [ec_sensor_temp_water_block_in] = 227 EC_SENSOR("Water_Block_In", hwmon_temp, 1, 0x01, 0x02), 228 [ec_sensor_temp_water_block_out] = 229 EC_SENSOR("Water_Block_Out", hwmon_temp, 1, 0x01, 0x03), 230 [ec_sensor_temp_sensor_extra_1] = 231 EC_SENSOR("Extra_1", hwmon_temp, 1, 0x01, 0x09), 232 [ec_sensor_temp_t_sensor_2] = 233 EC_SENSOR("T_sensor_2", hwmon_temp, 1, 0x01, 0x0a), 234 [ec_sensor_temp_sensor_extra_2] = 235 EC_SENSOR("Extra_2", hwmon_temp, 1, 0x01, 0x0b), 236 [ec_sensor_temp_sensor_extra_3] = 237 EC_SENSOR("Extra_3", hwmon_temp, 1, 0x01, 0x0c), 238 }; 239 240 static const struct ec_sensor_info sensors_family_amd_600[] = { 241 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x30), 242 [ec_sensor_temp_cpu_package] = EC_SENSOR("CPU Package", hwmon_temp, 1, 0x00, 0x31), 243 [ec_sensor_temp_mb] = 244 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x32), 245 [ec_sensor_temp_vrm] = 246 EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x33), 247 [ec_sensor_temp_t_sensor] = 248 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x36), 249 [ec_sensor_temp_water_in] = 250 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00), 251 [ec_sensor_temp_water_out] = 252 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01), 253 [ec_sensor_fan_cpu_opt] = 254 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0), 255 }; 256 257 static const struct ec_sensor_info sensors_family_intel_300[] = { 258 [ec_sensor_temp_chipset] = 259 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 260 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 261 [ec_sensor_temp_mb] = 262 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 263 [ec_sensor_temp_t_sensor] = 264 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 265 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 266 [ec_sensor_fan_cpu_opt] = 267 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0), 268 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 269 [ec_sensor_fan_water_flow] = 270 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc), 271 [ec_sensor_temp_water_in] = 272 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00), 273 [ec_sensor_temp_water_out] = 274 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01), 275 }; 276 277 static const struct ec_sensor_info sensors_family_intel_600[] = { 278 [ec_sensor_temp_t_sensor] = 279 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 280 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 281 }; 282 283 /* Shortcuts for common combinations */ 284 #define SENSOR_SET_TEMP_CHIPSET_CPU_MB \ 285 (SENSOR_TEMP_CHIPSET | SENSOR_TEMP_CPU | SENSOR_TEMP_MB) 286 #define SENSOR_SET_TEMP_WATER (SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT) 287 #define SENSOR_SET_WATER_BLOCK \ 288 (SENSOR_TEMP_WATER_BLOCK_IN | SENSOR_TEMP_WATER_BLOCK_OUT) 289 290 struct ec_board_info { 291 unsigned long sensors; 292 /* 293 * Defines which mutex to use for guarding access to the state and the 294 * hardware. Can be either a full path to an AML mutex or the 295 * pseudo-path ACPI_GLOBAL_LOCK_PSEUDO_PATH to use the global ACPI lock, 296 * or left empty to use a regular mutex object, in which case access to 297 * the hardware is not guarded. 298 */ 299 const char *mutex_path; 300 enum board_family family; 301 }; 302 303 static const struct ec_board_info board_info_prime_x470_pro = { 304 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 305 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 306 SENSOR_FAN_CPU_OPT | 307 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 308 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH, 309 .family = family_amd_400_series, 310 }; 311 312 static const struct ec_board_info board_info_prime_x570_pro = { 313 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 314 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET, 315 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 316 .family = family_amd_500_series, 317 }; 318 319 static const struct ec_board_info board_info_pro_art_x570_creator_wifi = { 320 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 321 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT | 322 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 323 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 324 .family = family_amd_500_series, 325 }; 326 327 static const struct ec_board_info board_info_pro_art_x670E_creator_wifi = { 328 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE | 329 SENSOR_TEMP_MB | SENSOR_TEMP_VRM | 330 SENSOR_TEMP_T_SENSOR, 331 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH, 332 .family = family_amd_600_series, 333 }; 334 335 static const struct ec_board_info board_info_pro_art_b550_creator = { 336 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 337 SENSOR_TEMP_T_SENSOR | 338 SENSOR_FAN_CPU_OPT, 339 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 340 .family = family_amd_500_series, 341 }; 342 343 static const struct ec_board_info board_info_pro_ws_x570_ace = { 344 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 345 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET | 346 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 347 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 348 .family = family_amd_500_series, 349 }; 350 351 static const struct ec_board_info board_info_crosshair_x670e_hero = { 352 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE | 353 SENSOR_TEMP_MB | SENSOR_TEMP_VRM | 354 SENSOR_SET_TEMP_WATER, 355 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH, 356 .family = family_amd_600_series, 357 }; 358 359 static const struct ec_board_info board_info_crosshair_x670e_gene = { 360 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE | 361 SENSOR_TEMP_T_SENSOR | 362 SENSOR_TEMP_MB | SENSOR_TEMP_VRM, 363 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH, 364 .family = family_amd_600_series, 365 }; 366 367 static const struct ec_board_info board_info_crosshair_viii_dark_hero = { 368 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 369 SENSOR_TEMP_T_SENSOR | 370 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 371 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW | 372 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 373 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 374 .family = family_amd_500_series, 375 }; 376 377 static const struct ec_board_info board_info_crosshair_viii_hero = { 378 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 379 SENSOR_TEMP_T_SENSOR | 380 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 381 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | 382 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | 383 SENSOR_IN_CPU_CORE, 384 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 385 .family = family_amd_500_series, 386 }; 387 388 static const struct ec_board_info board_info_maximus_xi_hero = { 389 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 390 SENSOR_TEMP_T_SENSOR | 391 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 392 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW, 393 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 394 .family = family_intel_300_series, 395 }; 396 397 static const struct ec_board_info board_info_crosshair_viii_impact = { 398 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 399 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 400 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU | 401 SENSOR_IN_CPU_CORE, 402 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 403 .family = family_amd_500_series, 404 }; 405 406 static const struct ec_board_info board_info_strix_b550_e_gaming = { 407 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 408 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 409 SENSOR_FAN_CPU_OPT, 410 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 411 .family = family_amd_500_series, 412 }; 413 414 static const struct ec_board_info board_info_strix_b550_i_gaming = { 415 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 416 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 417 SENSOR_FAN_VRM_HS | SENSOR_CURR_CPU | 418 SENSOR_IN_CPU_CORE, 419 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 420 .family = family_amd_500_series, 421 }; 422 423 static const struct ec_board_info board_info_strix_x570_e_gaming = { 424 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 425 SENSOR_TEMP_T_SENSOR | 426 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU | 427 SENSOR_IN_CPU_CORE, 428 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 429 .family = family_amd_500_series, 430 }; 431 432 static const struct ec_board_info board_info_strix_x570_e_gaming_wifi_ii = { 433 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 434 SENSOR_TEMP_T_SENSOR | SENSOR_CURR_CPU | 435 SENSOR_IN_CPU_CORE, 436 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 437 .family = family_amd_500_series, 438 }; 439 440 static const struct ec_board_info board_info_strix_x570_f_gaming = { 441 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 442 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET, 443 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 444 .family = family_amd_500_series, 445 }; 446 447 static const struct ec_board_info board_info_strix_x570_i_gaming = { 448 .sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM | 449 SENSOR_TEMP_T_SENSOR | 450 SENSOR_FAN_VRM_HS | SENSOR_FAN_CHIPSET | 451 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 452 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 453 .family = family_amd_500_series, 454 }; 455 456 static const struct ec_board_info board_info_strix_z390_f_gaming = { 457 .sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM | 458 SENSOR_TEMP_T_SENSOR | 459 SENSOR_FAN_CPU_OPT, 460 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 461 .family = family_intel_300_series, 462 }; 463 464 static const struct ec_board_info board_info_strix_z690_a_gaming_wifi_d4 = { 465 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM, 466 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX, 467 .family = family_intel_600_series, 468 }; 469 470 static const struct ec_board_info board_info_zenith_ii_extreme = { 471 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR | 472 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 473 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | SENSOR_FAN_VRM_HS | 474 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE | 475 SENSOR_SET_WATER_BLOCK | 476 SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 | 477 SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3, 478 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0, 479 .family = family_amd_500_series, 480 }; 481 482 static const struct ec_board_info board_info_tuf_gaming_x670e_plus = { 483 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE | 484 SENSOR_TEMP_MB | SENSOR_TEMP_VRM | 485 SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT | 486 SENSOR_FAN_CPU_OPT, 487 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH, 488 .family = family_amd_600_series, 489 }; 490 491 #define DMI_EXACT_MATCH_ASUS_BOARD_NAME(name, board_info) \ 492 { \ 493 .matches = { \ 494 DMI_EXACT_MATCH(DMI_BOARD_VENDOR, \ 495 "ASUSTeK COMPUTER INC."), \ 496 DMI_EXACT_MATCH(DMI_BOARD_NAME, name), \ 497 }, \ 498 .driver_data = (void *)board_info, \ 499 } 500 501 static const struct dmi_system_id dmi_table[] = { 502 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X470-PRO", 503 &board_info_prime_x470_pro), 504 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X570-PRO", 505 &board_info_prime_x570_pro), 506 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X570-CREATOR WIFI", 507 &board_info_pro_art_x570_creator_wifi), 508 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X670E-CREATOR WIFI", 509 &board_info_pro_art_x670E_creator_wifi), 510 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt B550-CREATOR", 511 &board_info_pro_art_b550_creator), 512 DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS X570-ACE", 513 &board_info_pro_ws_x570_ace), 514 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII DARK HERO", 515 &board_info_crosshair_viii_dark_hero), 516 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII FORMULA", 517 &board_info_crosshair_viii_hero), 518 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO", 519 &board_info_crosshair_viii_hero), 520 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO (WI-FI)", 521 &board_info_crosshair_viii_hero), 522 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR X670E HERO", 523 &board_info_crosshair_x670e_hero), 524 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR X670E GENE", 525 &board_info_crosshair_x670e_gene), 526 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO", 527 &board_info_maximus_xi_hero), 528 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO (WI-FI)", 529 &board_info_maximus_xi_hero), 530 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII IMPACT", 531 &board_info_crosshair_viii_impact), 532 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-E GAMING", 533 &board_info_strix_b550_e_gaming), 534 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-I GAMING", 535 &board_info_strix_b550_i_gaming), 536 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING", 537 &board_info_strix_x570_e_gaming), 538 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING WIFI II", 539 &board_info_strix_x570_e_gaming_wifi_ii), 540 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-F GAMING", 541 &board_info_strix_x570_f_gaming), 542 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-I GAMING", 543 &board_info_strix_x570_i_gaming), 544 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z390-F GAMING", 545 &board_info_strix_z390_f_gaming), 546 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z690-A GAMING WIFI D4", 547 &board_info_strix_z690_a_gaming_wifi_d4), 548 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME", 549 &board_info_zenith_ii_extreme), 550 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME ALPHA", 551 &board_info_zenith_ii_extreme), 552 DMI_EXACT_MATCH_ASUS_BOARD_NAME("TUF GAMING X670E-PLUS", 553 &board_info_tuf_gaming_x670e_plus), 554 {}, 555 }; 556 557 struct ec_sensor { 558 unsigned int info_index; 559 s32 cached_value; 560 }; 561 562 struct lock_data { 563 union { 564 acpi_handle aml; 565 /* global lock handle */ 566 u32 glk; 567 } mutex; 568 bool (*lock)(struct lock_data *data); 569 bool (*unlock)(struct lock_data *data); 570 }; 571 572 /* 573 * The next function pairs implement options for locking access to the 574 * state and the EC 575 */ 576 static bool lock_via_acpi_mutex(struct lock_data *data) 577 { 578 /* 579 * ASUS DSDT does not specify that access to the EC has to be guarded, 580 * but firmware does access it via ACPI 581 */ 582 return ACPI_SUCCESS(acpi_acquire_mutex(data->mutex.aml, 583 NULL, ACPI_LOCK_DELAY_MS)); 584 } 585 586 static bool unlock_acpi_mutex(struct lock_data *data) 587 { 588 return ACPI_SUCCESS(acpi_release_mutex(data->mutex.aml, NULL)); 589 } 590 591 static bool lock_via_global_acpi_lock(struct lock_data *data) 592 { 593 return ACPI_SUCCESS(acpi_acquire_global_lock(ACPI_LOCK_DELAY_MS, 594 &data->mutex.glk)); 595 } 596 597 static bool unlock_global_acpi_lock(struct lock_data *data) 598 { 599 return ACPI_SUCCESS(acpi_release_global_lock(data->mutex.glk)); 600 } 601 602 struct ec_sensors_data { 603 const struct ec_board_info *board_info; 604 const struct ec_sensor_info *sensors_info; 605 struct ec_sensor *sensors; 606 /* EC registers to read from */ 607 u16 *registers; 608 u8 *read_buffer; 609 /* sorted list of unique register banks */ 610 u8 banks[ASUS_EC_MAX_BANK + 1]; 611 /* in jiffies */ 612 unsigned long last_updated; 613 struct lock_data lock_data; 614 /* number of board EC sensors */ 615 u8 nr_sensors; 616 /* 617 * number of EC registers to read 618 * (sensor might span more than 1 register) 619 */ 620 u8 nr_registers; 621 /* number of unique register banks */ 622 u8 nr_banks; 623 }; 624 625 static u8 register_bank(u16 reg) 626 { 627 return reg >> 8; 628 } 629 630 static u8 register_index(u16 reg) 631 { 632 return reg & 0x00ff; 633 } 634 635 static bool is_sensor_data_signed(const struct ec_sensor_info *si) 636 { 637 /* 638 * guessed from WMI functions in DSDT code for boards 639 * of the X470 generation 640 */ 641 return si->type == hwmon_temp; 642 } 643 644 static const struct ec_sensor_info * 645 get_sensor_info(const struct ec_sensors_data *state, int index) 646 { 647 return state->sensors_info + state->sensors[index].info_index; 648 } 649 650 static int find_ec_sensor_index(const struct ec_sensors_data *ec, 651 enum hwmon_sensor_types type, int channel) 652 { 653 unsigned int i; 654 655 for (i = 0; i < ec->nr_sensors; i++) { 656 if (get_sensor_info(ec, i)->type == type) { 657 if (channel == 0) 658 return i; 659 channel--; 660 } 661 } 662 return -ENOENT; 663 } 664 665 static int bank_compare(const void *a, const void *b) 666 { 667 return *((const s8 *)a) - *((const s8 *)b); 668 } 669 670 static void setup_sensor_data(struct ec_sensors_data *ec) 671 { 672 struct ec_sensor *s = ec->sensors; 673 bool bank_found; 674 int i, j; 675 u8 bank; 676 677 ec->nr_banks = 0; 678 ec->nr_registers = 0; 679 680 for_each_set_bit(i, &ec->board_info->sensors, 681 BITS_PER_TYPE(ec->board_info->sensors)) { 682 s->info_index = i; 683 s->cached_value = 0; 684 ec->nr_registers += 685 ec->sensors_info[s->info_index].addr.components.size; 686 bank_found = false; 687 bank = ec->sensors_info[s->info_index].addr.components.bank; 688 for (j = 0; j < ec->nr_banks; j++) { 689 if (ec->banks[j] == bank) { 690 bank_found = true; 691 break; 692 } 693 } 694 if (!bank_found) { 695 ec->banks[ec->nr_banks++] = bank; 696 } 697 s++; 698 } 699 sort(ec->banks, ec->nr_banks, 1, bank_compare, NULL); 700 } 701 702 static void fill_ec_registers(struct ec_sensors_data *ec) 703 { 704 const struct ec_sensor_info *si; 705 unsigned int i, j, register_idx = 0; 706 707 for (i = 0; i < ec->nr_sensors; ++i) { 708 si = get_sensor_info(ec, i); 709 for (j = 0; j < si->addr.components.size; ++j, ++register_idx) { 710 ec->registers[register_idx] = 711 (si->addr.components.bank << 8) + 712 si->addr.components.index + j; 713 } 714 } 715 } 716 717 static int setup_lock_data(struct device *dev) 718 { 719 const char *mutex_path; 720 int status; 721 struct ec_sensors_data *state = dev_get_drvdata(dev); 722 723 mutex_path = mutex_path_override ? 724 mutex_path_override : state->board_info->mutex_path; 725 726 if (!mutex_path || !strlen(mutex_path)) { 727 dev_err(dev, "Hardware access guard mutex name is empty"); 728 return -EINVAL; 729 } 730 if (!strcmp(mutex_path, ACPI_GLOBAL_LOCK_PSEUDO_PATH)) { 731 state->lock_data.mutex.glk = 0; 732 state->lock_data.lock = lock_via_global_acpi_lock; 733 state->lock_data.unlock = unlock_global_acpi_lock; 734 } else { 735 status = acpi_get_handle(NULL, (acpi_string)mutex_path, 736 &state->lock_data.mutex.aml); 737 if (ACPI_FAILURE(status)) { 738 dev_err(dev, 739 "Failed to get hardware access guard AML mutex '%s': error %d", 740 mutex_path, status); 741 return -ENOENT; 742 } 743 state->lock_data.lock = lock_via_acpi_mutex; 744 state->lock_data.unlock = unlock_acpi_mutex; 745 } 746 return 0; 747 } 748 749 static int asus_ec_bank_switch(u8 bank, u8 *old) 750 { 751 int status = 0; 752 753 if (old) { 754 status = ec_read(ASUS_EC_BANK_REGISTER, old); 755 } 756 if (status || (old && (*old == bank))) 757 return status; 758 return ec_write(ASUS_EC_BANK_REGISTER, bank); 759 } 760 761 static int asus_ec_block_read(const struct device *dev, 762 struct ec_sensors_data *ec) 763 { 764 int ireg, ibank, status; 765 u8 bank, reg_bank, prev_bank; 766 767 bank = 0; 768 status = asus_ec_bank_switch(bank, &prev_bank); 769 if (status) { 770 dev_warn(dev, "EC bank switch failed"); 771 return status; 772 } 773 774 if (prev_bank) { 775 /* oops... somebody else is working with the EC too */ 776 dev_warn(dev, 777 "Concurrent access to the ACPI EC detected.\nRace condition possible."); 778 } 779 780 /* read registers minimizing bank switches. */ 781 for (ibank = 0; ibank < ec->nr_banks; ibank++) { 782 if (bank != ec->banks[ibank]) { 783 bank = ec->banks[ibank]; 784 if (asus_ec_bank_switch(bank, NULL)) { 785 dev_warn(dev, "EC bank switch to %d failed", 786 bank); 787 break; 788 } 789 } 790 for (ireg = 0; ireg < ec->nr_registers; ireg++) { 791 reg_bank = register_bank(ec->registers[ireg]); 792 if (reg_bank < bank) { 793 continue; 794 } 795 ec_read(register_index(ec->registers[ireg]), 796 ec->read_buffer + ireg); 797 } 798 } 799 800 status = asus_ec_bank_switch(prev_bank, NULL); 801 return status; 802 } 803 804 static inline s32 get_sensor_value(const struct ec_sensor_info *si, u8 *data) 805 { 806 if (is_sensor_data_signed(si)) { 807 switch (si->addr.components.size) { 808 case 1: 809 return (s8)*data; 810 case 2: 811 return (s16)get_unaligned_be16(data); 812 case 4: 813 return (s32)get_unaligned_be32(data); 814 default: 815 return 0; 816 } 817 } else { 818 switch (si->addr.components.size) { 819 case 1: 820 return *data; 821 case 2: 822 return get_unaligned_be16(data); 823 case 4: 824 return get_unaligned_be32(data); 825 default: 826 return 0; 827 } 828 } 829 } 830 831 static void update_sensor_values(struct ec_sensors_data *ec, u8 *data) 832 { 833 const struct ec_sensor_info *si; 834 struct ec_sensor *s, *sensor_end; 835 836 sensor_end = ec->sensors + ec->nr_sensors; 837 for (s = ec->sensors; s != sensor_end; s++) { 838 si = ec->sensors_info + s->info_index; 839 s->cached_value = get_sensor_value(si, data); 840 data += si->addr.components.size; 841 } 842 } 843 844 static int update_ec_sensors(const struct device *dev, 845 struct ec_sensors_data *ec) 846 { 847 int status; 848 849 if (!ec->lock_data.lock(&ec->lock_data)) { 850 dev_warn(dev, "Failed to acquire mutex"); 851 return -EBUSY; 852 } 853 854 status = asus_ec_block_read(dev, ec); 855 856 if (!status) { 857 update_sensor_values(ec, ec->read_buffer); 858 } 859 860 if (!ec->lock_data.unlock(&ec->lock_data)) 861 dev_err(dev, "Failed to release mutex"); 862 863 return status; 864 } 865 866 static long scale_sensor_value(s32 value, int data_type) 867 { 868 switch (data_type) { 869 case hwmon_curr: 870 case hwmon_temp: 871 return value * MILLI; 872 default: 873 return value; 874 } 875 } 876 877 static int get_cached_value_or_update(const struct device *dev, 878 int sensor_index, 879 struct ec_sensors_data *state, s32 *value) 880 { 881 if (time_after(jiffies, state->last_updated + HZ)) { 882 if (update_ec_sensors(dev, state)) { 883 dev_err(dev, "update_ec_sensors() failure\n"); 884 return -EIO; 885 } 886 887 state->last_updated = jiffies; 888 } 889 890 *value = state->sensors[sensor_index].cached_value; 891 return 0; 892 } 893 894 /* 895 * Now follow the functions that implement the hwmon interface 896 */ 897 898 static int asus_ec_hwmon_read(struct device *dev, enum hwmon_sensor_types type, 899 u32 attr, int channel, long *val) 900 { 901 int ret; 902 s32 value = 0; 903 904 struct ec_sensors_data *state = dev_get_drvdata(dev); 905 int sidx = find_ec_sensor_index(state, type, channel); 906 907 if (sidx < 0) { 908 return sidx; 909 } 910 911 ret = get_cached_value_or_update(dev, sidx, state, &value); 912 if (!ret) { 913 *val = scale_sensor_value(value, 914 get_sensor_info(state, sidx)->type); 915 } 916 917 return ret; 918 } 919 920 static int asus_ec_hwmon_read_string(struct device *dev, 921 enum hwmon_sensor_types type, u32 attr, 922 int channel, const char **str) 923 { 924 struct ec_sensors_data *state = dev_get_drvdata(dev); 925 int sensor_index = find_ec_sensor_index(state, type, channel); 926 *str = get_sensor_info(state, sensor_index)->label; 927 928 return 0; 929 } 930 931 static umode_t asus_ec_hwmon_is_visible(const void *drvdata, 932 enum hwmon_sensor_types type, u32 attr, 933 int channel) 934 { 935 const struct ec_sensors_data *state = drvdata; 936 937 return find_ec_sensor_index(state, type, channel) >= 0 ? S_IRUGO : 0; 938 } 939 940 static int 941 asus_ec_hwmon_add_chan_info(struct hwmon_channel_info *asus_ec_hwmon_chan, 942 struct device *dev, int num, 943 enum hwmon_sensor_types type, u32 config) 944 { 945 int i; 946 u32 *cfg = devm_kcalloc(dev, num + 1, sizeof(*cfg), GFP_KERNEL); 947 948 if (!cfg) 949 return -ENOMEM; 950 951 asus_ec_hwmon_chan->type = type; 952 asus_ec_hwmon_chan->config = cfg; 953 for (i = 0; i < num; i++, cfg++) 954 *cfg = config; 955 956 return 0; 957 } 958 959 static const struct hwmon_ops asus_ec_hwmon_ops = { 960 .is_visible = asus_ec_hwmon_is_visible, 961 .read = asus_ec_hwmon_read, 962 .read_string = asus_ec_hwmon_read_string, 963 }; 964 965 static struct hwmon_chip_info asus_ec_chip_info = { 966 .ops = &asus_ec_hwmon_ops, 967 }; 968 969 static const struct ec_board_info *get_board_info(void) 970 { 971 const struct dmi_system_id *dmi_entry; 972 973 dmi_entry = dmi_first_match(dmi_table); 974 return dmi_entry ? dmi_entry->driver_data : NULL; 975 } 976 977 static int asus_ec_probe(struct platform_device *pdev) 978 { 979 const struct hwmon_channel_info **ptr_asus_ec_ci; 980 int nr_count[hwmon_max] = { 0 }, nr_types = 0; 981 struct hwmon_channel_info *asus_ec_hwmon_chan; 982 const struct ec_board_info *pboard_info; 983 const struct hwmon_chip_info *chip_info; 984 struct device *dev = &pdev->dev; 985 struct ec_sensors_data *ec_data; 986 const struct ec_sensor_info *si; 987 enum hwmon_sensor_types type; 988 struct device *hwdev; 989 unsigned int i; 990 int status; 991 992 pboard_info = get_board_info(); 993 if (!pboard_info) 994 return -ENODEV; 995 996 ec_data = devm_kzalloc(dev, sizeof(struct ec_sensors_data), 997 GFP_KERNEL); 998 if (!ec_data) 999 return -ENOMEM; 1000 1001 dev_set_drvdata(dev, ec_data); 1002 ec_data->board_info = pboard_info; 1003 1004 switch (ec_data->board_info->family) { 1005 case family_amd_400_series: 1006 ec_data->sensors_info = sensors_family_amd_400; 1007 break; 1008 case family_amd_500_series: 1009 ec_data->sensors_info = sensors_family_amd_500; 1010 break; 1011 case family_amd_600_series: 1012 ec_data->sensors_info = sensors_family_amd_600; 1013 break; 1014 case family_intel_300_series: 1015 ec_data->sensors_info = sensors_family_intel_300; 1016 break; 1017 case family_intel_600_series: 1018 ec_data->sensors_info = sensors_family_intel_600; 1019 break; 1020 default: 1021 dev_err(dev, "Unknown board family: %d", 1022 ec_data->board_info->family); 1023 return -EINVAL; 1024 } 1025 1026 ec_data->nr_sensors = hweight_long(ec_data->board_info->sensors); 1027 ec_data->sensors = devm_kcalloc(dev, ec_data->nr_sensors, 1028 sizeof(struct ec_sensor), GFP_KERNEL); 1029 if (!ec_data->sensors) 1030 return -ENOMEM; 1031 1032 status = setup_lock_data(dev); 1033 if (status) { 1034 dev_err(dev, "Failed to setup state/EC locking: %d", status); 1035 return status; 1036 } 1037 1038 setup_sensor_data(ec_data); 1039 ec_data->registers = devm_kcalloc(dev, ec_data->nr_registers, 1040 sizeof(u16), GFP_KERNEL); 1041 ec_data->read_buffer = devm_kcalloc(dev, ec_data->nr_registers, 1042 sizeof(u8), GFP_KERNEL); 1043 1044 if (!ec_data->registers || !ec_data->read_buffer) 1045 return -ENOMEM; 1046 1047 fill_ec_registers(ec_data); 1048 1049 for (i = 0; i < ec_data->nr_sensors; ++i) { 1050 si = get_sensor_info(ec_data, i); 1051 if (!nr_count[si->type]) 1052 ++nr_types; 1053 ++nr_count[si->type]; 1054 } 1055 1056 if (nr_count[hwmon_temp]) 1057 nr_count[hwmon_chip]++, nr_types++; 1058 1059 asus_ec_hwmon_chan = devm_kcalloc( 1060 dev, nr_types, sizeof(*asus_ec_hwmon_chan), GFP_KERNEL); 1061 if (!asus_ec_hwmon_chan) 1062 return -ENOMEM; 1063 1064 ptr_asus_ec_ci = devm_kcalloc(dev, nr_types + 1, 1065 sizeof(*ptr_asus_ec_ci), GFP_KERNEL); 1066 if (!ptr_asus_ec_ci) 1067 return -ENOMEM; 1068 1069 asus_ec_chip_info.info = ptr_asus_ec_ci; 1070 chip_info = &asus_ec_chip_info; 1071 1072 for (type = 0; type < hwmon_max; ++type) { 1073 if (!nr_count[type]) 1074 continue; 1075 1076 asus_ec_hwmon_add_chan_info(asus_ec_hwmon_chan, dev, 1077 nr_count[type], type, 1078 hwmon_attributes[type]); 1079 *ptr_asus_ec_ci++ = asus_ec_hwmon_chan++; 1080 } 1081 1082 dev_info(dev, "board has %d EC sensors that span %d registers", 1083 ec_data->nr_sensors, ec_data->nr_registers); 1084 1085 hwdev = devm_hwmon_device_register_with_info(dev, "asusec", 1086 ec_data, chip_info, NULL); 1087 1088 return PTR_ERR_OR_ZERO(hwdev); 1089 } 1090 1091 MODULE_DEVICE_TABLE(dmi, dmi_table); 1092 1093 static struct platform_driver asus_ec_sensors_platform_driver = { 1094 .driver = { 1095 .name = "asus-ec-sensors", 1096 }, 1097 .probe = asus_ec_probe, 1098 }; 1099 1100 static struct platform_device *asus_ec_sensors_platform_device; 1101 1102 static int __init asus_ec_init(void) 1103 { 1104 asus_ec_sensors_platform_device = 1105 platform_create_bundle(&asus_ec_sensors_platform_driver, 1106 asus_ec_probe, NULL, 0, NULL, 0); 1107 1108 if (IS_ERR(asus_ec_sensors_platform_device)) 1109 return PTR_ERR(asus_ec_sensors_platform_device); 1110 1111 return 0; 1112 } 1113 1114 static void __exit asus_ec_exit(void) 1115 { 1116 platform_device_unregister(asus_ec_sensors_platform_device); 1117 platform_driver_unregister(&asus_ec_sensors_platform_driver); 1118 } 1119 1120 module_init(asus_ec_init); 1121 module_exit(asus_ec_exit); 1122 1123 module_param_named(mutex_path, mutex_path_override, charp, 0); 1124 MODULE_PARM_DESC(mutex_path, 1125 "Override ACPI mutex path used to guard access to hardware"); 1126 1127 MODULE_AUTHOR("Eugene Shalygin <eugene.shalygin@gmail.com>"); 1128 MODULE_DESCRIPTION( 1129 "HWMON driver for sensors accessible via ACPI EC in ASUS motherboards"); 1130 MODULE_LICENSE("GPL"); 1131