1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * HWMON driver for ASUS motherboards that publish some sensor values 4 * via the embedded controller registers. 5 * 6 * Copyright (C) 2021 Eugene Shalygin <eugene.shalygin@gmail.com> 7 8 * EC provides: 9 * - Chipset temperature 10 * - CPU temperature 11 * - Motherboard temperature 12 * - T_Sensor temperature 13 * - VRM temperature 14 * - Water In temperature 15 * - Water Out temperature 16 * - CPU Optional fan RPM 17 * - Chipset fan RPM 18 * - VRM Heat Sink fan RPM 19 * - Water Flow fan RPM 20 * - CPU current 21 * - CPU core voltage 22 */ 23 24 #include <linux/acpi.h> 25 #include <linux/bitops.h> 26 #include <linux/dev_printk.h> 27 #include <linux/dmi.h> 28 #include <linux/hwmon.h> 29 #include <linux/init.h> 30 #include <linux/jiffies.h> 31 #include <linux/kernel.h> 32 #include <linux/module.h> 33 #include <linux/platform_device.h> 34 #include <linux/sort.h> 35 #include <linux/units.h> 36 37 #include <asm/unaligned.h> 38 39 static char *mutex_path_override; 40 41 /* Writing to this EC register switches EC bank */ 42 #define ASUS_EC_BANK_REGISTER 0xff 43 #define SENSOR_LABEL_LEN 16 44 45 /* 46 * Arbitrary set max. allowed bank number. Required for sorting banks and 47 * currently is overkill with just 2 banks used at max, but for the sake 48 * of alignment let's set it to a higher value. 49 */ 50 #define ASUS_EC_MAX_BANK 3 51 52 #define ACPI_LOCK_DELAY_MS 500 53 54 /* ACPI mutex for locking access to the EC for the firmware */ 55 #define ASUS_HW_ACCESS_MUTEX_ASMX "\\AMW0.ASMX" 56 57 #define ASUS_HW_ACCESS_MUTEX_RMTW_ASMX "\\RMTW.ASMX" 58 59 #define ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0 "\\_SB_.PCI0.SBRG.SIO1.MUT0" 60 61 #define MAX_IDENTICAL_BOARD_VARIATIONS 3 62 63 /* Moniker for the ACPI global lock (':' is not allowed in ASL identifiers) */ 64 #define ACPI_GLOBAL_LOCK_PSEUDO_PATH ":GLOBAL_LOCK" 65 66 typedef union { 67 u32 value; 68 struct { 69 u8 index; 70 u8 bank; 71 u8 size; 72 u8 dummy; 73 } components; 74 } sensor_address; 75 76 #define MAKE_SENSOR_ADDRESS(size, bank, index) { \ 77 .value = (size << 16) + (bank << 8) + index \ 78 } 79 80 static u32 hwmon_attributes[hwmon_max] = { 81 [hwmon_chip] = HWMON_C_REGISTER_TZ, 82 [hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL, 83 [hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL, 84 [hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL, 85 [hwmon_fan] = HWMON_F_INPUT | HWMON_F_LABEL, 86 }; 87 88 struct ec_sensor_info { 89 char label[SENSOR_LABEL_LEN]; 90 enum hwmon_sensor_types type; 91 sensor_address addr; 92 }; 93 94 #define EC_SENSOR(sensor_label, sensor_type, size, bank, index) { \ 95 .label = sensor_label, .type = sensor_type, \ 96 .addr = MAKE_SENSOR_ADDRESS(size, bank, index), \ 97 } 98 99 enum ec_sensors { 100 /* chipset temperature [℃] */ 101 ec_sensor_temp_chipset, 102 /* CPU temperature [℃] */ 103 ec_sensor_temp_cpu, 104 /* CPU package temperature [℃] */ 105 ec_sensor_temp_cpu_package, 106 /* motherboard temperature [℃] */ 107 ec_sensor_temp_mb, 108 /* "T_Sensor" temperature sensor reading [℃] */ 109 ec_sensor_temp_t_sensor, 110 /* VRM temperature [℃] */ 111 ec_sensor_temp_vrm, 112 /* CPU Core voltage [mV] */ 113 ec_sensor_in_cpu_core, 114 /* CPU_Opt fan [RPM] */ 115 ec_sensor_fan_cpu_opt, 116 /* VRM heat sink fan [RPM] */ 117 ec_sensor_fan_vrm_hs, 118 /* Chipset fan [RPM] */ 119 ec_sensor_fan_chipset, 120 /* Water flow sensor reading [RPM] */ 121 ec_sensor_fan_water_flow, 122 /* CPU current [A] */ 123 ec_sensor_curr_cpu, 124 /* "Water_In" temperature sensor reading [℃] */ 125 ec_sensor_temp_water_in, 126 /* "Water_Out" temperature sensor reading [℃] */ 127 ec_sensor_temp_water_out, 128 /* "Water_Block_In" temperature sensor reading [℃] */ 129 ec_sensor_temp_water_block_in, 130 /* "Water_Block_Out" temperature sensor reading [℃] */ 131 ec_sensor_temp_water_block_out, 132 /* "T_sensor_2" temperature sensor reading [℃] */ 133 ec_sensor_temp_t_sensor_2, 134 /* "Extra_1" temperature sensor reading [℃] */ 135 ec_sensor_temp_sensor_extra_1, 136 /* "Extra_2" temperature sensor reading [℃] */ 137 ec_sensor_temp_sensor_extra_2, 138 /* "Extra_3" temperature sensor reading [℃] */ 139 ec_sensor_temp_sensor_extra_3, 140 }; 141 142 #define SENSOR_TEMP_CHIPSET BIT(ec_sensor_temp_chipset) 143 #define SENSOR_TEMP_CPU BIT(ec_sensor_temp_cpu) 144 #define SENSOR_TEMP_CPU_PACKAGE BIT(ec_sensor_temp_cpu_package) 145 #define SENSOR_TEMP_MB BIT(ec_sensor_temp_mb) 146 #define SENSOR_TEMP_T_SENSOR BIT(ec_sensor_temp_t_sensor) 147 #define SENSOR_TEMP_VRM BIT(ec_sensor_temp_vrm) 148 #define SENSOR_IN_CPU_CORE BIT(ec_sensor_in_cpu_core) 149 #define SENSOR_FAN_CPU_OPT BIT(ec_sensor_fan_cpu_opt) 150 #define SENSOR_FAN_VRM_HS BIT(ec_sensor_fan_vrm_hs) 151 #define SENSOR_FAN_CHIPSET BIT(ec_sensor_fan_chipset) 152 #define SENSOR_FAN_WATER_FLOW BIT(ec_sensor_fan_water_flow) 153 #define SENSOR_CURR_CPU BIT(ec_sensor_curr_cpu) 154 #define SENSOR_TEMP_WATER_IN BIT(ec_sensor_temp_water_in) 155 #define SENSOR_TEMP_WATER_OUT BIT(ec_sensor_temp_water_out) 156 #define SENSOR_TEMP_WATER_BLOCK_IN BIT(ec_sensor_temp_water_block_in) 157 #define SENSOR_TEMP_WATER_BLOCK_OUT BIT(ec_sensor_temp_water_block_out) 158 #define SENSOR_TEMP_T_SENSOR_2 BIT(ec_sensor_temp_t_sensor_2) 159 #define SENSOR_TEMP_SENSOR_EXTRA_1 BIT(ec_sensor_temp_sensor_extra_1) 160 #define SENSOR_TEMP_SENSOR_EXTRA_2 BIT(ec_sensor_temp_sensor_extra_2) 161 #define SENSOR_TEMP_SENSOR_EXTRA_3 BIT(ec_sensor_temp_sensor_extra_3) 162 163 enum board_family { 164 family_unknown, 165 family_amd_400_series, 166 family_amd_500_series, 167 family_amd_600_series, 168 family_intel_300_series, 169 family_intel_600_series 170 }; 171 172 /* All the known sensors for ASUS EC controllers */ 173 static const struct ec_sensor_info sensors_family_amd_400[] = { 174 [ec_sensor_temp_chipset] = 175 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 176 [ec_sensor_temp_cpu] = 177 EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 178 [ec_sensor_temp_mb] = 179 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 180 [ec_sensor_temp_t_sensor] = 181 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 182 [ec_sensor_temp_vrm] = 183 EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 184 [ec_sensor_in_cpu_core] = 185 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2), 186 [ec_sensor_fan_cpu_opt] = 187 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xbc), 188 [ec_sensor_fan_vrm_hs] = 189 EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 190 [ec_sensor_fan_chipset] = 191 /* no chipset fans in this generation */ 192 EC_SENSOR("Chipset", hwmon_fan, 0, 0x00, 0x00), 193 [ec_sensor_fan_water_flow] = 194 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xb4), 195 [ec_sensor_curr_cpu] = 196 EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4), 197 [ec_sensor_temp_water_in] = 198 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x0d), 199 [ec_sensor_temp_water_out] = 200 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x0b), 201 }; 202 203 static const struct ec_sensor_info sensors_family_amd_500[] = { 204 [ec_sensor_temp_chipset] = 205 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 206 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 207 [ec_sensor_temp_mb] = 208 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 209 [ec_sensor_temp_t_sensor] = 210 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 211 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 212 [ec_sensor_in_cpu_core] = 213 EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2), 214 [ec_sensor_fan_cpu_opt] = 215 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0), 216 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 217 [ec_sensor_fan_chipset] = 218 EC_SENSOR("Chipset", hwmon_fan, 2, 0x00, 0xb4), 219 [ec_sensor_fan_water_flow] = 220 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc), 221 [ec_sensor_curr_cpu] = EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4), 222 [ec_sensor_temp_water_in] = 223 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00), 224 [ec_sensor_temp_water_out] = 225 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01), 226 [ec_sensor_temp_water_block_in] = 227 EC_SENSOR("Water_Block_In", hwmon_temp, 1, 0x01, 0x02), 228 [ec_sensor_temp_water_block_out] = 229 EC_SENSOR("Water_Block_Out", hwmon_temp, 1, 0x01, 0x03), 230 [ec_sensor_temp_sensor_extra_1] = 231 EC_SENSOR("Extra_1", hwmon_temp, 1, 0x01, 0x09), 232 [ec_sensor_temp_t_sensor_2] = 233 EC_SENSOR("T_sensor_2", hwmon_temp, 1, 0x01, 0x0a), 234 [ec_sensor_temp_sensor_extra_2] = 235 EC_SENSOR("Extra_2", hwmon_temp, 1, 0x01, 0x0b), 236 [ec_sensor_temp_sensor_extra_3] = 237 EC_SENSOR("Extra_3", hwmon_temp, 1, 0x01, 0x0c), 238 }; 239 240 static const struct ec_sensor_info sensors_family_amd_600[] = { 241 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x30), 242 [ec_sensor_temp_cpu_package] = EC_SENSOR("CPU Package", hwmon_temp, 1, 0x00, 0x31), 243 [ec_sensor_temp_mb] = 244 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x32), 245 [ec_sensor_temp_vrm] = 246 EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x33), 247 [ec_sensor_temp_water_in] = 248 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00), 249 [ec_sensor_temp_water_out] = 250 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01), 251 }; 252 253 static const struct ec_sensor_info sensors_family_intel_300[] = { 254 [ec_sensor_temp_chipset] = 255 EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a), 256 [ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b), 257 [ec_sensor_temp_mb] = 258 EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c), 259 [ec_sensor_temp_t_sensor] = 260 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 261 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 262 [ec_sensor_fan_cpu_opt] = 263 EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0), 264 [ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2), 265 [ec_sensor_fan_water_flow] = 266 EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc), 267 [ec_sensor_temp_water_in] = 268 EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00), 269 [ec_sensor_temp_water_out] = 270 EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01), 271 }; 272 273 static const struct ec_sensor_info sensors_family_intel_600[] = { 274 [ec_sensor_temp_t_sensor] = 275 EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d), 276 [ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e), 277 }; 278 279 /* Shortcuts for common combinations */ 280 #define SENSOR_SET_TEMP_CHIPSET_CPU_MB \ 281 (SENSOR_TEMP_CHIPSET | SENSOR_TEMP_CPU | SENSOR_TEMP_MB) 282 #define SENSOR_SET_TEMP_WATER (SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT) 283 #define SENSOR_SET_WATER_BLOCK \ 284 (SENSOR_TEMP_WATER_BLOCK_IN | SENSOR_TEMP_WATER_BLOCK_OUT) 285 286 struct ec_board_info { 287 unsigned long sensors; 288 /* 289 * Defines which mutex to use for guarding access to the state and the 290 * hardware. Can be either a full path to an AML mutex or the 291 * pseudo-path ACPI_GLOBAL_LOCK_PSEUDO_PATH to use the global ACPI lock, 292 * or left empty to use a regular mutex object, in which case access to 293 * the hardware is not guarded. 294 */ 295 const char *mutex_path; 296 enum board_family family; 297 }; 298 299 static const struct ec_board_info board_info_prime_x470_pro = { 300 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 301 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 302 SENSOR_FAN_CPU_OPT | 303 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 304 .mutex_path = ACPI_GLOBAL_LOCK_PSEUDO_PATH, 305 .family = family_amd_400_series, 306 }; 307 308 static const struct ec_board_info board_info_prime_x570_pro = { 309 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 310 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET, 311 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 312 .family = family_amd_500_series, 313 }; 314 315 static const struct ec_board_info board_info_pro_art_x570_creator_wifi = { 316 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 317 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CPU_OPT | 318 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 319 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 320 .family = family_amd_500_series, 321 }; 322 323 static const struct ec_board_info board_info_pro_art_b550_creator = { 324 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 325 SENSOR_TEMP_T_SENSOR | 326 SENSOR_FAN_CPU_OPT, 327 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 328 .family = family_amd_500_series, 329 }; 330 331 static const struct ec_board_info board_info_pro_ws_x570_ace = { 332 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM | 333 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET | 334 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 335 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 336 .family = family_amd_500_series, 337 }; 338 339 static const struct ec_board_info board_info_crosshair_x670e_hero = { 340 .sensors = SENSOR_TEMP_CPU | SENSOR_TEMP_CPU_PACKAGE | 341 SENSOR_TEMP_MB | SENSOR_TEMP_VRM | 342 SENSOR_SET_TEMP_WATER, 343 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX, 344 .family = family_amd_600_series, 345 }; 346 347 static const struct ec_board_info board_info_crosshair_viii_dark_hero = { 348 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 349 SENSOR_TEMP_T_SENSOR | 350 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 351 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW | 352 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 353 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 354 .family = family_amd_500_series, 355 }; 356 357 static const struct ec_board_info board_info_crosshair_viii_hero = { 358 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 359 SENSOR_TEMP_T_SENSOR | 360 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 361 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | 362 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | 363 SENSOR_IN_CPU_CORE, 364 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 365 .family = family_amd_500_series, 366 }; 367 368 static const struct ec_board_info board_info_maximus_xi_hero = { 369 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 370 SENSOR_TEMP_T_SENSOR | 371 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 372 SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW, 373 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 374 .family = family_intel_300_series, 375 }; 376 377 static const struct ec_board_info board_info_crosshair_viii_impact = { 378 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 379 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 380 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU | 381 SENSOR_IN_CPU_CORE, 382 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 383 .family = family_amd_500_series, 384 }; 385 386 static const struct ec_board_info board_info_strix_b550_e_gaming = { 387 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 388 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 389 SENSOR_FAN_CPU_OPT, 390 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 391 .family = family_amd_500_series, 392 }; 393 394 static const struct ec_board_info board_info_strix_b550_i_gaming = { 395 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 396 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 397 SENSOR_FAN_VRM_HS | SENSOR_CURR_CPU | 398 SENSOR_IN_CPU_CORE, 399 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 400 .family = family_amd_500_series, 401 }; 402 403 static const struct ec_board_info board_info_strix_x570_e_gaming = { 404 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 405 SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM | 406 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU | 407 SENSOR_IN_CPU_CORE, 408 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 409 .family = family_amd_500_series, 410 }; 411 412 static const struct ec_board_info board_info_strix_x570_e_gaming_wifi_ii = { 413 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 414 SENSOR_TEMP_T_SENSOR | SENSOR_CURR_CPU | 415 SENSOR_IN_CPU_CORE, 416 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 417 .family = family_amd_500_series, 418 }; 419 420 static const struct ec_board_info board_info_strix_x570_f_gaming = { 421 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | 422 SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET, 423 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 424 .family = family_amd_500_series, 425 }; 426 427 static const struct ec_board_info board_info_strix_x570_i_gaming = { 428 .sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM | 429 SENSOR_TEMP_T_SENSOR | 430 SENSOR_FAN_VRM_HS | SENSOR_FAN_CHIPSET | 431 SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE, 432 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 433 .family = family_amd_500_series, 434 }; 435 436 static const struct ec_board_info board_info_strix_z390_f_gaming = { 437 .sensors = SENSOR_TEMP_CHIPSET | SENSOR_TEMP_VRM | 438 SENSOR_TEMP_T_SENSOR | 439 SENSOR_FAN_CPU_OPT, 440 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX, 441 .family = family_intel_300_series, 442 }; 443 444 static const struct ec_board_info board_info_strix_z690_a_gaming_wifi_d4 = { 445 .sensors = SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM, 446 .mutex_path = ASUS_HW_ACCESS_MUTEX_RMTW_ASMX, 447 .family = family_intel_600_series, 448 }; 449 450 static const struct ec_board_info board_info_zenith_ii_extreme = { 451 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR | 452 SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER | 453 SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET | SENSOR_FAN_VRM_HS | 454 SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE | 455 SENSOR_SET_WATER_BLOCK | 456 SENSOR_TEMP_T_SENSOR_2 | SENSOR_TEMP_SENSOR_EXTRA_1 | 457 SENSOR_TEMP_SENSOR_EXTRA_2 | SENSOR_TEMP_SENSOR_EXTRA_3, 458 .mutex_path = ASUS_HW_ACCESS_MUTEX_SB_PCI0_SBRG_SIO1_MUT0, 459 .family = family_amd_500_series, 460 }; 461 462 #define DMI_EXACT_MATCH_ASUS_BOARD_NAME(name, board_info) \ 463 { \ 464 .matches = { \ 465 DMI_EXACT_MATCH(DMI_BOARD_VENDOR, \ 466 "ASUSTeK COMPUTER INC."), \ 467 DMI_EXACT_MATCH(DMI_BOARD_NAME, name), \ 468 }, \ 469 .driver_data = (void *)board_info, \ 470 } 471 472 static const struct dmi_system_id dmi_table[] = { 473 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X470-PRO", 474 &board_info_prime_x470_pro), 475 DMI_EXACT_MATCH_ASUS_BOARD_NAME("PRIME X570-PRO", 476 &board_info_prime_x570_pro), 477 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt X570-CREATOR WIFI", 478 &board_info_pro_art_x570_creator_wifi), 479 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ProArt B550-CREATOR", 480 &board_info_pro_art_b550_creator), 481 DMI_EXACT_MATCH_ASUS_BOARD_NAME("Pro WS X570-ACE", 482 &board_info_pro_ws_x570_ace), 483 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII DARK HERO", 484 &board_info_crosshair_viii_dark_hero), 485 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII FORMULA", 486 &board_info_crosshair_viii_hero), 487 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO", 488 &board_info_crosshair_viii_hero), 489 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII HERO (WI-FI)", 490 &board_info_crosshair_viii_hero), 491 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR X670E HERO", 492 &board_info_crosshair_x670e_hero), 493 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO", 494 &board_info_maximus_xi_hero), 495 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG MAXIMUS XI HERO (WI-FI)", 496 &board_info_maximus_xi_hero), 497 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG CROSSHAIR VIII IMPACT", 498 &board_info_crosshair_viii_impact), 499 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-E GAMING", 500 &board_info_strix_b550_e_gaming), 501 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX B550-I GAMING", 502 &board_info_strix_b550_i_gaming), 503 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING", 504 &board_info_strix_x570_e_gaming), 505 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-E GAMING WIFI II", 506 &board_info_strix_x570_e_gaming_wifi_ii), 507 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-F GAMING", 508 &board_info_strix_x570_f_gaming), 509 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX X570-I GAMING", 510 &board_info_strix_x570_i_gaming), 511 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z390-F GAMING", 512 &board_info_strix_z390_f_gaming), 513 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG STRIX Z690-A GAMING WIFI D4", 514 &board_info_strix_z690_a_gaming_wifi_d4), 515 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME", 516 &board_info_zenith_ii_extreme), 517 DMI_EXACT_MATCH_ASUS_BOARD_NAME("ROG ZENITH II EXTREME ALPHA", 518 &board_info_zenith_ii_extreme), 519 {}, 520 }; 521 522 struct ec_sensor { 523 unsigned int info_index; 524 s32 cached_value; 525 }; 526 527 struct lock_data { 528 union { 529 acpi_handle aml; 530 /* global lock handle */ 531 u32 glk; 532 } mutex; 533 bool (*lock)(struct lock_data *data); 534 bool (*unlock)(struct lock_data *data); 535 }; 536 537 /* 538 * The next function pairs implement options for locking access to the 539 * state and the EC 540 */ 541 static bool lock_via_acpi_mutex(struct lock_data *data) 542 { 543 /* 544 * ASUS DSDT does not specify that access to the EC has to be guarded, 545 * but firmware does access it via ACPI 546 */ 547 return ACPI_SUCCESS(acpi_acquire_mutex(data->mutex.aml, 548 NULL, ACPI_LOCK_DELAY_MS)); 549 } 550 551 static bool unlock_acpi_mutex(struct lock_data *data) 552 { 553 return ACPI_SUCCESS(acpi_release_mutex(data->mutex.aml, NULL)); 554 } 555 556 static bool lock_via_global_acpi_lock(struct lock_data *data) 557 { 558 return ACPI_SUCCESS(acpi_acquire_global_lock(ACPI_LOCK_DELAY_MS, 559 &data->mutex.glk)); 560 } 561 562 static bool unlock_global_acpi_lock(struct lock_data *data) 563 { 564 return ACPI_SUCCESS(acpi_release_global_lock(data->mutex.glk)); 565 } 566 567 struct ec_sensors_data { 568 const struct ec_board_info *board_info; 569 const struct ec_sensor_info *sensors_info; 570 struct ec_sensor *sensors; 571 /* EC registers to read from */ 572 u16 *registers; 573 u8 *read_buffer; 574 /* sorted list of unique register banks */ 575 u8 banks[ASUS_EC_MAX_BANK + 1]; 576 /* in jiffies */ 577 unsigned long last_updated; 578 struct lock_data lock_data; 579 /* number of board EC sensors */ 580 u8 nr_sensors; 581 /* 582 * number of EC registers to read 583 * (sensor might span more than 1 register) 584 */ 585 u8 nr_registers; 586 /* number of unique register banks */ 587 u8 nr_banks; 588 }; 589 590 static u8 register_bank(u16 reg) 591 { 592 return reg >> 8; 593 } 594 595 static u8 register_index(u16 reg) 596 { 597 return reg & 0x00ff; 598 } 599 600 static bool is_sensor_data_signed(const struct ec_sensor_info *si) 601 { 602 /* 603 * guessed from WMI functions in DSDT code for boards 604 * of the X470 generation 605 */ 606 return si->type == hwmon_temp; 607 } 608 609 static const struct ec_sensor_info * 610 get_sensor_info(const struct ec_sensors_data *state, int index) 611 { 612 return state->sensors_info + state->sensors[index].info_index; 613 } 614 615 static int find_ec_sensor_index(const struct ec_sensors_data *ec, 616 enum hwmon_sensor_types type, int channel) 617 { 618 unsigned int i; 619 620 for (i = 0; i < ec->nr_sensors; i++) { 621 if (get_sensor_info(ec, i)->type == type) { 622 if (channel == 0) 623 return i; 624 channel--; 625 } 626 } 627 return -ENOENT; 628 } 629 630 static int bank_compare(const void *a, const void *b) 631 { 632 return *((const s8 *)a) - *((const s8 *)b); 633 } 634 635 static void setup_sensor_data(struct ec_sensors_data *ec) 636 { 637 struct ec_sensor *s = ec->sensors; 638 bool bank_found; 639 int i, j; 640 u8 bank; 641 642 ec->nr_banks = 0; 643 ec->nr_registers = 0; 644 645 for_each_set_bit(i, &ec->board_info->sensors, 646 BITS_PER_TYPE(ec->board_info->sensors)) { 647 s->info_index = i; 648 s->cached_value = 0; 649 ec->nr_registers += 650 ec->sensors_info[s->info_index].addr.components.size; 651 bank_found = false; 652 bank = ec->sensors_info[s->info_index].addr.components.bank; 653 for (j = 0; j < ec->nr_banks; j++) { 654 if (ec->banks[j] == bank) { 655 bank_found = true; 656 break; 657 } 658 } 659 if (!bank_found) { 660 ec->banks[ec->nr_banks++] = bank; 661 } 662 s++; 663 } 664 sort(ec->banks, ec->nr_banks, 1, bank_compare, NULL); 665 } 666 667 static void fill_ec_registers(struct ec_sensors_data *ec) 668 { 669 const struct ec_sensor_info *si; 670 unsigned int i, j, register_idx = 0; 671 672 for (i = 0; i < ec->nr_sensors; ++i) { 673 si = get_sensor_info(ec, i); 674 for (j = 0; j < si->addr.components.size; ++j, ++register_idx) { 675 ec->registers[register_idx] = 676 (si->addr.components.bank << 8) + 677 si->addr.components.index + j; 678 } 679 } 680 } 681 682 static int setup_lock_data(struct device *dev) 683 { 684 const char *mutex_path; 685 int status; 686 struct ec_sensors_data *state = dev_get_drvdata(dev); 687 688 mutex_path = mutex_path_override ? 689 mutex_path_override : state->board_info->mutex_path; 690 691 if (!mutex_path || !strlen(mutex_path)) { 692 dev_err(dev, "Hardware access guard mutex name is empty"); 693 return -EINVAL; 694 } 695 if (!strcmp(mutex_path, ACPI_GLOBAL_LOCK_PSEUDO_PATH)) { 696 state->lock_data.mutex.glk = 0; 697 state->lock_data.lock = lock_via_global_acpi_lock; 698 state->lock_data.unlock = unlock_global_acpi_lock; 699 } else { 700 status = acpi_get_handle(NULL, (acpi_string)mutex_path, 701 &state->lock_data.mutex.aml); 702 if (ACPI_FAILURE(status)) { 703 dev_err(dev, 704 "Failed to get hardware access guard AML mutex '%s': error %d", 705 mutex_path, status); 706 return -ENOENT; 707 } 708 state->lock_data.lock = lock_via_acpi_mutex; 709 state->lock_data.unlock = unlock_acpi_mutex; 710 } 711 return 0; 712 } 713 714 static int asus_ec_bank_switch(u8 bank, u8 *old) 715 { 716 int status = 0; 717 718 if (old) { 719 status = ec_read(ASUS_EC_BANK_REGISTER, old); 720 } 721 if (status || (old && (*old == bank))) 722 return status; 723 return ec_write(ASUS_EC_BANK_REGISTER, bank); 724 } 725 726 static int asus_ec_block_read(const struct device *dev, 727 struct ec_sensors_data *ec) 728 { 729 int ireg, ibank, status; 730 u8 bank, reg_bank, prev_bank; 731 732 bank = 0; 733 status = asus_ec_bank_switch(bank, &prev_bank); 734 if (status) { 735 dev_warn(dev, "EC bank switch failed"); 736 return status; 737 } 738 739 if (prev_bank) { 740 /* oops... somebody else is working with the EC too */ 741 dev_warn(dev, 742 "Concurrent access to the ACPI EC detected.\nRace condition possible."); 743 } 744 745 /* read registers minimizing bank switches. */ 746 for (ibank = 0; ibank < ec->nr_banks; ibank++) { 747 if (bank != ec->banks[ibank]) { 748 bank = ec->banks[ibank]; 749 if (asus_ec_bank_switch(bank, NULL)) { 750 dev_warn(dev, "EC bank switch to %d failed", 751 bank); 752 break; 753 } 754 } 755 for (ireg = 0; ireg < ec->nr_registers; ireg++) { 756 reg_bank = register_bank(ec->registers[ireg]); 757 if (reg_bank < bank) { 758 continue; 759 } 760 ec_read(register_index(ec->registers[ireg]), 761 ec->read_buffer + ireg); 762 } 763 } 764 765 status = asus_ec_bank_switch(prev_bank, NULL); 766 return status; 767 } 768 769 static inline s32 get_sensor_value(const struct ec_sensor_info *si, u8 *data) 770 { 771 if (is_sensor_data_signed(si)) { 772 switch (si->addr.components.size) { 773 case 1: 774 return (s8)*data; 775 case 2: 776 return (s16)get_unaligned_be16(data); 777 case 4: 778 return (s32)get_unaligned_be32(data); 779 default: 780 return 0; 781 } 782 } else { 783 switch (si->addr.components.size) { 784 case 1: 785 return *data; 786 case 2: 787 return get_unaligned_be16(data); 788 case 4: 789 return get_unaligned_be32(data); 790 default: 791 return 0; 792 } 793 } 794 } 795 796 static void update_sensor_values(struct ec_sensors_data *ec, u8 *data) 797 { 798 const struct ec_sensor_info *si; 799 struct ec_sensor *s, *sensor_end; 800 801 sensor_end = ec->sensors + ec->nr_sensors; 802 for (s = ec->sensors; s != sensor_end; s++) { 803 si = ec->sensors_info + s->info_index; 804 s->cached_value = get_sensor_value(si, data); 805 data += si->addr.components.size; 806 } 807 } 808 809 static int update_ec_sensors(const struct device *dev, 810 struct ec_sensors_data *ec) 811 { 812 int status; 813 814 if (!ec->lock_data.lock(&ec->lock_data)) { 815 dev_warn(dev, "Failed to acquire mutex"); 816 return -EBUSY; 817 } 818 819 status = asus_ec_block_read(dev, ec); 820 821 if (!status) { 822 update_sensor_values(ec, ec->read_buffer); 823 } 824 825 if (!ec->lock_data.unlock(&ec->lock_data)) 826 dev_err(dev, "Failed to release mutex"); 827 828 return status; 829 } 830 831 static long scale_sensor_value(s32 value, int data_type) 832 { 833 switch (data_type) { 834 case hwmon_curr: 835 case hwmon_temp: 836 return value * MILLI; 837 default: 838 return value; 839 } 840 } 841 842 static int get_cached_value_or_update(const struct device *dev, 843 int sensor_index, 844 struct ec_sensors_data *state, s32 *value) 845 { 846 if (time_after(jiffies, state->last_updated + HZ)) { 847 if (update_ec_sensors(dev, state)) { 848 dev_err(dev, "update_ec_sensors() failure\n"); 849 return -EIO; 850 } 851 852 state->last_updated = jiffies; 853 } 854 855 *value = state->sensors[sensor_index].cached_value; 856 return 0; 857 } 858 859 /* 860 * Now follow the functions that implement the hwmon interface 861 */ 862 863 static int asus_ec_hwmon_read(struct device *dev, enum hwmon_sensor_types type, 864 u32 attr, int channel, long *val) 865 { 866 int ret; 867 s32 value = 0; 868 869 struct ec_sensors_data *state = dev_get_drvdata(dev); 870 int sidx = find_ec_sensor_index(state, type, channel); 871 872 if (sidx < 0) { 873 return sidx; 874 } 875 876 ret = get_cached_value_or_update(dev, sidx, state, &value); 877 if (!ret) { 878 *val = scale_sensor_value(value, 879 get_sensor_info(state, sidx)->type); 880 } 881 882 return ret; 883 } 884 885 static int asus_ec_hwmon_read_string(struct device *dev, 886 enum hwmon_sensor_types type, u32 attr, 887 int channel, const char **str) 888 { 889 struct ec_sensors_data *state = dev_get_drvdata(dev); 890 int sensor_index = find_ec_sensor_index(state, type, channel); 891 *str = get_sensor_info(state, sensor_index)->label; 892 893 return 0; 894 } 895 896 static umode_t asus_ec_hwmon_is_visible(const void *drvdata, 897 enum hwmon_sensor_types type, u32 attr, 898 int channel) 899 { 900 const struct ec_sensors_data *state = drvdata; 901 902 return find_ec_sensor_index(state, type, channel) >= 0 ? S_IRUGO : 0; 903 } 904 905 static int 906 asus_ec_hwmon_add_chan_info(struct hwmon_channel_info *asus_ec_hwmon_chan, 907 struct device *dev, int num, 908 enum hwmon_sensor_types type, u32 config) 909 { 910 int i; 911 u32 *cfg = devm_kcalloc(dev, num + 1, sizeof(*cfg), GFP_KERNEL); 912 913 if (!cfg) 914 return -ENOMEM; 915 916 asus_ec_hwmon_chan->type = type; 917 asus_ec_hwmon_chan->config = cfg; 918 for (i = 0; i < num; i++, cfg++) 919 *cfg = config; 920 921 return 0; 922 } 923 924 static const struct hwmon_ops asus_ec_hwmon_ops = { 925 .is_visible = asus_ec_hwmon_is_visible, 926 .read = asus_ec_hwmon_read, 927 .read_string = asus_ec_hwmon_read_string, 928 }; 929 930 static struct hwmon_chip_info asus_ec_chip_info = { 931 .ops = &asus_ec_hwmon_ops, 932 }; 933 934 static const struct ec_board_info *get_board_info(void) 935 { 936 const struct dmi_system_id *dmi_entry; 937 938 dmi_entry = dmi_first_match(dmi_table); 939 return dmi_entry ? dmi_entry->driver_data : NULL; 940 } 941 942 static int asus_ec_probe(struct platform_device *pdev) 943 { 944 const struct hwmon_channel_info **ptr_asus_ec_ci; 945 int nr_count[hwmon_max] = { 0 }, nr_types = 0; 946 struct hwmon_channel_info *asus_ec_hwmon_chan; 947 const struct ec_board_info *pboard_info; 948 const struct hwmon_chip_info *chip_info; 949 struct device *dev = &pdev->dev; 950 struct ec_sensors_data *ec_data; 951 const struct ec_sensor_info *si; 952 enum hwmon_sensor_types type; 953 struct device *hwdev; 954 unsigned int i; 955 int status; 956 957 pboard_info = get_board_info(); 958 if (!pboard_info) 959 return -ENODEV; 960 961 ec_data = devm_kzalloc(dev, sizeof(struct ec_sensors_data), 962 GFP_KERNEL); 963 if (!ec_data) 964 return -ENOMEM; 965 966 dev_set_drvdata(dev, ec_data); 967 ec_data->board_info = pboard_info; 968 969 switch (ec_data->board_info->family) { 970 case family_amd_400_series: 971 ec_data->sensors_info = sensors_family_amd_400; 972 break; 973 case family_amd_500_series: 974 ec_data->sensors_info = sensors_family_amd_500; 975 break; 976 case family_amd_600_series: 977 ec_data->sensors_info = sensors_family_amd_600; 978 break; 979 case family_intel_300_series: 980 ec_data->sensors_info = sensors_family_intel_300; 981 break; 982 case family_intel_600_series: 983 ec_data->sensors_info = sensors_family_intel_600; 984 break; 985 default: 986 dev_err(dev, "Unknown board family: %d", 987 ec_data->board_info->family); 988 return -EINVAL; 989 } 990 991 ec_data->nr_sensors = hweight_long(ec_data->board_info->sensors); 992 ec_data->sensors = devm_kcalloc(dev, ec_data->nr_sensors, 993 sizeof(struct ec_sensor), GFP_KERNEL); 994 if (!ec_data->sensors) 995 return -ENOMEM; 996 997 status = setup_lock_data(dev); 998 if (status) { 999 dev_err(dev, "Failed to setup state/EC locking: %d", status); 1000 return status; 1001 } 1002 1003 setup_sensor_data(ec_data); 1004 ec_data->registers = devm_kcalloc(dev, ec_data->nr_registers, 1005 sizeof(u16), GFP_KERNEL); 1006 ec_data->read_buffer = devm_kcalloc(dev, ec_data->nr_registers, 1007 sizeof(u8), GFP_KERNEL); 1008 1009 if (!ec_data->registers || !ec_data->read_buffer) 1010 return -ENOMEM; 1011 1012 fill_ec_registers(ec_data); 1013 1014 for (i = 0; i < ec_data->nr_sensors; ++i) { 1015 si = get_sensor_info(ec_data, i); 1016 if (!nr_count[si->type]) 1017 ++nr_types; 1018 ++nr_count[si->type]; 1019 } 1020 1021 if (nr_count[hwmon_temp]) 1022 nr_count[hwmon_chip]++, nr_types++; 1023 1024 asus_ec_hwmon_chan = devm_kcalloc( 1025 dev, nr_types, sizeof(*asus_ec_hwmon_chan), GFP_KERNEL); 1026 if (!asus_ec_hwmon_chan) 1027 return -ENOMEM; 1028 1029 ptr_asus_ec_ci = devm_kcalloc(dev, nr_types + 1, 1030 sizeof(*ptr_asus_ec_ci), GFP_KERNEL); 1031 if (!ptr_asus_ec_ci) 1032 return -ENOMEM; 1033 1034 asus_ec_chip_info.info = ptr_asus_ec_ci; 1035 chip_info = &asus_ec_chip_info; 1036 1037 for (type = 0; type < hwmon_max; ++type) { 1038 if (!nr_count[type]) 1039 continue; 1040 1041 asus_ec_hwmon_add_chan_info(asus_ec_hwmon_chan, dev, 1042 nr_count[type], type, 1043 hwmon_attributes[type]); 1044 *ptr_asus_ec_ci++ = asus_ec_hwmon_chan++; 1045 } 1046 1047 dev_info(dev, "board has %d EC sensors that span %d registers", 1048 ec_data->nr_sensors, ec_data->nr_registers); 1049 1050 hwdev = devm_hwmon_device_register_with_info(dev, "asusec", 1051 ec_data, chip_info, NULL); 1052 1053 return PTR_ERR_OR_ZERO(hwdev); 1054 } 1055 1056 MODULE_DEVICE_TABLE(dmi, dmi_table); 1057 1058 static struct platform_driver asus_ec_sensors_platform_driver = { 1059 .driver = { 1060 .name = "asus-ec-sensors", 1061 }, 1062 .probe = asus_ec_probe, 1063 }; 1064 1065 static struct platform_device *asus_ec_sensors_platform_device; 1066 1067 static int __init asus_ec_init(void) 1068 { 1069 asus_ec_sensors_platform_device = 1070 platform_create_bundle(&asus_ec_sensors_platform_driver, 1071 asus_ec_probe, NULL, 0, NULL, 0); 1072 1073 if (IS_ERR(asus_ec_sensors_platform_device)) 1074 return PTR_ERR(asus_ec_sensors_platform_device); 1075 1076 return 0; 1077 } 1078 1079 static void __exit asus_ec_exit(void) 1080 { 1081 platform_device_unregister(asus_ec_sensors_platform_device); 1082 platform_driver_unregister(&asus_ec_sensors_platform_driver); 1083 } 1084 1085 module_init(asus_ec_init); 1086 module_exit(asus_ec_exit); 1087 1088 module_param_named(mutex_path, mutex_path_override, charp, 0); 1089 MODULE_PARM_DESC(mutex_path, 1090 "Override ACPI mutex path used to guard access to hardware"); 1091 1092 MODULE_AUTHOR("Eugene Shalygin <eugene.shalygin@gmail.com>"); 1093 MODULE_DESCRIPTION( 1094 "HWMON driver for sensors accessible via ACPI EC in ASUS motherboards"); 1095 MODULE_LICENSE("GPL"); 1096