xref: /linux/drivers/hwmon/asus-ec-sensors.c (revision 0a94608f0f7de9b1135ffea3546afe68eafef57f)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * HWMON driver for ASUS motherboards that publish some sensor values
4  * via the embedded controller registers.
5  *
6  * Copyright (C) 2021 Eugene Shalygin <eugene.shalygin@gmail.com>
7 
8  * EC provides:
9  * - Chipset temperature
10  * - CPU temperature
11  * - Motherboard temperature
12  * - T_Sensor temperature
13  * - VRM temperature
14  * - Water In temperature
15  * - Water Out temperature
16  * - CPU Optional fan RPM
17  * - Chipset fan RPM
18  * - VRM Heat Sink fan RPM
19  * - Water Flow fan RPM
20  * - CPU current
21  * - CPU core voltage
22  */
23 
24 #include <linux/acpi.h>
25 #include <linux/bitops.h>
26 #include <linux/dev_printk.h>
27 #include <linux/dmi.h>
28 #include <linux/hwmon.h>
29 #include <linux/init.h>
30 #include <linux/jiffies.h>
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/platform_device.h>
34 #include <linux/sort.h>
35 #include <linux/units.h>
36 
37 #include <asm/unaligned.h>
38 
39 static char *mutex_path_override;
40 
41 /* Writing to this EC register switches EC bank */
42 #define ASUS_EC_BANK_REGISTER	0xff
43 #define SENSOR_LABEL_LEN	16
44 
45 /*
46  * Arbitrary set max. allowed bank number. Required for sorting banks and
47  * currently is overkill with just 2 banks used at max, but for the sake
48  * of alignment let's set it to a higher value.
49  */
50 #define ASUS_EC_MAX_BANK	3
51 
52 #define ACPI_LOCK_DELAY_MS	500
53 
54 /* ACPI mutex for locking access to the EC for the firmware */
55 #define ASUS_HW_ACCESS_MUTEX_ASMX	"\\AMW0.ASMX"
56 
57 /* There are two variants of the vendor spelling */
58 #define VENDOR_ASUS_UPPER_CASE	"ASUSTeK COMPUTER INC."
59 
60 typedef union {
61 	u32 value;
62 	struct {
63 		u8 index;
64 		u8 bank;
65 		u8 size;
66 		u8 dummy;
67 	} components;
68 } sensor_address;
69 
70 #define MAKE_SENSOR_ADDRESS(size, bank, index) {                               \
71 		.value = (size << 16) + (bank << 8) + index                    \
72 	}
73 
74 static u32 hwmon_attributes[hwmon_max] = {
75 	[hwmon_chip] = HWMON_C_REGISTER_TZ,
76 	[hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL,
77 	[hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL,
78 	[hwmon_curr] = HWMON_C_INPUT | HWMON_C_LABEL,
79 	[hwmon_fan] = HWMON_F_INPUT | HWMON_F_LABEL,
80 };
81 
82 struct ec_sensor_info {
83 	char label[SENSOR_LABEL_LEN];
84 	enum hwmon_sensor_types type;
85 	sensor_address addr;
86 };
87 
88 #define EC_SENSOR(sensor_label, sensor_type, size, bank, index) {              \
89 		.label = sensor_label, .type = sensor_type,                    \
90 		.addr = MAKE_SENSOR_ADDRESS(size, bank, index),                \
91 	}
92 
93 enum ec_sensors {
94 	/* chipset temperature [℃] */
95 	ec_sensor_temp_chipset,
96 	/* CPU temperature [℃] */
97 	ec_sensor_temp_cpu,
98 	/* motherboard temperature [℃] */
99 	ec_sensor_temp_mb,
100 	/* "T_Sensor" temperature sensor reading [℃] */
101 	ec_sensor_temp_t_sensor,
102 	/* VRM temperature [℃] */
103 	ec_sensor_temp_vrm,
104 	/* CPU Core voltage [mV] */
105 	ec_sensor_in_cpu_core,
106 	/* CPU_Opt fan [RPM] */
107 	ec_sensor_fan_cpu_opt,
108 	/* VRM heat sink fan [RPM] */
109 	ec_sensor_fan_vrm_hs,
110 	/* Chipset fan [RPM] */
111 	ec_sensor_fan_chipset,
112 	/* Water flow sensor reading [RPM] */
113 	ec_sensor_fan_water_flow,
114 	/* CPU current [A] */
115 	ec_sensor_curr_cpu,
116 	/* "Water_In" temperature sensor reading [℃] */
117 	ec_sensor_temp_water_in,
118 	/* "Water_Out" temperature sensor reading [℃] */
119 	ec_sensor_temp_water_out,
120 };
121 
122 #define SENSOR_TEMP_CHIPSET BIT(ec_sensor_temp_chipset)
123 #define SENSOR_TEMP_CPU BIT(ec_sensor_temp_cpu)
124 #define SENSOR_TEMP_MB BIT(ec_sensor_temp_mb)
125 #define SENSOR_TEMP_T_SENSOR BIT(ec_sensor_temp_t_sensor)
126 #define SENSOR_TEMP_VRM BIT(ec_sensor_temp_vrm)
127 #define SENSOR_IN_CPU_CORE BIT(ec_sensor_in_cpu_core)
128 #define SENSOR_FAN_CPU_OPT BIT(ec_sensor_fan_cpu_opt)
129 #define SENSOR_FAN_VRM_HS BIT(ec_sensor_fan_vrm_hs)
130 #define SENSOR_FAN_CHIPSET BIT(ec_sensor_fan_chipset)
131 #define SENSOR_FAN_WATER_FLOW BIT(ec_sensor_fan_water_flow)
132 #define SENSOR_CURR_CPU BIT(ec_sensor_curr_cpu)
133 #define SENSOR_TEMP_WATER_IN BIT(ec_sensor_temp_water_in)
134 #define SENSOR_TEMP_WATER_OUT BIT(ec_sensor_temp_water_out)
135 
136 /* All the known sensors for ASUS EC controllers */
137 static const struct ec_sensor_info known_ec_sensors[] = {
138 	[ec_sensor_temp_chipset] =
139 		EC_SENSOR("Chipset", hwmon_temp, 1, 0x00, 0x3a),
140 	[ec_sensor_temp_cpu] = EC_SENSOR("CPU", hwmon_temp, 1, 0x00, 0x3b),
141 	[ec_sensor_temp_mb] =
142 		EC_SENSOR("Motherboard", hwmon_temp, 1, 0x00, 0x3c),
143 	[ec_sensor_temp_t_sensor] =
144 		EC_SENSOR("T_Sensor", hwmon_temp, 1, 0x00, 0x3d),
145 	[ec_sensor_temp_vrm] = EC_SENSOR("VRM", hwmon_temp, 1, 0x00, 0x3e),
146 	[ec_sensor_in_cpu_core] =
147 		EC_SENSOR("CPU Core", hwmon_in, 2, 0x00, 0xa2),
148 	[ec_sensor_fan_cpu_opt] =
149 		EC_SENSOR("CPU_Opt", hwmon_fan, 2, 0x00, 0xb0),
150 	[ec_sensor_fan_vrm_hs] = EC_SENSOR("VRM HS", hwmon_fan, 2, 0x00, 0xb2),
151 	[ec_sensor_fan_chipset] =
152 		EC_SENSOR("Chipset", hwmon_fan, 2, 0x00, 0xb4),
153 	[ec_sensor_fan_water_flow] =
154 		EC_SENSOR("Water_Flow", hwmon_fan, 2, 0x00, 0xbc),
155 	[ec_sensor_curr_cpu] = EC_SENSOR("CPU", hwmon_curr, 1, 0x00, 0xf4),
156 	[ec_sensor_temp_water_in] =
157 		EC_SENSOR("Water_In", hwmon_temp, 1, 0x01, 0x00),
158 	[ec_sensor_temp_water_out] =
159 		EC_SENSOR("Water_Out", hwmon_temp, 1, 0x01, 0x01),
160 };
161 
162 /* Shortcuts for common combinations */
163 #define SENSOR_SET_TEMP_CHIPSET_CPU_MB                                         \
164 	(SENSOR_TEMP_CHIPSET | SENSOR_TEMP_CPU | SENSOR_TEMP_MB)
165 #define SENSOR_SET_TEMP_WATER (SENSOR_TEMP_WATER_IN | SENSOR_TEMP_WATER_OUT)
166 
167 #define DMI_EXACT_MATCH_BOARD(vendor, name, sensors) {                         \
168 	.matches = {                                                           \
169 		DMI_EXACT_MATCH(DMI_BOARD_VENDOR, vendor),                     \
170 		DMI_EXACT_MATCH(DMI_BOARD_NAME, name),                         \
171 	},                                                                     \
172 	.driver_data = (void *)(sensors), \
173 }
174 
175 static const struct dmi_system_id asus_ec_dmi_table[] __initconst = {
176 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "PRIME X570-PRO",
177 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
178 		SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET),
179 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "Pro WS X570-ACE",
180 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_VRM |
181 		SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
182 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE,
183 			      "ROG CROSSHAIR VIII DARK HERO",
184 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
185 		SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
186 		SENSOR_FAN_CPU_OPT | SENSOR_FAN_WATER_FLOW |
187 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
188 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE,
189 			      "ROG CROSSHAIR VIII FORMULA",
190 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
191 		SENSOR_TEMP_VRM | SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET |
192 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
193 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "ROG CROSSHAIR VIII HERO",
194 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
195 		SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
196 		SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET |
197 		SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
198 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE,
199 			      "ROG CROSSHAIR VIII HERO (WI-FI)",
200 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
201 		SENSOR_TEMP_VRM | SENSOR_SET_TEMP_WATER |
202 		SENSOR_FAN_CPU_OPT | SENSOR_FAN_CHIPSET |
203 		SENSOR_FAN_WATER_FLOW | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
204 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE,
205 			      "ROG CROSSHAIR VIII IMPACT",
206 		SENSOR_SET_TEMP_CHIPSET_CPU_MB | SENSOR_TEMP_T_SENSOR |
207 		SENSOR_TEMP_VRM | SENSOR_FAN_CHIPSET |
208 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
209 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "ROG STRIX B550-E GAMING",
210 		SENSOR_SET_TEMP_CHIPSET_CPU_MB |
211 		SENSOR_TEMP_T_SENSOR |
212 		SENSOR_TEMP_VRM | SENSOR_FAN_CPU_OPT),
213 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "ROG STRIX B550-I GAMING",
214 		SENSOR_SET_TEMP_CHIPSET_CPU_MB |
215 		SENSOR_TEMP_T_SENSOR |
216 		SENSOR_TEMP_VRM | SENSOR_FAN_VRM_HS |
217 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
218 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "ROG STRIX X570-E GAMING",
219 		SENSOR_SET_TEMP_CHIPSET_CPU_MB |
220 		SENSOR_TEMP_T_SENSOR |
221 		SENSOR_TEMP_VRM | SENSOR_FAN_CHIPSET |
222 		SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
223 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "ROG STRIX X570-F GAMING",
224 		SENSOR_SET_TEMP_CHIPSET_CPU_MB |
225 		SENSOR_TEMP_T_SENSOR | SENSOR_FAN_CHIPSET),
226 	DMI_EXACT_MATCH_BOARD(VENDOR_ASUS_UPPER_CASE, "ROG STRIX X570-I GAMING",
227 		SENSOR_TEMP_T_SENSOR | SENSOR_FAN_VRM_HS |
228 		SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU | SENSOR_IN_CPU_CORE),
229 	{}
230 };
231 
232 struct ec_sensor {
233 	unsigned int info_index;
234 	s32 cached_value;
235 };
236 
237 struct ec_sensors_data {
238 	unsigned long board_sensors;
239 	struct ec_sensor *sensors;
240 	/* EC registers to read from */
241 	u16 *registers;
242 	u8 *read_buffer;
243 	/* sorted list of unique register banks */
244 	u8 banks[ASUS_EC_MAX_BANK + 1];
245 	/* in jiffies */
246 	unsigned long last_updated;
247 	acpi_handle aml_mutex;
248 	/* number of board EC sensors */
249 	u8 nr_sensors;
250 	/*
251 	 * number of EC registers to read
252 	 * (sensor might span more than 1 register)
253 	 */
254 	u8 nr_registers;
255 	/* number of unique register banks */
256 	u8 nr_banks;
257 };
258 
259 static u8 register_bank(u16 reg)
260 {
261 	return reg >> 8;
262 }
263 
264 static u8 register_index(u16 reg)
265 {
266 	return reg & 0x00ff;
267 }
268 
269 static bool is_sensor_data_signed(const struct ec_sensor_info *si)
270 {
271 	/*
272 	 * guessed from WMI functions in DSDT code for boards
273 	 * of the X470 generation
274 	 */
275 	return si->type == hwmon_temp;
276 }
277 
278 static const struct ec_sensor_info *
279 get_sensor_info(const struct ec_sensors_data *state, int index)
280 {
281 	return &known_ec_sensors[state->sensors[index].info_index];
282 }
283 
284 static int find_ec_sensor_index(const struct ec_sensors_data *ec,
285 				enum hwmon_sensor_types type, int channel)
286 {
287 	unsigned int i;
288 
289 	for (i = 0; i < ec->nr_sensors; i++) {
290 		if (get_sensor_info(ec, i)->type == type) {
291 			if (channel == 0)
292 				return i;
293 			channel--;
294 		}
295 	}
296 	return -ENOENT;
297 }
298 
299 static int __init bank_compare(const void *a, const void *b)
300 {
301 	return *((const s8 *)a) - *((const s8 *)b);
302 }
303 
304 static int __init board_sensors_count(unsigned long sensors)
305 {
306 	return hweight_long(sensors);
307 }
308 
309 static void __init setup_sensor_data(struct ec_sensors_data *ec)
310 {
311 	struct ec_sensor *s = ec->sensors;
312 	bool bank_found;
313 	int i, j;
314 	u8 bank;
315 
316 	ec->nr_banks = 0;
317 	ec->nr_registers = 0;
318 
319 	for_each_set_bit(i, &ec->board_sensors,
320 			  BITS_PER_TYPE(ec->board_sensors)) {
321 		s->info_index = i;
322 		s->cached_value = 0;
323 		ec->nr_registers +=
324 			known_ec_sensors[s->info_index].addr.components.size;
325 		bank_found = false;
326 		bank = known_ec_sensors[s->info_index].addr.components.bank;
327 		for (j = 0; j < ec->nr_banks; j++) {
328 			if (ec->banks[j] == bank) {
329 				bank_found = true;
330 				break;
331 			}
332 		}
333 		if (!bank_found) {
334 			ec->banks[ec->nr_banks++] = bank;
335 		}
336 		s++;
337 	}
338 	sort(ec->banks, ec->nr_banks, 1, bank_compare, NULL);
339 }
340 
341 static void __init fill_ec_registers(struct ec_sensors_data *ec)
342 {
343 	const struct ec_sensor_info *si;
344 	unsigned int i, j, register_idx = 0;
345 
346 	for (i = 0; i < ec->nr_sensors; ++i) {
347 		si = get_sensor_info(ec, i);
348 		for (j = 0; j < si->addr.components.size; ++j, ++register_idx) {
349 			ec->registers[register_idx] =
350 				(si->addr.components.bank << 8) +
351 				si->addr.components.index + j;
352 		}
353 	}
354 }
355 
356 static acpi_handle __init asus_hw_access_mutex(struct device *dev)
357 {
358 	const char *mutex_path;
359 	acpi_handle res;
360 	int status;
361 
362 	mutex_path = mutex_path_override ?
363 		mutex_path_override : ASUS_HW_ACCESS_MUTEX_ASMX;
364 
365 	status = acpi_get_handle(NULL, (acpi_string)mutex_path, &res);
366 	if (ACPI_FAILURE(status)) {
367 		dev_err(dev,
368 			"Could not get hardware access guard mutex '%s': error %d",
369 			mutex_path, status);
370 		return NULL;
371 	}
372 	return res;
373 }
374 
375 static int asus_ec_bank_switch(u8 bank, u8 *old)
376 {
377 	int status = 0;
378 
379 	if (old) {
380 		status = ec_read(ASUS_EC_BANK_REGISTER, old);
381 	}
382 	if (status || (old && (*old == bank)))
383 		return status;
384 	return ec_write(ASUS_EC_BANK_REGISTER, bank);
385 }
386 
387 static int asus_ec_block_read(const struct device *dev,
388 			      struct ec_sensors_data *ec)
389 {
390 	int ireg, ibank, status;
391 	u8 bank, reg_bank, prev_bank;
392 
393 	bank = 0;
394 	status = asus_ec_bank_switch(bank, &prev_bank);
395 	if (status) {
396 		dev_warn(dev, "EC bank switch failed");
397 		return status;
398 	}
399 
400 	if (prev_bank) {
401 		/* oops... somebody else is working with the EC too */
402 		dev_warn(dev,
403 			"Concurrent access to the ACPI EC detected.\nRace condition possible.");
404 	}
405 
406 	/* read registers minimizing bank switches. */
407 	for (ibank = 0; ibank < ec->nr_banks; ibank++) {
408 		if (bank != ec->banks[ibank]) {
409 			bank = ec->banks[ibank];
410 			if (asus_ec_bank_switch(bank, NULL)) {
411 				dev_warn(dev, "EC bank switch to %d failed",
412 					 bank);
413 				break;
414 			}
415 		}
416 		for (ireg = 0; ireg < ec->nr_registers; ireg++) {
417 			reg_bank = register_bank(ec->registers[ireg]);
418 			if (reg_bank < bank) {
419 				continue;
420 			}
421 			ec_read(register_index(ec->registers[ireg]),
422 				ec->read_buffer + ireg);
423 		}
424 	}
425 
426 	status = asus_ec_bank_switch(prev_bank, NULL);
427 	return status;
428 }
429 
430 static inline s32 get_sensor_value(const struct ec_sensor_info *si, u8 *data)
431 {
432 	if (is_sensor_data_signed(si)) {
433 		switch (si->addr.components.size) {
434 		case 1:
435 			return (s8)*data;
436 		case 2:
437 			return (s16)get_unaligned_be16(data);
438 		case 4:
439 			return (s32)get_unaligned_be32(data);
440 		default:
441 			return 0;
442 		}
443 	} else {
444 		switch (si->addr.components.size) {
445 		case 1:
446 			return *data;
447 		case 2:
448 			return get_unaligned_be16(data);
449 		case 4:
450 			return get_unaligned_be32(data);
451 		default:
452 			return 0;
453 		}
454 	}
455 }
456 
457 static void update_sensor_values(struct ec_sensors_data *ec, u8 *data)
458 {
459 	const struct ec_sensor_info *si;
460 	struct ec_sensor *s;
461 
462 	for (s = ec->sensors; s != ec->sensors + ec->nr_sensors; s++) {
463 		si = &known_ec_sensors[s->info_index];
464 		s->cached_value = get_sensor_value(si, data);
465 		data += si->addr.components.size;
466 	}
467 }
468 
469 static int update_ec_sensors(const struct device *dev,
470 			     struct ec_sensors_data *ec)
471 {
472 	int status;
473 
474 	/*
475 	 * ASUS DSDT does not specify that access to the EC has to be guarded,
476 	 * but firmware does access it via ACPI
477 	 */
478 	if (ACPI_FAILURE(acpi_acquire_mutex(ec->aml_mutex, NULL,
479 					    ACPI_LOCK_DELAY_MS))) {
480 		dev_err(dev, "Failed to acquire AML mutex");
481 		status = -EBUSY;
482 		goto cleanup;
483 	}
484 
485 	status = asus_ec_block_read(dev, ec);
486 
487 	if (!status) {
488 		update_sensor_values(ec, ec->read_buffer);
489 	}
490 	if (ACPI_FAILURE(acpi_release_mutex(ec->aml_mutex, NULL))) {
491 		dev_err(dev, "Failed to release AML mutex");
492 	}
493 cleanup:
494 	return status;
495 }
496 
497 static long scale_sensor_value(s32 value, int data_type)
498 {
499 	switch (data_type) {
500 	case hwmon_curr:
501 	case hwmon_temp:
502 		return value * MILLI;
503 	default:
504 		return value;
505 	}
506 }
507 
508 static int get_cached_value_or_update(const struct device *dev,
509 				      int sensor_index,
510 				      struct ec_sensors_data *state, s32 *value)
511 {
512 	if (time_after(jiffies, state->last_updated + HZ)) {
513 		if (update_ec_sensors(dev, state)) {
514 			dev_err(dev, "update_ec_sensors() failure\n");
515 			return -EIO;
516 		}
517 
518 		state->last_updated = jiffies;
519 	}
520 
521 	*value = state->sensors[sensor_index].cached_value;
522 	return 0;
523 }
524 
525 /*
526  * Now follow the functions that implement the hwmon interface
527  */
528 
529 static int asus_ec_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
530 			      u32 attr, int channel, long *val)
531 {
532 	int ret;
533 	s32 value = 0;
534 
535 	struct ec_sensors_data *state = dev_get_drvdata(dev);
536 	int sidx = find_ec_sensor_index(state, type, channel);
537 
538 	if (sidx < 0) {
539 		return sidx;
540 	}
541 
542 	ret = get_cached_value_or_update(dev, sidx, state, &value);
543 	if (!ret) {
544 		*val = scale_sensor_value(value,
545 					  get_sensor_info(state, sidx)->type);
546 	}
547 
548 	return ret;
549 }
550 
551 static int asus_ec_hwmon_read_string(struct device *dev,
552 				     enum hwmon_sensor_types type, u32 attr,
553 				     int channel, const char **str)
554 {
555 	struct ec_sensors_data *state = dev_get_drvdata(dev);
556 	int sensor_index = find_ec_sensor_index(state, type, channel);
557 	*str = get_sensor_info(state, sensor_index)->label;
558 
559 	return 0;
560 }
561 
562 static umode_t asus_ec_hwmon_is_visible(const void *drvdata,
563 					enum hwmon_sensor_types type, u32 attr,
564 					int channel)
565 {
566 	const struct ec_sensors_data *state = drvdata;
567 
568 	return find_ec_sensor_index(state, type, channel) >= 0 ? S_IRUGO : 0;
569 }
570 
571 static int __init
572 asus_ec_hwmon_add_chan_info(struct hwmon_channel_info *asus_ec_hwmon_chan,
573 			     struct device *dev, int num,
574 			     enum hwmon_sensor_types type, u32 config)
575 {
576 	int i;
577 	u32 *cfg = devm_kcalloc(dev, num + 1, sizeof(*cfg), GFP_KERNEL);
578 
579 	if (!cfg)
580 		return -ENOMEM;
581 
582 	asus_ec_hwmon_chan->type = type;
583 	asus_ec_hwmon_chan->config = cfg;
584 	for (i = 0; i < num; i++, cfg++)
585 		*cfg = config;
586 
587 	return 0;
588 }
589 
590 static const struct hwmon_ops asus_ec_hwmon_ops = {
591 	.is_visible = asus_ec_hwmon_is_visible,
592 	.read = asus_ec_hwmon_read,
593 	.read_string = asus_ec_hwmon_read_string,
594 };
595 
596 static struct hwmon_chip_info asus_ec_chip_info = {
597 	.ops = &asus_ec_hwmon_ops,
598 };
599 
600 static unsigned long __init get_board_sensors(void)
601 {
602 	const struct dmi_system_id *dmi_entry =
603 		dmi_first_match(asus_ec_dmi_table);
604 
605 	return dmi_entry ? (unsigned long)dmi_entry->driver_data : 0;
606 }
607 
608 static int __init asus_ec_probe(struct platform_device *pdev)
609 {
610 	const struct hwmon_channel_info **ptr_asus_ec_ci;
611 	int nr_count[hwmon_max] = { 0 }, nr_types = 0;
612 	struct hwmon_channel_info *asus_ec_hwmon_chan;
613 	const struct hwmon_chip_info *chip_info;
614 	struct device *dev = &pdev->dev;
615 	struct ec_sensors_data *ec_data;
616 	const struct ec_sensor_info *si;
617 	enum hwmon_sensor_types type;
618 	unsigned long board_sensors;
619 	struct device *hwdev;
620 	unsigned int i;
621 
622 	board_sensors = get_board_sensors();
623 	if (!board_sensors)
624 		return -ENODEV;
625 
626 	ec_data = devm_kzalloc(dev, sizeof(struct ec_sensors_data),
627 			       GFP_KERNEL);
628 	if (!ec_data)
629 		return -ENOMEM;
630 
631 	dev_set_drvdata(dev, ec_data);
632 	ec_data->board_sensors = board_sensors;
633 	ec_data->nr_sensors = board_sensors_count(ec_data->board_sensors);
634 	ec_data->sensors = devm_kcalloc(dev, ec_data->nr_sensors,
635 					sizeof(struct ec_sensor), GFP_KERNEL);
636 
637 	setup_sensor_data(ec_data);
638 	ec_data->registers = devm_kcalloc(dev, ec_data->nr_registers,
639 					  sizeof(u16), GFP_KERNEL);
640 	ec_data->read_buffer = devm_kcalloc(dev, ec_data->nr_registers,
641 					    sizeof(u8), GFP_KERNEL);
642 
643 	if (!ec_data->registers || !ec_data->read_buffer)
644 		return -ENOMEM;
645 
646 	fill_ec_registers(ec_data);
647 
648 	ec_data->aml_mutex = asus_hw_access_mutex(dev);
649 
650 	for (i = 0; i < ec_data->nr_sensors; ++i) {
651 		si = get_sensor_info(ec_data, i);
652 		if (!nr_count[si->type])
653 			++nr_types;
654 		++nr_count[si->type];
655 	}
656 
657 	if (nr_count[hwmon_temp])
658 		nr_count[hwmon_chip]++, nr_types++;
659 
660 	asus_ec_hwmon_chan = devm_kcalloc(
661 		dev, nr_types, sizeof(*asus_ec_hwmon_chan), GFP_KERNEL);
662 	if (!asus_ec_hwmon_chan)
663 		return -ENOMEM;
664 
665 	ptr_asus_ec_ci = devm_kcalloc(dev, nr_types + 1,
666 				       sizeof(*ptr_asus_ec_ci), GFP_KERNEL);
667 	if (!ptr_asus_ec_ci)
668 		return -ENOMEM;
669 
670 	asus_ec_chip_info.info = ptr_asus_ec_ci;
671 	chip_info = &asus_ec_chip_info;
672 
673 	for (type = 0; type < hwmon_max; ++type) {
674 		if (!nr_count[type])
675 			continue;
676 
677 		asus_ec_hwmon_add_chan_info(asus_ec_hwmon_chan, dev,
678 					     nr_count[type], type,
679 					     hwmon_attributes[type]);
680 		*ptr_asus_ec_ci++ = asus_ec_hwmon_chan++;
681 	}
682 
683 	dev_info(dev, "board has %d EC sensors that span %d registers",
684 		 ec_data->nr_sensors, ec_data->nr_registers);
685 
686 	hwdev = devm_hwmon_device_register_with_info(dev, "asusec",
687 						     ec_data, chip_info, NULL);
688 
689 	return PTR_ERR_OR_ZERO(hwdev);
690 }
691 
692 
693 static const struct acpi_device_id acpi_ec_ids[] = {
694 	/* Embedded Controller Device */
695 	{ "PNP0C09", 0 },
696 	{}
697 };
698 
699 static struct platform_driver asus_ec_sensors_platform_driver = {
700 	.driver = {
701 		.name	= "asus-ec-sensors",
702 		.acpi_match_table = acpi_ec_ids,
703 	},
704 };
705 
706 MODULE_DEVICE_TABLE(dmi, asus_ec_dmi_table);
707 module_platform_driver_probe(asus_ec_sensors_platform_driver, asus_ec_probe);
708 
709 module_param_named(mutex_path, mutex_path_override, charp, 0);
710 MODULE_PARM_DESC(mutex_path,
711 		 "Override ACPI mutex path used to guard access to hardware");
712 
713 MODULE_AUTHOR("Eugene Shalygin <eugene.shalygin@gmail.com>");
714 MODULE_DESCRIPTION(
715 	"HWMON driver for sensors accessible via ACPI EC in ASUS motherboards");
716 MODULE_LICENSE("GPL");
717