1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2021-2022 NVIDIA Corporation 4 * 5 * Author: Dipen Patel <dipenp@nvidia.com> 6 */ 7 8 #include <linux/err.h> 9 #include <linux/gpio/consumer.h> 10 #include <linux/hte.h> 11 #include <linux/interrupt.h> 12 #include <linux/module.h> 13 #include <linux/platform_device.h> 14 #include <linux/timer.h> 15 #include <linux/workqueue.h> 16 17 /* 18 * This sample HTE test driver demonstrates HTE API usage by enabling 19 * hardware timestamp on gpio_in and specified LIC IRQ lines. 20 * 21 * Note: gpio_out and gpio_in need to be shorted externally in order for this 22 * test driver to work for the GPIO monitoring. The test driver has been 23 * tested on Jetson AGX Xavier platform by shorting pin 32 and 16 on 40 pin 24 * header. 25 * 26 * Device tree snippet to activate this driver: 27 * tegra_hte_test { 28 * compatible = "nvidia,tegra194-hte-test"; 29 * in-gpio = <&gpio_aon TEGRA194_AON_GPIO(BB, 1)>; 30 * out-gpio = <&gpio_aon TEGRA194_AON_GPIO(BB, 0)>; 31 * timestamps = <&tegra_hte_aon TEGRA194_AON_GPIO(BB, 1)>, 32 * <&tegra_hte_lic 0x19>; 33 * timestamp-names = "hte-gpio", "hte-i2c-irq"; 34 * status = "okay"; 35 * }; 36 * 37 * How to run test driver: 38 * - Load test driver. 39 * - For the GPIO, at regular interval gpio_out pin toggles triggering 40 * HTE for rising edge on gpio_in pin. 41 * 42 * - For the LIC IRQ line, it uses 0x19 interrupt which is i2c controller 1. 43 * - Run i2cdetect -y 1 1>/dev/null, this command will generate i2c bus 44 * transactions which creates timestamp data. 45 * - It prints below message for both the lines. 46 * HW timestamp(<line id>:<ts seq number>): <timestamp>, edge: <edge>. 47 * - Unloading the driver disables and deallocate the HTE. 48 */ 49 50 static struct tegra_hte_test { 51 int gpio_in_irq; 52 struct device *pdev; 53 struct gpio_desc *gpio_in; 54 struct gpio_desc *gpio_out; 55 struct hte_ts_desc *desc; 56 struct timer_list timer; 57 struct kobject *kobj; 58 } hte; 59 60 static enum hte_return process_hw_ts(struct hte_ts_data *ts, void *p) 61 { 62 char *edge; 63 struct hte_ts_desc *desc = p; 64 65 if (!ts || !p) 66 return HTE_CB_HANDLED; 67 68 if (ts->raw_level < 0) 69 edge = "Unknown"; 70 71 pr_info("HW timestamp(%u: %llu): %llu, edge: %s\n", 72 desc->attr.line_id, ts->seq, ts->tsc, 73 (ts->raw_level >= 0) ? ((ts->raw_level == 0) ? 74 "falling" : "rising") : edge); 75 76 return HTE_CB_HANDLED; 77 } 78 79 static void gpio_timer_cb(struct timer_list *t) 80 { 81 (void)t; 82 83 gpiod_set_value(hte.gpio_out, !gpiod_get_value(hte.gpio_out)); 84 mod_timer(&hte.timer, jiffies + msecs_to_jiffies(8000)); 85 } 86 87 static irqreturn_t tegra_hte_test_gpio_isr(int irq, void *data) 88 { 89 (void)irq; 90 (void)data; 91 92 return IRQ_HANDLED; 93 } 94 95 static const struct of_device_id tegra_hte_test_of_match[] = { 96 { .compatible = "nvidia,tegra194-hte-test"}, 97 { } 98 }; 99 MODULE_DEVICE_TABLE(of, tegra_hte_test_of_match); 100 101 static int tegra_hte_test_probe(struct platform_device *pdev) 102 { 103 int ret = 0; 104 int i, cnt; 105 106 dev_set_drvdata(&pdev->dev, &hte); 107 hte.pdev = &pdev->dev; 108 109 hte.gpio_out = gpiod_get(&pdev->dev, "out", 0); 110 if (IS_ERR(hte.gpio_out)) { 111 dev_err(&pdev->dev, "failed to get gpio out\n"); 112 ret = -EINVAL; 113 goto out; 114 } 115 116 hte.gpio_in = gpiod_get(&pdev->dev, "in", 0); 117 if (IS_ERR(hte.gpio_in)) { 118 dev_err(&pdev->dev, "failed to get gpio in\n"); 119 ret = -EINVAL; 120 goto free_gpio_out; 121 } 122 123 ret = gpiod_direction_output(hte.gpio_out, 0); 124 if (ret) { 125 dev_err(&pdev->dev, "failed to set output\n"); 126 ret = -EINVAL; 127 goto free_gpio_in; 128 } 129 130 ret = gpiod_direction_input(hte.gpio_in); 131 if (ret) { 132 dev_err(&pdev->dev, "failed to set input\n"); 133 ret = -EINVAL; 134 goto free_gpio_in; 135 } 136 137 ret = gpiod_to_irq(hte.gpio_in); 138 if (ret < 0) { 139 dev_err(&pdev->dev, "failed to map GPIO to IRQ: %d\n", ret); 140 ret = -ENXIO; 141 goto free_gpio_in; 142 } 143 144 hte.gpio_in_irq = ret; 145 ret = request_irq(ret, tegra_hte_test_gpio_isr, 146 IRQF_TRIGGER_RISING, 147 "tegra_hte_gpio_test_isr", &hte); 148 if (ret) { 149 dev_err(&pdev->dev, "failed to acquire IRQ\n"); 150 ret = -ENXIO; 151 goto free_irq; 152 } 153 154 cnt = of_hte_req_count(hte.pdev); 155 if (cnt < 0) { 156 ret = cnt; 157 goto free_irq; 158 } 159 160 dev_info(&pdev->dev, "Total requested lines:%d\n", cnt); 161 162 hte.desc = devm_kzalloc(hte.pdev, sizeof(*hte.desc) * cnt, GFP_KERNEL); 163 if (!hte.desc) { 164 ret = -ENOMEM; 165 goto free_irq; 166 } 167 168 for (i = 0; i < cnt; i++) { 169 if (i == 0) 170 /* 171 * GPIO hte init, line_id and name will be parsed from 172 * the device tree node. The edge_flag is implicitly 173 * set by request_irq call. Only line_data is needed to be 174 * set. 175 */ 176 hte_init_line_attr(&hte.desc[i], 0, 0, NULL, 177 hte.gpio_in); 178 else 179 /* 180 * same comment as above except that IRQ does not need 181 * line data. 182 */ 183 hte_init_line_attr(&hte.desc[i], 0, 0, NULL, NULL); 184 185 ret = hte_ts_get(hte.pdev, &hte.desc[i], i); 186 if (ret) 187 goto ts_put; 188 189 ret = devm_hte_request_ts_ns(hte.pdev, &hte.desc[i], 190 process_hw_ts, NULL, 191 &hte.desc[i]); 192 if (ret) /* no need to ts_put, request API takes care */ 193 goto free_irq; 194 } 195 196 timer_setup(&hte.timer, gpio_timer_cb, 0); 197 mod_timer(&hte.timer, jiffies + msecs_to_jiffies(5000)); 198 199 return 0; 200 201 ts_put: 202 cnt = i; 203 for (i = 0; i < cnt; i++) 204 hte_ts_put(&hte.desc[i]); 205 free_irq: 206 free_irq(hte.gpio_in_irq, &hte); 207 free_gpio_in: 208 gpiod_put(hte.gpio_in); 209 free_gpio_out: 210 gpiod_put(hte.gpio_out); 211 out: 212 213 return ret; 214 } 215 216 static void tegra_hte_test_remove(struct platform_device *pdev) 217 { 218 (void)pdev; 219 220 free_irq(hte.gpio_in_irq, &hte); 221 gpiod_put(hte.gpio_in); 222 gpiod_put(hte.gpio_out); 223 timer_delete_sync(&hte.timer); 224 } 225 226 static struct platform_driver tegra_hte_test_driver = { 227 .probe = tegra_hte_test_probe, 228 .remove = tegra_hte_test_remove, 229 .driver = { 230 .name = "tegra_hte_test", 231 .of_match_table = tegra_hte_test_of_match, 232 }, 233 }; 234 module_platform_driver(tegra_hte_test_driver); 235 236 MODULE_AUTHOR("Dipen Patel <dipenp@nvidia.com>"); 237 MODULE_DESCRIPTION("NVIDIA Tegra HTE (Hardware Timestamping Engine) test driver"); 238 MODULE_LICENSE("GPL"); 239