1 /* OMAP SSI internal interface. 2 * 3 * Copyright (C) 2010 Nokia Corporation. All rights reserved. 4 * Copyright (C) 2013 Sebastian Reichel 5 * 6 * Contact: Carlos Chinea <carlos.chinea@nokia.com> 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * version 2 as published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 20 * 02110-1301 USA 21 */ 22 23 #ifndef __LINUX_HSI_OMAP_SSI_H__ 24 #define __LINUX_HSI_OMAP_SSI_H__ 25 26 #include <linux/device.h> 27 #include <linux/platform_device.h> 28 #include <linux/hsi/hsi.h> 29 #include <linux/gpio.h> 30 #include <linux/interrupt.h> 31 #include <linux/io.h> 32 33 #define SSI_MAX_CHANNELS 8 34 #define SSI_MAX_GDD_LCH 8 35 #define SSI_BYTES_TO_FRAMES(x) ((((x) - 1) >> 2) + 1) 36 37 /** 38 * struct omap_ssm_ctx - OMAP synchronous serial module (TX/RX) context 39 * @mode: Bit transmission mode 40 * @channels: Number of channels 41 * @framesize: Frame size in bits 42 * @timeout: RX frame timeout 43 * @divisor: TX divider 44 * @arb_mode: Arbitration mode for TX frame (Round robin, priority) 45 */ 46 struct omap_ssm_ctx { 47 u32 mode; 48 u32 channels; 49 u32 frame_size; 50 union { 51 u32 timeout; /* Rx Only */ 52 struct { 53 u32 arb_mode; 54 u32 divisor; 55 }; /* Tx only */ 56 }; 57 }; 58 59 /** 60 * struct omap_ssi_port - OMAP SSI port data 61 * @dev: device associated to the port (HSI port) 62 * @pdev: platform device associated to the port 63 * @sst_dma: SSI transmitter physical base address 64 * @ssr_dma: SSI receiver physical base address 65 * @sst_base: SSI transmitter base address 66 * @ssr_base: SSI receiver base address 67 * @wk_lock: spin lock to serialize access to the wake lines 68 * @lock: Spin lock to serialize access to the SSI port 69 * @channels: Current number of channels configured (1,2,4 or 8) 70 * @txqueue: TX message queues 71 * @rxqueue: RX message queues 72 * @brkqueue: Queue of incoming HWBREAK requests (FRAME mode) 73 * @irq: IRQ number 74 * @wake_irq: IRQ number for incoming wake line (-1 if none) 75 * @wake_gpio: GPIO number for incoming wake line (-1 if none) 76 * @pio_tasklet: Bottom half for PIO transfers and events 77 * @wake_tasklet: Bottom half for incoming wake events 78 * @wkin_cken: Keep track of clock references due to the incoming wake line 79 * @wk_refcount: Reference count for output wake line 80 * @sys_mpu_enable: Context for the interrupt enable register for irq 0 81 * @sst: Context for the synchronous serial transmitter 82 * @ssr: Context for the synchronous serial receiver 83 */ 84 struct omap_ssi_port { 85 struct device *dev; 86 struct device *pdev; 87 dma_addr_t sst_dma; 88 dma_addr_t ssr_dma; 89 void __iomem *sst_base; 90 void __iomem *ssr_base; 91 spinlock_t wk_lock; 92 spinlock_t lock; 93 unsigned int channels; 94 struct list_head txqueue[SSI_MAX_CHANNELS]; 95 struct list_head rxqueue[SSI_MAX_CHANNELS]; 96 struct list_head brkqueue; 97 unsigned int irq; 98 int wake_irq; 99 int wake_gpio; 100 struct tasklet_struct pio_tasklet; 101 struct tasklet_struct wake_tasklet; 102 bool wktest:1; /* FIXME: HACK to be removed */ 103 bool wkin_cken:1; /* Workaround */ 104 unsigned int wk_refcount; 105 /* OMAP SSI port context */ 106 u32 sys_mpu_enable; /* We use only one irq */ 107 struct omap_ssm_ctx sst; 108 struct omap_ssm_ctx ssr; 109 u32 loss_count; 110 u32 port_id; 111 #ifdef CONFIG_DEBUG_FS 112 struct dentry *dir; 113 #endif 114 }; 115 116 /** 117 * struct gdd_trn - GDD transaction data 118 * @msg: Pointer to the HSI message being served 119 * @sg: Pointer to the current sg entry being served 120 */ 121 struct gdd_trn { 122 struct hsi_msg *msg; 123 struct scatterlist *sg; 124 }; 125 126 /** 127 * struct omap_ssi_controller - OMAP SSI controller data 128 * @dev: device associated to the controller (HSI controller) 129 * @sys: SSI I/O base address 130 * @gdd: GDD I/O base address 131 * @fck: SSI functional clock 132 * @gdd_irq: IRQ line for GDD 133 * @gdd_tasklet: bottom half for DMA transfers 134 * @gdd_trn: Array of GDD transaction data for ongoing GDD transfers 135 * @lock: lock to serialize access to GDD 136 * @loss_count: To follow if we need to restore context or not 137 * @max_speed: Maximum TX speed (Kb/s) set by the clients. 138 * @sysconfig: SSI controller saved context 139 * @gdd_gcr: SSI GDD saved context 140 * @get_loss: Pointer to omap_pm_get_dev_context_loss_count, if any 141 * @port: Array of pointers of the ports of the controller 142 * @dir: Debugfs SSI root directory 143 */ 144 struct omap_ssi_controller { 145 struct device *dev; 146 void __iomem *sys; 147 void __iomem *gdd; 148 struct clk *fck; 149 unsigned int gdd_irq; 150 struct tasklet_struct gdd_tasklet; 151 struct gdd_trn gdd_trn[SSI_MAX_GDD_LCH]; 152 spinlock_t lock; 153 unsigned long fck_rate; 154 u32 loss_count; 155 u32 max_speed; 156 /* OMAP SSI Controller context */ 157 u32 sysconfig; 158 u32 gdd_gcr; 159 int (*get_loss)(struct device *dev); 160 struct omap_ssi_port **port; 161 #ifdef CONFIG_DEBUG_FS 162 struct dentry *dir; 163 #endif 164 }; 165 166 #endif /* __LINUX_HSI_OMAP_SSI_H__ */ 167