1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Most ISHTP provider device and ISHTP logic declarations 4 * 5 * Copyright (c) 2003-2016, Intel Corporation. 6 */ 7 8 #ifndef _ISHTP_DEV_H_ 9 #define _ISHTP_DEV_H_ 10 11 #include <linux/types.h> 12 #include <linux/spinlock.h> 13 #include <linux/intel-ish-client-if.h> 14 #include "bus.h" 15 #include "hbm.h" 16 17 #define IPC_PAYLOAD_SIZE 128 18 #define ISHTP_RD_MSG_BUF_SIZE IPC_PAYLOAD_SIZE 19 #define IPC_FULL_MSG_SIZE 132 20 21 /* Number of messages to be held in ISR->BH FIFO */ 22 #define RD_INT_FIFO_SIZE 64 23 24 /* 25 * Number of IPC messages to be held in Tx FIFO, to be sent by ISR - 26 * Tx complete interrupt or RX_COMPLETE handler 27 */ 28 #define IPC_TX_FIFO_SIZE 512 29 30 /* 31 * Number of Maximum ISHTP Clients 32 */ 33 #define ISHTP_CLIENTS_MAX 256 34 35 /* 36 * Number of File descriptors/handles 37 * that can be opened to the driver. 38 * 39 * Limit to 255: 256 Total Clients 40 * minus internal client for ISHTP Bus Messages 41 */ 42 #define ISHTP_MAX_OPEN_HANDLE_COUNT (ISHTP_CLIENTS_MAX - 1) 43 44 /* Internal Clients Number */ 45 #define ISHTP_HOST_CLIENT_ID_ANY (-1) 46 #define ISHTP_HBM_HOST_CLIENT_ID 0 47 48 #define MAX_DMA_DELAY 20 49 50 /* ISHTP device states */ 51 enum ishtp_dev_state { 52 ISHTP_DEV_INITIALIZING = 0, 53 ISHTP_DEV_INIT_CLIENTS, 54 ISHTP_DEV_ENABLED, 55 ISHTP_DEV_RESETTING, 56 ISHTP_DEV_DISABLED, 57 ISHTP_DEV_POWER_DOWN, 58 ISHTP_DEV_POWER_UP 59 }; 60 61 struct ishtp_cl; 62 63 /** 64 * struct ishtp_fw_client - representation of fw client 65 * 66 * @props - client properties 67 * @client_id - fw client id 68 */ 69 struct ishtp_fw_client { 70 struct ishtp_client_properties props; 71 uint8_t client_id; 72 }; 73 74 /* 75 * Control info for IPC messages ISHTP/IPC sending FIFO - 76 * list with inline data buffer 77 * This structure will be filled with parameters submitted 78 * by the caller glue layer 79 * 'buf' may be pointing to the external buffer or to 'inline_data' 80 * 'offset' will be initialized to 0 by submitting 81 * 82 * 'ipc_send_compl' is intended for use by clients that send fragmented 83 * messages. When a fragment is sent down to IPC msg regs, 84 * it will be called. 85 * If it has more fragments to send, it will do it. With last fragment 86 * it will send appropriate ISHTP "message-complete" flag. 87 * It will remove the outstanding message 88 * (mark outstanding buffer as available). 89 * If counting flow control is in work and there are more flow control 90 * credits, it can put the next client message queued in cl. 91 * structure for IPC processing. 92 * 93 */ 94 struct wr_msg_ctl_info { 95 /* Will be called with 'ipc_send_compl_prm' as parameter */ 96 void (*ipc_send_compl)(void *); 97 98 void *ipc_send_compl_prm; 99 size_t length; 100 struct list_head link; 101 unsigned char inline_data[IPC_FULL_MSG_SIZE]; 102 }; 103 104 /* 105 * The ISHTP layer talks to hardware IPC message using the following 106 * callbacks 107 */ 108 struct ishtp_hw_ops { 109 int (*hw_reset)(struct ishtp_device *dev); 110 int (*ipc_reset)(struct ishtp_device *dev); 111 uint32_t (*ipc_get_header)(struct ishtp_device *dev, int length, 112 int busy); 113 int (*write)(struct ishtp_device *dev, 114 void (*ipc_send_compl)(void *), void *ipc_send_compl_prm, 115 unsigned char *msg, int length); 116 uint32_t (*ishtp_read_hdr)(const struct ishtp_device *dev); 117 int (*ishtp_read)(struct ishtp_device *dev, unsigned char *buffer, 118 unsigned long buffer_length); 119 uint32_t (*get_fw_status)(struct ishtp_device *dev); 120 void (*sync_fw_clock)(struct ishtp_device *dev); 121 bool (*dma_no_cache_snooping)(struct ishtp_device *dev); 122 }; 123 124 /** 125 * struct ishtp_driver_data - Driver-specific data for ISHTP devices 126 * 127 * This structure holds driver-specific data that can be associated with each 128 * ISHTP device instance. It allows for the storage of data that is unique to 129 * a particular driver or hardware variant. 130 * 131 * @fw_generation: The generation name associated with a specific hardware 132 * variant of the Intel Integrated Sensor Hub (ISH). This allows 133 * the driver to load the correct firmware based on the device's 134 * hardware variant. For example, "lnlm" for the Lunar Lake-M 135 * platform. The generation name must not exceed 8 characters 136 * in length. 137 */ 138 struct ishtp_driver_data { 139 char *fw_generation; 140 }; 141 142 struct ish_version { 143 u16 major; 144 u16 minor; 145 u16 hotfix; 146 u16 build; 147 }; 148 149 /** 150 * struct ishtp_device - ISHTP private device struct 151 */ 152 struct ishtp_device { 153 struct device *devc; /* pointer to lowest device */ 154 struct pci_dev *pdev; /* PCI device to get device ids */ 155 struct ishtp_driver_data *driver_data; /* pointer to driver-specific data */ 156 157 /* waitq for waiting for suspend response */ 158 wait_queue_head_t suspend_wait; 159 bool suspend_flag; /* Suspend is active */ 160 161 /* waitq for waiting for resume response */ 162 wait_queue_head_t resume_wait; 163 bool resume_flag; /*Resume is active */ 164 165 /* 166 * lock for the device, for everything that doesn't have 167 * a dedicated spinlock 168 */ 169 spinlock_t device_lock; 170 171 bool recvd_hw_ready; 172 struct hbm_version version; 173 int transfer_path; /* Choice of transfer path: IPC or DMA */ 174 175 /* work structure for scheduling firmware loading tasks */ 176 struct work_struct work_fw_loader; 177 /* waitq for waiting for command response from the firmware loader */ 178 wait_queue_head_t wait_loader_recvd_msg; 179 /* indicating whether a message from the firmware loader has been received */ 180 bool fw_loader_received; 181 /* pointer to a buffer for receiving messages from the firmware loader */ 182 void *fw_loader_rx_buf; 183 /* size of the buffer pointed to by fw_loader_rx_buf */ 184 int fw_loader_rx_size; 185 186 /* ishtp device states */ 187 enum ishtp_dev_state dev_state; 188 enum ishtp_hbm_state hbm_state; 189 190 /* driver read queue */ 191 struct ishtp_cl_rb read_list; 192 spinlock_t read_list_spinlock; 193 194 /* list of ishtp_cl's */ 195 struct list_head cl_list; 196 spinlock_t cl_list_lock; 197 long open_handle_count; 198 199 /* List of bus devices */ 200 struct list_head device_list; 201 spinlock_t device_list_lock; 202 203 /* waiting queues for receive message from FW */ 204 wait_queue_head_t wait_hw_ready; 205 wait_queue_head_t wait_hbm_recvd_msg; 206 207 /* FIFO for input messages for BH processing */ 208 unsigned char rd_msg_fifo[RD_INT_FIFO_SIZE * IPC_PAYLOAD_SIZE]; 209 unsigned int rd_msg_fifo_head, rd_msg_fifo_tail; 210 spinlock_t rd_msg_spinlock; 211 struct work_struct bh_hbm_work; 212 213 /* IPC write queue */ 214 struct list_head wr_processing_list, wr_free_list; 215 /* For both processing list and free list */ 216 spinlock_t wr_processing_spinlock; 217 218 struct ishtp_fw_client *fw_clients; /*Note:memory has to be allocated*/ 219 DECLARE_BITMAP(fw_clients_map, ISHTP_CLIENTS_MAX); 220 DECLARE_BITMAP(host_clients_map, ISHTP_CLIENTS_MAX); 221 uint8_t fw_clients_num; 222 uint8_t fw_client_presentation_num; 223 uint8_t fw_client_index; 224 spinlock_t fw_clients_lock; 225 226 /* TX DMA buffers and slots */ 227 int ishtp_host_dma_enabled; 228 void *ishtp_host_dma_tx_buf; 229 unsigned int ishtp_host_dma_tx_buf_size; 230 uint64_t ishtp_host_dma_tx_buf_phys; 231 int ishtp_dma_num_slots; 232 233 /* map of 4k blocks in Tx dma buf: 0-free, 1-used */ 234 uint8_t *ishtp_dma_tx_map; 235 spinlock_t ishtp_dma_tx_lock; 236 237 /* RX DMA buffers and slots */ 238 void *ishtp_host_dma_rx_buf; 239 unsigned int ishtp_host_dma_rx_buf_size; 240 uint64_t ishtp_host_dma_rx_buf_phys; 241 242 /* Dump to trace buffers if enabled*/ 243 ishtp_print_log print_log; 244 245 /* Base version of Intel's released firmware */ 246 struct ish_version base_ver; 247 /* Vendor-customized project version */ 248 struct ish_version prj_ver; 249 250 /* Debug stats */ 251 unsigned int ipc_rx_cnt; 252 unsigned long long ipc_rx_bytes_cnt; 253 unsigned int ipc_tx_cnt; 254 unsigned long long ipc_tx_bytes_cnt; 255 256 const struct ishtp_hw_ops *ops; 257 size_t mtu; 258 uint32_t ishtp_msg_hdr; 259 char hw[] __aligned(sizeof(void *)); 260 }; 261 262 static inline unsigned long ishtp_secs_to_jiffies(unsigned long sec) 263 { 264 return msecs_to_jiffies(sec * MSEC_PER_SEC); 265 } 266 267 /* 268 * Register Access Function 269 */ 270 static inline int ish_ipc_reset(struct ishtp_device *dev) 271 { 272 return dev->ops->ipc_reset(dev); 273 } 274 275 /* Exported function */ 276 void ishtp_device_init(struct ishtp_device *dev); 277 int ishtp_start(struct ishtp_device *dev); 278 279 #endif /*_ISHTP_DEV_H_*/ 280