1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Most ISHTP provider device and ISHTP logic declarations 4 * 5 * Copyright (c) 2003-2016, Intel Corporation. 6 */ 7 8 #ifndef _ISHTP_DEV_H_ 9 #define _ISHTP_DEV_H_ 10 11 #include <linux/types.h> 12 #include <linux/spinlock.h> 13 #include <linux/intel-ish-client-if.h> 14 #include "bus.h" 15 #include "hbm.h" 16 17 #define IPC_PAYLOAD_SIZE 128 18 #define ISHTP_RD_MSG_BUF_SIZE IPC_PAYLOAD_SIZE 19 #define IPC_FULL_MSG_SIZE 132 20 21 /* Number of messages to be held in ISR->BH FIFO */ 22 #define RD_INT_FIFO_SIZE 64 23 24 /* 25 * Number of IPC messages to be held in Tx FIFO, to be sent by ISR - 26 * Tx complete interrupt or RX_COMPLETE handler 27 */ 28 #define IPC_TX_FIFO_SIZE 512 29 30 /* 31 * Number of Maximum ISHTP Clients 32 */ 33 #define ISHTP_CLIENTS_MAX 256 34 35 /* 36 * Number of File descriptors/handles 37 * that can be opened to the driver. 38 * 39 * Limit to 255: 256 Total Clients 40 * minus internal client for ISHTP Bus Messages 41 */ 42 #define ISHTP_MAX_OPEN_HANDLE_COUNT (ISHTP_CLIENTS_MAX - 1) 43 44 /* Internal Clients Number */ 45 #define ISHTP_HOST_CLIENT_ID_ANY (-1) 46 #define ISHTP_HBM_HOST_CLIENT_ID 0 47 48 #define MAX_DMA_DELAY 20 49 50 /* ISHTP device states */ 51 enum ishtp_dev_state { 52 ISHTP_DEV_INITIALIZING = 0, 53 ISHTP_DEV_INIT_CLIENTS, 54 ISHTP_DEV_ENABLED, 55 ISHTP_DEV_RESETTING, 56 ISHTP_DEV_DISABLED, 57 ISHTP_DEV_POWER_DOWN, 58 ISHTP_DEV_POWER_UP 59 }; 60 const char *ishtp_dev_state_str(int state); 61 62 struct ishtp_cl; 63 64 /** 65 * struct ishtp_fw_client - representation of fw client 66 * 67 * @props - client properties 68 * @client_id - fw client id 69 */ 70 struct ishtp_fw_client { 71 struct ishtp_client_properties props; 72 uint8_t client_id; 73 }; 74 75 /* 76 * Control info for IPC messages ISHTP/IPC sending FIFO - 77 * list with inline data buffer 78 * This structure will be filled with parameters submitted 79 * by the caller glue layer 80 * 'buf' may be pointing to the external buffer or to 'inline_data' 81 * 'offset' will be initialized to 0 by submitting 82 * 83 * 'ipc_send_compl' is intended for use by clients that send fragmented 84 * messages. When a fragment is sent down to IPC msg regs, 85 * it will be called. 86 * If it has more fragments to send, it will do it. With last fragment 87 * it will send appropriate ISHTP "message-complete" flag. 88 * It will remove the outstanding message 89 * (mark outstanding buffer as available). 90 * If counting flow control is in work and there are more flow control 91 * credits, it can put the next client message queued in cl. 92 * structure for IPC processing. 93 * 94 */ 95 struct wr_msg_ctl_info { 96 /* Will be called with 'ipc_send_compl_prm' as parameter */ 97 void (*ipc_send_compl)(void *); 98 99 void *ipc_send_compl_prm; 100 size_t length; 101 struct list_head link; 102 unsigned char inline_data[IPC_FULL_MSG_SIZE]; 103 }; 104 105 /* 106 * The ISHTP layer talks to hardware IPC message using the following 107 * callbacks 108 */ 109 struct ishtp_hw_ops { 110 int (*hw_reset)(struct ishtp_device *dev); 111 int (*ipc_reset)(struct ishtp_device *dev); 112 uint32_t (*ipc_get_header)(struct ishtp_device *dev, int length, 113 int busy); 114 int (*write)(struct ishtp_device *dev, 115 void (*ipc_send_compl)(void *), void *ipc_send_compl_prm, 116 unsigned char *msg, int length); 117 uint32_t (*ishtp_read_hdr)(const struct ishtp_device *dev); 118 int (*ishtp_read)(struct ishtp_device *dev, unsigned char *buffer, 119 unsigned long buffer_length); 120 uint32_t (*get_fw_status)(struct ishtp_device *dev); 121 void (*sync_fw_clock)(struct ishtp_device *dev); 122 bool (*dma_no_cache_snooping)(struct ishtp_device *dev); 123 }; 124 125 /** 126 * struct ishtp_driver_data - Driver-specific data for ISHTP devices 127 * 128 * This structure holds driver-specific data that can be associated with each 129 * ISHTP device instance. It allows for the storage of data that is unique to 130 * a particular driver or hardware variant. 131 * 132 * @fw_generation: The generation name associated with a specific hardware 133 * variant of the Intel Integrated Sensor Hub (ISH). This allows 134 * the driver to load the correct firmware based on the device's 135 * hardware variant. For example, "lnlm" for the Lunar Lake-M 136 * platform. The generation name must not exceed 8 characters 137 * in length. 138 */ 139 struct ishtp_driver_data { 140 char *fw_generation; 141 }; 142 143 struct ish_version { 144 u16 major; 145 u16 minor; 146 u16 hotfix; 147 u16 build; 148 }; 149 150 /** 151 * struct ishtp_device - ISHTP private device struct 152 */ 153 struct ishtp_device { 154 struct device *devc; /* pointer to lowest device */ 155 struct pci_dev *pdev; /* PCI device to get device ids */ 156 struct ishtp_driver_data *driver_data; /* pointer to driver-specific data */ 157 158 /* waitq for waiting for suspend response */ 159 wait_queue_head_t suspend_wait; 160 bool suspend_flag; /* Suspend is active */ 161 162 /* waitq for waiting for resume response */ 163 wait_queue_head_t resume_wait; 164 bool resume_flag; /*Resume is active */ 165 166 /* 167 * lock for the device, for everything that doesn't have 168 * a dedicated spinlock 169 */ 170 spinlock_t device_lock; 171 172 bool recvd_hw_ready; 173 struct hbm_version version; 174 int transfer_path; /* Choice of transfer path: IPC or DMA */ 175 176 /* work structure for scheduling firmware loading tasks */ 177 struct work_struct work_fw_loader; 178 /* waitq for waiting for command response from the firmware loader */ 179 wait_queue_head_t wait_loader_recvd_msg; 180 /* indicating whether a message from the firmware loader has been received */ 181 bool fw_loader_received; 182 /* pointer to a buffer for receiving messages from the firmware loader */ 183 void *fw_loader_rx_buf; 184 /* size of the buffer pointed to by fw_loader_rx_buf */ 185 int fw_loader_rx_size; 186 187 /* ishtp device states */ 188 enum ishtp_dev_state dev_state; 189 enum ishtp_hbm_state hbm_state; 190 191 /* driver read queue */ 192 struct ishtp_cl_rb read_list; 193 spinlock_t read_list_spinlock; 194 195 /* list of ishtp_cl's */ 196 struct list_head cl_list; 197 spinlock_t cl_list_lock; 198 long open_handle_count; 199 200 /* List of bus devices */ 201 struct list_head device_list; 202 spinlock_t device_list_lock; 203 204 /* waiting queues for receive message from FW */ 205 wait_queue_head_t wait_hw_ready; 206 wait_queue_head_t wait_hbm_recvd_msg; 207 208 /* FIFO for input messages for BH processing */ 209 unsigned char rd_msg_fifo[RD_INT_FIFO_SIZE * IPC_PAYLOAD_SIZE]; 210 unsigned int rd_msg_fifo_head, rd_msg_fifo_tail; 211 spinlock_t rd_msg_spinlock; 212 struct work_struct bh_hbm_work; 213 214 /* IPC write queue */ 215 struct list_head wr_processing_list, wr_free_list; 216 /* For both processing list and free list */ 217 spinlock_t wr_processing_spinlock; 218 219 struct ishtp_fw_client *fw_clients; /*Note:memory has to be allocated*/ 220 DECLARE_BITMAP(fw_clients_map, ISHTP_CLIENTS_MAX); 221 DECLARE_BITMAP(host_clients_map, ISHTP_CLIENTS_MAX); 222 uint8_t fw_clients_num; 223 uint8_t fw_client_presentation_num; 224 uint8_t fw_client_index; 225 spinlock_t fw_clients_lock; 226 227 /* TX DMA buffers and slots */ 228 int ishtp_host_dma_enabled; 229 void *ishtp_host_dma_tx_buf; 230 unsigned int ishtp_host_dma_tx_buf_size; 231 uint64_t ishtp_host_dma_tx_buf_phys; 232 int ishtp_dma_num_slots; 233 234 /* map of 4k blocks in Tx dma buf: 0-free, 1-used */ 235 uint8_t *ishtp_dma_tx_map; 236 spinlock_t ishtp_dma_tx_lock; 237 238 /* RX DMA buffers and slots */ 239 void *ishtp_host_dma_rx_buf; 240 unsigned int ishtp_host_dma_rx_buf_size; 241 uint64_t ishtp_host_dma_rx_buf_phys; 242 243 /* Dump to trace buffers if enabled*/ 244 ishtp_print_log print_log; 245 246 /* Base version of Intel's released firmware */ 247 struct ish_version base_ver; 248 /* Vendor-customized project version */ 249 struct ish_version prj_ver; 250 251 /* Debug stats */ 252 unsigned int ipc_rx_cnt; 253 unsigned long long ipc_rx_bytes_cnt; 254 unsigned int ipc_tx_cnt; 255 unsigned long long ipc_tx_bytes_cnt; 256 257 const struct ishtp_hw_ops *ops; 258 size_t mtu; 259 uint32_t ishtp_msg_hdr; 260 char hw[] __aligned(sizeof(void *)); 261 }; 262 263 static inline unsigned long ishtp_secs_to_jiffies(unsigned long sec) 264 { 265 return msecs_to_jiffies(sec * MSEC_PER_SEC); 266 } 267 268 /* 269 * Register Access Function 270 */ 271 static inline int ish_ipc_reset(struct ishtp_device *dev) 272 { 273 return dev->ops->ipc_reset(dev); 274 } 275 276 /* Exported function */ 277 void ishtp_device_init(struct ishtp_device *dev); 278 int ishtp_start(struct ishtp_device *dev); 279 280 #endif /*_ISHTP_DEV_H_*/ 281