1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * MCP2221A - Microchip USB to I2C Host Protocol Bridge 4 * 5 * Copyright (c) 2020, Rishi Gupta <gupt21@gmail.com> 6 * 7 * Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/20005565B.pdf 8 */ 9 10 #include <linux/module.h> 11 #include <linux/err.h> 12 #include <linux/mutex.h> 13 #include <linux/bitfield.h> 14 #include <linux/completion.h> 15 #include <linux/delay.h> 16 #include <linux/hid.h> 17 #include <linux/hidraw.h> 18 #include <linux/i2c.h> 19 #include <linux/gpio/driver.h> 20 #include <linux/iio/iio.h> 21 #include <linux/minmax.h> 22 #include "hid-ids.h" 23 24 /* Commands codes in a raw output report */ 25 enum { 26 MCP2221_I2C_WR_DATA = 0x90, 27 MCP2221_I2C_WR_NO_STOP = 0x94, 28 MCP2221_I2C_RD_DATA = 0x91, 29 MCP2221_I2C_RD_RPT_START = 0x93, 30 MCP2221_I2C_GET_DATA = 0x40, 31 MCP2221_I2C_PARAM_OR_STATUS = 0x10, 32 MCP2221_I2C_SET_SPEED = 0x20, 33 MCP2221_I2C_CANCEL = 0x10, 34 MCP2221_GPIO_SET = 0x50, 35 MCP2221_GPIO_GET = 0x51, 36 MCP2221_SET_SRAM_SETTINGS = 0x60, 37 MCP2221_GET_SRAM_SETTINGS = 0x61, 38 MCP2221_READ_FLASH_DATA = 0xb0, 39 }; 40 41 /* Response codes in a raw input report */ 42 enum { 43 MCP2221_SUCCESS = 0x00, 44 MCP2221_I2C_ENG_BUSY = 0x01, 45 MCP2221_I2C_START_TOUT = 0x12, 46 MCP2221_I2C_STOP_TOUT = 0x62, 47 MCP2221_I2C_WRADDRL_TOUT = 0x23, 48 MCP2221_I2C_WRDATA_TOUT = 0x44, 49 MCP2221_I2C_WRADDRL_NACK = 0x25, 50 MCP2221_I2C_MASK_ADDR_NACK = 0x40, 51 MCP2221_I2C_WRADDRL_SEND = 0x21, 52 MCP2221_I2C_ADDR_NACK = 0x25, 53 MCP2221_I2C_READ_PARTIAL = 0x54, 54 MCP2221_I2C_READ_COMPL = 0x55, 55 MCP2221_ALT_F_NOT_GPIOV = 0xEE, 56 MCP2221_ALT_F_NOT_GPIOD = 0xEF, 57 }; 58 59 /* MCP SRAM read offsets cmd: MCP2221_GET_SRAM_SETTINGS */ 60 enum { 61 MCP2221_SRAM_RD_GP0 = 22, 62 MCP2221_SRAM_RD_GP1 = 23, 63 MCP2221_SRAM_RD_GP2 = 24, 64 MCP2221_SRAM_RD_GP3 = 25, 65 }; 66 67 /* MCP SRAM write offsets cmd: MCP2221_SET_SRAM_SETTINGS */ 68 enum { 69 MCP2221_SRAM_WR_GP_ENA_ALTER = 7, 70 MCP2221_SRAM_WR_GP0 = 8, 71 MCP2221_SRAM_WR_GP1 = 9, 72 MCP2221_SRAM_WR_GP2 = 10, 73 MCP2221_SRAM_WR_GP3 = 11, 74 }; 75 76 #define MCP2221_SRAM_GP_DESIGN_MASK 0x07 77 #define MCP2221_SRAM_GP_DIRECTION_MASK 0x08 78 #define MCP2221_SRAM_GP_VALUE_MASK 0x10 79 80 /* MCP GPIO direction encoding */ 81 enum { 82 MCP2221_DIR_OUT = 0x00, 83 MCP2221_DIR_IN = 0x01, 84 }; 85 86 #define MCP_NGPIO 4 87 88 /* MCP GPIO set command layout */ 89 struct mcp_set_gpio { 90 u8 cmd; 91 u8 dummy; 92 struct { 93 u8 change_value; 94 u8 value; 95 u8 change_direction; 96 u8 direction; 97 } gpio[MCP_NGPIO]; 98 } __packed; 99 100 /* MCP GPIO get command layout */ 101 struct mcp_get_gpio { 102 u8 cmd; 103 u8 dummy; 104 struct { 105 u8 value; 106 u8 direction; 107 } gpio[MCP_NGPIO]; 108 } __packed; 109 110 /* 111 * There is no way to distinguish responses. Therefore next command 112 * is sent only after response to previous has been received. Mutex 113 * lock is used for this purpose mainly. 114 */ 115 struct mcp2221 { 116 struct hid_device *hdev; 117 struct i2c_adapter adapter; 118 struct mutex lock; 119 struct completion wait_in_report; 120 struct delayed_work init_work; 121 u8 *rxbuf; 122 u8 txbuf[64]; 123 int rxbuf_idx; 124 int status; 125 u8 cur_i2c_clk_div; 126 struct gpio_chip *gc; 127 u8 gp_idx; 128 u8 gpio_dir; 129 u8 mode[4]; 130 #if IS_REACHABLE(CONFIG_IIO) 131 struct iio_chan_spec iio_channels[3]; 132 u16 adc_values[3]; 133 u8 adc_scale; 134 u8 dac_value; 135 u16 dac_scale; 136 #endif 137 }; 138 139 struct mcp2221_iio { 140 struct mcp2221 *mcp; 141 }; 142 143 /* 144 * Default i2c bus clock frequency 400 kHz. Modify this if you 145 * want to set some other frequency (min 50 kHz - max 400 kHz). 146 */ 147 static uint i2c_clk_freq = 400; 148 149 /* Synchronously send output report to the device */ 150 static int mcp_send_report(struct mcp2221 *mcp, 151 u8 *out_report, size_t len) 152 { 153 u8 *buf; 154 int ret; 155 156 buf = kmemdup(out_report, len, GFP_KERNEL); 157 if (!buf) 158 return -ENOMEM; 159 160 /* mcp2221 uses interrupt endpoint for out reports */ 161 ret = hid_hw_output_report(mcp->hdev, buf, len); 162 kfree(buf); 163 164 if (ret < 0) 165 return ret; 166 return 0; 167 } 168 169 /* 170 * Send o/p report to the device and wait for i/p report to be 171 * received from the device. If the device does not respond, 172 * we timeout. 173 */ 174 static int mcp_send_data_req_status(struct mcp2221 *mcp, 175 u8 *out_report, int len) 176 { 177 int ret; 178 unsigned long t; 179 180 reinit_completion(&mcp->wait_in_report); 181 182 ret = mcp_send_report(mcp, out_report, len); 183 if (ret) 184 return ret; 185 186 t = wait_for_completion_timeout(&mcp->wait_in_report, 187 msecs_to_jiffies(4000)); 188 if (!t) 189 return -ETIMEDOUT; 190 191 return mcp->status; 192 } 193 194 /* Check pass/fail for actual communication with i2c slave */ 195 static int mcp_chk_last_cmd_status(struct mcp2221 *mcp) 196 { 197 memset(mcp->txbuf, 0, 8); 198 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS; 199 200 return mcp_send_data_req_status(mcp, mcp->txbuf, 8); 201 } 202 203 /* Cancels last command releasing i2c bus just in case occupied */ 204 static int mcp_cancel_last_cmd(struct mcp2221 *mcp) 205 { 206 memset(mcp->txbuf, 0, 8); 207 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS; 208 mcp->txbuf[2] = MCP2221_I2C_CANCEL; 209 210 return mcp_send_data_req_status(mcp, mcp->txbuf, 8); 211 } 212 213 /* Check if the last command succeeded or failed and return the result. 214 * If the command did fail, cancel that command which will free the i2c bus. 215 */ 216 static int mcp_chk_last_cmd_status_free_bus(struct mcp2221 *mcp) 217 { 218 int ret; 219 220 ret = mcp_chk_last_cmd_status(mcp); 221 if (ret) { 222 /* The last command was a failure. 223 * Send a cancel which will also free the bus. 224 */ 225 usleep_range(980, 1000); 226 mcp_cancel_last_cmd(mcp); 227 } 228 229 return ret; 230 } 231 232 static int mcp_set_i2c_speed(struct mcp2221 *mcp) 233 { 234 int ret; 235 236 memset(mcp->txbuf, 0, 8); 237 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS; 238 mcp->txbuf[3] = MCP2221_I2C_SET_SPEED; 239 mcp->txbuf[4] = mcp->cur_i2c_clk_div; 240 241 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 8); 242 if (ret) { 243 /* Small delay is needed here */ 244 usleep_range(980, 1000); 245 mcp_cancel_last_cmd(mcp); 246 } 247 248 return 0; 249 } 250 251 /* 252 * An output report can contain minimum 1 and maximum 60 user data 253 * bytes. If the number of data bytes is more then 60, we send it 254 * in chunks of 60 bytes. Last chunk may contain exactly 60 or less 255 * bytes. Total number of bytes is informed in very first report to 256 * mcp2221, from that point onwards it first collect all the data 257 * from host and then send to i2c slave device. 258 */ 259 static int mcp_i2c_write(struct mcp2221 *mcp, 260 struct i2c_msg *msg, int type, u8 last_status) 261 { 262 int ret, len, idx, sent; 263 264 idx = 0; 265 sent = 0; 266 len = min(msg->len, 60); 267 268 do { 269 mcp->txbuf[0] = type; 270 mcp->txbuf[1] = msg->len & 0xff; 271 mcp->txbuf[2] = msg->len >> 8; 272 mcp->txbuf[3] = (u8)(msg->addr << 1); 273 274 memcpy(&mcp->txbuf[4], &msg->buf[idx], len); 275 276 ret = mcp_send_data_req_status(mcp, mcp->txbuf, len + 4); 277 if (ret) 278 return ret; 279 280 usleep_range(980, 1000); 281 282 if (last_status) { 283 ret = mcp_chk_last_cmd_status_free_bus(mcp); 284 if (ret) 285 return ret; 286 } 287 288 sent = sent + len; 289 if (sent >= msg->len) 290 break; 291 292 idx = idx + len; 293 len = min(msg->len - sent, 60); 294 295 /* 296 * Testing shows delay is needed between successive writes 297 * otherwise next write fails on first-try from i2c core. 298 * This value is obtained through automated stress testing. 299 */ 300 usleep_range(980, 1000); 301 } while (len > 0); 302 303 return ret; 304 } 305 306 /* 307 * Device reads all data (0 - 65535 bytes) from i2c slave device and 308 * stores it in device itself. This data is read back from device to 309 * host in multiples of 60 bytes using input reports. 310 */ 311 static int mcp_i2c_smbus_read(struct mcp2221 *mcp, 312 struct i2c_msg *msg, int type, u16 smbus_addr, 313 u8 smbus_len, u8 *smbus_buf) 314 { 315 int ret; 316 u16 total_len; 317 int retries = 0; 318 319 mcp->txbuf[0] = type; 320 if (msg) { 321 mcp->txbuf[1] = msg->len & 0xff; 322 mcp->txbuf[2] = msg->len >> 8; 323 mcp->txbuf[3] = (u8)(msg->addr << 1); 324 total_len = msg->len; 325 mcp->rxbuf = msg->buf; 326 } else { 327 mcp->txbuf[1] = smbus_len; 328 mcp->txbuf[2] = 0; 329 mcp->txbuf[3] = (u8)(smbus_addr << 1); 330 total_len = smbus_len; 331 mcp->rxbuf = smbus_buf; 332 } 333 334 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 4); 335 if (ret) 336 return ret; 337 338 mcp->rxbuf_idx = 0; 339 340 do { 341 /* Wait for the data to be read by the device */ 342 usleep_range(980, 1000); 343 344 memset(mcp->txbuf, 0, 4); 345 mcp->txbuf[0] = MCP2221_I2C_GET_DATA; 346 347 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 348 if (ret) { 349 if (retries < 5) { 350 /* The data wasn't ready to read. 351 * Wait a bit longer and try again. 352 */ 353 usleep_range(90, 100); 354 retries++; 355 } else { 356 return ret; 357 } 358 } else { 359 retries = 0; 360 } 361 } while (mcp->rxbuf_idx < total_len); 362 363 usleep_range(980, 1000); 364 ret = mcp_chk_last_cmd_status_free_bus(mcp); 365 366 return ret; 367 } 368 369 static int mcp_i2c_xfer(struct i2c_adapter *adapter, 370 struct i2c_msg msgs[], int num) 371 { 372 int ret; 373 struct mcp2221 *mcp = i2c_get_adapdata(adapter); 374 375 hid_hw_power(mcp->hdev, PM_HINT_FULLON); 376 377 mutex_lock(&mcp->lock); 378 379 if (num == 1) { 380 if (msgs->flags & I2C_M_RD) { 381 ret = mcp_i2c_smbus_read(mcp, msgs, MCP2221_I2C_RD_DATA, 382 0, 0, NULL); 383 } else { 384 ret = mcp_i2c_write(mcp, msgs, MCP2221_I2C_WR_DATA, 1); 385 } 386 if (ret) 387 goto exit; 388 ret = num; 389 } else if (num == 2) { 390 /* Ex transaction; send reg address and read its contents */ 391 if (msgs[0].addr == msgs[1].addr && 392 !(msgs[0].flags & I2C_M_RD) && 393 (msgs[1].flags & I2C_M_RD)) { 394 395 ret = mcp_i2c_write(mcp, &msgs[0], 396 MCP2221_I2C_WR_NO_STOP, 0); 397 if (ret) 398 goto exit; 399 400 ret = mcp_i2c_smbus_read(mcp, &msgs[1], 401 MCP2221_I2C_RD_RPT_START, 402 0, 0, NULL); 403 if (ret) 404 goto exit; 405 ret = num; 406 } else { 407 dev_err(&adapter->dev, 408 "unsupported multi-msg i2c transaction\n"); 409 ret = -EOPNOTSUPP; 410 } 411 } else { 412 dev_err(&adapter->dev, 413 "unsupported multi-msg i2c transaction\n"); 414 ret = -EOPNOTSUPP; 415 } 416 417 exit: 418 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 419 mutex_unlock(&mcp->lock); 420 return ret; 421 } 422 423 static int mcp_smbus_write(struct mcp2221 *mcp, u16 addr, 424 u8 command, u8 *buf, u8 len, int type, 425 u8 last_status) 426 { 427 int data_len, ret; 428 429 mcp->txbuf[0] = type; 430 mcp->txbuf[1] = len + 1; /* 1 is due to command byte itself */ 431 mcp->txbuf[2] = 0; 432 mcp->txbuf[3] = (u8)(addr << 1); 433 mcp->txbuf[4] = command; 434 435 switch (len) { 436 case 0: 437 data_len = 5; 438 break; 439 case 1: 440 mcp->txbuf[5] = buf[0]; 441 data_len = 6; 442 break; 443 case 2: 444 mcp->txbuf[5] = buf[0]; 445 mcp->txbuf[6] = buf[1]; 446 data_len = 7; 447 break; 448 default: 449 if (len > I2C_SMBUS_BLOCK_MAX) 450 return -EINVAL; 451 452 memcpy(&mcp->txbuf[5], buf, len); 453 data_len = len + 5; 454 } 455 456 ret = mcp_send_data_req_status(mcp, mcp->txbuf, data_len); 457 if (ret) 458 return ret; 459 460 if (last_status) { 461 usleep_range(980, 1000); 462 463 ret = mcp_chk_last_cmd_status_free_bus(mcp); 464 } 465 466 return ret; 467 } 468 469 static int mcp_smbus_xfer(struct i2c_adapter *adapter, u16 addr, 470 unsigned short flags, char read_write, 471 u8 command, int size, 472 union i2c_smbus_data *data) 473 { 474 int ret; 475 struct mcp2221 *mcp = i2c_get_adapdata(adapter); 476 477 hid_hw_power(mcp->hdev, PM_HINT_FULLON); 478 479 mutex_lock(&mcp->lock); 480 481 switch (size) { 482 483 case I2C_SMBUS_QUICK: 484 if (read_write == I2C_SMBUS_READ) 485 ret = mcp_i2c_smbus_read(mcp, NULL, MCP2221_I2C_RD_DATA, 486 addr, 0, &data->byte); 487 else 488 ret = mcp_smbus_write(mcp, addr, command, NULL, 489 0, MCP2221_I2C_WR_DATA, 1); 490 break; 491 case I2C_SMBUS_BYTE: 492 if (read_write == I2C_SMBUS_READ) 493 ret = mcp_i2c_smbus_read(mcp, NULL, MCP2221_I2C_RD_DATA, 494 addr, 1, &data->byte); 495 else 496 ret = mcp_smbus_write(mcp, addr, command, NULL, 497 0, MCP2221_I2C_WR_DATA, 1); 498 break; 499 case I2C_SMBUS_BYTE_DATA: 500 if (read_write == I2C_SMBUS_READ) { 501 ret = mcp_smbus_write(mcp, addr, command, NULL, 502 0, MCP2221_I2C_WR_NO_STOP, 0); 503 if (ret) 504 goto exit; 505 506 ret = mcp_i2c_smbus_read(mcp, NULL, 507 MCP2221_I2C_RD_RPT_START, 508 addr, 1, &data->byte); 509 } else { 510 ret = mcp_smbus_write(mcp, addr, command, &data->byte, 511 1, MCP2221_I2C_WR_DATA, 1); 512 } 513 break; 514 case I2C_SMBUS_WORD_DATA: 515 if (read_write == I2C_SMBUS_READ) { 516 ret = mcp_smbus_write(mcp, addr, command, NULL, 517 0, MCP2221_I2C_WR_NO_STOP, 0); 518 if (ret) 519 goto exit; 520 521 ret = mcp_i2c_smbus_read(mcp, NULL, 522 MCP2221_I2C_RD_RPT_START, 523 addr, 2, (u8 *)&data->word); 524 } else { 525 ret = mcp_smbus_write(mcp, addr, command, 526 (u8 *)&data->word, 2, 527 MCP2221_I2C_WR_DATA, 1); 528 } 529 break; 530 case I2C_SMBUS_BLOCK_DATA: 531 if (read_write == I2C_SMBUS_READ) { 532 ret = mcp_smbus_write(mcp, addr, command, NULL, 533 0, MCP2221_I2C_WR_NO_STOP, 1); 534 if (ret) 535 goto exit; 536 537 mcp->rxbuf_idx = 0; 538 mcp->rxbuf = data->block; 539 mcp->txbuf[0] = MCP2221_I2C_GET_DATA; 540 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 541 if (ret) 542 goto exit; 543 } else { 544 if (!data->block[0]) { 545 ret = -EINVAL; 546 goto exit; 547 } 548 ret = mcp_smbus_write(mcp, addr, command, data->block, 549 data->block[0] + 1, 550 MCP2221_I2C_WR_DATA, 1); 551 } 552 break; 553 case I2C_SMBUS_I2C_BLOCK_DATA: 554 if (read_write == I2C_SMBUS_READ) { 555 ret = mcp_smbus_write(mcp, addr, command, NULL, 556 0, MCP2221_I2C_WR_NO_STOP, 1); 557 if (ret) 558 goto exit; 559 560 mcp->rxbuf_idx = 0; 561 mcp->rxbuf = data->block; 562 mcp->txbuf[0] = MCP2221_I2C_GET_DATA; 563 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 564 if (ret) 565 goto exit; 566 } else { 567 if (!data->block[0]) { 568 ret = -EINVAL; 569 goto exit; 570 } 571 ret = mcp_smbus_write(mcp, addr, command, 572 &data->block[1], data->block[0], 573 MCP2221_I2C_WR_DATA, 1); 574 } 575 break; 576 case I2C_SMBUS_PROC_CALL: 577 ret = mcp_smbus_write(mcp, addr, command, 578 (u8 *)&data->word, 579 2, MCP2221_I2C_WR_NO_STOP, 0); 580 if (ret) 581 goto exit; 582 583 ret = mcp_i2c_smbus_read(mcp, NULL, 584 MCP2221_I2C_RD_RPT_START, 585 addr, 2, (u8 *)&data->word); 586 break; 587 case I2C_SMBUS_BLOCK_PROC_CALL: 588 ret = mcp_smbus_write(mcp, addr, command, data->block, 589 data->block[0] + 1, 590 MCP2221_I2C_WR_NO_STOP, 0); 591 if (ret) 592 goto exit; 593 594 ret = mcp_i2c_smbus_read(mcp, NULL, 595 MCP2221_I2C_RD_RPT_START, 596 addr, I2C_SMBUS_BLOCK_MAX, 597 data->block); 598 break; 599 default: 600 dev_err(&mcp->adapter.dev, 601 "unsupported smbus transaction size:%d\n", size); 602 ret = -EOPNOTSUPP; 603 } 604 605 exit: 606 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 607 mutex_unlock(&mcp->lock); 608 return ret; 609 } 610 611 static u32 mcp_i2c_func(struct i2c_adapter *adapter) 612 { 613 return I2C_FUNC_I2C | 614 I2C_FUNC_SMBUS_READ_BLOCK_DATA | 615 I2C_FUNC_SMBUS_BLOCK_PROC_CALL | 616 (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_PEC); 617 } 618 619 static const struct i2c_algorithm mcp_i2c_algo = { 620 .master_xfer = mcp_i2c_xfer, 621 .smbus_xfer = mcp_smbus_xfer, 622 .functionality = mcp_i2c_func, 623 }; 624 625 #if IS_REACHABLE(CONFIG_GPIOLIB) 626 static int mcp_gpio_read_sram(struct mcp2221 *mcp) 627 { 628 int ret; 629 630 memset(mcp->txbuf, 0, 64); 631 mcp->txbuf[0] = MCP2221_GET_SRAM_SETTINGS; 632 633 mutex_lock(&mcp->lock); 634 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 64); 635 mutex_unlock(&mcp->lock); 636 637 return ret; 638 } 639 640 /* 641 * If CONFIG_IIO is not enabled, check for the gpio pins 642 * if they are in gpio mode. For the ones which are not 643 * in gpio mode, set them into gpio mode. 644 */ 645 static int mcp2221_check_gpio_pinfunc(struct mcp2221 *mcp) 646 { 647 int i; 648 int needgpiofix = 0; 649 int ret; 650 651 if (IS_ENABLED(CONFIG_IIO)) 652 return 0; 653 654 ret = mcp_gpio_read_sram(mcp); 655 if (ret) 656 return ret; 657 658 for (i = 0; i < MCP_NGPIO; i++) { 659 if ((mcp->mode[i] & MCP2221_SRAM_GP_DESIGN_MASK) != 0x0) { 660 dev_warn(&mcp->hdev->dev, 661 "GPIO %d not in gpio mode\n", i); 662 needgpiofix = 1; 663 } 664 } 665 666 if (!needgpiofix) 667 return 0; 668 669 /* 670 * Set all bytes to 0, so Bit 7 is not set. The chip 671 * only changes content of a register when bit 7 is set. 672 */ 673 memset(mcp->txbuf, 0, 64); 674 mcp->txbuf[0] = MCP2221_SET_SRAM_SETTINGS; 675 676 /* 677 * Set bit 7 in MCP2221_SRAM_WR_GP_ENA_ALTER to enable 678 * loading of a new set of gpio settings to GP SRAM 679 */ 680 mcp->txbuf[MCP2221_SRAM_WR_GP_ENA_ALTER] = 0x80; 681 for (i = 0; i < MCP_NGPIO; i++) { 682 if ((mcp->mode[i] & MCP2221_SRAM_GP_DESIGN_MASK) == 0x0) { 683 /* write current GPIO mode */ 684 mcp->txbuf[MCP2221_SRAM_WR_GP0 + i] = mcp->mode[i]; 685 } else { 686 /* pin is not in gpio mode, set it to input mode */ 687 mcp->txbuf[MCP2221_SRAM_WR_GP0 + i] = 0x08; 688 dev_warn(&mcp->hdev->dev, 689 "Set GPIO mode for gpio pin %d!\n", i); 690 } 691 } 692 693 mutex_lock(&mcp->lock); 694 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 64); 695 mutex_unlock(&mcp->lock); 696 697 return ret; 698 } 699 700 static int mcp_gpio_get(struct gpio_chip *gc, 701 unsigned int offset) 702 { 703 int ret; 704 struct mcp2221 *mcp = gpiochip_get_data(gc); 705 706 mcp->txbuf[0] = MCP2221_GPIO_GET; 707 708 mcp->gp_idx = offsetof(struct mcp_get_gpio, gpio[offset]); 709 710 mutex_lock(&mcp->lock); 711 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 712 mutex_unlock(&mcp->lock); 713 714 return ret; 715 } 716 717 static int mcp_gpio_set(struct gpio_chip *gc, unsigned int offset, int value) 718 { 719 struct mcp2221 *mcp = gpiochip_get_data(gc); 720 int ret; 721 722 memset(mcp->txbuf, 0, 18); 723 mcp->txbuf[0] = MCP2221_GPIO_SET; 724 725 mcp->gp_idx = offsetof(struct mcp_set_gpio, gpio[offset].value); 726 727 mcp->txbuf[mcp->gp_idx - 1] = 1; 728 mcp->txbuf[mcp->gp_idx] = !!value; 729 730 mutex_lock(&mcp->lock); 731 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 18); 732 mutex_unlock(&mcp->lock); 733 734 return ret; 735 } 736 737 static int mcp_gpio_dir_set(struct mcp2221 *mcp, 738 unsigned int offset, u8 val) 739 { 740 memset(mcp->txbuf, 0, 18); 741 mcp->txbuf[0] = MCP2221_GPIO_SET; 742 743 mcp->gp_idx = offsetof(struct mcp_set_gpio, gpio[offset].direction); 744 745 mcp->txbuf[mcp->gp_idx - 1] = 1; 746 mcp->txbuf[mcp->gp_idx] = val; 747 748 return mcp_send_data_req_status(mcp, mcp->txbuf, 18); 749 } 750 751 static int mcp_gpio_direction_input(struct gpio_chip *gc, 752 unsigned int offset) 753 { 754 int ret; 755 struct mcp2221 *mcp = gpiochip_get_data(gc); 756 757 mutex_lock(&mcp->lock); 758 ret = mcp_gpio_dir_set(mcp, offset, MCP2221_DIR_IN); 759 mutex_unlock(&mcp->lock); 760 761 return ret; 762 } 763 764 static int mcp_gpio_direction_output(struct gpio_chip *gc, 765 unsigned int offset, int value) 766 { 767 int ret; 768 struct mcp2221 *mcp = gpiochip_get_data(gc); 769 770 mutex_lock(&mcp->lock); 771 ret = mcp_gpio_dir_set(mcp, offset, MCP2221_DIR_OUT); 772 mutex_unlock(&mcp->lock); 773 774 /* Can't configure as output, bailout early */ 775 if (ret) 776 return ret; 777 778 mcp_gpio_set(gc, offset, value); 779 780 return 0; 781 } 782 783 static int mcp_gpio_get_direction(struct gpio_chip *gc, 784 unsigned int offset) 785 { 786 int ret; 787 struct mcp2221 *mcp = gpiochip_get_data(gc); 788 789 mcp->txbuf[0] = MCP2221_GPIO_GET; 790 791 mcp->gp_idx = offsetof(struct mcp_get_gpio, gpio[offset]); 792 793 mutex_lock(&mcp->lock); 794 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 795 mutex_unlock(&mcp->lock); 796 797 if (ret) 798 return ret; 799 800 if (mcp->gpio_dir == MCP2221_DIR_IN) 801 return GPIO_LINE_DIRECTION_IN; 802 803 return GPIO_LINE_DIRECTION_OUT; 804 } 805 #endif 806 807 /* Gives current state of i2c engine inside mcp2221 */ 808 static int mcp_get_i2c_eng_state(struct mcp2221 *mcp, 809 u8 *data, u8 idx) 810 { 811 int ret; 812 813 switch (data[idx]) { 814 case MCP2221_I2C_WRADDRL_NACK: 815 case MCP2221_I2C_WRADDRL_SEND: 816 ret = -ENXIO; 817 break; 818 case MCP2221_I2C_START_TOUT: 819 case MCP2221_I2C_STOP_TOUT: 820 case MCP2221_I2C_WRADDRL_TOUT: 821 case MCP2221_I2C_WRDATA_TOUT: 822 ret = -ETIMEDOUT; 823 break; 824 case MCP2221_I2C_ENG_BUSY: 825 ret = -EAGAIN; 826 break; 827 case MCP2221_SUCCESS: 828 ret = 0x00; 829 break; 830 default: 831 ret = -EIO; 832 } 833 834 return ret; 835 } 836 837 /* 838 * MCP2221 uses interrupt endpoint for input reports. This function 839 * is called by HID layer when it receives i/p report from mcp2221, 840 * which is actually a response to the previously sent command. 841 * 842 * MCP2221A firmware specific return codes are parsed and 0 or 843 * appropriate negative error code is returned. Delayed response 844 * results in timeout error and stray reponses results in -EIO. 845 */ 846 static int mcp2221_raw_event(struct hid_device *hdev, 847 struct hid_report *report, u8 *data, int size) 848 { 849 u8 *buf; 850 struct mcp2221 *mcp = hid_get_drvdata(hdev); 851 852 switch (data[0]) { 853 854 case MCP2221_I2C_WR_DATA: 855 case MCP2221_I2C_WR_NO_STOP: 856 case MCP2221_I2C_RD_DATA: 857 case MCP2221_I2C_RD_RPT_START: 858 switch (data[1]) { 859 case MCP2221_SUCCESS: 860 mcp->status = 0; 861 break; 862 default: 863 mcp->status = mcp_get_i2c_eng_state(mcp, data, 2); 864 } 865 complete(&mcp->wait_in_report); 866 break; 867 868 case MCP2221_I2C_PARAM_OR_STATUS: 869 switch (data[1]) { 870 case MCP2221_SUCCESS: 871 if ((mcp->txbuf[3] == MCP2221_I2C_SET_SPEED) && 872 (data[3] != MCP2221_I2C_SET_SPEED)) { 873 mcp->status = -EAGAIN; 874 break; 875 } 876 if (data[20] & MCP2221_I2C_MASK_ADDR_NACK) { 877 mcp->status = -ENXIO; 878 break; 879 } 880 mcp->status = mcp_get_i2c_eng_state(mcp, data, 8); 881 #if IS_REACHABLE(CONFIG_IIO) 882 memcpy(&mcp->adc_values, &data[50], sizeof(mcp->adc_values)); 883 #endif 884 break; 885 default: 886 mcp->status = -EIO; 887 } 888 complete(&mcp->wait_in_report); 889 break; 890 891 case MCP2221_I2C_GET_DATA: 892 switch (data[1]) { 893 case MCP2221_SUCCESS: 894 if (data[2] == MCP2221_I2C_ADDR_NACK) { 895 mcp->status = -ENXIO; 896 break; 897 } 898 if (!mcp_get_i2c_eng_state(mcp, data, 2) 899 && (data[3] == 0)) { 900 mcp->status = 0; 901 break; 902 } 903 if (data[3] == 127) { 904 mcp->status = -EIO; 905 break; 906 } 907 if (data[2] == MCP2221_I2C_READ_COMPL || 908 data[2] == MCP2221_I2C_READ_PARTIAL) { 909 buf = mcp->rxbuf; 910 memcpy(&buf[mcp->rxbuf_idx], &data[4], data[3]); 911 mcp->rxbuf_idx = mcp->rxbuf_idx + data[3]; 912 mcp->status = 0; 913 break; 914 } 915 mcp->status = -EIO; 916 break; 917 default: 918 mcp->status = -EIO; 919 } 920 complete(&mcp->wait_in_report); 921 break; 922 923 case MCP2221_GPIO_GET: 924 switch (data[1]) { 925 case MCP2221_SUCCESS: 926 if ((data[mcp->gp_idx] == MCP2221_ALT_F_NOT_GPIOV) || 927 (data[mcp->gp_idx + 1] == MCP2221_ALT_F_NOT_GPIOD)) { 928 mcp->status = -ENOENT; 929 } else { 930 mcp->status = !!data[mcp->gp_idx]; 931 mcp->gpio_dir = data[mcp->gp_idx + 1]; 932 } 933 break; 934 default: 935 mcp->status = -EAGAIN; 936 } 937 complete(&mcp->wait_in_report); 938 break; 939 940 case MCP2221_GPIO_SET: 941 switch (data[1]) { 942 case MCP2221_SUCCESS: 943 if ((data[mcp->gp_idx] == MCP2221_ALT_F_NOT_GPIOV) || 944 (data[mcp->gp_idx - 1] == MCP2221_ALT_F_NOT_GPIOV)) { 945 mcp->status = -ENOENT; 946 } else { 947 mcp->status = 0; 948 } 949 break; 950 default: 951 mcp->status = -EAGAIN; 952 } 953 complete(&mcp->wait_in_report); 954 break; 955 956 case MCP2221_SET_SRAM_SETTINGS: 957 switch (data[1]) { 958 case MCP2221_SUCCESS: 959 mcp->status = 0; 960 break; 961 default: 962 mcp->status = -EAGAIN; 963 } 964 complete(&mcp->wait_in_report); 965 break; 966 967 case MCP2221_GET_SRAM_SETTINGS: 968 switch (data[1]) { 969 case MCP2221_SUCCESS: 970 memcpy(&mcp->mode, &data[22], 4); 971 #if IS_REACHABLE(CONFIG_IIO) 972 mcp->dac_value = data[6] & GENMASK(4, 0); 973 #endif 974 mcp->status = 0; 975 break; 976 default: 977 mcp->status = -EAGAIN; 978 } 979 complete(&mcp->wait_in_report); 980 break; 981 982 case MCP2221_READ_FLASH_DATA: 983 switch (data[1]) { 984 case MCP2221_SUCCESS: 985 mcp->status = 0; 986 987 /* Only handles CHIP SETTINGS subpage currently */ 988 if (mcp->txbuf[1] != 0) { 989 mcp->status = -EIO; 990 break; 991 } 992 993 #if IS_REACHABLE(CONFIG_IIO) 994 { 995 u8 tmp; 996 /* DAC scale value */ 997 tmp = FIELD_GET(GENMASK(7, 6), data[6]); 998 if ((data[6] & BIT(5)) && tmp) 999 mcp->dac_scale = tmp + 4; 1000 else 1001 mcp->dac_scale = 5; 1002 1003 /* ADC scale value */ 1004 tmp = FIELD_GET(GENMASK(4, 3), data[7]); 1005 if ((data[7] & BIT(2)) && tmp) 1006 mcp->adc_scale = tmp - 1; 1007 else 1008 mcp->adc_scale = 0; 1009 } 1010 #endif 1011 1012 break; 1013 default: 1014 mcp->status = -EAGAIN; 1015 } 1016 complete(&mcp->wait_in_report); 1017 break; 1018 1019 default: 1020 mcp->status = -EIO; 1021 complete(&mcp->wait_in_report); 1022 } 1023 1024 return 1; 1025 } 1026 1027 /* Device resource managed function for HID unregistration */ 1028 static void mcp2221_hid_unregister(void *ptr) 1029 { 1030 struct hid_device *hdev = ptr; 1031 1032 hid_hw_close(hdev); 1033 hid_hw_stop(hdev); 1034 } 1035 1036 /* This is needed to be sure hid_hw_stop() isn't called twice by the subsystem */ 1037 static void mcp2221_remove(struct hid_device *hdev) 1038 { 1039 #if IS_REACHABLE(CONFIG_IIO) 1040 struct mcp2221 *mcp = hid_get_drvdata(hdev); 1041 1042 cancel_delayed_work_sync(&mcp->init_work); 1043 #endif 1044 } 1045 1046 #if IS_REACHABLE(CONFIG_IIO) 1047 static int mcp2221_read_raw(struct iio_dev *indio_dev, 1048 struct iio_chan_spec const *channel, int *val, 1049 int *val2, long mask) 1050 { 1051 struct mcp2221_iio *priv = iio_priv(indio_dev); 1052 struct mcp2221 *mcp = priv->mcp; 1053 int ret; 1054 1055 if (mask == IIO_CHAN_INFO_SCALE) { 1056 if (channel->output) 1057 *val = 1 << mcp->dac_scale; 1058 else 1059 *val = 1 << mcp->adc_scale; 1060 1061 return IIO_VAL_INT; 1062 } 1063 1064 mutex_lock(&mcp->lock); 1065 1066 if (channel->output) { 1067 *val = mcp->dac_value; 1068 ret = IIO_VAL_INT; 1069 } else { 1070 /* Read ADC values */ 1071 ret = mcp_chk_last_cmd_status(mcp); 1072 1073 if (!ret) { 1074 *val = le16_to_cpu((__force __le16) mcp->adc_values[channel->address]); 1075 if (*val >= BIT(10)) 1076 ret = -EINVAL; 1077 else 1078 ret = IIO_VAL_INT; 1079 } 1080 } 1081 1082 mutex_unlock(&mcp->lock); 1083 1084 return ret; 1085 } 1086 1087 static int mcp2221_write_raw(struct iio_dev *indio_dev, 1088 struct iio_chan_spec const *chan, 1089 int val, int val2, long mask) 1090 { 1091 struct mcp2221_iio *priv = iio_priv(indio_dev); 1092 struct mcp2221 *mcp = priv->mcp; 1093 int ret; 1094 1095 if (val < 0 || val >= BIT(5)) 1096 return -EINVAL; 1097 1098 mutex_lock(&mcp->lock); 1099 1100 memset(mcp->txbuf, 0, 12); 1101 mcp->txbuf[0] = MCP2221_SET_SRAM_SETTINGS; 1102 mcp->txbuf[4] = BIT(7) | val; 1103 1104 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 12); 1105 if (!ret) 1106 mcp->dac_value = val; 1107 1108 mutex_unlock(&mcp->lock); 1109 1110 return ret; 1111 } 1112 1113 static const struct iio_info mcp2221_info = { 1114 .read_raw = &mcp2221_read_raw, 1115 .write_raw = &mcp2221_write_raw, 1116 }; 1117 1118 static int mcp_iio_channels(struct mcp2221 *mcp) 1119 { 1120 int idx, cnt = 0; 1121 bool dac_created = false; 1122 1123 /* GP0 doesn't have ADC/DAC alternative function */ 1124 for (idx = 1; idx < MCP_NGPIO; idx++) { 1125 struct iio_chan_spec *chan = &mcp->iio_channels[cnt]; 1126 1127 switch (mcp->mode[idx]) { 1128 case 2: 1129 chan->address = idx - 1; 1130 chan->channel = cnt++; 1131 break; 1132 case 3: 1133 /* GP1 doesn't have DAC alternative function */ 1134 if (idx == 1 || dac_created) 1135 continue; 1136 /* DAC1 and DAC2 outputs are connected to the same DAC */ 1137 dac_created = true; 1138 chan->output = 1; 1139 cnt++; 1140 break; 1141 default: 1142 continue; 1143 } 1144 1145 chan->type = IIO_VOLTAGE; 1146 chan->indexed = 1; 1147 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); 1148 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); 1149 chan->scan_index = -1; 1150 } 1151 1152 return cnt; 1153 } 1154 1155 static void mcp_init_work(struct work_struct *work) 1156 { 1157 struct iio_dev *indio_dev; 1158 struct mcp2221 *mcp = container_of(work, struct mcp2221, init_work.work); 1159 struct mcp2221_iio *data; 1160 static int retries = 5; 1161 int ret, num_channels; 1162 1163 hid_hw_power(mcp->hdev, PM_HINT_FULLON); 1164 mutex_lock(&mcp->lock); 1165 1166 mcp->txbuf[0] = MCP2221_GET_SRAM_SETTINGS; 1167 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 1168 1169 if (ret == -EAGAIN) 1170 goto reschedule_task; 1171 1172 num_channels = mcp_iio_channels(mcp); 1173 if (!num_channels) 1174 goto unlock; 1175 1176 mcp->txbuf[0] = MCP2221_READ_FLASH_DATA; 1177 mcp->txbuf[1] = 0; 1178 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 2); 1179 1180 if (ret == -EAGAIN) 1181 goto reschedule_task; 1182 1183 indio_dev = devm_iio_device_alloc(&mcp->hdev->dev, sizeof(*data)); 1184 if (!indio_dev) 1185 goto unlock; 1186 1187 data = iio_priv(indio_dev); 1188 data->mcp = mcp; 1189 1190 indio_dev->name = "mcp2221"; 1191 indio_dev->modes = INDIO_DIRECT_MODE; 1192 indio_dev->info = &mcp2221_info; 1193 indio_dev->channels = mcp->iio_channels; 1194 indio_dev->num_channels = num_channels; 1195 1196 devm_iio_device_register(&mcp->hdev->dev, indio_dev); 1197 1198 unlock: 1199 mutex_unlock(&mcp->lock); 1200 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 1201 1202 return; 1203 1204 reschedule_task: 1205 mutex_unlock(&mcp->lock); 1206 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 1207 1208 if (!retries--) 1209 return; 1210 1211 /* Device is not ready to read SRAM or FLASH data, try again */ 1212 schedule_delayed_work(&mcp->init_work, msecs_to_jiffies(100)); 1213 } 1214 #endif 1215 1216 static int mcp2221_probe(struct hid_device *hdev, 1217 const struct hid_device_id *id) 1218 { 1219 int ret; 1220 struct mcp2221 *mcp; 1221 1222 mcp = devm_kzalloc(&hdev->dev, sizeof(*mcp), GFP_KERNEL); 1223 if (!mcp) 1224 return -ENOMEM; 1225 1226 ret = hid_parse(hdev); 1227 if (ret) { 1228 hid_err(hdev, "can't parse reports\n"); 1229 return ret; 1230 } 1231 1232 /* 1233 * This driver uses the .raw_event callback and therefore does not need any 1234 * HID_CONNECT_xxx flags. 1235 */ 1236 ret = hid_hw_start(hdev, 0); 1237 if (ret) { 1238 hid_err(hdev, "can't start hardware\n"); 1239 return ret; 1240 } 1241 1242 hid_info(hdev, "USB HID v%x.%02x Device [%s] on %s\n", hdev->version >> 8, 1243 hdev->version & 0xff, hdev->name, hdev->phys); 1244 1245 ret = hid_hw_open(hdev); 1246 if (ret) { 1247 hid_err(hdev, "can't open device\n"); 1248 hid_hw_stop(hdev); 1249 return ret; 1250 } 1251 1252 mutex_init(&mcp->lock); 1253 init_completion(&mcp->wait_in_report); 1254 hid_set_drvdata(hdev, mcp); 1255 mcp->hdev = hdev; 1256 1257 ret = devm_add_action_or_reset(&hdev->dev, mcp2221_hid_unregister, hdev); 1258 if (ret) 1259 return ret; 1260 1261 hid_device_io_start(hdev); 1262 1263 /* Set I2C bus clock diviser */ 1264 if (i2c_clk_freq > 400) 1265 i2c_clk_freq = 400; 1266 if (i2c_clk_freq < 50) 1267 i2c_clk_freq = 50; 1268 mcp->cur_i2c_clk_div = (12000000 / (i2c_clk_freq * 1000)) - 3; 1269 ret = mcp_set_i2c_speed(mcp); 1270 if (ret) { 1271 hid_err(hdev, "can't set i2c speed: %d\n", ret); 1272 return ret; 1273 } 1274 1275 mcp->adapter.owner = THIS_MODULE; 1276 mcp->adapter.class = I2C_CLASS_HWMON; 1277 mcp->adapter.algo = &mcp_i2c_algo; 1278 mcp->adapter.retries = 1; 1279 mcp->adapter.dev.parent = &hdev->dev; 1280 ACPI_COMPANION_SET(&mcp->adapter.dev, ACPI_COMPANION(hdev->dev.parent)); 1281 snprintf(mcp->adapter.name, sizeof(mcp->adapter.name), 1282 "MCP2221 usb-i2c bridge"); 1283 1284 i2c_set_adapdata(&mcp->adapter, mcp); 1285 ret = devm_i2c_add_adapter(&hdev->dev, &mcp->adapter); 1286 if (ret) { 1287 hid_err(hdev, "can't add usb-i2c adapter: %d\n", ret); 1288 return ret; 1289 } 1290 1291 #if IS_REACHABLE(CONFIG_GPIOLIB) 1292 /* Setup GPIO chip */ 1293 mcp->gc = devm_kzalloc(&hdev->dev, sizeof(*mcp->gc), GFP_KERNEL); 1294 if (!mcp->gc) 1295 return -ENOMEM; 1296 1297 mcp->gc->label = "mcp2221_gpio"; 1298 mcp->gc->direction_input = mcp_gpio_direction_input; 1299 mcp->gc->direction_output = mcp_gpio_direction_output; 1300 mcp->gc->get_direction = mcp_gpio_get_direction; 1301 mcp->gc->set = mcp_gpio_set; 1302 mcp->gc->get = mcp_gpio_get; 1303 mcp->gc->ngpio = MCP_NGPIO; 1304 mcp->gc->base = -1; 1305 mcp->gc->can_sleep = 1; 1306 mcp->gc->parent = &hdev->dev; 1307 1308 ret = devm_gpiochip_add_data(&hdev->dev, mcp->gc, mcp); 1309 if (ret) 1310 return ret; 1311 1312 mcp2221_check_gpio_pinfunc(mcp); 1313 #endif 1314 1315 #if IS_REACHABLE(CONFIG_IIO) 1316 INIT_DELAYED_WORK(&mcp->init_work, mcp_init_work); 1317 schedule_delayed_work(&mcp->init_work, msecs_to_jiffies(100)); 1318 #endif 1319 1320 return 0; 1321 } 1322 1323 static const struct hid_device_id mcp2221_devices[] = { 1324 { HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_MCP2221) }, 1325 { } 1326 }; 1327 MODULE_DEVICE_TABLE(hid, mcp2221_devices); 1328 1329 static struct hid_driver mcp2221_driver = { 1330 .name = "mcp2221", 1331 .id_table = mcp2221_devices, 1332 .probe = mcp2221_probe, 1333 .remove = mcp2221_remove, 1334 .raw_event = mcp2221_raw_event, 1335 }; 1336 1337 /* Register with HID core */ 1338 module_hid_driver(mcp2221_driver); 1339 1340 MODULE_AUTHOR("Rishi Gupta <gupt21@gmail.com>"); 1341 MODULE_DESCRIPTION("MCP2221 Microchip HID USB to I2C master bridge"); 1342 MODULE_LICENSE("GPL v2"); 1343