1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * MCP2221A - Microchip USB to I2C Host Protocol Bridge 4 * 5 * Copyright (c) 2020, Rishi Gupta <gupt21@gmail.com> 6 * 7 * Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/20005565B.pdf 8 */ 9 10 #include <linux/module.h> 11 #include <linux/err.h> 12 #include <linux/mutex.h> 13 #include <linux/bitfield.h> 14 #include <linux/completion.h> 15 #include <linux/delay.h> 16 #include <linux/hid.h> 17 #include <linux/hidraw.h> 18 #include <linux/i2c.h> 19 #include <linux/gpio/driver.h> 20 #include <linux/iio/iio.h> 21 #include <linux/minmax.h> 22 #include <linux/moduleparam.h> 23 #include "hid-ids.h" 24 25 static bool gpio_mode_enforce; 26 27 module_param(gpio_mode_enforce, bool, 0644); 28 MODULE_PARM_DESC(gpio_mode_enforce, 29 "Enforce GPIO mode for GP0 thru GP3 (default: false, will be used for IIO)"); 30 31 /* Commands codes in a raw output report */ 32 enum { 33 MCP2221_I2C_WR_DATA = 0x90, 34 MCP2221_I2C_WR_NO_STOP = 0x94, 35 MCP2221_I2C_RD_DATA = 0x91, 36 MCP2221_I2C_RD_RPT_START = 0x93, 37 MCP2221_I2C_GET_DATA = 0x40, 38 MCP2221_I2C_PARAM_OR_STATUS = 0x10, 39 MCP2221_I2C_SET_SPEED = 0x20, 40 MCP2221_I2C_CANCEL = 0x10, 41 MCP2221_GPIO_SET = 0x50, 42 MCP2221_GPIO_GET = 0x51, 43 MCP2221_SET_SRAM_SETTINGS = 0x60, 44 MCP2221_GET_SRAM_SETTINGS = 0x61, 45 MCP2221_READ_FLASH_DATA = 0xb0, 46 }; 47 48 /* Response codes in a raw input report */ 49 enum { 50 MCP2221_SUCCESS = 0x00, 51 MCP2221_I2C_ENG_BUSY = 0x01, 52 MCP2221_I2C_START_TOUT = 0x12, 53 MCP2221_I2C_STOP_TOUT = 0x62, 54 MCP2221_I2C_WRADDRL_TOUT = 0x23, 55 MCP2221_I2C_WRDATA_TOUT = 0x44, 56 MCP2221_I2C_WRADDRL_NACK = 0x25, 57 MCP2221_I2C_MASK_ADDR_NACK = 0x40, 58 MCP2221_I2C_WRADDRL_SEND = 0x21, 59 MCP2221_I2C_ADDR_NACK = 0x25, 60 MCP2221_I2C_READ_PARTIAL = 0x54, 61 MCP2221_I2C_READ_COMPL = 0x55, 62 MCP2221_ALT_F_NOT_GPIOV = 0xEE, 63 MCP2221_ALT_F_NOT_GPIOD = 0xEF, 64 }; 65 66 /* MCP SRAM read offsets cmd: MCP2221_GET_SRAM_SETTINGS */ 67 enum { 68 MCP2221_SRAM_RD_GP0 = 22, 69 MCP2221_SRAM_RD_GP1 = 23, 70 MCP2221_SRAM_RD_GP2 = 24, 71 MCP2221_SRAM_RD_GP3 = 25, 72 }; 73 74 /* MCP SRAM write offsets cmd: MCP2221_SET_SRAM_SETTINGS */ 75 enum { 76 MCP2221_SRAM_WR_GP_ENA_ALTER = 7, 77 MCP2221_SRAM_WR_GP0 = 8, 78 MCP2221_SRAM_WR_GP1 = 9, 79 MCP2221_SRAM_WR_GP2 = 10, 80 MCP2221_SRAM_WR_GP3 = 11, 81 }; 82 83 #define MCP2221_SRAM_GP_DESIGN_MASK 0x07 84 #define MCP2221_SRAM_GP_DIRECTION_MASK 0x08 85 #define MCP2221_SRAM_GP_VALUE_MASK 0x10 86 87 /* MCP GPIO direction encoding */ 88 enum { 89 MCP2221_DIR_OUT = 0x00, 90 MCP2221_DIR_IN = 0x01, 91 }; 92 93 #define MCP_NGPIO 4 94 95 /* MCP GPIO set command layout */ 96 struct mcp_set_gpio { 97 u8 cmd; 98 u8 dummy; 99 struct { 100 u8 change_value; 101 u8 value; 102 u8 change_direction; 103 u8 direction; 104 } gpio[MCP_NGPIO]; 105 } __packed; 106 107 /* MCP GPIO get command layout */ 108 struct mcp_get_gpio { 109 u8 cmd; 110 u8 dummy; 111 struct { 112 u8 value; 113 u8 direction; 114 } gpio[MCP_NGPIO]; 115 } __packed; 116 117 /* 118 * There is no way to distinguish responses. Therefore next command 119 * is sent only after response to previous has been received. Mutex 120 * lock is used for this purpose mainly. 121 */ 122 struct mcp2221 { 123 struct hid_device *hdev; 124 struct i2c_adapter adapter; 125 struct mutex lock; 126 struct completion wait_in_report; 127 struct delayed_work init_work; 128 u8 *rxbuf; 129 u8 txbuf[64]; 130 int rxbuf_idx; 131 int rxbuf_size; 132 int status; 133 u8 cur_i2c_clk_div; 134 struct gpio_chip *gc; 135 u8 gp_idx; 136 u8 gpio_dir; 137 u8 mode[4]; 138 #if IS_REACHABLE(CONFIG_IIO) 139 struct iio_chan_spec iio_channels[3]; 140 u16 adc_values[3]; 141 u8 adc_scale; 142 u8 dac_value; 143 u16 dac_scale; 144 #endif 145 }; 146 147 struct mcp2221_iio { 148 struct mcp2221 *mcp; 149 }; 150 151 /* 152 * Default i2c bus clock frequency 400 kHz. Modify this if you 153 * want to set some other frequency (min 50 kHz - max 400 kHz). 154 */ 155 static uint i2c_clk_freq = 400; 156 157 /* Synchronously send output report to the device */ 158 static int mcp_send_report(struct mcp2221 *mcp, 159 u8 *out_report, size_t len) 160 { 161 u8 *buf; 162 int ret; 163 164 buf = kmemdup(out_report, len, GFP_KERNEL); 165 if (!buf) 166 return -ENOMEM; 167 168 /* mcp2221 uses interrupt endpoint for out reports */ 169 ret = hid_hw_output_report(mcp->hdev, buf, len); 170 kfree(buf); 171 172 if (ret < 0) 173 return ret; 174 return 0; 175 } 176 177 /* 178 * Send o/p report to the device and wait for i/p report to be 179 * received from the device. If the device does not respond, 180 * we timeout. 181 */ 182 static int mcp_send_data_req_status(struct mcp2221 *mcp, 183 u8 *out_report, int len) 184 { 185 int ret; 186 unsigned long t; 187 188 reinit_completion(&mcp->wait_in_report); 189 190 ret = mcp_send_report(mcp, out_report, len); 191 if (ret) 192 return ret; 193 194 t = wait_for_completion_timeout(&mcp->wait_in_report, 195 msecs_to_jiffies(4000)); 196 if (!t) 197 return -ETIMEDOUT; 198 199 return mcp->status; 200 } 201 202 /* Check pass/fail for actual communication with i2c slave */ 203 static int mcp_chk_last_cmd_status(struct mcp2221 *mcp) 204 { 205 memset(mcp->txbuf, 0, 8); 206 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS; 207 208 return mcp_send_data_req_status(mcp, mcp->txbuf, 8); 209 } 210 211 /* Cancels last command releasing i2c bus just in case occupied */ 212 static int mcp_cancel_last_cmd(struct mcp2221 *mcp) 213 { 214 memset(mcp->txbuf, 0, 8); 215 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS; 216 mcp->txbuf[2] = MCP2221_I2C_CANCEL; 217 218 return mcp_send_data_req_status(mcp, mcp->txbuf, 8); 219 } 220 221 /* Check if the last command succeeded or failed and return the result. 222 * If the command did fail, cancel that command which will free the i2c bus. 223 */ 224 static int mcp_chk_last_cmd_status_free_bus(struct mcp2221 *mcp) 225 { 226 int ret; 227 228 ret = mcp_chk_last_cmd_status(mcp); 229 if (ret) { 230 /* The last command was a failure. 231 * Send a cancel which will also free the bus. 232 */ 233 usleep_range(980, 1000); 234 mcp_cancel_last_cmd(mcp); 235 } 236 237 return ret; 238 } 239 240 static int mcp_set_i2c_speed(struct mcp2221 *mcp) 241 { 242 int ret; 243 244 memset(mcp->txbuf, 0, 8); 245 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS; 246 mcp->txbuf[3] = MCP2221_I2C_SET_SPEED; 247 mcp->txbuf[4] = mcp->cur_i2c_clk_div; 248 249 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 8); 250 if (ret) { 251 /* Small delay is needed here */ 252 usleep_range(980, 1000); 253 mcp_cancel_last_cmd(mcp); 254 } 255 256 return 0; 257 } 258 259 /* 260 * An output report can contain minimum 1 and maximum 60 user data 261 * bytes. If the number of data bytes is more then 60, we send it 262 * in chunks of 60 bytes. Last chunk may contain exactly 60 or less 263 * bytes. Total number of bytes is informed in very first report to 264 * mcp2221, from that point onwards it first collect all the data 265 * from host and then send to i2c slave device. 266 */ 267 static int mcp_i2c_write(struct mcp2221 *mcp, 268 struct i2c_msg *msg, int type, u8 last_status) 269 { 270 int ret, len, idx, sent; 271 272 idx = 0; 273 sent = 0; 274 len = min(msg->len, 60); 275 276 do { 277 mcp->txbuf[0] = type; 278 mcp->txbuf[1] = msg->len & 0xff; 279 mcp->txbuf[2] = msg->len >> 8; 280 mcp->txbuf[3] = (u8)(msg->addr << 1); 281 282 memcpy(&mcp->txbuf[4], &msg->buf[idx], len); 283 284 ret = mcp_send_data_req_status(mcp, mcp->txbuf, len + 4); 285 if (ret) 286 return ret; 287 288 usleep_range(980, 1000); 289 290 if (last_status) { 291 ret = mcp_chk_last_cmd_status_free_bus(mcp); 292 if (ret) 293 return ret; 294 } 295 296 sent = sent + len; 297 if (sent >= msg->len) 298 break; 299 300 idx = idx + len; 301 len = min(msg->len - sent, 60); 302 303 /* 304 * Testing shows delay is needed between successive writes 305 * otherwise next write fails on first-try from i2c core. 306 * This value is obtained through automated stress testing. 307 */ 308 usleep_range(980, 1000); 309 } while (len > 0); 310 311 return ret; 312 } 313 314 /* 315 * Device reads all data (0 - 65535 bytes) from i2c slave device and 316 * stores it in device itself. This data is read back from device to 317 * host in multiples of 60 bytes using input reports. 318 */ 319 static int mcp_i2c_smbus_read(struct mcp2221 *mcp, 320 struct i2c_msg *msg, int type, u16 smbus_addr, 321 u8 smbus_len, u8 *smbus_buf) 322 { 323 int ret; 324 u16 total_len; 325 int retries = 0; 326 327 mcp->txbuf[0] = type; 328 if (msg) { 329 mcp->txbuf[1] = msg->len & 0xff; 330 mcp->txbuf[2] = msg->len >> 8; 331 mcp->txbuf[3] = (u8)(msg->addr << 1); 332 total_len = msg->len; 333 mcp->rxbuf = msg->buf; 334 mcp->rxbuf_size = msg->len; 335 } else { 336 mcp->txbuf[1] = smbus_len; 337 mcp->txbuf[2] = 0; 338 mcp->txbuf[3] = (u8)(smbus_addr << 1); 339 total_len = smbus_len; 340 mcp->rxbuf = smbus_buf; 341 mcp->rxbuf_size = smbus_len; 342 } 343 344 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 4); 345 if (ret) 346 return ret; 347 348 mcp->rxbuf_idx = 0; 349 350 do { 351 /* Wait for the data to be read by the device */ 352 usleep_range(980, 1000); 353 354 memset(mcp->txbuf, 0, 4); 355 mcp->txbuf[0] = MCP2221_I2C_GET_DATA; 356 357 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 358 if (ret) { 359 if (retries < 5) { 360 /* The data wasn't ready to read. 361 * Wait a bit longer and try again. 362 */ 363 usleep_range(90, 100); 364 retries++; 365 } else { 366 usleep_range(980, 1000); 367 mcp_cancel_last_cmd(mcp); 368 return ret; 369 } 370 } else { 371 retries = 0; 372 } 373 } while (mcp->rxbuf_idx < total_len); 374 375 usleep_range(980, 1000); 376 ret = mcp_chk_last_cmd_status_free_bus(mcp); 377 378 return ret; 379 } 380 381 static int mcp_i2c_xfer(struct i2c_adapter *adapter, 382 struct i2c_msg msgs[], int num) 383 { 384 int ret; 385 struct mcp2221 *mcp = i2c_get_adapdata(adapter); 386 387 hid_hw_power(mcp->hdev, PM_HINT_FULLON); 388 389 mutex_lock(&mcp->lock); 390 391 if (num == 1) { 392 if (msgs->flags & I2C_M_RD) { 393 ret = mcp_i2c_smbus_read(mcp, msgs, MCP2221_I2C_RD_DATA, 394 0, 0, NULL); 395 } else { 396 ret = mcp_i2c_write(mcp, msgs, MCP2221_I2C_WR_DATA, 1); 397 } 398 if (ret) 399 goto exit; 400 ret = num; 401 } else if (num == 2) { 402 /* Ex transaction; send reg address and read its contents */ 403 if (msgs[0].addr == msgs[1].addr && 404 !(msgs[0].flags & I2C_M_RD) && 405 (msgs[1].flags & I2C_M_RD)) { 406 407 ret = mcp_i2c_write(mcp, &msgs[0], 408 MCP2221_I2C_WR_NO_STOP, 0); 409 if (ret) 410 goto exit; 411 412 ret = mcp_i2c_smbus_read(mcp, &msgs[1], 413 MCP2221_I2C_RD_RPT_START, 414 0, 0, NULL); 415 if (ret) 416 goto exit; 417 ret = num; 418 } else { 419 dev_err(&adapter->dev, 420 "unsupported multi-msg i2c transaction\n"); 421 ret = -EOPNOTSUPP; 422 } 423 } else { 424 dev_err(&adapter->dev, 425 "unsupported multi-msg i2c transaction\n"); 426 ret = -EOPNOTSUPP; 427 } 428 429 exit: 430 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 431 mutex_unlock(&mcp->lock); 432 return ret; 433 } 434 435 static int mcp_smbus_write(struct mcp2221 *mcp, u16 addr, 436 u8 command, u8 *buf, u8 len, int type, 437 u8 last_status) 438 { 439 int data_len, ret; 440 441 mcp->txbuf[0] = type; 442 mcp->txbuf[1] = len + 1; /* 1 is due to command byte itself */ 443 mcp->txbuf[2] = 0; 444 mcp->txbuf[3] = (u8)(addr << 1); 445 mcp->txbuf[4] = command; 446 447 switch (len) { 448 case 0: 449 data_len = 5; 450 break; 451 case 1: 452 mcp->txbuf[5] = buf[0]; 453 data_len = 6; 454 break; 455 case 2: 456 mcp->txbuf[5] = buf[0]; 457 mcp->txbuf[6] = buf[1]; 458 data_len = 7; 459 break; 460 default: 461 if (len > I2C_SMBUS_BLOCK_MAX) 462 return -EINVAL; 463 464 memcpy(&mcp->txbuf[5], buf, len); 465 data_len = len + 5; 466 } 467 468 ret = mcp_send_data_req_status(mcp, mcp->txbuf, data_len); 469 if (ret) 470 return ret; 471 472 if (last_status) { 473 usleep_range(980, 1000); 474 475 ret = mcp_chk_last_cmd_status_free_bus(mcp); 476 } 477 478 return ret; 479 } 480 481 static int mcp_smbus_xfer(struct i2c_adapter *adapter, u16 addr, 482 unsigned short flags, char read_write, 483 u8 command, int size, 484 union i2c_smbus_data *data) 485 { 486 int ret; 487 struct mcp2221 *mcp = i2c_get_adapdata(adapter); 488 489 hid_hw_power(mcp->hdev, PM_HINT_FULLON); 490 491 mutex_lock(&mcp->lock); 492 493 switch (size) { 494 495 case I2C_SMBUS_QUICK: 496 if (read_write == I2C_SMBUS_READ) 497 ret = mcp_i2c_smbus_read(mcp, NULL, MCP2221_I2C_RD_DATA, 498 addr, 0, &data->byte); 499 else 500 ret = mcp_smbus_write(mcp, addr, command, NULL, 501 0, MCP2221_I2C_WR_DATA, 1); 502 break; 503 case I2C_SMBUS_BYTE: 504 if (read_write == I2C_SMBUS_READ) 505 ret = mcp_i2c_smbus_read(mcp, NULL, MCP2221_I2C_RD_DATA, 506 addr, 1, &data->byte); 507 else 508 ret = mcp_smbus_write(mcp, addr, command, NULL, 509 0, MCP2221_I2C_WR_DATA, 1); 510 break; 511 case I2C_SMBUS_BYTE_DATA: 512 if (read_write == I2C_SMBUS_READ) { 513 ret = mcp_smbus_write(mcp, addr, command, NULL, 514 0, MCP2221_I2C_WR_NO_STOP, 0); 515 if (ret) 516 goto exit; 517 518 ret = mcp_i2c_smbus_read(mcp, NULL, 519 MCP2221_I2C_RD_RPT_START, 520 addr, 1, &data->byte); 521 } else { 522 ret = mcp_smbus_write(mcp, addr, command, &data->byte, 523 1, MCP2221_I2C_WR_DATA, 1); 524 } 525 break; 526 case I2C_SMBUS_WORD_DATA: 527 if (read_write == I2C_SMBUS_READ) { 528 ret = mcp_smbus_write(mcp, addr, command, NULL, 529 0, MCP2221_I2C_WR_NO_STOP, 0); 530 if (ret) 531 goto exit; 532 533 ret = mcp_i2c_smbus_read(mcp, NULL, 534 MCP2221_I2C_RD_RPT_START, 535 addr, 2, (u8 *)&data->word); 536 } else { 537 ret = mcp_smbus_write(mcp, addr, command, 538 (u8 *)&data->word, 2, 539 MCP2221_I2C_WR_DATA, 1); 540 } 541 break; 542 case I2C_SMBUS_BLOCK_DATA: 543 if (read_write == I2C_SMBUS_READ) { 544 ret = mcp_smbus_write(mcp, addr, command, NULL, 545 0, MCP2221_I2C_WR_NO_STOP, 1); 546 if (ret) 547 goto exit; 548 549 ret = mcp_i2c_smbus_read(mcp, NULL, 550 MCP2221_I2C_RD_RPT_START, 551 addr, data->block[0] + 1, 552 data->block); 553 if (ret) 554 goto exit; 555 } else { 556 if (!data->block[0]) { 557 ret = -EINVAL; 558 goto exit; 559 } 560 ret = mcp_smbus_write(mcp, addr, command, data->block, 561 data->block[0] + 1, 562 MCP2221_I2C_WR_DATA, 1); 563 } 564 break; 565 case I2C_SMBUS_I2C_BLOCK_DATA: 566 if (read_write == I2C_SMBUS_READ) { 567 ret = mcp_smbus_write(mcp, addr, command, NULL, 568 0, MCP2221_I2C_WR_NO_STOP, 0); 569 if (ret) 570 goto exit; 571 572 ret = mcp_i2c_smbus_read(mcp, NULL, 573 MCP2221_I2C_RD_RPT_START, 574 addr, data->block[0], 575 &data->block[1]); 576 if (ret) 577 goto exit; 578 } else { 579 if (!data->block[0]) { 580 ret = -EINVAL; 581 goto exit; 582 } 583 ret = mcp_smbus_write(mcp, addr, command, 584 &data->block[1], data->block[0], 585 MCP2221_I2C_WR_DATA, 1); 586 } 587 break; 588 case I2C_SMBUS_PROC_CALL: 589 ret = mcp_smbus_write(mcp, addr, command, 590 (u8 *)&data->word, 591 2, MCP2221_I2C_WR_NO_STOP, 0); 592 if (ret) 593 goto exit; 594 595 ret = mcp_i2c_smbus_read(mcp, NULL, 596 MCP2221_I2C_RD_RPT_START, 597 addr, 2, (u8 *)&data->word); 598 break; 599 case I2C_SMBUS_BLOCK_PROC_CALL: 600 ret = mcp_smbus_write(mcp, addr, command, data->block, 601 data->block[0] + 1, 602 MCP2221_I2C_WR_NO_STOP, 0); 603 if (ret) 604 goto exit; 605 606 ret = mcp_i2c_smbus_read(mcp, NULL, 607 MCP2221_I2C_RD_RPT_START, 608 addr, I2C_SMBUS_BLOCK_MAX, 609 data->block); 610 break; 611 default: 612 dev_err(&mcp->adapter.dev, 613 "unsupported smbus transaction size:%d\n", size); 614 ret = -EOPNOTSUPP; 615 } 616 617 exit: 618 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 619 mutex_unlock(&mcp->lock); 620 return ret; 621 } 622 623 static u32 mcp_i2c_func(struct i2c_adapter *adapter) 624 { 625 return I2C_FUNC_I2C | 626 I2C_FUNC_SMBUS_READ_BLOCK_DATA | 627 I2C_FUNC_SMBUS_BLOCK_PROC_CALL | 628 (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_PEC); 629 } 630 631 static const struct i2c_algorithm mcp_i2c_algo = { 632 .master_xfer = mcp_i2c_xfer, 633 .smbus_xfer = mcp_smbus_xfer, 634 .functionality = mcp_i2c_func, 635 }; 636 637 #if IS_REACHABLE(CONFIG_GPIOLIB) 638 static int mcp_gpio_read_sram(struct mcp2221 *mcp) 639 { 640 int ret; 641 642 memset(mcp->txbuf, 0, 64); 643 mcp->txbuf[0] = MCP2221_GET_SRAM_SETTINGS; 644 645 mutex_lock(&mcp->lock); 646 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 64); 647 mutex_unlock(&mcp->lock); 648 649 return ret; 650 } 651 652 /* 653 * If CONFIG_IIO is not enabled, check for the gpio pins 654 * if they are in gpio mode. For the ones which are not 655 * in gpio mode, set them into gpio mode. 656 */ 657 static int mcp2221_check_gpio_pinfunc(struct mcp2221 *mcp) 658 { 659 int i; 660 int needgpiofix = 0; 661 int ret; 662 663 if (IS_ENABLED(CONFIG_IIO) && !gpio_mode_enforce) 664 return 0; 665 666 ret = mcp_gpio_read_sram(mcp); 667 if (ret) 668 return ret; 669 670 for (i = 0; i < MCP_NGPIO; i++) { 671 if ((mcp->mode[i] & MCP2221_SRAM_GP_DESIGN_MASK) != 0x0) { 672 dev_warn(&mcp->hdev->dev, 673 "GPIO %d not in gpio mode\n", i); 674 needgpiofix = 1; 675 } 676 } 677 678 if (!needgpiofix) 679 return 0; 680 681 /* 682 * Set all bytes to 0, so Bit 7 is not set. The chip 683 * only changes content of a register when bit 7 is set. 684 */ 685 memset(mcp->txbuf, 0, 64); 686 mcp->txbuf[0] = MCP2221_SET_SRAM_SETTINGS; 687 688 /* 689 * Set bit 7 in MCP2221_SRAM_WR_GP_ENA_ALTER to enable 690 * loading of a new set of gpio settings to GP SRAM 691 */ 692 mcp->txbuf[MCP2221_SRAM_WR_GP_ENA_ALTER] = 0x80; 693 for (i = 0; i < MCP_NGPIO; i++) { 694 if ((mcp->mode[i] & MCP2221_SRAM_GP_DESIGN_MASK) == 0x0) { 695 /* write current GPIO mode */ 696 mcp->txbuf[MCP2221_SRAM_WR_GP0 + i] = mcp->mode[i]; 697 } else { 698 /* pin is not in gpio mode, set it to input mode */ 699 mcp->txbuf[MCP2221_SRAM_WR_GP0 + i] = 0x08; 700 dev_warn(&mcp->hdev->dev, 701 "Set GPIO mode for gpio pin %d!\n", i); 702 } 703 } 704 705 mutex_lock(&mcp->lock); 706 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 64); 707 mutex_unlock(&mcp->lock); 708 709 return ret; 710 } 711 712 static int mcp_gpio_get(struct gpio_chip *gc, 713 unsigned int offset) 714 { 715 int ret; 716 struct mcp2221 *mcp = gpiochip_get_data(gc); 717 718 mcp->txbuf[0] = MCP2221_GPIO_GET; 719 720 mcp->gp_idx = offsetof(struct mcp_get_gpio, gpio[offset]); 721 722 mutex_lock(&mcp->lock); 723 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 724 mutex_unlock(&mcp->lock); 725 726 return ret; 727 } 728 729 static int mcp_gpio_set(struct gpio_chip *gc, unsigned int offset, int value) 730 { 731 struct mcp2221 *mcp = gpiochip_get_data(gc); 732 int ret; 733 734 memset(mcp->txbuf, 0, 18); 735 mcp->txbuf[0] = MCP2221_GPIO_SET; 736 737 mcp->gp_idx = offsetof(struct mcp_set_gpio, gpio[offset].value); 738 739 mcp->txbuf[mcp->gp_idx - 1] = 1; 740 mcp->txbuf[mcp->gp_idx] = !!value; 741 742 mutex_lock(&mcp->lock); 743 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 18); 744 mutex_unlock(&mcp->lock); 745 746 return ret; 747 } 748 749 static int mcp_gpio_dir_set(struct mcp2221 *mcp, 750 unsigned int offset, u8 val) 751 { 752 memset(mcp->txbuf, 0, 18); 753 mcp->txbuf[0] = MCP2221_GPIO_SET; 754 755 mcp->gp_idx = offsetof(struct mcp_set_gpio, gpio[offset].direction); 756 757 mcp->txbuf[mcp->gp_idx - 1] = 1; 758 mcp->txbuf[mcp->gp_idx] = val; 759 760 return mcp_send_data_req_status(mcp, mcp->txbuf, 18); 761 } 762 763 static int mcp_gpio_direction_input(struct gpio_chip *gc, 764 unsigned int offset) 765 { 766 int ret; 767 struct mcp2221 *mcp = gpiochip_get_data(gc); 768 769 mutex_lock(&mcp->lock); 770 ret = mcp_gpio_dir_set(mcp, offset, MCP2221_DIR_IN); 771 mutex_unlock(&mcp->lock); 772 773 return ret; 774 } 775 776 static int mcp_gpio_direction_output(struct gpio_chip *gc, 777 unsigned int offset, int value) 778 { 779 int ret; 780 struct mcp2221 *mcp = gpiochip_get_data(gc); 781 782 mutex_lock(&mcp->lock); 783 ret = mcp_gpio_dir_set(mcp, offset, MCP2221_DIR_OUT); 784 mutex_unlock(&mcp->lock); 785 786 /* Can't configure as output, bailout early */ 787 if (ret) 788 return ret; 789 790 mcp_gpio_set(gc, offset, value); 791 792 return 0; 793 } 794 795 static int mcp_gpio_get_direction(struct gpio_chip *gc, 796 unsigned int offset) 797 { 798 int ret; 799 struct mcp2221 *mcp = gpiochip_get_data(gc); 800 801 mcp->txbuf[0] = MCP2221_GPIO_GET; 802 803 mcp->gp_idx = offsetof(struct mcp_get_gpio, gpio[offset]); 804 805 mutex_lock(&mcp->lock); 806 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 807 mutex_unlock(&mcp->lock); 808 809 if (ret) 810 return ret; 811 812 if (mcp->gpio_dir == MCP2221_DIR_IN) 813 return GPIO_LINE_DIRECTION_IN; 814 815 return GPIO_LINE_DIRECTION_OUT; 816 } 817 #endif 818 819 /* Gives current state of i2c engine inside mcp2221 */ 820 static int mcp_get_i2c_eng_state(struct mcp2221 *mcp, 821 u8 *data, u8 idx) 822 { 823 int ret; 824 825 switch (data[idx]) { 826 case MCP2221_I2C_WRADDRL_NACK: 827 case MCP2221_I2C_WRADDRL_SEND: 828 ret = -ENXIO; 829 break; 830 case MCP2221_I2C_START_TOUT: 831 case MCP2221_I2C_STOP_TOUT: 832 case MCP2221_I2C_WRADDRL_TOUT: 833 case MCP2221_I2C_WRDATA_TOUT: 834 ret = -ETIMEDOUT; 835 break; 836 case MCP2221_I2C_ENG_BUSY: 837 ret = -EAGAIN; 838 break; 839 case MCP2221_SUCCESS: 840 ret = 0x00; 841 break; 842 default: 843 ret = -EIO; 844 } 845 846 return ret; 847 } 848 849 /* 850 * MCP2221 uses interrupt endpoint for input reports. This function 851 * is called by HID layer when it receives i/p report from mcp2221, 852 * which is actually a response to the previously sent command. 853 * 854 * MCP2221A firmware specific return codes are parsed and 0 or 855 * appropriate negative error code is returned. Delayed response 856 * results in timeout error and stray reponses results in -EIO. 857 */ 858 static int mcp2221_raw_event(struct hid_device *hdev, 859 struct hid_report *report, u8 *data, int size) 860 { 861 u8 *buf; 862 struct mcp2221 *mcp = hid_get_drvdata(hdev); 863 864 switch (data[0]) { 865 866 case MCP2221_I2C_WR_DATA: 867 case MCP2221_I2C_WR_NO_STOP: 868 case MCP2221_I2C_RD_DATA: 869 case MCP2221_I2C_RD_RPT_START: 870 switch (data[1]) { 871 case MCP2221_SUCCESS: 872 mcp->status = 0; 873 break; 874 default: 875 mcp->status = mcp_get_i2c_eng_state(mcp, data, 2); 876 } 877 complete(&mcp->wait_in_report); 878 break; 879 880 case MCP2221_I2C_PARAM_OR_STATUS: 881 switch (data[1]) { 882 case MCP2221_SUCCESS: 883 if ((mcp->txbuf[3] == MCP2221_I2C_SET_SPEED) && 884 (data[3] != MCP2221_I2C_SET_SPEED)) { 885 mcp->status = -EAGAIN; 886 break; 887 } 888 if (data[20] & MCP2221_I2C_MASK_ADDR_NACK) { 889 mcp->status = -ENXIO; 890 break; 891 } 892 mcp->status = mcp_get_i2c_eng_state(mcp, data, 8); 893 #if IS_REACHABLE(CONFIG_IIO) 894 memcpy(&mcp->adc_values, &data[50], sizeof(mcp->adc_values)); 895 #endif 896 break; 897 default: 898 mcp->status = -EIO; 899 } 900 complete(&mcp->wait_in_report); 901 break; 902 903 case MCP2221_I2C_GET_DATA: 904 switch (data[1]) { 905 case MCP2221_SUCCESS: 906 if (data[2] == MCP2221_I2C_ADDR_NACK) { 907 mcp->status = -ENXIO; 908 break; 909 } 910 if (!mcp_get_i2c_eng_state(mcp, data, 2) 911 && (data[3] == 0)) { 912 mcp->status = 0; 913 break; 914 } 915 if (data[3] == 127) { 916 mcp->status = -EIO; 917 break; 918 } 919 if (data[2] == MCP2221_I2C_READ_COMPL || 920 data[2] == MCP2221_I2C_READ_PARTIAL) { 921 if (!mcp->rxbuf || mcp->rxbuf_idx < 0 || data[3] > 60) { 922 mcp->status = -EINVAL; 923 break; 924 } 925 if (mcp->rxbuf_idx + data[3] > mcp->rxbuf_size) { 926 mcp->status = -EINVAL; 927 break; 928 } 929 buf = mcp->rxbuf; 930 memcpy(&buf[mcp->rxbuf_idx], &data[4], data[3]); 931 mcp->rxbuf_idx = mcp->rxbuf_idx + data[3]; 932 mcp->status = 0; 933 break; 934 } 935 mcp->status = -EIO; 936 break; 937 default: 938 mcp->status = -EIO; 939 } 940 complete(&mcp->wait_in_report); 941 break; 942 943 case MCP2221_GPIO_GET: 944 switch (data[1]) { 945 case MCP2221_SUCCESS: 946 if ((data[mcp->gp_idx] == MCP2221_ALT_F_NOT_GPIOV) || 947 (data[mcp->gp_idx + 1] == MCP2221_ALT_F_NOT_GPIOD)) { 948 mcp->status = -ENOENT; 949 } else { 950 mcp->status = !!data[mcp->gp_idx]; 951 mcp->gpio_dir = data[mcp->gp_idx + 1]; 952 } 953 break; 954 default: 955 mcp->status = -EAGAIN; 956 } 957 complete(&mcp->wait_in_report); 958 break; 959 960 case MCP2221_GPIO_SET: 961 switch (data[1]) { 962 case MCP2221_SUCCESS: 963 if ((data[mcp->gp_idx] == MCP2221_ALT_F_NOT_GPIOV) || 964 (data[mcp->gp_idx - 1] == MCP2221_ALT_F_NOT_GPIOV)) { 965 mcp->status = -ENOENT; 966 } else { 967 mcp->status = 0; 968 } 969 break; 970 default: 971 mcp->status = -EAGAIN; 972 } 973 complete(&mcp->wait_in_report); 974 break; 975 976 case MCP2221_SET_SRAM_SETTINGS: 977 switch (data[1]) { 978 case MCP2221_SUCCESS: 979 mcp->status = 0; 980 break; 981 default: 982 mcp->status = -EAGAIN; 983 } 984 complete(&mcp->wait_in_report); 985 break; 986 987 case MCP2221_GET_SRAM_SETTINGS: 988 switch (data[1]) { 989 case MCP2221_SUCCESS: 990 memcpy(&mcp->mode, &data[22], 4); 991 #if IS_REACHABLE(CONFIG_IIO) 992 mcp->dac_value = data[6] & GENMASK(4, 0); 993 #endif 994 mcp->status = 0; 995 break; 996 default: 997 mcp->status = -EAGAIN; 998 } 999 complete(&mcp->wait_in_report); 1000 break; 1001 1002 case MCP2221_READ_FLASH_DATA: 1003 switch (data[1]) { 1004 case MCP2221_SUCCESS: 1005 mcp->status = 0; 1006 1007 /* Only handles CHIP SETTINGS subpage currently */ 1008 if (mcp->txbuf[1] != 0) { 1009 mcp->status = -EIO; 1010 break; 1011 } 1012 1013 #if IS_REACHABLE(CONFIG_IIO) 1014 { 1015 u8 tmp; 1016 /* DAC scale value */ 1017 tmp = FIELD_GET(GENMASK(7, 6), data[6]); 1018 if ((data[6] & BIT(5)) && tmp) 1019 mcp->dac_scale = tmp + 4; 1020 else 1021 mcp->dac_scale = 5; 1022 1023 /* ADC scale value */ 1024 tmp = FIELD_GET(GENMASK(4, 3), data[7]); 1025 if ((data[7] & BIT(2)) && tmp) 1026 mcp->adc_scale = tmp - 1; 1027 else 1028 mcp->adc_scale = 0; 1029 } 1030 #endif 1031 1032 break; 1033 default: 1034 mcp->status = -EAGAIN; 1035 } 1036 complete(&mcp->wait_in_report); 1037 break; 1038 1039 default: 1040 mcp->status = -EIO; 1041 complete(&mcp->wait_in_report); 1042 } 1043 1044 return 1; 1045 } 1046 1047 /* Device resource managed function for HID unregistration */ 1048 static void mcp2221_hid_unregister(void *ptr) 1049 { 1050 struct hid_device *hdev = ptr; 1051 1052 hid_hw_close(hdev); 1053 hid_hw_stop(hdev); 1054 } 1055 1056 /* This is needed to be sure hid_hw_stop() isn't called twice by the subsystem */ 1057 static void mcp2221_remove(struct hid_device *hdev) 1058 { 1059 #if IS_REACHABLE(CONFIG_IIO) 1060 struct mcp2221 *mcp = hid_get_drvdata(hdev); 1061 1062 if (!gpio_mode_enforce) 1063 cancel_delayed_work_sync(&mcp->init_work); 1064 #endif 1065 } 1066 1067 #if IS_REACHABLE(CONFIG_IIO) 1068 static int mcp2221_read_raw(struct iio_dev *indio_dev, 1069 struct iio_chan_spec const *channel, int *val, 1070 int *val2, long mask) 1071 { 1072 struct mcp2221_iio *priv = iio_priv(indio_dev); 1073 struct mcp2221 *mcp = priv->mcp; 1074 int ret; 1075 1076 if (mask == IIO_CHAN_INFO_SCALE) { 1077 if (channel->output) 1078 *val = 1 << mcp->dac_scale; 1079 else 1080 *val = 1 << mcp->adc_scale; 1081 1082 return IIO_VAL_INT; 1083 } 1084 1085 mutex_lock(&mcp->lock); 1086 1087 if (channel->output) { 1088 *val = mcp->dac_value; 1089 ret = IIO_VAL_INT; 1090 } else { 1091 /* Read ADC values */ 1092 ret = mcp_chk_last_cmd_status(mcp); 1093 1094 if (!ret) { 1095 *val = le16_to_cpu((__force __le16) mcp->adc_values[channel->address]); 1096 if (*val >= BIT(10)) 1097 ret = -EINVAL; 1098 else 1099 ret = IIO_VAL_INT; 1100 } 1101 } 1102 1103 mutex_unlock(&mcp->lock); 1104 1105 return ret; 1106 } 1107 1108 static int mcp2221_write_raw(struct iio_dev *indio_dev, 1109 struct iio_chan_spec const *chan, 1110 int val, int val2, long mask) 1111 { 1112 struct mcp2221_iio *priv = iio_priv(indio_dev); 1113 struct mcp2221 *mcp = priv->mcp; 1114 int ret; 1115 1116 if (val < 0 || val >= BIT(5)) 1117 return -EINVAL; 1118 1119 mutex_lock(&mcp->lock); 1120 1121 memset(mcp->txbuf, 0, 12); 1122 mcp->txbuf[0] = MCP2221_SET_SRAM_SETTINGS; 1123 mcp->txbuf[4] = BIT(7) | val; 1124 1125 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 12); 1126 if (!ret) 1127 mcp->dac_value = val; 1128 1129 mutex_unlock(&mcp->lock); 1130 1131 return ret; 1132 } 1133 1134 static const struct iio_info mcp2221_info = { 1135 .read_raw = &mcp2221_read_raw, 1136 .write_raw = &mcp2221_write_raw, 1137 }; 1138 1139 static int mcp_iio_channels(struct mcp2221 *mcp) 1140 { 1141 int idx, cnt = 0; 1142 bool dac_created = false; 1143 1144 /* GP0 doesn't have ADC/DAC alternative function */ 1145 for (idx = 1; idx < MCP_NGPIO; idx++) { 1146 struct iio_chan_spec *chan = &mcp->iio_channels[cnt]; 1147 1148 switch (mcp->mode[idx]) { 1149 case 2: 1150 chan->address = idx - 1; 1151 chan->channel = cnt++; 1152 break; 1153 case 3: 1154 /* GP1 doesn't have DAC alternative function */ 1155 if (idx == 1 || dac_created) 1156 continue; 1157 /* DAC1 and DAC2 outputs are connected to the same DAC */ 1158 dac_created = true; 1159 chan->output = 1; 1160 cnt++; 1161 break; 1162 default: 1163 continue; 1164 } 1165 1166 chan->type = IIO_VOLTAGE; 1167 chan->indexed = 1; 1168 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); 1169 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); 1170 chan->scan_index = -1; 1171 } 1172 1173 return cnt; 1174 } 1175 1176 static void mcp_init_work(struct work_struct *work) 1177 { 1178 struct iio_dev *indio_dev; 1179 struct mcp2221 *mcp = container_of(work, struct mcp2221, init_work.work); 1180 struct mcp2221_iio *data; 1181 static int retries = 5; 1182 int ret, num_channels; 1183 1184 hid_hw_power(mcp->hdev, PM_HINT_FULLON); 1185 mutex_lock(&mcp->lock); 1186 1187 mcp->txbuf[0] = MCP2221_GET_SRAM_SETTINGS; 1188 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 1189 1190 if (ret == -EAGAIN) 1191 goto reschedule_task; 1192 1193 num_channels = mcp_iio_channels(mcp); 1194 if (!num_channels) 1195 goto unlock; 1196 1197 mcp->txbuf[0] = MCP2221_READ_FLASH_DATA; 1198 mcp->txbuf[1] = 0; 1199 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 2); 1200 1201 if (ret == -EAGAIN) 1202 goto reschedule_task; 1203 1204 indio_dev = devm_iio_device_alloc(&mcp->hdev->dev, sizeof(*data)); 1205 if (!indio_dev) 1206 goto unlock; 1207 1208 data = iio_priv(indio_dev); 1209 data->mcp = mcp; 1210 1211 indio_dev->name = "mcp2221"; 1212 indio_dev->modes = INDIO_DIRECT_MODE; 1213 indio_dev->info = &mcp2221_info; 1214 indio_dev->channels = mcp->iio_channels; 1215 indio_dev->num_channels = num_channels; 1216 1217 devm_iio_device_register(&mcp->hdev->dev, indio_dev); 1218 1219 unlock: 1220 mutex_unlock(&mcp->lock); 1221 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 1222 1223 return; 1224 1225 reschedule_task: 1226 mutex_unlock(&mcp->lock); 1227 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 1228 1229 if (!retries--) 1230 return; 1231 1232 /* Device is not ready to read SRAM or FLASH data, try again */ 1233 schedule_delayed_work(&mcp->init_work, msecs_to_jiffies(100)); 1234 } 1235 #endif 1236 1237 static int mcp2221_probe(struct hid_device *hdev, 1238 const struct hid_device_id *id) 1239 { 1240 int ret; 1241 struct mcp2221 *mcp; 1242 1243 mcp = devm_kzalloc(&hdev->dev, sizeof(*mcp), GFP_KERNEL); 1244 if (!mcp) 1245 return -ENOMEM; 1246 1247 ret = hid_parse(hdev); 1248 if (ret) { 1249 hid_err(hdev, "can't parse reports\n"); 1250 return ret; 1251 } 1252 1253 /* 1254 * This driver uses the .raw_event callback and therefore does not need any 1255 * HID_CONNECT_xxx flags. 1256 */ 1257 ret = hid_hw_start(hdev, 0); 1258 if (ret) { 1259 hid_err(hdev, "can't start hardware\n"); 1260 return ret; 1261 } 1262 1263 hid_info(hdev, "USB HID v%x.%02x Device [%s] on %s\n", hdev->version >> 8, 1264 hdev->version & 0xff, hdev->name, hdev->phys); 1265 1266 ret = hid_hw_open(hdev); 1267 if (ret) { 1268 hid_err(hdev, "can't open device\n"); 1269 hid_hw_stop(hdev); 1270 return ret; 1271 } 1272 1273 mutex_init(&mcp->lock); 1274 init_completion(&mcp->wait_in_report); 1275 hid_set_drvdata(hdev, mcp); 1276 mcp->hdev = hdev; 1277 1278 ret = devm_add_action_or_reset(&hdev->dev, mcp2221_hid_unregister, hdev); 1279 if (ret) 1280 return ret; 1281 1282 hid_device_io_start(hdev); 1283 1284 /* Set I2C bus clock diviser */ 1285 if (i2c_clk_freq > 400) 1286 i2c_clk_freq = 400; 1287 if (i2c_clk_freq < 50) 1288 i2c_clk_freq = 50; 1289 mcp->cur_i2c_clk_div = (12000000 / (i2c_clk_freq * 1000)) - 3; 1290 ret = mcp_set_i2c_speed(mcp); 1291 if (ret) { 1292 hid_err(hdev, "can't set i2c speed: %d\n", ret); 1293 return ret; 1294 } 1295 1296 mcp->adapter.owner = THIS_MODULE; 1297 mcp->adapter.class = I2C_CLASS_HWMON; 1298 mcp->adapter.algo = &mcp_i2c_algo; 1299 mcp->adapter.retries = 1; 1300 mcp->adapter.dev.parent = &hdev->dev; 1301 ACPI_COMPANION_SET(&mcp->adapter.dev, ACPI_COMPANION(hdev->dev.parent)); 1302 snprintf(mcp->adapter.name, sizeof(mcp->adapter.name), 1303 "MCP2221 usb-i2c bridge"); 1304 1305 i2c_set_adapdata(&mcp->adapter, mcp); 1306 ret = devm_i2c_add_adapter(&hdev->dev, &mcp->adapter); 1307 if (ret) { 1308 hid_err(hdev, "can't add usb-i2c adapter: %d\n", ret); 1309 return ret; 1310 } 1311 1312 #if IS_REACHABLE(CONFIG_GPIOLIB) 1313 /* Setup GPIO chip */ 1314 mcp->gc = devm_kzalloc(&hdev->dev, sizeof(*mcp->gc), GFP_KERNEL); 1315 if (!mcp->gc) 1316 return -ENOMEM; 1317 1318 mcp->gc->label = "mcp2221_gpio"; 1319 mcp->gc->direction_input = mcp_gpio_direction_input; 1320 mcp->gc->direction_output = mcp_gpio_direction_output; 1321 mcp->gc->get_direction = mcp_gpio_get_direction; 1322 mcp->gc->set = mcp_gpio_set; 1323 mcp->gc->get = mcp_gpio_get; 1324 mcp->gc->ngpio = MCP_NGPIO; 1325 mcp->gc->base = -1; 1326 mcp->gc->can_sleep = 1; 1327 mcp->gc->parent = &hdev->dev; 1328 1329 ret = devm_gpiochip_add_data(&hdev->dev, mcp->gc, mcp); 1330 if (ret) 1331 return ret; 1332 1333 mcp2221_check_gpio_pinfunc(mcp); 1334 #endif 1335 1336 #if IS_REACHABLE(CONFIG_IIO) 1337 if (!gpio_mode_enforce) { 1338 INIT_DELAYED_WORK(&mcp->init_work, mcp_init_work); 1339 schedule_delayed_work(&mcp->init_work, msecs_to_jiffies(100)); 1340 } 1341 #endif 1342 1343 return 0; 1344 } 1345 1346 static const struct hid_device_id mcp2221_devices[] = { 1347 { HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_MCP2221) }, 1348 { } 1349 }; 1350 MODULE_DEVICE_TABLE(hid, mcp2221_devices); 1351 1352 static struct hid_driver mcp2221_driver = { 1353 .name = "mcp2221", 1354 .id_table = mcp2221_devices, 1355 .probe = mcp2221_probe, 1356 .remove = mcp2221_remove, 1357 .raw_event = mcp2221_raw_event, 1358 }; 1359 1360 /* Register with HID core */ 1361 module_hid_driver(mcp2221_driver); 1362 1363 MODULE_AUTHOR("Rishi Gupta <gupt21@gmail.com>"); 1364 MODULE_DESCRIPTION("MCP2221 Microchip HID USB to I2C master bridge"); 1365 MODULE_LICENSE("GPL v2"); 1366