1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * MCP2221A - Microchip USB to I2C Host Protocol Bridge 4 * 5 * Copyright (c) 2020, Rishi Gupta <gupt21@gmail.com> 6 * 7 * Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/20005565B.pdf 8 */ 9 10 #include <linux/module.h> 11 #include <linux/err.h> 12 #include <linux/mutex.h> 13 #include <linux/bitfield.h> 14 #include <linux/completion.h> 15 #include <linux/delay.h> 16 #include <linux/hid.h> 17 #include <linux/hidraw.h> 18 #include <linux/i2c.h> 19 #include <linux/gpio/driver.h> 20 #include <linux/iio/iio.h> 21 #include <linux/minmax.h> 22 #include "hid-ids.h" 23 24 /* Commands codes in a raw output report */ 25 enum { 26 MCP2221_I2C_WR_DATA = 0x90, 27 MCP2221_I2C_WR_NO_STOP = 0x94, 28 MCP2221_I2C_RD_DATA = 0x91, 29 MCP2221_I2C_RD_RPT_START = 0x93, 30 MCP2221_I2C_GET_DATA = 0x40, 31 MCP2221_I2C_PARAM_OR_STATUS = 0x10, 32 MCP2221_I2C_SET_SPEED = 0x20, 33 MCP2221_I2C_CANCEL = 0x10, 34 MCP2221_GPIO_SET = 0x50, 35 MCP2221_GPIO_GET = 0x51, 36 MCP2221_SET_SRAM_SETTINGS = 0x60, 37 MCP2221_GET_SRAM_SETTINGS = 0x61, 38 MCP2221_READ_FLASH_DATA = 0xb0, 39 }; 40 41 /* Response codes in a raw input report */ 42 enum { 43 MCP2221_SUCCESS = 0x00, 44 MCP2221_I2C_ENG_BUSY = 0x01, 45 MCP2221_I2C_START_TOUT = 0x12, 46 MCP2221_I2C_STOP_TOUT = 0x62, 47 MCP2221_I2C_WRADDRL_TOUT = 0x23, 48 MCP2221_I2C_WRDATA_TOUT = 0x44, 49 MCP2221_I2C_WRADDRL_NACK = 0x25, 50 MCP2221_I2C_MASK_ADDR_NACK = 0x40, 51 MCP2221_I2C_WRADDRL_SEND = 0x21, 52 MCP2221_I2C_ADDR_NACK = 0x25, 53 MCP2221_I2C_READ_PARTIAL = 0x54, 54 MCP2221_I2C_READ_COMPL = 0x55, 55 MCP2221_ALT_F_NOT_GPIOV = 0xEE, 56 MCP2221_ALT_F_NOT_GPIOD = 0xEF, 57 }; 58 59 /* MCP SRAM read offsets cmd: MCP2221_GET_SRAM_SETTINGS */ 60 enum { 61 MCP2221_SRAM_RD_GP0 = 22, 62 MCP2221_SRAM_RD_GP1 = 23, 63 MCP2221_SRAM_RD_GP2 = 24, 64 MCP2221_SRAM_RD_GP3 = 25, 65 }; 66 67 /* MCP SRAM write offsets cmd: MCP2221_SET_SRAM_SETTINGS */ 68 enum { 69 MCP2221_SRAM_WR_GP_ENA_ALTER = 7, 70 MCP2221_SRAM_WR_GP0 = 8, 71 MCP2221_SRAM_WR_GP1 = 9, 72 MCP2221_SRAM_WR_GP2 = 10, 73 MCP2221_SRAM_WR_GP3 = 11, 74 }; 75 76 #define MCP2221_SRAM_GP_DESIGN_MASK 0x07 77 #define MCP2221_SRAM_GP_DIRECTION_MASK 0x08 78 #define MCP2221_SRAM_GP_VALUE_MASK 0x10 79 80 /* MCP GPIO direction encoding */ 81 enum { 82 MCP2221_DIR_OUT = 0x00, 83 MCP2221_DIR_IN = 0x01, 84 }; 85 86 #define MCP_NGPIO 4 87 88 /* MCP GPIO set command layout */ 89 struct mcp_set_gpio { 90 u8 cmd; 91 u8 dummy; 92 struct { 93 u8 change_value; 94 u8 value; 95 u8 change_direction; 96 u8 direction; 97 } gpio[MCP_NGPIO]; 98 } __packed; 99 100 /* MCP GPIO get command layout */ 101 struct mcp_get_gpio { 102 u8 cmd; 103 u8 dummy; 104 struct { 105 u8 value; 106 u8 direction; 107 } gpio[MCP_NGPIO]; 108 } __packed; 109 110 /* 111 * There is no way to distinguish responses. Therefore next command 112 * is sent only after response to previous has been received. Mutex 113 * lock is used for this purpose mainly. 114 */ 115 struct mcp2221 { 116 struct hid_device *hdev; 117 struct i2c_adapter adapter; 118 struct mutex lock; 119 struct completion wait_in_report; 120 struct delayed_work init_work; 121 u8 *rxbuf; 122 u8 txbuf[64]; 123 int rxbuf_idx; 124 int status; 125 u8 cur_i2c_clk_div; 126 struct gpio_chip *gc; 127 u8 gp_idx; 128 u8 gpio_dir; 129 u8 mode[4]; 130 #if IS_REACHABLE(CONFIG_IIO) 131 struct iio_chan_spec iio_channels[3]; 132 u16 adc_values[3]; 133 u8 adc_scale; 134 u8 dac_value; 135 u16 dac_scale; 136 #endif 137 }; 138 139 struct mcp2221_iio { 140 struct mcp2221 *mcp; 141 }; 142 143 /* 144 * Default i2c bus clock frequency 400 kHz. Modify this if you 145 * want to set some other frequency (min 50 kHz - max 400 kHz). 146 */ 147 static uint i2c_clk_freq = 400; 148 149 /* Synchronously send output report to the device */ 150 static int mcp_send_report(struct mcp2221 *mcp, 151 u8 *out_report, size_t len) 152 { 153 u8 *buf; 154 int ret; 155 156 buf = kmemdup(out_report, len, GFP_KERNEL); 157 if (!buf) 158 return -ENOMEM; 159 160 /* mcp2221 uses interrupt endpoint for out reports */ 161 ret = hid_hw_output_report(mcp->hdev, buf, len); 162 kfree(buf); 163 164 if (ret < 0) 165 return ret; 166 return 0; 167 } 168 169 /* 170 * Send o/p report to the device and wait for i/p report to be 171 * received from the device. If the device does not respond, 172 * we timeout. 173 */ 174 static int mcp_send_data_req_status(struct mcp2221 *mcp, 175 u8 *out_report, int len) 176 { 177 int ret; 178 unsigned long t; 179 180 reinit_completion(&mcp->wait_in_report); 181 182 ret = mcp_send_report(mcp, out_report, len); 183 if (ret) 184 return ret; 185 186 t = wait_for_completion_timeout(&mcp->wait_in_report, 187 msecs_to_jiffies(4000)); 188 if (!t) 189 return -ETIMEDOUT; 190 191 return mcp->status; 192 } 193 194 /* Check pass/fail for actual communication with i2c slave */ 195 static int mcp_chk_last_cmd_status(struct mcp2221 *mcp) 196 { 197 memset(mcp->txbuf, 0, 8); 198 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS; 199 200 return mcp_send_data_req_status(mcp, mcp->txbuf, 8); 201 } 202 203 /* Cancels last command releasing i2c bus just in case occupied */ 204 static int mcp_cancel_last_cmd(struct mcp2221 *mcp) 205 { 206 memset(mcp->txbuf, 0, 8); 207 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS; 208 mcp->txbuf[2] = MCP2221_I2C_CANCEL; 209 210 return mcp_send_data_req_status(mcp, mcp->txbuf, 8); 211 } 212 213 /* Check if the last command succeeded or failed and return the result. 214 * If the command did fail, cancel that command which will free the i2c bus. 215 */ 216 static int mcp_chk_last_cmd_status_free_bus(struct mcp2221 *mcp) 217 { 218 int ret; 219 220 ret = mcp_chk_last_cmd_status(mcp); 221 if (ret) { 222 /* The last command was a failure. 223 * Send a cancel which will also free the bus. 224 */ 225 usleep_range(980, 1000); 226 mcp_cancel_last_cmd(mcp); 227 } 228 229 return ret; 230 } 231 232 static int mcp_set_i2c_speed(struct mcp2221 *mcp) 233 { 234 int ret; 235 236 memset(mcp->txbuf, 0, 8); 237 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS; 238 mcp->txbuf[3] = MCP2221_I2C_SET_SPEED; 239 mcp->txbuf[4] = mcp->cur_i2c_clk_div; 240 241 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 8); 242 if (ret) { 243 /* Small delay is needed here */ 244 usleep_range(980, 1000); 245 mcp_cancel_last_cmd(mcp); 246 } 247 248 return 0; 249 } 250 251 /* 252 * An output report can contain minimum 1 and maximum 60 user data 253 * bytes. If the number of data bytes is more then 60, we send it 254 * in chunks of 60 bytes. Last chunk may contain exactly 60 or less 255 * bytes. Total number of bytes is informed in very first report to 256 * mcp2221, from that point onwards it first collect all the data 257 * from host and then send to i2c slave device. 258 */ 259 static int mcp_i2c_write(struct mcp2221 *mcp, 260 struct i2c_msg *msg, int type, u8 last_status) 261 { 262 int ret, len, idx, sent; 263 264 idx = 0; 265 sent = 0; 266 len = min(msg->len, 60); 267 268 do { 269 mcp->txbuf[0] = type; 270 mcp->txbuf[1] = msg->len & 0xff; 271 mcp->txbuf[2] = msg->len >> 8; 272 mcp->txbuf[3] = (u8)(msg->addr << 1); 273 274 memcpy(&mcp->txbuf[4], &msg->buf[idx], len); 275 276 ret = mcp_send_data_req_status(mcp, mcp->txbuf, len + 4); 277 if (ret) 278 return ret; 279 280 usleep_range(980, 1000); 281 282 if (last_status) { 283 ret = mcp_chk_last_cmd_status_free_bus(mcp); 284 if (ret) 285 return ret; 286 } 287 288 sent = sent + len; 289 if (sent >= msg->len) 290 break; 291 292 idx = idx + len; 293 len = min(msg->len - sent, 60); 294 295 /* 296 * Testing shows delay is needed between successive writes 297 * otherwise next write fails on first-try from i2c core. 298 * This value is obtained through automated stress testing. 299 */ 300 usleep_range(980, 1000); 301 } while (len > 0); 302 303 return ret; 304 } 305 306 /* 307 * Device reads all data (0 - 65535 bytes) from i2c slave device and 308 * stores it in device itself. This data is read back from device to 309 * host in multiples of 60 bytes using input reports. 310 */ 311 static int mcp_i2c_smbus_read(struct mcp2221 *mcp, 312 struct i2c_msg *msg, int type, u16 smbus_addr, 313 u8 smbus_len, u8 *smbus_buf) 314 { 315 int ret; 316 u16 total_len; 317 int retries = 0; 318 319 mcp->txbuf[0] = type; 320 if (msg) { 321 mcp->txbuf[1] = msg->len & 0xff; 322 mcp->txbuf[2] = msg->len >> 8; 323 mcp->txbuf[3] = (u8)(msg->addr << 1); 324 total_len = msg->len; 325 mcp->rxbuf = msg->buf; 326 } else { 327 mcp->txbuf[1] = smbus_len; 328 mcp->txbuf[2] = 0; 329 mcp->txbuf[3] = (u8)(smbus_addr << 1); 330 total_len = smbus_len; 331 mcp->rxbuf = smbus_buf; 332 } 333 334 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 4); 335 if (ret) 336 return ret; 337 338 mcp->rxbuf_idx = 0; 339 340 do { 341 /* Wait for the data to be read by the device */ 342 usleep_range(980, 1000); 343 344 memset(mcp->txbuf, 0, 4); 345 mcp->txbuf[0] = MCP2221_I2C_GET_DATA; 346 347 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 348 if (ret) { 349 if (retries < 5) { 350 /* The data wasn't ready to read. 351 * Wait a bit longer and try again. 352 */ 353 usleep_range(90, 100); 354 retries++; 355 } else { 356 usleep_range(980, 1000); 357 mcp_cancel_last_cmd(mcp); 358 return ret; 359 } 360 } else { 361 retries = 0; 362 } 363 } while (mcp->rxbuf_idx < total_len); 364 365 usleep_range(980, 1000); 366 ret = mcp_chk_last_cmd_status_free_bus(mcp); 367 368 return ret; 369 } 370 371 static int mcp_i2c_xfer(struct i2c_adapter *adapter, 372 struct i2c_msg msgs[], int num) 373 { 374 int ret; 375 struct mcp2221 *mcp = i2c_get_adapdata(adapter); 376 377 hid_hw_power(mcp->hdev, PM_HINT_FULLON); 378 379 mutex_lock(&mcp->lock); 380 381 if (num == 1) { 382 if (msgs->flags & I2C_M_RD) { 383 ret = mcp_i2c_smbus_read(mcp, msgs, MCP2221_I2C_RD_DATA, 384 0, 0, NULL); 385 } else { 386 ret = mcp_i2c_write(mcp, msgs, MCP2221_I2C_WR_DATA, 1); 387 } 388 if (ret) 389 goto exit; 390 ret = num; 391 } else if (num == 2) { 392 /* Ex transaction; send reg address and read its contents */ 393 if (msgs[0].addr == msgs[1].addr && 394 !(msgs[0].flags & I2C_M_RD) && 395 (msgs[1].flags & I2C_M_RD)) { 396 397 ret = mcp_i2c_write(mcp, &msgs[0], 398 MCP2221_I2C_WR_NO_STOP, 0); 399 if (ret) 400 goto exit; 401 402 ret = mcp_i2c_smbus_read(mcp, &msgs[1], 403 MCP2221_I2C_RD_RPT_START, 404 0, 0, NULL); 405 if (ret) 406 goto exit; 407 ret = num; 408 } else { 409 dev_err(&adapter->dev, 410 "unsupported multi-msg i2c transaction\n"); 411 ret = -EOPNOTSUPP; 412 } 413 } else { 414 dev_err(&adapter->dev, 415 "unsupported multi-msg i2c transaction\n"); 416 ret = -EOPNOTSUPP; 417 } 418 419 exit: 420 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 421 mutex_unlock(&mcp->lock); 422 return ret; 423 } 424 425 static int mcp_smbus_write(struct mcp2221 *mcp, u16 addr, 426 u8 command, u8 *buf, u8 len, int type, 427 u8 last_status) 428 { 429 int data_len, ret; 430 431 mcp->txbuf[0] = type; 432 mcp->txbuf[1] = len + 1; /* 1 is due to command byte itself */ 433 mcp->txbuf[2] = 0; 434 mcp->txbuf[3] = (u8)(addr << 1); 435 mcp->txbuf[4] = command; 436 437 switch (len) { 438 case 0: 439 data_len = 5; 440 break; 441 case 1: 442 mcp->txbuf[5] = buf[0]; 443 data_len = 6; 444 break; 445 case 2: 446 mcp->txbuf[5] = buf[0]; 447 mcp->txbuf[6] = buf[1]; 448 data_len = 7; 449 break; 450 default: 451 if (len > I2C_SMBUS_BLOCK_MAX) 452 return -EINVAL; 453 454 memcpy(&mcp->txbuf[5], buf, len); 455 data_len = len + 5; 456 } 457 458 ret = mcp_send_data_req_status(mcp, mcp->txbuf, data_len); 459 if (ret) 460 return ret; 461 462 if (last_status) { 463 usleep_range(980, 1000); 464 465 ret = mcp_chk_last_cmd_status_free_bus(mcp); 466 } 467 468 return ret; 469 } 470 471 static int mcp_smbus_xfer(struct i2c_adapter *adapter, u16 addr, 472 unsigned short flags, char read_write, 473 u8 command, int size, 474 union i2c_smbus_data *data) 475 { 476 int ret; 477 struct mcp2221 *mcp = i2c_get_adapdata(adapter); 478 479 hid_hw_power(mcp->hdev, PM_HINT_FULLON); 480 481 mutex_lock(&mcp->lock); 482 483 switch (size) { 484 485 case I2C_SMBUS_QUICK: 486 if (read_write == I2C_SMBUS_READ) 487 ret = mcp_i2c_smbus_read(mcp, NULL, MCP2221_I2C_RD_DATA, 488 addr, 0, &data->byte); 489 else 490 ret = mcp_smbus_write(mcp, addr, command, NULL, 491 0, MCP2221_I2C_WR_DATA, 1); 492 break; 493 case I2C_SMBUS_BYTE: 494 if (read_write == I2C_SMBUS_READ) 495 ret = mcp_i2c_smbus_read(mcp, NULL, MCP2221_I2C_RD_DATA, 496 addr, 1, &data->byte); 497 else 498 ret = mcp_smbus_write(mcp, addr, command, NULL, 499 0, MCP2221_I2C_WR_DATA, 1); 500 break; 501 case I2C_SMBUS_BYTE_DATA: 502 if (read_write == I2C_SMBUS_READ) { 503 ret = mcp_smbus_write(mcp, addr, command, NULL, 504 0, MCP2221_I2C_WR_NO_STOP, 0); 505 if (ret) 506 goto exit; 507 508 ret = mcp_i2c_smbus_read(mcp, NULL, 509 MCP2221_I2C_RD_RPT_START, 510 addr, 1, &data->byte); 511 } else { 512 ret = mcp_smbus_write(mcp, addr, command, &data->byte, 513 1, MCP2221_I2C_WR_DATA, 1); 514 } 515 break; 516 case I2C_SMBUS_WORD_DATA: 517 if (read_write == I2C_SMBUS_READ) { 518 ret = mcp_smbus_write(mcp, addr, command, NULL, 519 0, MCP2221_I2C_WR_NO_STOP, 0); 520 if (ret) 521 goto exit; 522 523 ret = mcp_i2c_smbus_read(mcp, NULL, 524 MCP2221_I2C_RD_RPT_START, 525 addr, 2, (u8 *)&data->word); 526 } else { 527 ret = mcp_smbus_write(mcp, addr, command, 528 (u8 *)&data->word, 2, 529 MCP2221_I2C_WR_DATA, 1); 530 } 531 break; 532 case I2C_SMBUS_BLOCK_DATA: 533 if (read_write == I2C_SMBUS_READ) { 534 ret = mcp_smbus_write(mcp, addr, command, NULL, 535 0, MCP2221_I2C_WR_NO_STOP, 1); 536 if (ret) 537 goto exit; 538 539 mcp->rxbuf_idx = 0; 540 mcp->rxbuf = data->block; 541 mcp->txbuf[0] = MCP2221_I2C_GET_DATA; 542 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 543 if (ret) 544 goto exit; 545 } else { 546 if (!data->block[0]) { 547 ret = -EINVAL; 548 goto exit; 549 } 550 ret = mcp_smbus_write(mcp, addr, command, data->block, 551 data->block[0] + 1, 552 MCP2221_I2C_WR_DATA, 1); 553 } 554 break; 555 case I2C_SMBUS_I2C_BLOCK_DATA: 556 if (read_write == I2C_SMBUS_READ) { 557 ret = mcp_smbus_write(mcp, addr, command, NULL, 558 0, MCP2221_I2C_WR_NO_STOP, 1); 559 if (ret) 560 goto exit; 561 562 mcp->rxbuf_idx = 0; 563 mcp->rxbuf = data->block; 564 mcp->txbuf[0] = MCP2221_I2C_GET_DATA; 565 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 566 if (ret) 567 goto exit; 568 } else { 569 if (!data->block[0]) { 570 ret = -EINVAL; 571 goto exit; 572 } 573 ret = mcp_smbus_write(mcp, addr, command, 574 &data->block[1], data->block[0], 575 MCP2221_I2C_WR_DATA, 1); 576 } 577 break; 578 case I2C_SMBUS_PROC_CALL: 579 ret = mcp_smbus_write(mcp, addr, command, 580 (u8 *)&data->word, 581 2, MCP2221_I2C_WR_NO_STOP, 0); 582 if (ret) 583 goto exit; 584 585 ret = mcp_i2c_smbus_read(mcp, NULL, 586 MCP2221_I2C_RD_RPT_START, 587 addr, 2, (u8 *)&data->word); 588 break; 589 case I2C_SMBUS_BLOCK_PROC_CALL: 590 ret = mcp_smbus_write(mcp, addr, command, data->block, 591 data->block[0] + 1, 592 MCP2221_I2C_WR_NO_STOP, 0); 593 if (ret) 594 goto exit; 595 596 ret = mcp_i2c_smbus_read(mcp, NULL, 597 MCP2221_I2C_RD_RPT_START, 598 addr, I2C_SMBUS_BLOCK_MAX, 599 data->block); 600 break; 601 default: 602 dev_err(&mcp->adapter.dev, 603 "unsupported smbus transaction size:%d\n", size); 604 ret = -EOPNOTSUPP; 605 } 606 607 exit: 608 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 609 mutex_unlock(&mcp->lock); 610 return ret; 611 } 612 613 static u32 mcp_i2c_func(struct i2c_adapter *adapter) 614 { 615 return I2C_FUNC_I2C | 616 I2C_FUNC_SMBUS_READ_BLOCK_DATA | 617 I2C_FUNC_SMBUS_BLOCK_PROC_CALL | 618 (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_PEC); 619 } 620 621 static const struct i2c_algorithm mcp_i2c_algo = { 622 .master_xfer = mcp_i2c_xfer, 623 .smbus_xfer = mcp_smbus_xfer, 624 .functionality = mcp_i2c_func, 625 }; 626 627 #if IS_REACHABLE(CONFIG_GPIOLIB) 628 static int mcp_gpio_read_sram(struct mcp2221 *mcp) 629 { 630 int ret; 631 632 memset(mcp->txbuf, 0, 64); 633 mcp->txbuf[0] = MCP2221_GET_SRAM_SETTINGS; 634 635 mutex_lock(&mcp->lock); 636 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 64); 637 mutex_unlock(&mcp->lock); 638 639 return ret; 640 } 641 642 /* 643 * If CONFIG_IIO is not enabled, check for the gpio pins 644 * if they are in gpio mode. For the ones which are not 645 * in gpio mode, set them into gpio mode. 646 */ 647 static int mcp2221_check_gpio_pinfunc(struct mcp2221 *mcp) 648 { 649 int i; 650 int needgpiofix = 0; 651 int ret; 652 653 if (IS_ENABLED(CONFIG_IIO)) 654 return 0; 655 656 ret = mcp_gpio_read_sram(mcp); 657 if (ret) 658 return ret; 659 660 for (i = 0; i < MCP_NGPIO; i++) { 661 if ((mcp->mode[i] & MCP2221_SRAM_GP_DESIGN_MASK) != 0x0) { 662 dev_warn(&mcp->hdev->dev, 663 "GPIO %d not in gpio mode\n", i); 664 needgpiofix = 1; 665 } 666 } 667 668 if (!needgpiofix) 669 return 0; 670 671 /* 672 * Set all bytes to 0, so Bit 7 is not set. The chip 673 * only changes content of a register when bit 7 is set. 674 */ 675 memset(mcp->txbuf, 0, 64); 676 mcp->txbuf[0] = MCP2221_SET_SRAM_SETTINGS; 677 678 /* 679 * Set bit 7 in MCP2221_SRAM_WR_GP_ENA_ALTER to enable 680 * loading of a new set of gpio settings to GP SRAM 681 */ 682 mcp->txbuf[MCP2221_SRAM_WR_GP_ENA_ALTER] = 0x80; 683 for (i = 0; i < MCP_NGPIO; i++) { 684 if ((mcp->mode[i] & MCP2221_SRAM_GP_DESIGN_MASK) == 0x0) { 685 /* write current GPIO mode */ 686 mcp->txbuf[MCP2221_SRAM_WR_GP0 + i] = mcp->mode[i]; 687 } else { 688 /* pin is not in gpio mode, set it to input mode */ 689 mcp->txbuf[MCP2221_SRAM_WR_GP0 + i] = 0x08; 690 dev_warn(&mcp->hdev->dev, 691 "Set GPIO mode for gpio pin %d!\n", i); 692 } 693 } 694 695 mutex_lock(&mcp->lock); 696 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 64); 697 mutex_unlock(&mcp->lock); 698 699 return ret; 700 } 701 702 static int mcp_gpio_get(struct gpio_chip *gc, 703 unsigned int offset) 704 { 705 int ret; 706 struct mcp2221 *mcp = gpiochip_get_data(gc); 707 708 mcp->txbuf[0] = MCP2221_GPIO_GET; 709 710 mcp->gp_idx = offsetof(struct mcp_get_gpio, gpio[offset]); 711 712 mutex_lock(&mcp->lock); 713 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 714 mutex_unlock(&mcp->lock); 715 716 return ret; 717 } 718 719 static int mcp_gpio_set(struct gpio_chip *gc, unsigned int offset, int value) 720 { 721 struct mcp2221 *mcp = gpiochip_get_data(gc); 722 int ret; 723 724 memset(mcp->txbuf, 0, 18); 725 mcp->txbuf[0] = MCP2221_GPIO_SET; 726 727 mcp->gp_idx = offsetof(struct mcp_set_gpio, gpio[offset].value); 728 729 mcp->txbuf[mcp->gp_idx - 1] = 1; 730 mcp->txbuf[mcp->gp_idx] = !!value; 731 732 mutex_lock(&mcp->lock); 733 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 18); 734 mutex_unlock(&mcp->lock); 735 736 return ret; 737 } 738 739 static int mcp_gpio_dir_set(struct mcp2221 *mcp, 740 unsigned int offset, u8 val) 741 { 742 memset(mcp->txbuf, 0, 18); 743 mcp->txbuf[0] = MCP2221_GPIO_SET; 744 745 mcp->gp_idx = offsetof(struct mcp_set_gpio, gpio[offset].direction); 746 747 mcp->txbuf[mcp->gp_idx - 1] = 1; 748 mcp->txbuf[mcp->gp_idx] = val; 749 750 return mcp_send_data_req_status(mcp, mcp->txbuf, 18); 751 } 752 753 static int mcp_gpio_direction_input(struct gpio_chip *gc, 754 unsigned int offset) 755 { 756 int ret; 757 struct mcp2221 *mcp = gpiochip_get_data(gc); 758 759 mutex_lock(&mcp->lock); 760 ret = mcp_gpio_dir_set(mcp, offset, MCP2221_DIR_IN); 761 mutex_unlock(&mcp->lock); 762 763 return ret; 764 } 765 766 static int mcp_gpio_direction_output(struct gpio_chip *gc, 767 unsigned int offset, int value) 768 { 769 int ret; 770 struct mcp2221 *mcp = gpiochip_get_data(gc); 771 772 mutex_lock(&mcp->lock); 773 ret = mcp_gpio_dir_set(mcp, offset, MCP2221_DIR_OUT); 774 mutex_unlock(&mcp->lock); 775 776 /* Can't configure as output, bailout early */ 777 if (ret) 778 return ret; 779 780 mcp_gpio_set(gc, offset, value); 781 782 return 0; 783 } 784 785 static int mcp_gpio_get_direction(struct gpio_chip *gc, 786 unsigned int offset) 787 { 788 int ret; 789 struct mcp2221 *mcp = gpiochip_get_data(gc); 790 791 mcp->txbuf[0] = MCP2221_GPIO_GET; 792 793 mcp->gp_idx = offsetof(struct mcp_get_gpio, gpio[offset]); 794 795 mutex_lock(&mcp->lock); 796 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 797 mutex_unlock(&mcp->lock); 798 799 if (ret) 800 return ret; 801 802 if (mcp->gpio_dir == MCP2221_DIR_IN) 803 return GPIO_LINE_DIRECTION_IN; 804 805 return GPIO_LINE_DIRECTION_OUT; 806 } 807 #endif 808 809 /* Gives current state of i2c engine inside mcp2221 */ 810 static int mcp_get_i2c_eng_state(struct mcp2221 *mcp, 811 u8 *data, u8 idx) 812 { 813 int ret; 814 815 switch (data[idx]) { 816 case MCP2221_I2C_WRADDRL_NACK: 817 case MCP2221_I2C_WRADDRL_SEND: 818 ret = -ENXIO; 819 break; 820 case MCP2221_I2C_START_TOUT: 821 case MCP2221_I2C_STOP_TOUT: 822 case MCP2221_I2C_WRADDRL_TOUT: 823 case MCP2221_I2C_WRDATA_TOUT: 824 ret = -ETIMEDOUT; 825 break; 826 case MCP2221_I2C_ENG_BUSY: 827 ret = -EAGAIN; 828 break; 829 case MCP2221_SUCCESS: 830 ret = 0x00; 831 break; 832 default: 833 ret = -EIO; 834 } 835 836 return ret; 837 } 838 839 /* 840 * MCP2221 uses interrupt endpoint for input reports. This function 841 * is called by HID layer when it receives i/p report from mcp2221, 842 * which is actually a response to the previously sent command. 843 * 844 * MCP2221A firmware specific return codes are parsed and 0 or 845 * appropriate negative error code is returned. Delayed response 846 * results in timeout error and stray reponses results in -EIO. 847 */ 848 static int mcp2221_raw_event(struct hid_device *hdev, 849 struct hid_report *report, u8 *data, int size) 850 { 851 u8 *buf; 852 struct mcp2221 *mcp = hid_get_drvdata(hdev); 853 854 switch (data[0]) { 855 856 case MCP2221_I2C_WR_DATA: 857 case MCP2221_I2C_WR_NO_STOP: 858 case MCP2221_I2C_RD_DATA: 859 case MCP2221_I2C_RD_RPT_START: 860 switch (data[1]) { 861 case MCP2221_SUCCESS: 862 mcp->status = 0; 863 break; 864 default: 865 mcp->status = mcp_get_i2c_eng_state(mcp, data, 2); 866 } 867 complete(&mcp->wait_in_report); 868 break; 869 870 case MCP2221_I2C_PARAM_OR_STATUS: 871 switch (data[1]) { 872 case MCP2221_SUCCESS: 873 if ((mcp->txbuf[3] == MCP2221_I2C_SET_SPEED) && 874 (data[3] != MCP2221_I2C_SET_SPEED)) { 875 mcp->status = -EAGAIN; 876 break; 877 } 878 if (data[20] & MCP2221_I2C_MASK_ADDR_NACK) { 879 mcp->status = -ENXIO; 880 break; 881 } 882 mcp->status = mcp_get_i2c_eng_state(mcp, data, 8); 883 #if IS_REACHABLE(CONFIG_IIO) 884 memcpy(&mcp->adc_values, &data[50], sizeof(mcp->adc_values)); 885 #endif 886 break; 887 default: 888 mcp->status = -EIO; 889 } 890 complete(&mcp->wait_in_report); 891 break; 892 893 case MCP2221_I2C_GET_DATA: 894 switch (data[1]) { 895 case MCP2221_SUCCESS: 896 if (data[2] == MCP2221_I2C_ADDR_NACK) { 897 mcp->status = -ENXIO; 898 break; 899 } 900 if (!mcp_get_i2c_eng_state(mcp, data, 2) 901 && (data[3] == 0)) { 902 mcp->status = 0; 903 break; 904 } 905 if (data[3] == 127) { 906 mcp->status = -EIO; 907 break; 908 } 909 if (data[2] == MCP2221_I2C_READ_COMPL || 910 data[2] == MCP2221_I2C_READ_PARTIAL) { 911 if (!mcp->rxbuf || mcp->rxbuf_idx < 0 || data[3] > 60) { 912 mcp->status = -EINVAL; 913 break; 914 } 915 buf = mcp->rxbuf; 916 memcpy(&buf[mcp->rxbuf_idx], &data[4], data[3]); 917 mcp->rxbuf_idx = mcp->rxbuf_idx + data[3]; 918 mcp->status = 0; 919 break; 920 } 921 mcp->status = -EIO; 922 break; 923 default: 924 mcp->status = -EIO; 925 } 926 complete(&mcp->wait_in_report); 927 break; 928 929 case MCP2221_GPIO_GET: 930 switch (data[1]) { 931 case MCP2221_SUCCESS: 932 if ((data[mcp->gp_idx] == MCP2221_ALT_F_NOT_GPIOV) || 933 (data[mcp->gp_idx + 1] == MCP2221_ALT_F_NOT_GPIOD)) { 934 mcp->status = -ENOENT; 935 } else { 936 mcp->status = !!data[mcp->gp_idx]; 937 mcp->gpio_dir = data[mcp->gp_idx + 1]; 938 } 939 break; 940 default: 941 mcp->status = -EAGAIN; 942 } 943 complete(&mcp->wait_in_report); 944 break; 945 946 case MCP2221_GPIO_SET: 947 switch (data[1]) { 948 case MCP2221_SUCCESS: 949 if ((data[mcp->gp_idx] == MCP2221_ALT_F_NOT_GPIOV) || 950 (data[mcp->gp_idx - 1] == MCP2221_ALT_F_NOT_GPIOV)) { 951 mcp->status = -ENOENT; 952 } else { 953 mcp->status = 0; 954 } 955 break; 956 default: 957 mcp->status = -EAGAIN; 958 } 959 complete(&mcp->wait_in_report); 960 break; 961 962 case MCP2221_SET_SRAM_SETTINGS: 963 switch (data[1]) { 964 case MCP2221_SUCCESS: 965 mcp->status = 0; 966 break; 967 default: 968 mcp->status = -EAGAIN; 969 } 970 complete(&mcp->wait_in_report); 971 break; 972 973 case MCP2221_GET_SRAM_SETTINGS: 974 switch (data[1]) { 975 case MCP2221_SUCCESS: 976 memcpy(&mcp->mode, &data[22], 4); 977 #if IS_REACHABLE(CONFIG_IIO) 978 mcp->dac_value = data[6] & GENMASK(4, 0); 979 #endif 980 mcp->status = 0; 981 break; 982 default: 983 mcp->status = -EAGAIN; 984 } 985 complete(&mcp->wait_in_report); 986 break; 987 988 case MCP2221_READ_FLASH_DATA: 989 switch (data[1]) { 990 case MCP2221_SUCCESS: 991 mcp->status = 0; 992 993 /* Only handles CHIP SETTINGS subpage currently */ 994 if (mcp->txbuf[1] != 0) { 995 mcp->status = -EIO; 996 break; 997 } 998 999 #if IS_REACHABLE(CONFIG_IIO) 1000 { 1001 u8 tmp; 1002 /* DAC scale value */ 1003 tmp = FIELD_GET(GENMASK(7, 6), data[6]); 1004 if ((data[6] & BIT(5)) && tmp) 1005 mcp->dac_scale = tmp + 4; 1006 else 1007 mcp->dac_scale = 5; 1008 1009 /* ADC scale value */ 1010 tmp = FIELD_GET(GENMASK(4, 3), data[7]); 1011 if ((data[7] & BIT(2)) && tmp) 1012 mcp->adc_scale = tmp - 1; 1013 else 1014 mcp->adc_scale = 0; 1015 } 1016 #endif 1017 1018 break; 1019 default: 1020 mcp->status = -EAGAIN; 1021 } 1022 complete(&mcp->wait_in_report); 1023 break; 1024 1025 default: 1026 mcp->status = -EIO; 1027 complete(&mcp->wait_in_report); 1028 } 1029 1030 return 1; 1031 } 1032 1033 /* Device resource managed function for HID unregistration */ 1034 static void mcp2221_hid_unregister(void *ptr) 1035 { 1036 struct hid_device *hdev = ptr; 1037 1038 hid_hw_close(hdev); 1039 hid_hw_stop(hdev); 1040 } 1041 1042 /* This is needed to be sure hid_hw_stop() isn't called twice by the subsystem */ 1043 static void mcp2221_remove(struct hid_device *hdev) 1044 { 1045 #if IS_REACHABLE(CONFIG_IIO) 1046 struct mcp2221 *mcp = hid_get_drvdata(hdev); 1047 1048 cancel_delayed_work_sync(&mcp->init_work); 1049 #endif 1050 } 1051 1052 #if IS_REACHABLE(CONFIG_IIO) 1053 static int mcp2221_read_raw(struct iio_dev *indio_dev, 1054 struct iio_chan_spec const *channel, int *val, 1055 int *val2, long mask) 1056 { 1057 struct mcp2221_iio *priv = iio_priv(indio_dev); 1058 struct mcp2221 *mcp = priv->mcp; 1059 int ret; 1060 1061 if (mask == IIO_CHAN_INFO_SCALE) { 1062 if (channel->output) 1063 *val = 1 << mcp->dac_scale; 1064 else 1065 *val = 1 << mcp->adc_scale; 1066 1067 return IIO_VAL_INT; 1068 } 1069 1070 mutex_lock(&mcp->lock); 1071 1072 if (channel->output) { 1073 *val = mcp->dac_value; 1074 ret = IIO_VAL_INT; 1075 } else { 1076 /* Read ADC values */ 1077 ret = mcp_chk_last_cmd_status(mcp); 1078 1079 if (!ret) { 1080 *val = le16_to_cpu((__force __le16) mcp->adc_values[channel->address]); 1081 if (*val >= BIT(10)) 1082 ret = -EINVAL; 1083 else 1084 ret = IIO_VAL_INT; 1085 } 1086 } 1087 1088 mutex_unlock(&mcp->lock); 1089 1090 return ret; 1091 } 1092 1093 static int mcp2221_write_raw(struct iio_dev *indio_dev, 1094 struct iio_chan_spec const *chan, 1095 int val, int val2, long mask) 1096 { 1097 struct mcp2221_iio *priv = iio_priv(indio_dev); 1098 struct mcp2221 *mcp = priv->mcp; 1099 int ret; 1100 1101 if (val < 0 || val >= BIT(5)) 1102 return -EINVAL; 1103 1104 mutex_lock(&mcp->lock); 1105 1106 memset(mcp->txbuf, 0, 12); 1107 mcp->txbuf[0] = MCP2221_SET_SRAM_SETTINGS; 1108 mcp->txbuf[4] = BIT(7) | val; 1109 1110 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 12); 1111 if (!ret) 1112 mcp->dac_value = val; 1113 1114 mutex_unlock(&mcp->lock); 1115 1116 return ret; 1117 } 1118 1119 static const struct iio_info mcp2221_info = { 1120 .read_raw = &mcp2221_read_raw, 1121 .write_raw = &mcp2221_write_raw, 1122 }; 1123 1124 static int mcp_iio_channels(struct mcp2221 *mcp) 1125 { 1126 int idx, cnt = 0; 1127 bool dac_created = false; 1128 1129 /* GP0 doesn't have ADC/DAC alternative function */ 1130 for (idx = 1; idx < MCP_NGPIO; idx++) { 1131 struct iio_chan_spec *chan = &mcp->iio_channels[cnt]; 1132 1133 switch (mcp->mode[idx]) { 1134 case 2: 1135 chan->address = idx - 1; 1136 chan->channel = cnt++; 1137 break; 1138 case 3: 1139 /* GP1 doesn't have DAC alternative function */ 1140 if (idx == 1 || dac_created) 1141 continue; 1142 /* DAC1 and DAC2 outputs are connected to the same DAC */ 1143 dac_created = true; 1144 chan->output = 1; 1145 cnt++; 1146 break; 1147 default: 1148 continue; 1149 } 1150 1151 chan->type = IIO_VOLTAGE; 1152 chan->indexed = 1; 1153 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); 1154 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); 1155 chan->scan_index = -1; 1156 } 1157 1158 return cnt; 1159 } 1160 1161 static void mcp_init_work(struct work_struct *work) 1162 { 1163 struct iio_dev *indio_dev; 1164 struct mcp2221 *mcp = container_of(work, struct mcp2221, init_work.work); 1165 struct mcp2221_iio *data; 1166 static int retries = 5; 1167 int ret, num_channels; 1168 1169 hid_hw_power(mcp->hdev, PM_HINT_FULLON); 1170 mutex_lock(&mcp->lock); 1171 1172 mcp->txbuf[0] = MCP2221_GET_SRAM_SETTINGS; 1173 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1); 1174 1175 if (ret == -EAGAIN) 1176 goto reschedule_task; 1177 1178 num_channels = mcp_iio_channels(mcp); 1179 if (!num_channels) 1180 goto unlock; 1181 1182 mcp->txbuf[0] = MCP2221_READ_FLASH_DATA; 1183 mcp->txbuf[1] = 0; 1184 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 2); 1185 1186 if (ret == -EAGAIN) 1187 goto reschedule_task; 1188 1189 indio_dev = devm_iio_device_alloc(&mcp->hdev->dev, sizeof(*data)); 1190 if (!indio_dev) 1191 goto unlock; 1192 1193 data = iio_priv(indio_dev); 1194 data->mcp = mcp; 1195 1196 indio_dev->name = "mcp2221"; 1197 indio_dev->modes = INDIO_DIRECT_MODE; 1198 indio_dev->info = &mcp2221_info; 1199 indio_dev->channels = mcp->iio_channels; 1200 indio_dev->num_channels = num_channels; 1201 1202 devm_iio_device_register(&mcp->hdev->dev, indio_dev); 1203 1204 unlock: 1205 mutex_unlock(&mcp->lock); 1206 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 1207 1208 return; 1209 1210 reschedule_task: 1211 mutex_unlock(&mcp->lock); 1212 hid_hw_power(mcp->hdev, PM_HINT_NORMAL); 1213 1214 if (!retries--) 1215 return; 1216 1217 /* Device is not ready to read SRAM or FLASH data, try again */ 1218 schedule_delayed_work(&mcp->init_work, msecs_to_jiffies(100)); 1219 } 1220 #endif 1221 1222 static int mcp2221_probe(struct hid_device *hdev, 1223 const struct hid_device_id *id) 1224 { 1225 int ret; 1226 struct mcp2221 *mcp; 1227 1228 mcp = devm_kzalloc(&hdev->dev, sizeof(*mcp), GFP_KERNEL); 1229 if (!mcp) 1230 return -ENOMEM; 1231 1232 ret = hid_parse(hdev); 1233 if (ret) { 1234 hid_err(hdev, "can't parse reports\n"); 1235 return ret; 1236 } 1237 1238 /* 1239 * This driver uses the .raw_event callback and therefore does not need any 1240 * HID_CONNECT_xxx flags. 1241 */ 1242 ret = hid_hw_start(hdev, 0); 1243 if (ret) { 1244 hid_err(hdev, "can't start hardware\n"); 1245 return ret; 1246 } 1247 1248 hid_info(hdev, "USB HID v%x.%02x Device [%s] on %s\n", hdev->version >> 8, 1249 hdev->version & 0xff, hdev->name, hdev->phys); 1250 1251 ret = hid_hw_open(hdev); 1252 if (ret) { 1253 hid_err(hdev, "can't open device\n"); 1254 hid_hw_stop(hdev); 1255 return ret; 1256 } 1257 1258 mutex_init(&mcp->lock); 1259 init_completion(&mcp->wait_in_report); 1260 hid_set_drvdata(hdev, mcp); 1261 mcp->hdev = hdev; 1262 1263 ret = devm_add_action_or_reset(&hdev->dev, mcp2221_hid_unregister, hdev); 1264 if (ret) 1265 return ret; 1266 1267 hid_device_io_start(hdev); 1268 1269 /* Set I2C bus clock diviser */ 1270 if (i2c_clk_freq > 400) 1271 i2c_clk_freq = 400; 1272 if (i2c_clk_freq < 50) 1273 i2c_clk_freq = 50; 1274 mcp->cur_i2c_clk_div = (12000000 / (i2c_clk_freq * 1000)) - 3; 1275 ret = mcp_set_i2c_speed(mcp); 1276 if (ret) { 1277 hid_err(hdev, "can't set i2c speed: %d\n", ret); 1278 return ret; 1279 } 1280 1281 mcp->adapter.owner = THIS_MODULE; 1282 mcp->adapter.class = I2C_CLASS_HWMON; 1283 mcp->adapter.algo = &mcp_i2c_algo; 1284 mcp->adapter.retries = 1; 1285 mcp->adapter.dev.parent = &hdev->dev; 1286 ACPI_COMPANION_SET(&mcp->adapter.dev, ACPI_COMPANION(hdev->dev.parent)); 1287 snprintf(mcp->adapter.name, sizeof(mcp->adapter.name), 1288 "MCP2221 usb-i2c bridge"); 1289 1290 i2c_set_adapdata(&mcp->adapter, mcp); 1291 ret = devm_i2c_add_adapter(&hdev->dev, &mcp->adapter); 1292 if (ret) { 1293 hid_err(hdev, "can't add usb-i2c adapter: %d\n", ret); 1294 return ret; 1295 } 1296 1297 #if IS_REACHABLE(CONFIG_GPIOLIB) 1298 /* Setup GPIO chip */ 1299 mcp->gc = devm_kzalloc(&hdev->dev, sizeof(*mcp->gc), GFP_KERNEL); 1300 if (!mcp->gc) 1301 return -ENOMEM; 1302 1303 mcp->gc->label = "mcp2221_gpio"; 1304 mcp->gc->direction_input = mcp_gpio_direction_input; 1305 mcp->gc->direction_output = mcp_gpio_direction_output; 1306 mcp->gc->get_direction = mcp_gpio_get_direction; 1307 mcp->gc->set = mcp_gpio_set; 1308 mcp->gc->get = mcp_gpio_get; 1309 mcp->gc->ngpio = MCP_NGPIO; 1310 mcp->gc->base = -1; 1311 mcp->gc->can_sleep = 1; 1312 mcp->gc->parent = &hdev->dev; 1313 1314 ret = devm_gpiochip_add_data(&hdev->dev, mcp->gc, mcp); 1315 if (ret) 1316 return ret; 1317 1318 mcp2221_check_gpio_pinfunc(mcp); 1319 #endif 1320 1321 #if IS_REACHABLE(CONFIG_IIO) 1322 INIT_DELAYED_WORK(&mcp->init_work, mcp_init_work); 1323 schedule_delayed_work(&mcp->init_work, msecs_to_jiffies(100)); 1324 #endif 1325 1326 return 0; 1327 } 1328 1329 static const struct hid_device_id mcp2221_devices[] = { 1330 { HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_MCP2221) }, 1331 { } 1332 }; 1333 MODULE_DEVICE_TABLE(hid, mcp2221_devices); 1334 1335 static struct hid_driver mcp2221_driver = { 1336 .name = "mcp2221", 1337 .id_table = mcp2221_devices, 1338 .probe = mcp2221_probe, 1339 .remove = mcp2221_remove, 1340 .raw_event = mcp2221_raw_event, 1341 }; 1342 1343 /* Register with HID core */ 1344 module_hid_driver(mcp2221_driver); 1345 1346 MODULE_AUTHOR("Rishi Gupta <gupt21@gmail.com>"); 1347 MODULE_DESCRIPTION("MCP2221 Microchip HID USB to I2C master bridge"); 1348 MODULE_LICENSE("GPL v2"); 1349