16947f312SBasavaraj Natikar /* SPDX-License-Identifier: GPL-2.0-or-later */ 26947f312SBasavaraj Natikar /* 36947f312SBasavaraj Natikar * AMD MP2 common macros and structures 46947f312SBasavaraj Natikar * 56947f312SBasavaraj Natikar * Copyright (c) 2022, Advanced Micro Devices, Inc. 66947f312SBasavaraj Natikar * All Rights Reserved. 76947f312SBasavaraj Natikar * 86947f312SBasavaraj Natikar * Author: Basavaraj Natikar <Basavaraj.Natikar@amd.com> 96947f312SBasavaraj Natikar */ 106947f312SBasavaraj Natikar #ifndef AMD_SFH_COMMON_H 116947f312SBasavaraj Natikar #define AMD_SFH_COMMON_H 126947f312SBasavaraj Natikar 136947f312SBasavaraj Natikar #include <linux/pci.h> 146947f312SBasavaraj Natikar #include "amd_sfh_hid.h" 156947f312SBasavaraj Natikar 166947f312SBasavaraj Natikar #define PCI_DEVICE_ID_AMD_MP2 0x15E4 176947f312SBasavaraj Natikar 186947f312SBasavaraj Natikar #define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4)) 196947f312SBasavaraj Natikar #define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4)) 206947f312SBasavaraj Natikar 216947f312SBasavaraj Natikar #define SENSOR_ENABLED 4 226947f312SBasavaraj Natikar #define SENSOR_DISABLED 5 236947f312SBasavaraj Natikar 246947f312SBasavaraj Natikar #define AMD_SFH_IDLE_LOOP 200 256947f312SBasavaraj Natikar 266947f312SBasavaraj Natikar enum cmd_id { 276947f312SBasavaraj Natikar NO_OP, 286947f312SBasavaraj Natikar ENABLE_SENSOR, 296947f312SBasavaraj Natikar DISABLE_SENSOR, 306947f312SBasavaraj Natikar STOP_ALL_SENSORS = 8, 316947f312SBasavaraj Natikar }; 326947f312SBasavaraj Natikar 336947f312SBasavaraj Natikar struct amd_mp2_sensor_info { 346947f312SBasavaraj Natikar u8 sensor_idx; 356947f312SBasavaraj Natikar u32 period; 366947f312SBasavaraj Natikar dma_addr_t dma_address; 376947f312SBasavaraj Natikar }; 386947f312SBasavaraj Natikar 396947f312SBasavaraj Natikar struct amd_mp2_dev { 406947f312SBasavaraj Natikar struct pci_dev *pdev; 416947f312SBasavaraj Natikar struct amdtp_cl_data *cl_data; 426947f312SBasavaraj Natikar void __iomem *mmio; 43786aa1b9SBasavaraj Natikar struct amd_mp2_ops *mp2_ops; 446947f312SBasavaraj Natikar struct amd_input_data in_data; 456947f312SBasavaraj Natikar /* mp2 active control status */ 466947f312SBasavaraj Natikar u32 mp2_acs; 476947f312SBasavaraj Natikar }; 486947f312SBasavaraj Natikar 496947f312SBasavaraj Natikar struct amd_mp2_ops { 506947f312SBasavaraj Natikar void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info); 516947f312SBasavaraj Natikar void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx); 526947f312SBasavaraj Natikar void (*stop_all)(struct amd_mp2_dev *privdata); 536947f312SBasavaraj Natikar int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts); 546947f312SBasavaraj Natikar void (*clear_intr)(struct amd_mp2_dev *privdata); 556947f312SBasavaraj Natikar int (*init_intr)(struct amd_mp2_dev *privdata); 566947f312SBasavaraj Natikar int (*discovery_status)(struct amd_mp2_dev *privdata); 57*9acadc72SBasavaraj Natikar void (*suspend)(struct amd_mp2_dev *mp2); 58*9acadc72SBasavaraj Natikar void (*resume)(struct amd_mp2_dev *mp2); 59786aa1b9SBasavaraj Natikar int (*get_rep_desc)(int sensor_idx, u8 rep_desc[]); 60786aa1b9SBasavaraj Natikar u32 (*get_desc_sz)(int sensor_idx, int descriptor_name); 61786aa1b9SBasavaraj Natikar u8 (*get_feat_rep)(int sensor_idx, int report_id, u8 *feature_report); 62786aa1b9SBasavaraj Natikar u8 (*get_in_rep)(u8 current_index, int sensor_idx, int report_id, 63786aa1b9SBasavaraj Natikar struct amd_input_data *in_data); 646947f312SBasavaraj Natikar }; 656947f312SBasavaraj Natikar 666947f312SBasavaraj Natikar #endif 67